summaryrefslogtreecommitdiff
path: root/include/dt-bindings
Commit message (Collapse)AuthorAgeFilesLines
* drivers: clk: Add clock driver for Intel N5X deviceSiew Chin Lim2021-08-251-0/+71
| | | | | | | Add clock manager driver for N5X. Provides clock initialization and get_rate functions. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
* rockchip: rk3188-power: sync power domain dt-binding header from LinuxJohan Jonker2021-08-111-0/+24
| | | | | | | | | In order to update the DT for rk3188 sync the power domain dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: rk3188-cru-common: sync clock dt-binding header from LinuxJohan Jonker2021-08-111-3/+9
| | | | | | | | | | In order to update the DT for rk3066 and rk3188 sync the clock dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* arm: dts: add i.MX8ULP dtsiPeng Fan2021-08-091-0/+247
| | | | | | Add i.MX8ULP dtsi Signed-off-by: Peng Fan <peng.fan@nxp.com>
* dt-bindings: ti-serdes-mux: Add defines for AM64 SoCKishon Vijay Abraham I2021-07-271-0/+5
| | | | | | | | | | AM64 has a single lane SERDES which can be configured to be used with either PCIe or USB. Define the possilbe values for the SERDES function in AM64 SoC here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-7-kishon@ti.com
* dt-bindings: phy: cadence-torrent: Add defines for refclk driverKishon Vijay Abraham I2021-07-271-0/+20
| | | | | | | | | Add defines for refclk driver used to route the refclk out of torrent SERDES. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-6-kishon@ti.com
* dt-bindings: phy: Add defines for AM64 SERDES WrapperKishon Vijay Abraham I2021-07-271-0/+21
| | | | | | | | Add defines for AM64 SERDES Wrapper. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-5-kishon@ti.com
* dt-bindings: phy: Add definitions for additional phy typesAswath Govindraju2021-07-271-0/+1
| | | | | | | | | | Add definitions for additional phy types that's used specifically for Torrent SERDES. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-4-kishon@ti.com
* dt-bindings: Resync omap & am33xx pinctrl bindingsPaul Barker2021-07-272-7/+135
| | | | | | These headers are updated to match the versions in Linux 5.13.1. Signed-off-by: Paul Barker <paul.barker@sancloud.com>
* x86: pci: Allow binding of some devices before relocationSimon Glass2021-07-151-0/+12
| | | | | | | | | | | | | At present only bridge devices are bound before relocation, to save space in pre-relocation memory. In some cases we do actually want to bind a device, e.g. because it provides the console UART. Add a devicetree binding to support this. Use the PCI_VENDEV() macro to encode the cell value. This is present in U-Boot but not used, so move it to the binding header-file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* lpc32xx: import device tree from LinuxTrevor Woerner2021-07-061-0/+58
| | | | | | | Import the dtsi, dts, and clock binding files for the lpc32xx ea3250 board directly and unmodified from the latest Linux kernel. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
* Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh ↵Tom Rini2021-06-282-0/+114
|\ | | | | | | | | | | into next - V3U Falcon board support
| * ARM: dts: renesas: Add R8A779A0 V3U DTs and headersMarek Vasut2021-06-242-0/+114
| | | | | | | | | | | | | | Import R8A779A0 V3U DTs and headers from Linux 5.12, commit 9f4ad9e425a1 ("Linux 5.12") . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
* | Merge tag 'v2021.07-rc5' into nextTom Rini2021-06-281-2/+4
|\ \ | |/ | | | | | | | | | | | | | | | | | | Prepare v2021.07-rc5 # gpg: Signature made Mon 28 Jun 2021 03:39:36 PM EDT # gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C # gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate] # Conflicts: # configs/am64x_evm_r5_defconfig
| * clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3Giulio Benetti2021-06-091-1/+2
| | | | | | | | | | | | | | Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
| * clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APBGiulio Benetti2021-06-091-2/+3
| | | | | | | | | | | | | | | | Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
* | rockchip: rk3568: add device tree fileElaine Zhang2021-06-181-0/+925
| | | | | | | | | | | | | | Add dts binding header for rk3568, files origin from kernel. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | clk: k210: Rewrite to remove CCFSean Anderson2021-06-171-48/+46
|/ | | | | | | | | | | | | | | | | | | | | | | | | | This is effectively a complete rewrite to remove all dependency on CCF. The code is now smaller, and so is the binary. It also takes up less memory at runtime (since we don't have to create 40 udevices). In general, I am much happier with this driver as much of the complexity and late binding has been removed. The k210_*_params structs which were previously used to initialize CCF clocks are now used as the complete configuration. Since we can write our own division logic, we can now do away with several "half" clocks which only existed to provide constant factors of two. The clock IDs have been renumbered to remove unused clocks. This may not be the last time they are renumbered, since we have diverged with Linux. There are also still a few clocks left out which may need to be added back in. In general, I have tried to leave out behavioral changes. However, there is a small bugfix regarding ACLK. According to the technical reference manual, its mux comes *after* its divider (which is present only for PLL0). This would have required yet another intermediate clock to fix with CCF, but with the new driver it is just 2 lines of code :) Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
* riscv: dts: add fu740 supportGreen Wan2021-05-312-0/+44
| | | | | | | | | | | Add dts support for fu740. The HiFive Unmatched support is based on fu740 cpu and drivers in following patch set. Signed-off-by: Green Wan <green.wan@sifive.com> [greentime.hu: set fu740 speed to 1.2GHz] Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
* arm64: zynqmp: Add pinctrl descriptionMichal Simek2021-05-191-0/+19
| | | | | | | ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM64Dave Gerlach2021-05-121-1/+4
| | | | | | | | Add pinctrl macros for AM64 SoC. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the soc dts files. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
* phy: marvell: add support for SFI1Igal Liberman2021-04-291-4/+5
| | | | | | | | | | | | | | | In CP115, comphy4 can be configured into SFI port1 (in addition to SFI0). This patch adds the option described above. In addition, rename all existing SFI/XFI references: COMPHY_TYPE_SFI --> COMPHY_TYPE_SFI0 No functional change for exsiting configuration. Change-Id: If9176222e0080424ba67347fe4d320215b1ba0c0 Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* phy: marvell: cp110: remove unused definitionsMarcin Wojtas2021-04-291-30/+20
| | | | | | | | | | | | Even if comphy types of SATA2/SATA3/SGMII3 and comphy speeds of 1.5G/3G/6.25G were referenced in the driver non configuration (dts) was using it. This patch removes unused definitions. Change-Id: I53ed6f9d3a82b9d18cb4e488bc14d3cf687f9488 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* phy: marvell: rename comphy related definitions to COMPHY_XXIgal Liberman2021-04-291-45/+45
| | | | | | | | | | | | | | | Currently, all comphy definitions are PHY_TYPE_XX and PHY_SPEEED_XX. Those definition might be confused with MDIO PHY definitions. This patch does the following changes: - PHY_TYPE_XX --> COMPHY_TYPE_XX - PHY_SPEED_XX --> COMPHY_SPEED_XX This improves readability, no functional change. Change-Id: I2bd1d9289ebbc5c16fa80f9870f797ea1bcaf5fa Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* phy: marvell: add comphy type PHY_TYPE_USB3jinghua2021-04-291-12/+13
| | | | | | | | | | | | | - For some Marvell SoCs, like armada-3700, there are both USB host and device controller, but on PHY level the configuration is the same. - The new type supports both USB device and USB host - This patch is cherry-picked from u-boot-2015 as-is. Change-Id: I01262027edd8ec23391cff6fb409b3009aedfbb9 Signed-off-by: jinghua <jinghua@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com>
* sunxi: DT: R40: Update device tree files from Linux 5.12Ivan Uvarov2021-04-283-5/+9
| | | | | | | | | | | Update R40 .dts{,i} and dt-binding headers to current version from kernel. Files taken from Linux 5.12-rc1 release (commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8) Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* ARM: dts: imx8mn: Add power domain nodesMarek Vasut2021-04-181-0/+15
| | | | | | | | | | | Add power domain nodes to DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
* ARM: dts: imx8mm: Add power domain nodesMarek Vasut2021-04-181-0/+22
| | | | | | | | | | | Add power domain nodes to DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
* Merge tag 'u-boot-stm32-20210409' of ↵WIP/09Apr2021Tom Rini2021-04-091-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm Add rt-thread art-pi board support based on STM32H750 SoC Add Engicam i.Core STM32MP1 SoM Add FIP header support for STM32programmer Update uart number when no serial device found for STM32MP1 Remove board_check_usb_power function when ADC flag is not set Update SPL size limitation for STM32MP1 Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
| * ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6dillon min2021-04-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patchset has following changes: - introduce stm32h750.dtsi to support stm32h750 value line - add pin groups for usart3/uart4/spi1/sdmmc2 - add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile) - add stm32h750i-art-pi.dts to support art-pi board - add stm32h750i-art-pi-u-boot.dtsi to support art-pi board (u-boot) art-pi board component: - 8MiB qspi flash - 16MiB spi flash - 32MiB sdram - ap6212 wifi&bt&fm the detail board information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | dt-bindings: add tda1997x and bindingsTim Harvey2021-04-081-0/+74
| | | | | | | | | | | | Add td1997x header from Linux to be included by dts files. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | Merge tag 'rockchip-for-v2021.07' of ↵WIP/05Apr2021Tom Rini2021-04-051-17/+14
|\ \ | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-rockchip - Fix rk3368 lion board support; - Fix px30 odroid-go2 board support; - Add rk3399 NanoPi R4s and NanoPi M4B board support;
| * | rockchip: rk3368: sync clock dt-binding header from LinuxHeiko Stuebner2021-03-301-17/+14
| | | | | | | | | | | | | | | | | | | | | This is the state as of v5.10 in Linux. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | Merge tag 'xilinx-for-v2021.07' of ↵WIP/31Mar2021-nextTom Rini2021-03-311-0/+16
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)
| * | xilinx: Sync DTs with Linux kernelMichal Simek2021-03-301-0/+16
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | arm: rmobile: Add Silicon Linux EK874 board supportLad Prabhakar2021-03-161-0/+8
|/ | | | | | | | | | | | | | | The EK874 development kit from Silicon Linux is made of CAT874 (the main board) and CAT875 (the sub board that goes on top of CAT874). This patch adds the required board support to boot Si-Linux EK874 board based on R8A774C0 SoC. DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi have been imported from Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* dt-bindings: Sync versaclock.h with upcoming 5.12-rc1Adam Ford2021-02-071-0/+13
| | | | | | | | | The versaclock doesn't have a driver yet, but there are a bunch of device tree updates for the Beacon RZ/G2 boards that won't compile without these. A driver is coming, so sync the bindings for now Signed-off-by: Adam Ford <aford173@gmail.com>
* arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-BootLokesh Vutla2021-02-041-0/+93
| | | | | | | | | Sync all J721e related v5.11-rc6 Linux kernel dts into U-Boot. HBMC nodes are not yet added in Linux kernel yet but were added in U-Boot. In order to avoid any regressions, hbmc nodes are kept intact. These will be added in kernel in future. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiWIP/25Jan2021Tom Rini2021-01-254-0/+188
|\ | | | | | | | | | | | | | | - New Allwinner H616 SoC support (sans Ethernet & USB) - H6 DT update - Tanix TX6 TV box support - OrangePi 3 support - OrangePi Zero2 (H616) support
| * arm: sunxi: add initial H616 DTSI and headersJernej Skrabec2021-01-254-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces H616 DTSI file and dt-bindings headers needed for device tree files. Files are taken from v3 Linux H616 support submission[1], as the H616 .dtsi file is not merged upstream yet. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632082.html Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | Merge tag 'mips-pull-2021-01-24' of ↵Tom Rini2021-01-252-0/+75
|\ \ | |/ |/| | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-mips - MIPS: add support for Mediatek MT7620 SoCs
| * reset: mtmips: add reset controller support for MediaTek MT7620 SoCWeijie Gao2021-01-241-0/+35
| | | | | | | | | | | | | | | | This patch adds reset controller bits definition header file for MediaTek MT7620 SoC Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * clk: add clock driver for MediaTek MT7620 SoCWeijie Gao2021-01-241-0/+40
| | | | | | | | | | | | | | | | | | This patch adds a clock driver for MediaTek MT7620 SoC. This driver provides clock gate control as well as getting clock frequency for CPU/SYS/XTAL and some peripherals. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* | Merge tag 'u-boot-imx-20210125' of ↵Tom Rini2021-01-253-7/+149
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx Changes for 2020.04 ------------------- - new board: Phytec phyCORE-i.MX8MP i.MX8MN Beacon EmbeddedWorks devkit - Fixes: several nanbcb fixes fix for imx8mm_beacon - further switch to distro boot commands - DM: DM Ether for MX6UL CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
| * | arm: dts: imx8mq: sync dts from Linux KernelPeng Fan2021-01-231-1/+30
| | | | | | | | | | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: dts: imx8mp: sync dts from Linux KernelPeng Fan2021-01-231-3/+92
| | | | | | | | | | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: dts: imx8mn: sync dts from Linux KernelPeng Fan2021-01-231-3/+27
| |/ | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | Merge tag 'u-boot-atmel-2021.04-b' of ↵Tom Rini2021-01-251-2/+5
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-atmel Second set of u-boot-atmel features for 2021.04 cycle This feature set includes macb updates for all interfaces and new sama7g5 variant support; micrel ksz9031 DLL support; a new board from Giant based on Adafruit feather form factor which contains a SAMA5D27 SoC; several fixes regarding the NAND flash PMECC block; and pincontrol drive strength support for pio4 controller.
| * pinctrl: at91-pio4: implement drive strength supportEugen Hristev2021-01-221-0/+4
| | | | | | | | | | | | | | Implement drive strength support, by preserving the same bindings as in Linux. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| * dt-bindings: pinctrl: at91-pio4: update license to SPDX styleEugen Hristev2021-01-221-2/+1
| | | | | | | | | | | | Update license header to SPDX style Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
View Lorry Controller Status