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* Merge tag 'u-boot-imx-20220726' of ↵Tom Rini2022-07-2613-38/+495
|\ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20220726 ------------------- i.MX for 2022.10 - Added i.MX93 architecture CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12891
| * arm: dts: Add i.MX93 SoC DTSi filePeng Fan2022-07-262-0/+215
| | | | | | | | | | | | | | | | Add the DTSi file and DT header files for i.MX93 SoC Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8mm: synchronise device tree with linuxMarcel Ziswiler2022-07-251-1/+8
| | | | | | | | | | | | Synchronise device tree with linux v5.19-rc5. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * imx8mq: synchronise device tree with linuxMarcel Ziswiler2022-07-252-19/+3
| | | | | | | | | | | | Synchronise device tree with linux v5.19-rc5. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * imx8mn: synchronise device tree with linuxMarcel Ziswiler2022-07-253-1/+43
| | | | | | | | | | | | Synchronise device tree with linux v5.19-rc5. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * colibri_vf: synchronise device tree with linuxMarcel Ziswiler2022-07-251-0/+202
| | | | | | | | | | | | | | | | | | | | | | Synchronise device tree with linux v5.19-rc5. Please note that this also means that instead of the previous "generic" U-Boot specific carrier board agnostic device tree we are now using the regular one for the Colibri Evaluation (carrier) board V3 (e.g. vf610-colibri-eval-v3.dtb rather than the previous vf610-colibri.dtb). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * imx7s/d: synchronise device trees with linuxMarcel Ziswiler2022-07-252-12/+6
| | | | | | | | | | | | Synchronise device tree with linux-next next-20220708. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * imx6dl/imx6qdl: synchronise device trees with linuxMarcel Ziswiler2022-07-251-5/+9
| | | | | | | | | | | | Synchronise device trees with linux-next next-20220708. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * imx8mm: Sync device tree with linux-next 20220711Fabio Estevam2022-07-251-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync imx8mm.dtsi device tree with linux-next 20220711. The main motivation for doing this sync is the sha256 regression reported by Andrey Zhizhikin [1]. The linux-next kernel has the following commit, which disables the job ring 0 and fixes the problem: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20220715&id=dc9c1ceb555ff661e6fc1081434600771f29657c [1] https://lore.kernel.org/u-boot/AM6PR06MB46912207D9460CD9924F35DAA68B9@AM6PR06MB4691.eurprd06.prod.outlook.com/T/#t Signed-off-by: Fabio Estevam <festevam@denx.de>
* | dt-bindings: versal: Add versal reset IDsMichal Simek2022-07-261-0/+105
| | | | | | | | | | | | | | | | The same file is already the part of Linux kernel that's why add it also to u-boot to be able to use it in source code and DT files. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1c3bc464536a9bf64a2e8bfe18a938c9cb490620.1657192249.git.michal.simek@amd.com
* | clocks: qcom: Add clock driver for QCS404 SoCSumit Garg2022-07-251-0/+180
| | | | | | | | | | | | | | | | Currently this clock driver initializes clocks for UART and eMMC. Along with this import "qcom,gcc-qcs404.h" header from Linux mainline to support DT bindings. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
* | clocks: sdm845: Import qcom,gcc-sdm845.hSumit Garg2022-07-251-0/+246
|/ | | | | | | | | Rather than using magic numbers as clock ids for peripherals import qcom,gcc-sdm845.h from Linux to be used standard macros for clock ids. So start using corresponding clk-id macro for debug UART. Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* reset: mtmips: add reset controller support for MediaTek MT7621 SoCWeijie Gao2022-07-131-0/+38
| | | | | | | This patch adds reset controller bits definition header file for MediaTek MT7621 SoC Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* clk: mtmips: add clock driver for MediaTek MT7621 SoCWeijie Gao2022-07-131-0/+46
| | | | | | | | | This patch adds a clock driver for MediaTek MT7621 SoC. This driver provides clock gate control as well as getting clock frequency for CPU/SYS/XTAL and some peripherals. Reviewed-by: Sean Anderson <seanga2@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* ARM: dts: stm32mp15: alignment with v5.19Patrick Delaunay2022-07-124-2/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Device tree alignment with Linux kernel v5.19-rc1 - ARM: dts: stm32: Add alternate pinmux for ethernet0 pins - ARM: dts: stm32: Add alternate pinmux for mco2 pins - ARM: dts: stm32: fix pinctrl node name warnings (MPU soc) - ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group - dt-bindings: clock: add IDs for SCMI clocks on stm32mp15 - dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15 - dt-bindings: clock: stm32mp15: rename CK_SCMI define - dt-bindings: reset: stm32mp15: rename RST_SCMI define - dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15 - dt-bindings: clk: cleanup comments - ARM: dts: align SPI NOR node name with dtschema - ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15 - ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1) - ARM: dts: stm32: move SCMI related nodes in a dedicated file for stm32mp15 + patch from stm32-dt-for-v5.19-fixes-2 - ARM: dts: stm32: move SCMI related nodes in a dedicated file for stm32mp15 - ARM: dts: stm32: fix pwr regulators references to use scmi - ARM: dts: stm32: use the correct clock source for CEC on stm32mp151 - ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board - ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI - ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* dt-bindings: sound: add microchip,pdmc.hEugen Hristev2022-06-281-0/+13
| | | | | | | | Include microchip,pdmc.h from Linux. This file includes required defines for DT successful build. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
* dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62Suman Anna2022-06-101-0/+3
| | | | | | | | | | | | | | | | Add pinctrl macros for AM62x SoCs. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the SoC dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
* dt-bindings: sunxi: Update clock/reset binding headersSamuel Holland2022-05-238-23/+16
| | | | | | | Some devicetree updates make use of newly-exposed clocks and resets. To support that, copy the binding headers from the Linux v5.18-rc1 tag. Signed-off-by: Samuel Holland <samuel@sholland.org>
* clk: nuvoton: Add support for NPCM750Jim Liu2022-05-051-0/+46
| | | | | | | | Add clock controller driver for NPCM750 Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> Signed-off-by: Stanley Chu <yschu@nuvoton.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
* arm: nuvoton: Add support for Nuvoton NPCM750 BMCJim Liu2022-05-051-0/+91
| | | | | | Add basic support for the Nuvoton NPCM750 EVB (Poleg). Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
* dt-bindings: leds: import common led bindings from linux 5.17Pali Rohár2022-04-281-11/+37
| | | | | | This allows usage of LED_COLOR_ID_RGB macro in DTS files. Signed-off-by: Pali Rohár <pali@kernel.org>
* imx: power-domain: Add i.MX8MP supportMarek Vasut2022-04-211-0/+46
| | | | | | | | | | | Add i.MX8MP power domain handling into the driver. This is based on the Linux GPCv2 driver state which is soon to be in Linux next. Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* rockchip: rk3288-cru: sync the clock dt-binding header from LinuxJohan Jonker2022-04-181-1/+12
| | | | | | | | | | | In order to update the DT for rk3288 sync the clock dt-binding header. This is the state as of v5.17 in Linux. Keep SCLK_MAC_PLL in use for rk3288 clock driver. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: rk3288-power: sync power domain dt-binding header from LinuxJohan Jonker2022-04-182-11/+32
| | | | | | | | | | In order to update the DT for rk3288 sync the power domain dt-binding header. This is the state as of v5.17 in Linux. Change location to be more in line with other SoCs. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: rk3228-cru: sync the clock dt-binding header from LinuxJohan Jonker2022-04-181-2/+52
| | | | | | | | | | In order to update the DT for rk3228 sync the clock dt-binding header. This is the state as of v5.17 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: rk3228-power: sync power domain dt-binding header from LinuxJohan Jonker2022-04-181-0/+21
| | | | | | | | | | In order to update the DT for rk3228 sync the power domain dt-binding header. This is the state as of v5.17 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* rockchip: rk3066-power: sync power domain dt-binding header from LinuxJohan Jonker2022-04-181-0/+22
| | | | | | | | | In order to update the DT for rk3066 sync the power domain dt-binding header. This is the state as of v5.12 in Linux. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* ARM: dts: imxrt10..-evk: Linux moved pins-imxrt1020 to dtsJesse Taube2022-04-122-1754/+0
| | | | | | | The Linux kernel moved dt-bindings/pinctrl/pins-imxrt to the device tree This patch move it in U-Boot as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
* dt-bindings: imx8mq-clock: add mainline definitionsAngus Ainslie2022-04-121-1/+15
| | | | | | | | | Sync the clock ids with the mainline kernel 077de6e1c9f ("clk: imx8mq: add PLL monitor output") Signed-off-by: Angus Ainslie <angus@akkea.ca> Reviewed-by: Marek Vasut <marex@denx.de>
* dt-bindings: xilinx: Add missing ids for PDMichal Simek2022-04-052-0/+22
| | | | | | | | There are some new power domain IDs which are used in Linux kernel that's why add them here too. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/e6092e1d3766c0ac11bf620820739c93ab677a85.1648626981.git.michal.simek@xilinx.com
* dt-bindings: phy: Sync phy.h with Linux kernelMichal Simek2022-03-291-1/+3
| | | | | | | | | | | | | | Make sure that both files are in sync to have the same values in DTs. The patch is fixing SPDX license as is used in the kernel and adding new values for PHY_TYPE_DPHY and PHY_TYPE_CPHY. SPDX license change was done by: Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de and new value added by: Link: https://lore.kernel.org/r/20210617144349.28448-3-jonathan@marek.ca Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/06dbc03d4c9ac5d621341d8fb8cc16f489062b39.1648113469.git.michal.simek@xilinx.com
* rockchip: rk3399: Add support for chromebook_kevinMarty E. Plummer2022-03-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Kevin, an RK3399-based convertible chromebook that is very similar to Bob. This patch is mostly based on existing support for Bob, with only minor changes for Kevin-specific things. Unlike other Gru boards, coreboot sets Kevin's center logic to 925 mV, so adjust it here in the dts as well. The rk3399-gru-kevin devicetree has an unknown event code reference which has to be defined, set it to the Linux counterpart. The new defconfig is copied from Bob with the diffconfig: DEFAULT_DEVICE_TREE "rk3399-gru-bob" -> "rk3399-gru-kevin" DEFAULT_FDT_FILE "rockchip/rk3399-gru-bob.dtb" -> "rockchip/rk3399-gru-kevin.dtb" VIDEO_ROCKCHIP_MAX_XRES 1280 -> 2400 VIDEO_ROCKCHIP_MAX_YRES 800 -> 1600 +TARGET_CHROMEBOOK_KEVIN y With this Kevin can boot from SPI flash to a usable U-Boot prompt on the display with the keyboard working, but cannot boot into Linux for unknown reasons. eMMC starts in a working state but fails to re-init, microSD card works but at a lower-than-expected speed, USB works but causes a hang on de-init. There are known workarounds to solve eMMC and USB issues. Cc: Marty E. Plummer <hanetzer@startmail.com> Cc: Simon Glass <sjg@chromium.org> [Alper: commit message, resync config with Bob, update MAINTAINERS, add to Rockchip doc, add Kconfig help message, set regulator] Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* arm: a37xx: Update DTS files to version from upstream Linux kernelPali Rohár2022-02-171-0/+16
| | | | | | | | This change updates all Armada 37xx DTS files to version which is used by Linux kernel v5.18. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
* dt-bindings: phy: cadence-sierra: Add binding to specify SSC modeSwapnil Jakhade2022-02-081-0/+4
| | | | | | | Add binding to specify Spread Spectrum Clocking mode used Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
* dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2Aswath Govindraju2022-02-081-0/+3
| | | | | | | | | | | | | | | Add pinctrl macros for J721S2 SoC. These macro definitions are similar to that of J721E, but adding new definitions to avoid any naming confusions in the soc dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
* dt-bindings: ti-serdes-mux: Add defines for J721S2 SoCAswath Govindraju2022-02-081-0/+22
| | | | | | | | There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES lane mux can select upto 4 different IPs. Define all the possible functions. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
* arm: dts: imx8mq kernel dts updatesAngus Ainslie2022-02-051-0/+48
| | | | | | | | | | | Update to the 5.16 imx8mq dts files and dt bindings Changes since v1: Dropped rfkill.h that is not in linux mainline yet. Signed-off-by: Angus Ainslie <angus@akkea.ca> Reviewed-by: Fabio Estevam <festevam@gmail.com>
* dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phyRichard Zhu2022-02-051-0/+14
| | | | | | | | | | | | | Add binding for reference clock PAD modes of the i.MX8 PCIe PHY. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1638432158-4119-2-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Marek Vasut <marex@denx.de> # Pick from Linux f6f787874aa5 ("dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy")
* ARM: dts: suniv: Add device tree files and bindings for F1C100sIcenowy Zheng2022-02-042-0/+108
| | | | | | | | | | | Add device tree files for suniv and Lichee Pi Nano it is a board based on F1C100s. dt-bindings/dts are synced with 5.16.0 Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* Merge tag 'xilinx-for-v2022.04-rc1' of ↵Tom Rini2022-01-191-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2022.04-rc1 gpio: - Add modepin driver net: - Save random mac addresses to eth variable zynqmp gem: - Add support for mdio bus DT description - Add support for reset and SGMII phy configuration - Reduce timeout for MDIO accesses zynqmp clk: - Fix clock handling for gem and usb phy: - Add zynqmp phy/serdes driver serial: - Add one missing compatible string microblaze: - Symbol alignement - SPL fixups - Code cleanups zynqmp: - Various dt changes, DP pre-reloc, gem resets, gem clocks - Switch SOM to shared psu configuration - Move dcache handling to firmware driver - Workaround gmii2rgmii DT description issue - Enable broadcasts again - Change firmware enablement logic - Small adjustement in firmware driver versal: - Support new mmc@ DT nodes - Fix run time variable handling - Add missing I2C_PMC ID for power domain
| * dt-bindings: versal: Add new PM_DEV_I2C_PMC macroSandeep Gundlupet Raju2022-01-051-1/+2
| | | | | | | | | | | | | | | | Add new macro for PMC I2C power domain. Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/0bf164f937df551d689dda2a35f9489c2e46b4ab.1638277017.git.michal.simek@xilinx.com
* | ARM: dts: sync Actions Semi S700 DT from Linux v5.16-rc3Amit Singh Tomar2022-01-181-0/+19
| | | | | | | | | | | | | | This Synchronizes the Actions Semi S700 SoC DT changes from commit "g58e1100fdc59" ("Linux v5.16-rc3"). Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
* | net: phy: add TI DP83869HM ethernet driverDominic Rath2022-01-151-0/+60
| | | | | | | | | | | | | | | | | | This driver is based on an older downstream TI kernel, with changes and cleanups to work with mainline device-tree bindings. Signed-off-by: Dominic Rath <rath@ibv-augsburg.net> Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* | arm: rpi: Sync rpi dts files from LinuxSimon Glass2021-12-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync these files, obtained from Linux v5.15. This adds a devicetree file for rpi_4 which was not there before. Testing shows no change so far as I can see: - boots to U-Boot prompt on rpi0, rpi2 - boots to distro on rpi3 - boots to distro on rpi4 I am assuming that syncing with Linux is safe, but the maintainer should know for sure. Signed-off-by: Simon Glass <sjg@chromium.org>
* | riscv: dts: Split Microchip device treePadmarao Begari2021-12-022-0/+213
|/ | | | | | | | | | The device tree split into .dtsi and .dts files, common device node for eMMC/SD, enable I2C1, UART1 for console instead of UART0, enable the DDR 2GB memory and in that 288MB memory is reserved for fabric buffer. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
* arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linuxMichael Walle2021-11-091-0/+15
| | | | | | | | | | | | | | | | | | | | Now that everything is prepared, copy the fsl-ls1028a.dtsi from the linux kernel v5.14.12. Notable changes: - second watchdog added - the number of chip selects of the SPI controller is now correct and reflects what the hardware offers - the LPUARTs have the correct clock parent - USB controllers are enabled by default, which was already the case before this sync because all board enabled all the USB controller nodes. A linux patch to fix this is pending. - the eSDHC controller changes from big-endian to little-endian, but that property seems to be not used at all. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* arm: dts: apple: Add preliminary device treesMark Kettenis2021-10-313-0/+38
| | | | | | | | | | | | | | | | | | | Add preliminary device trees for the Apple M1 mini (2020) and Apple M1 Macbook Pro 13" (2020). Device tree bindings for the Apple M1 SoC are still being formalized and these device trees will be synchronized with the Linux kernel as needed. The device trees in this commit are based on the initial Apple M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl, pmgr, usb based on bindings on track for inclusion in Linux 5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and watchdog that don't have a proposed binding yet. These device trees are provided as a reference only as U-Boot uses the device tree passed by the m1n1 bootloader. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: meson: Sync Amlogic DT from Linux 5.14Neil Armstrong2021-10-072-1/+27
| | | | | | | | Import Amlogic DT changes from Linux commit 7d2a07b76933 ("Linux 5.14"), dt-bindings clock changes and new meson-g12b-gsking-x.dts, meson-sm1-bananapi-m5 & odroid-hc4 boards. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* arm: ti: k3: Resync dts files and bindings with Linux Kernel v5.14Tom Rini2021-10-031-18/+21
| | | | | | | | | | | | This resyncs the dts files for all of the currently in-tree K3 platforms, along with relevant bindings, with the v5.14 Linux Kernel release. Of note are that the main-navss/mcu-navss nodes were renamed to main_navss / mcu_navss and so the u-boot.dtsi files needed to be updated to match. Tested on j721e_evm and am65x_evm. Signed-off-by: Tom Rini <trini@konsulko.com>
* dt-bindings: pinctrl: k3: Synchronize with v5.14 kernelNishanth Menon2021-10-031-27/+24
| | | | | | Synchronize with the upstream version as of v5.14 kernel tag Signed-off-by: Nishanth Menon <nm@ti.com>
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