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* dm: device: Allow using uclass_find_device_by_seq() without OF_CONTROLJean-Jacques Hiblot2018-12-101-0/+13
| | | | | | | | | | | | If OF_CONTROL is not enabled and DM_SEQ_ALIAS is enabled, we must assign an alias (requested sequence number) to devices that belongs to a class with the DM_UC_FLAG_SEQ_ALIAS flag. Otherwise uclass_find_device_by_seq() cannot be used to get/probe a device. In particular i2c_get_chip_for_busnum() cannot be used. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* Merge git://git.denx.de/u-boot-marvellTom Rini2018-12-091-14/+34
|\ | | | | | | | | - Sync DDR training with Marvell code for Armada 38x by Chris - Misc updates to Armada 38x Helios4 board by Aditya
| * arm: mvebu: helios4: Enable SPI flash supportAditya Prayoga2018-12-081-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable SPI flash support under U-Boot and SPL. The ENV size and offset, ported from U-Boot 2013.01 Marvell version: 2015_T1.0p16 To create U-Boot image for SPI flash, user would need to replace * CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC with CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI * CONFIG_ENV_IS_IN_MMC with CONFIG_ENV_IS_IN_SPI_FLASH Signed-off-by: Aditya Prayoga <aditya@kobol.io> Reviewed-by: Stefan Roese <sr@denx.de> Tested-By: Dennis Gilmore <dgilmore@redhat.com> Reviewed-By: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: mvebu: helios4: Reduce U-Boot image sizeAditya Prayoga2018-12-081-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused I2C support in SPL and use simple_malloc functions to reduce SPL image size. Since Helios4 does not have any PCIe allocated on SerDes, remove PCI support. MTD layer on top of SPI flash is not needed, remove it also. Signed-off-by: Aditya Prayoga <aditya@kobol.io> Reviewed-by: Stefan Roese <sr@denx.de> Tested-By: Dennis Gilmore <dgilmore@redhat.com> Reviewed-By: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm: mvebu: helios4: mmc: move environment before 1MAditya Prayoga2018-12-081-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Store the environment before 1M into the block device. This constant is easier to remember, saves a little space, and is in line with what SolidRun's 2018.01-based fork does for the clearfog. Signed-off-by: Josua Mayer <josua.mayer97@gmail.com> [ Aditya Prayoga: * Port forward] Signed-off-by: Aditya Prayoga <aditya@kobol.io> Reviewed-by: Stefan Roese <sr@denx.de> Tested-By: Dennis Gilmore <dgilmore@redhat.com> Reviewed-By: Dennis Gilmore <dgilmore@redhat.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Roll CRC16-CCITT into the hash infrastructurePhilipp Tomsich2018-12-081-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CRC16-CCITT checksum function is useful for space-constrained applications (such as obtaining a checksum across a 2KBit or 4KBit EEPROM) in boot applications. It has not been accessible from boot scripts until now (due to not having a dedicated command and not being supported by the hash infrstructure) limiting its applicability outside of custom commands. This adds the CRC16-CCITT (poly 0x1021, init 0x0) algorithm to the list of available hashes and adds a new crc16_ccitt_wd_buf() to make this possible. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [trini: Fix building crc16.o for SPL/TPL] Signed-off-by: Tom Rini <trini@konsulko.com>
* | lib: merge CRC16-CCITT into u-boot/crc.hPhilipp Tomsich2018-12-082-43/+3
| | | | | | | | | | | | | | | | | | This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for rolling CRC16 into the hash infrastructure. Given that CRC8, CRC32 and CRC32-C already have their prototypes in a single header file, it seems a good idea to also include CRC16-CCITT in the same. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2018-12-071-16/+54
|\ \ | |/ |/| | | | | - Various axp209 fixes - Fixes for OLinuXino-A20-Lime2 / OLinuXino-A20-Lime2-eMMC
| * power: axp209: Add support for voltage rate control on LDO3Olliver Schinagl2018-12-071-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AXP209 LDO3 regulator supports voltage rate control, or can set a slew rate. This allows for the power to gradually rise up to the desired voltage, instead of spiking up as fast as possible. Reason to have this can be to reduce the inrush currents for example. There are 3 slopes to choose from, the default, 'none' is a voltage rise of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise. In ideal world (where vendors follow the recommended design guidelines) this setting should not be enabled by default. Unless of course AXP209 crashes instead of reporting overcurrent condition as it normally should do in this case. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * power: axp209: Reduce magic values by adding defines for LDO[234]Olliver Schinagl2018-12-071-0/+13
| | | | | | | | | | | | | | | | | | The AXP209 has a few 'magisc-ish' values that are better served with clear defines. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * power: axp209: Define the chip version maskOlliver Schinagl2018-12-071-0/+2
| | | | | | | | | | | | | | | | Use a define for the chip version mask on the axp209. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * power: axp209: Use BIT() macroOlliver Schinagl2018-12-071-16/+18
| | | | | | | | | | | | | | | | Use the standard BIT() macro for bitfield definitions in headers. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
* | arm: dts: am33xx: Sync dts with Linux 4.20.0Felix Brack2018-12-071-0/+227
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch synchronizes the am33xx SoC specific files with those from Linux 4.20.0. Hence all board maintainers of am33xx based boards are on the cc list. The main purpose of this patch is to prevent further diverging of the dts files from U-Boot and those from Linux. It aims to set the stage for the synchronization of board specific dts files. Example: I'm the maintainer of the PDU001 board: once this patch is applied successfully I will make changes to the board specific dts file in Linux only and then post a patch with a copy of this exact dts file to U-Boot. This will make U-Boot and Linux remain in sync. The stumbling block of https://patchwork.ozlabs.org/patch/943627 was removed by the patch https://patchwork.ozlabs.org/patch/962428 from Lokesh Vutla (many thanks!). This omap-serial driver allows using the Linux am33xx.dtsi file in U-Boot. Other changes to dts and dtsi files made by this patch are mainly to prevent _new_ warnings during the build process. Especially the warning at pinmux@800 stating 'unnecessary #address-cells/#size-cells without "ranges" or child "reg"' was not removed. This warning is a good example showing the benefit of the synchronization: if it needs to be fixed it will be fixed in Linux and ported back to U-Boot. Buildman reports all 46 am33xx SoC based boards to build fine, with warnings of course. Nevertheless this patch should be tested thoroughly on as many boards as possible to prevent any collateral damage. Signed-off-by: Felix Brack <fb@ltec.ch> Reviewed-by: Tom Rini <trini@konsulko.com>
* | spl/tpl: change banner into upper caseHeiko Schocher2018-12-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | commit d6330064634a ("spl: Add a define for SPL_TPL_PROMPT") changes the SPL/TPL banner from upper case into lower case. As SPL and TPL are three-letter acronyms and they are written in upper case, change it back to upper case. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dma: add channels supportÁlvaro Fernández Rojas2018-12-072-3/+348
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds channels support for dma controllers that have multiple channels which can transfer data to/from different devices (enet, usb...). DMA channle API: dma_get_by_index() dma_get_by_name() dma_request() dma_free() dma_enable() dma_disable() dma_prepare_rcv_buf() dma_receive() dma_send() Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> [grygorii.strashko@ti.com: drop unused dma_get_by_index_platdata(), add metadata to send/receive ops, add dma_prepare_rcv_buf(), minor clean up] Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dma: move dma_ops to dma-uclass.hÁlvaro Fernández Rojas2018-12-072-22/+39
| | | | | | | | | | | | | | | | | | | | | | Move dma_ops to a separate header file, following other uclass implementations. While doing so, this patch also improves dma_ops documentation. Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
* | dm: Add Hardware Spinlock classBenjamin Gaignard2018-12-062-0/+141
|/ | | | | | | | | | This is uclass for Hardware Spinlocks. It implements two mandatory operations: lock and unlock and one optional relax operation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* rockchip: rk3399: Add common Rock960 family from VamrsManivannan Sadhasivam2018-12-061-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs. It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition) 96Boards. Below are some of the key differences between both Rock960 and Ficus boards: 1. Different host enable GPIO for USB 2. Different power and reset GPIO for PCI-E 3. No Ethernet port on Rock960 The common board support will be utilized by both boards. The device tree has been organized in such a way that only the properties which differ between both boards are placed in the board specific dts and the reset of the nodes are placed in common dtsi file. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [Added instructions for SD card boot] Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
* usb: dwc2-otg: make regs_phy (in platdata) a uintptr_tPhilipp Tomsich2018-12-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | The regs_phy field of the platform data structure for dwc2-otg is today declared an unsigned int, but will eventually be cast into a void* for a writel operation. This triggers errors on modern GCC versions. E.g. we get the following error with GCC 6.3: drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable': arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) ^ arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl' #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^~~~~~~~~~~ drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 'writel' writel(val, pdata->regs_phy + reg->offset); ^~~~~~ This commit changes regs_phy to be a uintptr_t to ensure that it is large enough to hold any valid pointer (and fix the associated warning). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* Merge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dmTom Rini2018-12-0513-26/+452
|\ | | | | | | | | | | | | Minor sandbox enhancements / fixes tpm improvements to clear up v1/v2 support buildman toolchain fixes New serial options to set/get config
| * serial: ns16550: Read reg-io-width from device treeAndy Shevchenko2018-12-051-0/+2
| | | | | | | | | | | | | | Cache the value of the reg-io-width property for the future use. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * serial: ns16550: Group reg_* members of ns16550_platdataAndy Shevchenko2018-12-051-1/+1
| | | | | | | | | | | | | | | | | | Group reg_* members of struct ns16550_platdata together for better maintenance. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: serial: Introduce ->getinfo() callbackAndy Shevchenko2018-12-052-0/+43
| | | | | | | | | | | | | | | | | | | | New callback will give a necessary information to fill up ACPI SPCR table, for example. Maybe used later for other purposes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Change ADR_SPACE_SYSTEM_IO to SERIAL_ADDRESS_SPACE_IO to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: serial: Add ->getconfig() callbackAndy Shevchenko2018-12-052-3/+24
| | | | | | | | | | | | | | | | | | In some cases it would be good to know the settings, such as parity, of current serial console. One example might be an ACPI SPCR table to generate using these parameters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: core: add functions to get/remap I/O addresses by nameÁlvaro Fernández Rojas2018-12-052-0/+49
| | | | | | | | | | | | | | | | | | | | This functions allow us to get and remap I/O addresses by name, which is useful when there are multiple reg addresses indexed by reg-names property. This is needed in bmips dma/eth patch series, but can also be used on many other drivers. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: (re)sort uclass ids alphabeticallyPhilipp Tomsich2018-12-051-4/+4
| | | | | | | | | | | | | | | | | | The comment in uclass-id.h states that "U-Boot uclasses start here - in alphabetical order" but the subsequent list is not sorted alphabetically. This reestablishes order. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * dm: rtc: Fix function name in commentPhilipp Tomsich2018-12-051-1/+1
| | | | | | | | | | | | | | The documentation comment for dm_rtc_set was referring to dm_rtc_put instead. Fix it. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * Add inttypes.hSimon Glass2018-12-051-0/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even if U-Boot does not use this, some libraries do. Add back this header file so that the build does not fall back to using the host version, which may include stdint.h and break the build due to conflicts with uint64_t, etc. This partially reverts commit dee37fc99d94 ("Remove <inttypes.h> includes and PRI* usages in printf() entirely") The only change from the file that was in U-Boot until recently is that it now comes twice as close to passing checkpatch. The remaining warnings pertain to the typedefs, which checkpatch does not like. Signed-off-by: Simon Glass <sjg@chromium.org>
| * Add UINT32_MAX and UINT64_MAXSimon Glass2018-12-051-0/+4
| | | | | | | | | | | | | | | | These constants are defined by stdint.h but not by kernel.h, which is its stand-in in U-Boot. Add the definitions so that libraries which expect stdint.h constants can work. Signed-off-by: Simon Glass <sjg@chromium.org>
| * time: Update mdelay() to delay in one large chunkSimon Glass2018-12-051-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current function delays in one millisecond at a time. This does not work well on sandbox since it results in lots of calls to usleep(1000) in a tight loop. This makes the sleep duration quite variable since each call results in a sleep of *at least* 1000us, but possibly more. Depending on how busy the machine is, the sleep time can change quite a bit. We cannot fix this in general, but we can reduce the effect by doing a single sleep. The multiplication works fine with an unsigned long argument up until a sleep time of about 4m milliseconds. This is over an hour and we can be sure that delays of that length are not useful. Update the mdelay() function to call udelay() only once with the calculated delay value. Signed-off-by: Simon Glass <sjg@chromium.org>
| * input: i8042: Use remove() instead of exported functionsSimon Glass2018-12-051-15/+0
| | | | | | | | | | | | | | | | | | | | | | We should not have exported functions in a driver. The i8042_disable() function is used to disable the keyboard. Provide a remove() method instead, which is the standard way of disabling a device. We could potentially add a method to flush input but that does not seem necessary. Signed-off-by: Simon Glass <sjg@chromium.org>
| * tpm: Add non-volatile index attributes needed for v2Simon Glass2018-12-051-0/+33
| | | | | | | | | | | | | | Version-2 TPMs support attributes for nvdata. Add definitions to the header file so that clients can use it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * tpm: Export tpm_clear_and_reenable()Simon Glass2018-12-051-0/+8
| | | | | | | | | | | | | | This function is intended to be exported but is not. Add it to the header file. Signed-off-by: Simon Glass <sjg@chromium.org>
| * tpm: Remove use of build-time TPM versionsSimon Glass2018-12-051-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | There is only one place in the code which assumes at build-time that we are using either a v1 or a v2 TPM. Fix this up and add a new function to return the version of a TPM. Supported TPM versions (v1 and v2) can be enabled independently and it is possible to use both versions at once. This is useful for sandbox when running tests. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2018-12-0521-78/+59
|\ \ | | | | | | | | | | | | | | | | | | | | | - Various MTD fixes from Boris - Zap various unused / legacy paths. - pxa3xx NAND update from Miquel Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mtd: Don't stop MTD partition creation when it fails on one deviceBoris Brezillon2018-12-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MTD partition creation code is a bit tricky. It tries to figure out when things have changed (either MTD dev list or mtdparts/mtdids vars) and when that happens it first deletes all the partitions that had been previously created and then creates the new ones based on the new mtdparts/mtdids values. But before deleting the old partitions, it ensures that none of the currently registered parts are being used and bails out when that's not the case. So, we end up in a situation where, if at least one MTD dev has one of its partitions used by someone (UBI for instance), the partitions update logic no longer works for other devs. Rework the code to relax the logic and allow updates of MTD parts on devices that are not being used (we still refuse to updates parts on devices who have at least one of their partitions used by someone). Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
| * | mtd: Delete partitions attached to the device when a device is deletedBoris Brezillon2018-12-061-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | If we don't do that, partitions might still be exposed while the underlying device is gone. Fixes: 2a74930da57f ("mtd: mtdpart: implement proper partition handling") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
| * | mtd: Add a function to report when the MTD dev list has been updatedBoris Brezillon2018-12-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to parse mtdparts/mtids again everytime a device has been added/removed from the MTD list, but there's currently no way to know when such an update has been done. Add an ->updated field to the idr struct that we set to true every time a device is added/removed and expose a function returning the value of this field and resetting it to false. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
| * | spi: Zap CONFIG_HARD_SPIJagan Teki2018-11-2717-54/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In legacy CONFIG_HARD_SPI initalizing spi_init code, which was removed during dm conversion cleanup. So remove the dead instances of CONFIG_HARD_SPI, and related code. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | spi: Remove unused mpc8xx codeJagan Teki2018-11-271-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - spi_init_f - spi_init_r - spi_read - spi_write these spi calls are exclusively for mpc8xx, but the relevant driver is not available so remove it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | spi: Remove used spi_initJagan Teki2018-11-271-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | spi_init used in some areas in tree, but the respective drivers will remove in future patches. So remove the same instances. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | spi: Remove unused spi_initJagan Teki2018-11-271-7/+0
| | | | | | | | | | | | | | | | | | | | | Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | dm: platform_data: spi: s/pl022_spi.h/spi_pl022.hJagan Teki2018-11-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Rename platform_data include file as spi_pl022.h from pl022_spi.h, this is generic notation used for spi platdata include files. Acked-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | spi: pl022: Simplify platdata codeJagan Teki2018-11-271-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pl022 spi driver support both OF_CONTROL and PLATDATA, this patch is trying to simplify the code that differentiating platdata vs of_control. - Move OF_CONTROL code at one place - Handle clock setup code directly in pl022_spi_ofdata_to_platdata Acked-by: Quentin Schulz <quentin.schulz@bootlin.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * | regmap: add regmap_read_poll_timeout() helperNeil Armstrong2018-11-241-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the regmap_read_poll_timeout() macro based on the Linux implementation to simplify register polling with configurable timeout and sleep. Tested-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | | Merge tag 'video-updates-for-2019.01-rc2' of git://git.denx.de/u-boot-videoTom Rini2018-12-051-1/+3
|\ \ \ | |_|/ |/| | | | | video, bmp and cls command updates
| * | video: Allow driver to specify the line lengthSimon Glass2018-12-031-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present line_length is always calculated in video_post_probe(). But some hardware may use a different line length, e.g. with a 1366-wide display. Allow the driver to set this value if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Anatolij Gustschin <agust@denx.de>
* | | ARM: dts: rmobile: Sync Gen3 DTs with Linux 4.19.6Marek Vasut2018-12-043-4/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize DTs with mainline Linux 4.19.6 , commit 96db90800c06d3fe3fa08eb6222fe201286bb778 Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
* | | ARM: rmobile: Convert to bootm_sizeMarek Vasut2018-12-048-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert all Renesas R-Car boards to bootm_size of 256 MiB and drop both fdt_high and initrd_high. This change implies that the FDT and initrd will always be copied into the first 256 MiB of RAM instead of being used in place, which can cause various kinds of inobvious problems. The simpler problems include FDT or initrd being overwritten or being used from unaligned addresses, especially on ARM64. The overhead of copying the FDT to aligned location is negligible and these problems go away, so the benefit is significant. Regarding alignment problems with fitImage. The alignment of DT properties is always 32 bits, which implies that the alignment of the "data" property in fitImage is also 32 bits. The /incbin/ syntax plays no role here. The kernel expects all elements, including DT and initrd, to be aligned to 64 bits on ARM64, thus using them in place may not be possible. Using the bootm_size assures correct alignment, again with negligible overhead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
* | | Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblazeTom Rini2018-12-032-0/+20
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx changes for v2019.01 microblaze: - Use default functions for memory decoding - Showing model from DT zynq: - Fix spi flash DTs - Fix zynq_help_text with CONFIG_SYS_LONGHELP - Tune cse/mini configurations - Enabling cse/mini testing with current targets zynqmp: - Enable gzip SPL support - Fix chip detection logic - Tune mini configurations - DT fixes(spi-flash, models, clocks, etc) - Add support for OF_SEPARATE configurations - Enabling mini testing with current targets - Add mini mtest configuration - Some minor config setting nand: - arasan: Add subpage configuration net: - gem: Add 64bit DMA support
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