From 0de68cf3f857ad9ad9d9ca86952b8c9df559fec6 Mon Sep 17 00:00:00 2001 From: Nicolas Chauvet Date: Wed, 11 Jul 2018 20:42:57 +0200 Subject: arm: tegra: Restore host1x/dc dm-pre-reloc properties Since commit f2faffecb016, tegra: Convert to use binman the dm-pre-reloc properties are removed. This leads U-Boot not to enable the display on paz00 This patch restore the dm-pre-reloc properties allowing the bootloader to output to the display panel v4: - Spell project name as appropriate v3: - Fix few typos v2: - Add more characters to commit hash Signed-off-by: Nicolas Chauvet Reviewed-by: Simon Glass Signed-off-by: Tom Warren --- arch/arm/dts/tegra20-u-boot.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/dts/tegra20-u-boot.dtsi b/arch/arm/dts/tegra20-u-boot.dtsi index 7c11972552..f64667e549 100644 --- a/arch/arm/dts/tegra20-u-boot.dtsi +++ b/arch/arm/dts/tegra20-u-boot.dtsi @@ -1,3 +1,13 @@ #include #include "tegra-u-boot.dtsi" + + +/ { + host1x@50000000 { + u-boot,dm-pre-reloc; + dc@54200000 { + u-boot,dm-pre-reloc; + }; + }; +}; -- cgit v1.2.1 From 3d186cf3f3ab5c18ede0f0a4ff85ffe99839bc7b Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 31 Jul 2018 12:39:07 -0600 Subject: ARM: tegra: avoid more operations in non-secure world A secure monitor that runs before U-Boot, and hence causes U-Boot to run in non-secure world, must implement a few operations that U-Boot otherwise implements when running in secure world. Fix U-Boot to skip these operations when running in non-secure world. In particular: - The secure monitor must provide the LP0 resume code and own LP0 configuration in order to maintain security, so must initialize all the PMC scratch registers used by the boot ROM during LP0 resume. Consequently, U-Boot should not attempt to clear those registers, since the register accesses will fail or cause an error. - The secure monitor owns system security, and so is responsible for configuring security-related items such as the VPR. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- arch/arm/mach-tegra/ap.c | 9 +++++++-- arch/arm/mach-tegra/gpu.c | 18 ++++++++++++------ 2 files changed, 19 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c index bf8001d9db..84c20a48ad 100644 --- a/arch/arm/mach-tegra/ap.c +++ b/arch/arm/mach-tegra/ap.c @@ -155,8 +155,13 @@ static void init_pmc_scratch(void) int i; /* SCRATCH0 is initialized by the boot ROM and shouldn't be cleared */ - for (i = 0; i < 23; i++) - writel(0, &pmc->pmc_scratch1+i); +#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (!tegra_cpu_is_non_secure()) +#endif + { + for (i = 0; i < 23; i++) + writel(0, &pmc->pmc_scratch1 + i); + } /* ODMDATA is for kernel use to determine RAM size, LP config, etc. */ odmdata = get_odmdata(); diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c index 2e203f735b..e047f67821 100644 --- a/arch/arm/mach-tegra/gpu.c +++ b/arch/arm/mach-tegra/gpu.c @@ -9,6 +9,7 @@ #include #include #include +#include #include @@ -18,12 +19,17 @@ void tegra_gpu_config(void) { struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE; - /* Turn VPR off */ - writel(0, &mc->mc_video_protect_size_mb); - writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED, - &mc->mc_video_protect_reg_ctrl); - /* read back to ensure the write went through */ - readl(&mc->mc_video_protect_reg_ctrl); +#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) + if (!tegra_cpu_is_non_secure()) +#endif + { + /* Turn VPR off */ + writel(0, &mc->mc_video_protect_size_mb); + writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED, + &mc->mc_video_protect_reg_ctrl); + /* read back to ensure the write went through */ + readl(&mc->mc_video_protect_reg_ctrl); + } debug("configured VPR\n"); -- cgit v1.2.1