From 462a9c7a9ccec444ecb5b8bc3ee3edecbab7e18c Mon Sep 17 00:00:00 2001 From: Roman Stratiienko Date: Tue, 12 May 2020 21:24:49 +0300 Subject: phy: sun4i-usb: Align H6 initialization logic with the kernel H6 SOC needs additional initialization of PHY registers. Corresponding changes can be found in the kernel patch [1]. Without this changes there is no enumeration of 'musb' gadget. [1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ae409cc7c3cdb9ac4a1dba3eae70efec3d6b6c79 Fixes: 35fa673e0e5f ("sunxi: phy: Add USB PHY support for Allwinner H6") Signed-off-by: Roman Stratiienko Reviewed-by: Jagan Teki --- drivers/phy/allwinner/phy-sun4i-usb.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index b4bae22c2c..f050645044 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -282,7 +282,8 @@ static int sun4i_usb_phy_init(struct phy *phy) return ret; } - if (data->cfg->type == sun8i_a83t_phy) { + if (data->cfg->type == sun8i_a83t_phy || + data->cfg->type == sun50i_h6_phy) { if (phy->id == 0) { val = readl(data->base + data->cfg->phyctl_offset); val |= PHY_CTL_VBUSVLDEXT; @@ -324,7 +325,8 @@ static int sun4i_usb_phy_exit(struct phy *phy) int ret; if (phy->id == 0) { - if (data->cfg->type == sun8i_a83t_phy) { + if (data->cfg->type == sun8i_a83t_phy || + data->cfg->type == sun50i_h6_phy) { void __iomem *phyctl = data->base + data->cfg->phyctl_offset; -- cgit v1.2.1 From 5cfeeacaea24329625e6538345fcc3a8546c53f9 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Thu, 7 May 2020 18:02:33 -0500 Subject: sunxi: Silence warning about non-static inline function When compiling with CONFIG_SPL_SERIAL=n, gcc warns about mbus_configure_port not being marked as static: In file included from include/common.h:34, from arch/arm/mach-sunxi/dram_sunxi_dw.c:11: include/log.h:185:4: warning: 'printf' is static but used in inline function 'mbus_configure_port' which is not static 185 | printf(pr_fmt(fmt), ##args); \ | ^~~~~~ include/log.h:192:2: note: in expansion of macro 'debug_cond' 192 | debug_cond(_DEBUG, fmt, ##args) | ^~~~~~~~~~ arch/arm/mach-sunxi/dram_sunxi_dw.c:100:2: note: in expansion of macro 'debug' 100 | debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); | ^~~~~ Fix this by updating the function accordingly. Signed-off-by: Samuel Holland Reviewed-by: Jagan Teki --- arch/arm/mach-sunxi/dram_sunxi_dw.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c index 5d84798ca4..a462538521 100644 --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c @@ -79,15 +79,15 @@ enum { MBUS_QOS_HIGHEST }; -inline void mbus_configure_port(u8 port, - bool bwlimit, - bool priority, - u8 qos, /* MBUS_QOS_LOWEST .. MBUS_QOS_HIGEST */ - u8 waittime, /* 0 .. 0xf */ - u8 acs, /* 0 .. 0xff */ - u16 bwl0, /* 0 .. 0xffff, bandwidth limit in MB/s */ - u16 bwl1, - u16 bwl2) +static inline void mbus_configure_port(u8 port, + bool bwlimit, + bool priority, + u8 qos, /* MBUS_QOS_LOWEST .. MBUS_QOS_HIGEST */ + u8 waittime, /* 0 .. 0xf */ + u8 acs, /* 0 .. 0xff */ + u16 bwl0, /* 0 .. 0xffff, bandwidth limit in MB/s */ + u16 bwl1, + u16 bwl2) { struct sunxi_mctl_com_reg * const mctl_com = (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; -- cgit v1.2.1 From abdbefba2a4e9666f798de13b4b88021f23b19f3 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Thu, 7 May 2020 18:10:50 -0500 Subject: net: sun8i_emac: Use consistent clock bitfield definitions While the R40 uses a different register for EMAC clock configuration than other chips, the register has a very similar layout. Reuse the existing bitfield definitions in this file, since they match. This allows the driver to compile on the H6 platform, where the CCM_GMAC_CTRL definitions are not present. Signed-off-by: Samuel Holland Reviewed-by: Jagan Teki --- drivers/net/sun8i_emac.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 99e24c6348..edbec9f3a8 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -300,9 +300,9 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata, if (priv->variant == R40_GMAC) { /* Select RGMII for R40 */ reg = readl(priv->sysctl_reg + 0x164); - reg |= CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII | - CCM_GMAC_CTRL_GPIT_RGMII | - CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY); + reg |= SC_ETCS_INT_GMII | + SC_EPIT | + (CONFIG_GMAC_TX_DELAY << SC_ETXDC_OFFSET); writel(reg, priv->sysctl_reg + 0x164); return 0; -- cgit v1.2.1 From 99ac86187d0b5b4134a75847c3e7886cfd61c351 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Thu, 7 May 2020 18:10:51 -0500 Subject: net: sun8i_emac: Add support for the H6 variant The H6 EMAC is very similar to the H3 variant, except that it uses the same pinmux as R40. Add support for it. Signed-off-by: Samuel Holland Reviewed-by: Jagan Teki --- drivers/net/sun8i_emac.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index edbec9f3a8..e2b05ace8f 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -111,6 +111,7 @@ enum emac_variant { H3_EMAC, A64_EMAC, R40_GMAC, + H6_EMAC, }; struct emac_dma_desc { @@ -310,14 +311,16 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata, reg = readl(priv->sysctl_reg + 0x30); - if (priv->variant == H3_EMAC) { + if (priv->variant == H3_EMAC || priv->variant == H6_EMAC) { ret = sun8i_emac_set_syscon_ephy(priv, ®); if (ret) return ret; } reg &= ~(SC_ETCS_MASK | SC_EPIT); - if (priv->variant == H3_EMAC || priv->variant == A64_EMAC) + if (priv->variant == H3_EMAC || + priv->variant == A64_EMAC || + priv->variant == H6_EMAC) reg &= ~SC_RMII_EN; switch (priv->interface) { @@ -329,7 +332,8 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata, break; case PHY_INTERFACE_MODE_RMII: if (priv->variant == H3_EMAC || - priv->variant == A64_EMAC) { + priv->variant == A64_EMAC || + priv->variant == H6_EMAC) { reg |= SC_RMII_EN | SC_ETCS_EXT_GMII; break; } @@ -535,7 +539,7 @@ static int parse_phy_pins(struct udevice *dev) if (priv->variant == H3_EMAC) sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_H3); - else if (priv->variant == R40_GMAC) + else if (priv->variant == R40_GMAC || priv->variant == H6_EMAC) sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_R40); else sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX); @@ -1032,6 +1036,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = { .data = (uintptr_t)A83T_EMAC }, {.compatible = "allwinner,sun8i-r40-gmac", .data = (uintptr_t)R40_GMAC }, + {.compatible = "allwinner,sun50i-h6-emac", + .data = (uintptr_t)H6_EMAC }, { } }; -- cgit v1.2.1 From 1e7d00ae262e124eaf97d9e3ce4fb25739e4f5d6 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Thu, 7 May 2020 18:10:52 -0500 Subject: sunxi: H6: Enable Ethernet on the Pine H64 Now that the EMAC driver supports the H6 SoC, we can enable the Ethernet hardware on the Pine H64 board. Signed-off-by: Samuel Holland Reviewed-by: Jagan Teki --- configs/pine_h64_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 8937c51bd0..87871fd19f 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -10,5 +10,6 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" +CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y -- cgit v1.2.1