From f0236b7015283da3d7c9cb9e91b8b94a7e46c5e6 Mon Sep 17 00:00:00 2001 From: MarkLee Date: Fri, 19 Jun 2020 19:17:16 +0800 Subject: eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver The sgmii mode init flow is almost the same for all mediatek SoC, the only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028 in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629 and the following chips). Signed-off-by: MarkLee --- drivers/net/mtk_eth.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/net/mtk_eth.h') diff --git a/drivers/net/mtk_eth.h b/drivers/net/mtk_eth.h index be74ac27ea..057ecfaabf 100644 --- a/drivers/net/mtk_eth.h +++ b/drivers/net/mtk_eth.h @@ -46,6 +46,7 @@ #define SGMII_PHYA_PWD BIT(4) #define SGMSYS_GEN2_SPEED 0x2028 +#define SGMSYS_GEN2_SPEED_V2 0x128 #define SGMSYS_SPEED_2500 BIT(2) /* Frame Engine Registers */ -- cgit v1.2.1