From e9420444f64a0ec3b444204ada20c10a50f93800 Mon Sep 17 00:00:00 2001 From: Suresh Gupta Date: Tue, 25 Apr 2017 14:51:37 +0530 Subject: armv8: layperscape: remove CONFIG_SPI_FLASH_BAR from some platforms ls1012ardb, ls1046ardb, ls2080ardb have S25FS512S flash which does not support Bank Address Register commands. Signed-off-by: Suresh Gupta Reviewed-by: York Sun --- include/configs/ls2080ardb.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/configs/ls2080ardb.h') diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index d0bf5520b7..ec83eb5fd5 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -265,7 +265,6 @@ unsigned long get_board_sys_clk(void); /* SPI */ #ifdef CONFIG_FSL_DSPI #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_STMICRO #endif -- cgit v1.2.1 From 89a168f776cbc15a2ff1f25a0f4e54f9bbaffdec Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Fri, 28 Apr 2017 10:41:35 +0530 Subject: armv8: ls2080ardb: Add QSPI-boot support QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC. LS2088ARDB RevF Board has limitation that QIXIS can not be accessed. CONFIG_FSL_QIXIS is not enabled. Signed-off-by: Priyanka Jain Signed-off-by: Suresh Gupta Reviewed-by: York Sun --- include/configs/ls2080ardb.h | 50 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 47 insertions(+), 3 deletions(-) (limited to 'include/configs/ls2080ardb.h') diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index ec83eb5fd5..ef95358ebf 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -1,4 +1,5 @@ /* + * Copyright 2017 NXP * Copyright 2015 Freescale Semiconductor * * SPDX-License-Identifier: GPL-2.0+ @@ -12,6 +13,11 @@ #undef CONFIG_CONS_INDEX #define CONFIG_CONS_INDEX 2 +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SYS_I2C_EARLY_INIT +#define CONFIG_DISPLAY_BOARDINFO_LATE +#endif + #define I2C_MUX_CH_VOL_MONITOR 0xa #define I2C_VOL_MONITOR_ADDR 0x38 #define CONFIG_VOL_MONITOR_IR36021_READ @@ -69,6 +75,7 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) +#ifndef CONFIG_FSL_QSPI /* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */ #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) @@ -157,7 +164,6 @@ unsigned long get_board_sys_clk(void); #define CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) - #define CONFIG_FSL_QIXIS /* use common QIXIS code */ #define QIXIS_LBMAP_SWITCH 0x06 #define QIXIS_LBMAP_MASK 0x0f @@ -250,7 +256,7 @@ unsigned long get_board_sys_clk(void); /* Debug Server firmware */ #define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR #define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580D00000ULL - +#endif #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 /* @@ -263,10 +269,17 @@ unsigned long get_board_sys_clk(void); #define I2C_MUX_CH_DEFAULT 0x8 /* SPI */ -#ifdef CONFIG_FSL_DSPI +#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI) #define CONFIG_SPI_FLASH +#ifdef CONFIG_FSL_QSPI #define CONFIG_SPI_FLASH_STMICRO #endif +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SPI_FLASH_SPANSION +#define FSL_QSPI_FLASH_SIZE SZ_64M /* 64MB */ +#define FSL_QSPI_FLASH_NUM 2 +#endif +#endif /* * RTC configuration @@ -345,6 +358,25 @@ unsigned long get_board_sys_clk(void); " 0x580800000 \0" \ BOOTENV #else +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:bank_intlv=auto\0" \ + "scriptaddr=0x80800000\0" \ + "kernel_addr_r=0x81000000\0" \ + "pxefile_addr_r=0x81000000\0" \ + "fdt_addr_r=0x88000000\0" \ + "ramdisk_addr_r=0x89000000\0" \ + "loadaddr=0x80100000\0" \ + "kernel_addr=0x100000\0" \ + "ramdisk_size=0x2000000\0" \ + "fdt_high=0xa0000000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "kernel_start=0x21000000\0" \ + "mcmemsize=0x40000000\0" \ + "mcinitcmd=fsl_mc start mc 0x20a00000" \ + " 0x20e00000 \0" \ + BOOTENV +#else #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "scriptaddr=0x80800000\0" \ @@ -367,6 +399,7 @@ unsigned long get_board_sys_clk(void); " 0x580800000 \0" \ BOOTENV #endif +#endif #undef CONFIG_BOOTARGS @@ -376,11 +409,18 @@ unsigned long get_board_sys_clk(void); " hugepagesz=2m hugepages=256" #undef CONFIG_BOOTCOMMAND +#ifdef CONFIG_QSPI_BOOT +/* Try to boot an on-QSPI kernel first, then do normal distro boot */ +#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x20d00000" \ + " && bootm $kernel_start" \ + " || run distro_bootcmd" +#else /* Try to boot an on-NOR kernel first, then do normal distro boot */ #define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580700000" \ " && cp.b $kernel_start $kernel_load $kernel_size" \ " && bootm $kernel_load" \ " || run distro_bootcmd" +#endif /* MAC/PHY configuration */ #ifdef CONFIG_FSL_MC_ENET @@ -389,7 +429,11 @@ unsigned long get_board_sys_clk(void); #define CONFIG_PHY_CORTINA #define CONFIG_PHYLIB #define CONFIG_SYS_CORTINA_FW_IN_NOR +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_CORTINA_FW_ADDR 0x20980000 +#else #define CONFIG_CORTINA_FW_ADDR 0x581000000 +#endif #define CONFIG_CORTINA_FW_LENGTH 0x40000 #define CORTINA_PHY_ADDR1 0x10 -- cgit v1.2.1 From 3049a583f343a71ead9d7cb33f0ab6cecfbbaa12 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Thu, 27 Apr 2017 15:08:07 +0530 Subject: armv8: ls2080ardb: Add LS2081ARDB board support LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: Priyanka Jain Signed-off-by: Santan Kumar Reviewed-by: York Sun --- include/configs/ls2080ardb.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'include/configs/ls2080ardb.h') diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index ef95358ebf..3774b177fc 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -14,6 +14,9 @@ #define CONFIG_CONS_INDEX 2 #ifdef CONFIG_FSL_QSPI +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_QIXIS_I2C_ACCESS +#endif #define CONFIG_SYS_I2C_EARLY_INIT #define CONFIG_DISPLAY_BOARDINFO_LATE #endif @@ -259,9 +262,28 @@ unsigned long get_board_sys_clk(void); #endif #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_FSL_QIXIS /* use common QIXIS code */ +#define QIXIS_QMAP_MASK 0x07 +#define QIXIS_QMAP_SHIFT 5 +#define QIXIS_LBMAP_DFLTBANK 0x00 +#define QIXIS_LBMAP_QSPI 0x00 +#define QIXIS_RCW_SRC_QSPI 0x62 +#define QIXIS_LBMAP_ALTBANK 0x20 +#define QIXIS_RST_CTL_RESET 0x31 +#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 +#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 +#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_LBMAP_MASK 0x0f +#define QIXIS_RST_CTL_RESET_EN 0x30 +#endif + /* * I2C */ +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#endif #define I2C_MUX_PCA_ADDR 0x75 #define I2C_MUX_PCA_ADDR_PRI 0x75 /* Primary Mux*/ @@ -275,7 +297,11 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SPI_FLASH_STMICRO #endif #ifdef CONFIG_FSL_QSPI +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_SPI_FLASH_STMICRO +#else #define CONFIG_SPI_FLASH_SPANSION +#endif #define FSL_QSPI_FLASH_SIZE SZ_64M /* 64MB */ #define FSL_QSPI_FLASH_NUM 2 #endif @@ -285,8 +311,13 @@ unsigned long get_board_sys_clk(void); * RTC configuration */ #define RTC +#ifdef CONFIG_TARGET_LS2081ARDB +#define CONFIG_RTC_PCF8563 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x51 +#else #define CONFIG_RTC_DS3231 1 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#endif /* EEPROM */ #define CONFIG_ID_EEPROM -- cgit v1.2.1 From f5bf23d8278b2fdfb9ce41fa36369cebc882ab02 Mon Sep 17 00:00:00 2001 From: Santan Kumar Date: Fri, 28 Apr 2017 12:47:24 +0530 Subject: armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot This patch adjusts memory map for images on LS2080ARDB and LS2080AQDS NOR flash as below Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 Signed-off-by: Santan Kumar Signed-off-by: Priyanka Jain Reviewed-by: York Sun --- include/configs/ls2080ardb.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'include/configs/ls2080ardb.h') diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 3774b177fc..0e920f6374 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -251,7 +251,7 @@ unsigned long get_board_sys_clk(void); #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 #define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE 0x2000 #endif @@ -421,13 +421,13 @@ unsigned long get_board_sys_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581100000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcmemsize=0x40000000\0" \ "fdtfile=fsl-ls2080a-rdb.dtb\0" \ - "mcinitcmd=fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" \ + "mcinitcmd=fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" \ BOOTENV #endif #endif @@ -447,7 +447,7 @@ unsigned long get_board_sys_clk(void); " || run distro_bootcmd" #else /* Try to boot an on-NOR kernel first, then do normal distro boot */ -#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580700000" \ +#define CONFIG_BOOTCOMMAND "run mcinitcmd && fsl_mc lazyapply dpl 0x580d00000" \ " && cp.b $kernel_start $kernel_load $kernel_size" \ " && bootm $kernel_load" \ " || run distro_bootcmd" @@ -463,7 +463,7 @@ unsigned long get_board_sys_clk(void); #ifdef CONFIG_QSPI_BOOT #define CONFIG_CORTINA_FW_ADDR 0x20980000 #else -#define CONFIG_CORTINA_FW_ADDR 0x581000000 +#define CONFIG_CORTINA_FW_ADDR 0x580980000 #endif #define CONFIG_CORTINA_FW_LENGTH 0x40000 -- cgit v1.2.1 From 7676074ac756ab9566d52544cc836f7b93f80b37 Mon Sep 17 00:00:00 2001 From: Udit Agarwal Date: Tue, 2 May 2017 17:43:57 +0530 Subject: armv8: LS2080A: Adjust memory map for secure boot headers for NOR-boot This patch adjusts memory map for secure boot headers on LS2080AQDS and LS2080ARDB platforms. Secure boot headers are placed on NOR flash at offset 0x00600000. Signed-off-by: Udit Agarwal Reviewed-by: York Sun --- include/configs/ls2080ardb.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include/configs/ls2080ardb.h') diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 0e920f6374..c20a7f437c 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -378,15 +378,15 @@ unsigned long get_board_sys_clk(void); "ramdisk_size=0x2000000\0" \ "fdt_high=0xa0000000\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x581100000\0" \ + "kernel_start=0x581000000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ "mcmemsize=0x40000000\0" \ "fdtfile=fsl-ls2080a-rdb.dtb\0" \ - "mcinitcmd=esbc_validate 0x580c80000;" \ - "esbc_validate 0x580cc0000;" \ - "fsl_mc start mc 0x580300000" \ - " 0x580800000 \0" \ + "mcinitcmd=esbc_validate 0x580700000;" \ + "esbc_validate 0x580740000;" \ + "fsl_mc start mc 0x580a00000" \ + " 0x580e00000 \0" \ BOOTENV #else #ifdef CONFIG_QSPI_BOOT -- cgit v1.2.1