From f674f7cfc019baaa6bf961cd4ed8b4aee4362f97 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Fri, 28 Sep 2012 15:11:11 +0000 Subject: video: Provide an API to access video parameters Create a basic API to provide access to video parameters such as screen size, and to position the cursor on the screen. Also add a prototype for video_display_bitmap() which was missing. Signed-off-by: Stefan Reinauer Signed-off-by: Simon Glass Signed-off-by: Anatolij Gustschin --- include/video.h | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'include') diff --git a/include/video.h b/include/video.h index 9519ceaf98..f7e27f8477 100644 --- a/include/video.h +++ b/include/video.h @@ -15,4 +15,52 @@ int video_init (void *videobase); void video_putc (const char c); void video_puts (const char *s); +/** + * Display a BMP format bitmap on the screen + * + * @param bmp_image Address of BMP image + * @param x X position to draw image + * @param y Y position to draw image + */ +int video_display_bitmap(ulong bmp_image, int x, int y); + +/** + * Get the width of the screen in pixels + * + * @return width of screen in pixels + */ +int video_get_pixel_width(void); + +/** + * Get the height of the screen in pixels + * + * @return height of screen in pixels + */ +int video_get_pixel_height(void); + +/** + * Get the number of text lines/rows on the screen + * + * @return number of rows + */ +int video_get_screen_rows(void); + +/** + * Get the number of text columns on the screen + * + * @return number of columns + */ +int video_get_screen_columns(void); + +/** + * Set the position of the text cursor + * + * @param col Column to place cursor (0 = left side) + * @param row Row to place cursor (0 = top line) + */ +void video_position_cursor(unsigned col, unsigned row); + +/* Clear the display */ +void video_clear(void); + #endif -- cgit v1.2.1 From 395166cffbb427bfb0da051ac044118a592e5c0b Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Fri, 28 Sep 2012 15:11:13 +0000 Subject: lcd: Provide an API to access LCD parameters Create a basic API to provide access to lcd parameters such as screen size, and to position the cursor on the screen. This matches up with the video API for the same purpose. Unfortunately they are not yet combined. Signed-off-by: Vadim Bendebury Signed-off-by: Simon Glass --- include/lcd.h | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'include') diff --git a/include/lcd.h b/include/lcd.h index 42070d7636..2517d39d41 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -294,6 +294,42 @@ void lcd_printf (const char *fmt, ...); void lcd_clear(void); int lcd_display_bitmap(ulong bmp_image, int x, int y); +/** + * Get the width of the LCD in pixels + * + * @return width of LCD in pixels + */ +int lcd_get_pixel_width(void); + +/** + * Get the height of the LCD in pixels + * + * @return height of LCD in pixels + */ +int lcd_get_pixel_height(void); + +/** + * Get the number of text lines/rows on the LCD + * + * @return number of rows + */ +int lcd_get_screen_rows(void); + +/** + * Get the number of text columns on the LCD + * + * @return number of columns + */ +int lcd_get_screen_columns(void); + +/** + * Set the position of the text cursor + * + * @param col Column to place cursor (0 = left side) + * @param row Row to place cursor (0 = top line) + */ +void lcd_position_cursor(unsigned col, unsigned row); + /* Allow boards to customize the information displayed */ void lcd_show_board_info(void); -- cgit v1.2.1 From 4f63bfb68945ce5ebf0a819152014ba0f88f76ff Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Fri, 9 Nov 2012 14:29:15 +0800 Subject: nios2: use builtin functions for control registers access The commit 51926d5ee0be029fb45f10f42756df97279f8ad3 COMMON: Use __stringify() instead of rest of implementations forgot to update the wrctl funtion, and causes compilation error. But there are builtin functions for control registers access in nios2 comipiler. It is convenient to use them instead. Signed-off-by: Thomas Chou Cc: Marek Vasut --- include/nios2.h | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/nios2.h b/include/nios2.h index df8126a66e..cbca0dc01f 100644 --- a/include/nios2.h +++ b/include/nios2.h @@ -24,8 +24,6 @@ #ifndef __NIOS2_H__ #define __NIOS2_H__ -#include - /*------------------------------------------------------------------------ * Control registers -- use with wrctl() & rdctl() *----------------------------------------------------------------------*/ @@ -39,14 +37,8 @@ * Access to control regs *----------------------------------------------------------------------*/ -#define rdctl(reg)\ - ({unsigned int val;\ - asm volatile("rdctl %0, ctl" __stringify(reg) \ - : "=r" (val) ); val;}) - -#define wrctl(reg,val)\ - asm volatile( "wrctl ctl" _str_(reg) ",%0"\ - : : "r" (val)) +#define rdctl(reg) __builtin_rdctl(reg) +#define wrctl(reg, val) __builtin_wrctl(reg, val) /*------------------------------------------------------------------------ * Control reg bit masks -- cgit v1.2.1 From db71964235c1dfa13ec398da483b0bdbbf31d5b7 Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Mon, 5 Nov 2012 12:51:54 +0800 Subject: nios2: remove asm/status_led.h The file has a wrong inline keyword of __led_toggle(), which causes compilation error. And its content is defined in common status_led.h. So define CONFIG_BOARD_SPECIFIC_LED in board config files and remove this header file. Signed-off-by: Thomas Chou --- include/configs/PK1C20.h | 1 + include/configs/nios2-generic.h | 1 + include/status_led.h | 3 --- 3 files changed, 2 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h index 403fafa2f5..aced85b660 100644 --- a/include/configs/PK1C20.h +++ b/include/configs/PK1C20.h @@ -142,6 +142,7 @@ *----------------------------------------------------------------------*/ #define CONFIG_SYS_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */ #define CONFIG_STATUS_LED /* Enable status driver */ +#define CONFIG_BOARD_SPECIFIC_LED #define STATUS_LED_BIT 1 /* Bit-0 on PIO */ #define STATUS_LED_STATE 1 /* Blinking */ diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index 69ff3efb50..624bd5c7ee 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -68,6 +68,7 @@ #define CONFIG_SYS_ALTERA_PIO_GPIO_NUM LED_PIO_WIDTH #define CONFIG_STATUS_LED /* Enable status driver */ +#define CONFIG_BOARD_SPECIFIC_LED #define CONFIG_GPIO_LED /* Enable GPIO LED driver */ #define CONFIG_GPIO /* Enable GPIO driver */ diff --git a/include/status_led.h b/include/status_led.h index da9fae9203..27e9127694 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -273,9 +273,6 @@ void status_led_set (int led, int state); #elif defined(CONFIG_STXXTC) /* XXX empty just to avoid the error */ /************************************************************************/ -#elif defined(CONFIG_NIOS2) -/* XXX empty just to avoid the error */ -/************************************************************************/ #elif defined(CONFIG_V38B) # define STATUS_LED_BIT 0x0010 /* Timer7 GPIO */ -- cgit v1.2.1 From cfcd1c03e44fc22f2146948dc9f341b28e6ec583 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Thu, 8 Nov 2012 17:49:14 +0000 Subject: video: atmel: implement lcd_setcolreg function implement the common api lcd_setcolreg in include/lcd.h Signed-off-by: Bo Shen [agust: fixed commit log and gcc 4.6 -Wparentheses warnings] Signed-off-by: Anatolij Gustschin --- include/atmel_hlcdc.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/atmel_hlcdc.h b/include/atmel_hlcdc.h index 945b30acb0..fbd2f92457 100644 --- a/include/atmel_hlcdc.h +++ b/include/atmel_hlcdc.h @@ -217,6 +217,13 @@ struct atmel_hlcd_regs { #define LCDC_BASECFG3_RDEF(value) \ ((LCDC_BASECFG3_RDEF_Msk & ((value) << LCDC_BASECFG3_RDEF_Pos))) +#define LCDC_BASECLUT_BCLUT_Pos 0 +#define LCDC_BASECLUT_BCLUT_Msk (0xff << LCDC_BASECLUT_BCLUT_Pos) +#define LCDC_BASECLUT_GCLUT_Pos 8 +#define LCDC_BASECLUT_GCLUT_Msk (0xff << LCDC_BASECLUT_GCLUT_Pos) +#define LCDC_BASECLUT_RCLUT_Pos 16 +#define LCDC_BASECLUT_RCLUT_Msk (0xff << LCDC_BASECLUT_RCLUT_Pos) + #define LCDC_BASECFG4_DMA (0x1 << 8) #define LCDC_BASECFG4_REP (0x1 << 9) -- cgit v1.2.1 From 09258f1e8b12acc4a2a02b60d942660798038fba Mon Sep 17 00:00:00 2001 From: Abhilash Kesavan Date: Thu, 25 Oct 2012 16:30:58 +0000 Subject: fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan Signed-off-by: Simon Glass --- include/fdtdec.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index 0b140752ff..d880fe8d9e 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -354,6 +354,19 @@ int fdtdec_decode_gpio(const void *blob, int node, const char *prop_name, */ int fdtdec_setup_gpio(struct fdt_gpio_state *gpio); +/** + * Look in the FDT for a config item with the given name and return its value + * as a 32-bit integer. The property must have at least 4 bytes of data. The + * value of the first cell is returned. + * + * @param blob FDT blob to use + * @param prop_name Node property name + * @param default_val default value to return if the property is not found + * @return integer value, if found, or default_val if not + */ +int fdtdec_get_config_int(const void *blob, const char *prop_name, + int default_val); + /* * Look up a property in a node and return its contents in a byte * array of given length. The property must have at least enough data for -- cgit v1.2.1 From 332ab0d54aaa5b8b27096996d10c8c6183c6972c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 25 Oct 2012 16:30:59 +0000 Subject: fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass --- include/fdtdec.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index d880fe8d9e..e828662425 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -367,6 +367,16 @@ int fdtdec_setup_gpio(struct fdt_gpio_state *gpio); int fdtdec_get_config_int(const void *blob, const char *prop_name, int default_val); +/** + * Look in the FDT for a config item with the given name and return its value + * as a string. + * + * @param blob FDT blob + * @param prop_name property name to look up + * @returns property string, NULL on error. + */ +char *fdtdec_get_config_string(const void *blob, const char *prop_name); + /* * Look up a property in a node and return its contents in a byte * array of given length. The property must have at least enough data for -- cgit v1.2.1 From f20c461984c3d986fde037d4c5bf600aa0497676 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 25 Oct 2012 16:31:00 +0000 Subject: fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass --- include/fdtdec.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index e828662425..341e6a18a0 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -40,10 +40,12 @@ typedef u64 fdt_addr_t; #define FDT_ADDR_T_NONE (-1ULL) #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) +#define fdt_size_to_cpu(reg) be64_to_cpu(reg) #else typedef u32 fdt_addr_t; #define FDT_ADDR_T_NONE (-1U) #define fdt_addr_to_cpu(reg) be32_to_cpu(reg) +#define fdt_size_to_cpu(reg) be32_to_cpu(reg) #endif /* Information obtained about memory from the FDT */ @@ -408,4 +410,21 @@ int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name, */ const u8 *fdtdec_locate_byte_array(const void *blob, int node, const char *prop_name, int count); + +/** + * Look up a property in a node which contains a memory region address and + * size. Then return a pointer to this address. + * + * The property must hold one address with a length. This is only tested on + * 32-bit machines. + * + * @param blob FDT blob + * @param node node to examine + * @param prop_name name of property to find + * @param ptrp returns pointer to region, or NULL if no address + * @param size returns size of region + * @return 0 if ok, -1 on error (propery not found) + */ +int fdtdec_decode_region(const void *blob, int node, + const char *prop_name, void **ptrp, size_t *size); #endif -- cgit v1.2.1 From 5921f6a2924827548caf55b28a6827b9d856e37f Mon Sep 17 00:00:00 2001 From: Abhilash Kesavan Date: Thu, 25 Oct 2012 16:31:01 +0000 Subject: fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan Commit-Ready: Che-Liang Chiou Signed-off-by: Simon Glass --- include/fdtdec.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index 341e6a18a0..e70714b2f2 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -344,6 +344,22 @@ int fdtdec_get_bool(const void *blob, int node, const char *prop_name); int fdtdec_decode_gpio(const void *blob, int node, const char *prop_name, struct fdt_gpio_state *gpio); +/** + * Decode a list of GPIOs from an FDT. This creates a list of GPIOs with no + * terminating item. + * + * @param blob FDT blob to use + * @param node Node to look at + * @param prop_name Node property name + * @param gpio Array of gpio elements to fill from FDT. This will be + * untouched if either 0 or an error is returned + * @param max_count Maximum number of elements allowed + * @return number of GPIOs read if ok, -FDT_ERR_BADLAYOUT if max_count would + * be exceeded, or -FDT_ERR_NOTFOUND if the property is missing. + */ +int fdtdec_decode_gpios(const void *blob, int node, const char *prop_name, + struct fdt_gpio_state *gpio, int max_count); + /** * Set up a GPIO pin according to the provided gpio information. At present this * just requests the GPIO. -- cgit v1.2.1 From 7cde397b21a347134a39c40e24355a0e438adae3 Mon Sep 17 00:00:00 2001 From: Gerald Van Baren Date: Mon, 12 Nov 2012 23:13:54 -0500 Subject: fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass --- include/fdtdec.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index e70714b2f2..f8a4e94186 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -109,6 +109,19 @@ struct fdt_gpio_state { int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id, int *upto); +/** + * Find the compatible ID for a given node. + * + * Generally each node has at least one compatible string attached to it. + * This function looks through our list of known compatible strings and + * returns the corresponding ID which matches the compatible string. + * + * @param blob FDT blob to use + * @param node Node containing compatible string to find + * @return compatible ID, or COMPAT_UNKNOWN if we cannot find a match + */ +enum fdt_compat_id fdtdec_lookup(const void *blob, int node); + /** * Find the next compatible node for a peripheral. * -- cgit v1.2.1 From 79289c0b5ff4a8c7869d7ca629cddc660dd06095 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 25 Oct 2012 16:31:04 +0000 Subject: fdt: Add function to read boolean property Signed-off-by: Vincent Palatin Commit-Ready: Vincent Palatin Commit-Ready: Gabe Black Signed-off-by: Simon Glass --- include/fdtdec.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index f8a4e94186..a37cf54a93 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -398,6 +398,16 @@ int fdtdec_setup_gpio(struct fdt_gpio_state *gpio); int fdtdec_get_config_int(const void *blob, const char *prop_name, int default_val); +/** + * Look in the FDT for a config item with the given name + * and return whether it exists. + * + * @param blob FDT blob + * @param prop_name property name to look up + * @return 1, if it exists, or 0 if not + */ +int fdtdec_get_config_bool(const void *blob, const char *prop_name); + /** * Look in the FDT for a config item with the given name and return its value * as a string. -- cgit v1.2.1 From aadef0a1bc3db81708471c9d18eb6c756659196f Mon Sep 17 00:00:00 2001 From: Che-Liang Chiou Date: Thu, 25 Oct 2012 16:31:05 +0000 Subject: fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou Signed-off-by: Simon Glass --- include/fdtdec.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index a37cf54a93..b5d7d2f54a 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -181,6 +181,21 @@ fdt_addr_t fdtdec_get_addr(const void *blob, int node, s32 fdtdec_get_int(const void *blob, int node, const char *prop_name, s32 default_val); +/** + * Look up a 64-bit integer property in a node and return it. The property + * must have at least 8 bytes of data (2 cells). The first two cells are + * concatenated to form a 8 bytes value, where the first cell is top half and + * the second cell is bottom half. + * + * @param blob FDT blob + * @param node node to examine + * @param prop_name name of property to find + * @param default_val default value to return if the property is not found + * @return integer value, if found, or default_val if not + */ +uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name, + uint64_t default_val); + /** * Checks whether a node is enabled. * This looks for a 'status' property. If this exists, then returns 1 if -- cgit v1.2.1 From 202ff7537558edfd759b400cfe9e56c56fc7868c Mon Sep 17 00:00:00 2001 From: Sean Paul Date: Thu, 25 Oct 2012 16:31:06 +0000 Subject: fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul Signed-off-by: Simon Glass --- include/fdtdec.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index b5d7d2f54a..5164ce24e6 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -89,6 +89,22 @@ struct fdt_gpio_state { /* This tells us whether a fdt_gpio_state record is valid or not */ #define fdt_gpio_isvalid(x) ((x)->gpio != FDT_GPIO_NONE) +/** + * Read the GPIO taking into account the polarity of the pin. + * + * @param gpio pointer to the decoded gpio + * @return value of the gpio if successful, < 0 if unsuccessful + */ +int fdtdec_get_gpio(struct fdt_gpio_state *gpio); + +/** + * Write the GPIO taking into account the polarity of the pin. + * + * @param gpio pointer to the decoded gpio + * @return 0 if successful + */ +int fdtdec_set_gpio(struct fdt_gpio_state *gpio, int val); + /** * Find the next numbered alias for a peripheral. This is used to enumerate * all the peripherals of a certain type. -- cgit v1.2.1 From d95f6ec7334076a1e4b13f3748ebfd1b58ac90f6 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 25 Oct 2012 16:31:10 +0000 Subject: fdt: Add option to default to most compatible conf in a fit image When booting a fit image with multiple configurations, the user either has to specify which configuration to use explicitly, or there has to be a default defined which is chosen automatically. This change adds an option to change that behavior so that a configuration can be selected explicitly, or the configuration which has the device tree that claims to be compatible with the earliest item in U-Boot's device tree. In other words, if U-Boot claimed to be compatible with A, B, and then C, and the configurations claimed to be compatible with A, D and B, D and D, E, the first configuration, A, D, would be chosen. Both the first and second configurations match, but the first one matches a more specific entry in U-Boot's device tree. The order in the kernel's device tree is ignored. Signed-off-by: Gabe Black Commit-Ready: Gabe Black Signed-off-by: Simon Glass --- include/image.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/image.h b/include/image.h index 0a895f2044..f54d983306 100644 --- a/include/image.h +++ b/include/image.h @@ -615,6 +615,7 @@ int fit_image_check_type(const void *fit, int noffset, uint8_t type); int fit_image_check_comp(const void *fit, int noffset, uint8_t comp); int fit_check_format(const void *fit); +int fit_conf_find_compat(const void *fit, const void *fdt); int fit_conf_get_node(const void *fit, const char *conf_uname); int fit_conf_get_kernel_node(const void *fit, int noffset); int fit_conf_get_ramdisk_node(const void *fit, int noffset); -- cgit v1.2.1 From 86879d7120ab4000d924b12315c01d57506af832 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:21:53 +0000 Subject: pmic:i2c: Add I2C sensor byte order (big/little) to PMIC framework Since the pmic_reg_read is the u32 value, the order in which bytes are placed to form u32 value is important. Support for big and little sensor endianess is added. Moreover calls to [leXX|beXX]_to_cpu have been added to support little and big endian SoCs. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park --- include/pmic.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/pmic.h b/include/pmic.h index 6a05b40aef..1a2db05110 100644 --- a/include/pmic.h +++ b/include/pmic.h @@ -27,6 +27,7 @@ enum { PMIC_I2C, PMIC_SPI, }; enum { I2C_PMIC, I2C_NUM, }; enum { PMIC_READ, PMIC_WRITE, }; +enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, }; struct p_i2c { unsigned char addr; @@ -47,6 +48,7 @@ struct pmic { const char *name; unsigned char bus; unsigned char interface; + unsigned char sensor_byte_order; unsigned char number_of_regs; union hw { struct p_i2c i2c; -- cgit v1.2.1 From c7336815078ff3745e3130aeff35991e3e98e61e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:21:55 +0000 Subject: pmic: Extend PMIC framework to support multiple instances of PMIC devices The PMIC framework has been extended to support multiple instances of the variety of devices responsible for power management. This change allows supporting of e.g. fuel gauge, charger, MUIC (Micro USB Interface Circuit). Power related includes have been moved to ./include/power directory. This is a first of a series of patches - in the future "pmic" will be replaced with "power". Two important issues: 1. The PMIC needs to be initialized just after malloc is configured 2. It uses list to hold information about available PMIC devices Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- include/max8997_pmic.h | 190 ---------------------------------------- include/max8998_pmic.h | 86 ------------------ include/pmic.h | 74 ---------------- include/power/max8997_pmic.h | 203 +++++++++++++++++++++++++++++++++++++++++++ include/power/max8998_pmic.h | 86 ++++++++++++++++++ include/power/pmic.h | 81 +++++++++++++++++ 6 files changed, 370 insertions(+), 350 deletions(-) delete mode 100644 include/max8997_pmic.h delete mode 100644 include/max8998_pmic.h delete mode 100644 include/pmic.h create mode 100644 include/power/max8997_pmic.h create mode 100644 include/power/max8998_pmic.h create mode 100644 include/power/pmic.h (limited to 'include') diff --git a/include/max8997_pmic.h b/include/max8997_pmic.h deleted file mode 100644 index 17ae24ea6a..0000000000 --- a/include/max8997_pmic.h +++ /dev/null @@ -1,190 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics - * Lukasz Majewski - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __MAX8997_PMIC_H_ -#define __MAX8997_PMIC_H_ - -/* MAX 8997 registers */ -enum { - MAX8997_REG_PMIC_ID0 = 0x00, - MAX8997_REG_PMIC_ID1 = 0x01, - MAX8997_REG_INTSRC = 0x02, - MAX8997_REG_INT1 = 0x03, - MAX8997_REG_INT2 = 0x04, - MAX8997_REG_INT3 = 0x05, - MAX8997_REG_INT4 = 0x06, - - MAX8997_REG_INT1MSK = 0x08, - MAX8997_REG_INT2MSK = 0x09, - MAX8997_REG_INT3MSK = 0x0a, - MAX8997_REG_INT4MSK = 0x0b, - - MAX8997_REG_STATUS1 = 0x0d, - MAX8997_REG_STATUS2 = 0x0e, - MAX8997_REG_STATUS3 = 0x0f, - MAX8997_REG_STATUS4 = 0x10, - - MAX8997_REG_MAINCON1 = 0x13, - MAX8997_REG_MAINCON2 = 0x14, - MAX8997_REG_BUCKRAMP = 0x15, - - MAX8997_REG_BUCK1CTRL = 0x18, - MAX8997_REG_BUCK1DVS1 = 0x19, - MAX8997_REG_BUCK1DVS2 = 0x1a, - MAX8997_REG_BUCK1DVS3 = 0x1b, - MAX8997_REG_BUCK1DVS4 = 0x1c, - MAX8997_REG_BUCK1DVS5 = 0x1d, - MAX8997_REG_BUCK1DVS6 = 0x1e, - MAX8997_REG_BUCK1DVS7 = 0x1f, - MAX8997_REG_BUCK1DVS8 = 0x20, - MAX8997_REG_BUCK2CTRL = 0x21, - MAX8997_REG_BUCK2DVS1 = 0x22, - MAX8997_REG_BUCK2DVS2 = 0x23, - MAX8997_REG_BUCK2DVS3 = 0x24, - MAX8997_REG_BUCK2DVS4 = 0x25, - MAX8997_REG_BUCK2DVS5 = 0x26, - MAX8997_REG_BUCK2DVS6 = 0x27, - MAX8997_REG_BUCK2DVS7 = 0x28, - MAX8997_REG_BUCK2DVS8 = 0x29, - MAX8997_REG_BUCK3CTRL = 0x2a, - MAX8997_REG_BUCK3DVS = 0x2b, - MAX8997_REG_BUCK4CTRL = 0x2c, - MAX8997_REG_BUCK4DVS = 0x2d, - MAX8997_REG_BUCK5CTRL = 0x2e, - MAX8997_REG_BUCK5DVS1 = 0x2f, - MAX8997_REG_BUCK5DVS2 = 0x30, - MAX8997_REG_BUCK5DVS3 = 0x31, - MAX8997_REG_BUCK5DVS4 = 0x32, - MAX8997_REG_BUCK5DVS5 = 0x33, - MAX8997_REG_BUCK5DVS6 = 0x34, - MAX8997_REG_BUCK5DVS7 = 0x35, - MAX8997_REG_BUCK5DVS8 = 0x36, - MAX8997_REG_BUCK6CTRL = 0x37, - MAX8997_REG_BUCK6BPSKIPCTRL = 0x38, - MAX8997_REG_BUCK7CTRL = 0x39, - MAX8997_REG_BUCK7DVS = 0x3a, - MAX8997_REG_LDO1CTRL = 0x3b, - MAX8997_REG_LDO2CTRL = 0x3c, - MAX8997_REG_LDO3CTRL = 0x3d, - MAX8997_REG_LDO4CTRL = 0x3e, - MAX8997_REG_LDO5CTRL = 0x3f, - MAX8997_REG_LDO6CTRL = 0x40, - MAX8997_REG_LDO7CTRL = 0x41, - MAX8997_REG_LDO8CTRL = 0x42, - MAX8997_REG_LDO9CTRL = 0x43, - MAX8997_REG_LDO10CTRL = 0x44, - MAX8997_REG_LDO11CTRL = 0x45, - MAX8997_REG_LDO12CTRL = 0x46, - MAX8997_REG_LDO13CTRL = 0x47, - MAX8997_REG_LDO14CTRL = 0x48, - MAX8997_REG_LDO15CTRL = 0x49, - MAX8997_REG_LDO16CTRL = 0x4a, - MAX8997_REG_LDO17CTRL = 0x4b, - MAX8997_REG_LDO18CTRL = 0x4c, - MAX8997_REG_LDO21CTRL = 0x4d, - - MAX8997_REG_MBCCTRL1 = 0x50, - MAX8997_REG_MBCCTRL2 = 0x51, - MAX8997_REG_MBCCTRL3 = 0x52, - MAX8997_REG_MBCCTRL4 = 0x53, - MAX8997_REG_MBCCTRL5 = 0x54, - MAX8997_REG_MBCCTRL6 = 0x55, - MAX8997_REG_OTPCGHCVS = 0x56, - - MAX8997_REG_SAFEOUTCTRL = 0x5a, - - MAX8997_REG_LBCNFG1 = 0x5e, - MAX8997_REG_LBCNFG2 = 0x5f, - MAX8997_REG_BBCCTRL = 0x60, - - MAX8997_REG_FLASH1_CUR = 0x63, /* 0x63 ~ 0x6e for FLASH */ - MAX8997_REG_FLASH2_CUR = 0x64, - MAX8997_REG_MOVIE_CUR = 0x65, - MAX8997_REG_GSMB_CUR = 0x66, - MAX8997_REG_BOOST_CNTL = 0x67, - MAX8997_REG_LEN_CNTL = 0x68, - MAX8997_REG_FLASH_CNTL = 0x69, - MAX8997_REG_WDT_CNTL = 0x6a, - MAX8997_REG_MAXFLASH1 = 0x6b, - MAX8997_REG_MAXFLASH2 = 0x6c, - MAX8997_REG_FLASHSTATUS = 0x6d, - MAX8997_REG_FLASHSTATUSMASK = 0x6e, - - MAX8997_REG_GPIOCNTL1 = 0x70, - MAX8997_REG_GPIOCNTL2 = 0x71, - MAX8997_REG_GPIOCNTL3 = 0x72, - MAX8997_REG_GPIOCNTL4 = 0x73, - MAX8997_REG_GPIOCNTL5 = 0x74, - MAX8997_REG_GPIOCNTL6 = 0x75, - MAX8997_REG_GPIOCNTL7 = 0x76, - MAX8997_REG_GPIOCNTL8 = 0x77, - MAX8997_REG_GPIOCNTL9 = 0x78, - MAX8997_REG_GPIOCNTL10 = 0x79, - MAX8997_REG_GPIOCNTL11 = 0x7a, - MAX8997_REG_GPIOCNTL12 = 0x7b, - - MAX8997_REG_LDO1CONFIG = 0x80, - MAX8997_REG_LDO2CONFIG = 0x81, - MAX8997_REG_LDO3CONFIG = 0x82, - MAX8997_REG_LDO4CONFIG = 0x83, - MAX8997_REG_LDO5CONFIG = 0x84, - MAX8997_REG_LDO6CONFIG = 0x85, - MAX8997_REG_LDO7CONFIG = 0x86, - MAX8997_REG_LDO8CONFIG = 0x87, - MAX8997_REG_LDO9CONFIG = 0x88, - MAX8997_REG_LDO10CONFIG = 0x89, - MAX8997_REG_LDO11CONFIG = 0x8a, - MAX8997_REG_LDO12CONFIG = 0x8b, - MAX8997_REG_LDO13CONFIG = 0x8c, - MAX8997_REG_LDO14CONFIG = 0x8d, - MAX8997_REG_LDO15CONFIG = 0x8e, - MAX8997_REG_LDO16CONFIG = 0x8f, - MAX8997_REG_LDO17CONFIG = 0x90, - MAX8997_REG_LDO18CONFIG = 0x91, - MAX8997_REG_LDO21CONFIG = 0x92, - - MAX8997_REG_DVSOKTIMER1 = 0x97, - MAX8997_REG_DVSOKTIMER2 = 0x98, - MAX8997_REG_DVSOKTIMER4 = 0x99, - MAX8997_REG_DVSOKTIMER5 = 0x9a, - - PMIC_NUM_OF_REGS = 0x9b, -}; - -#define ENSAFEOUT1 (1 << 6) -#define ENSAFEOUT2 (1 << 7) - -#define MAX8997_I2C_ADDR (0xCC >> 1) -#define MAX8997_RTC_ADDR (0x0C >> 1) -#define MAX8997_MUIC_ADDR (0x4A >> 1) -#define MAX8997_FG_ADDR (0x6C >> 1) - -enum { - LDO_OFF = 0, - LDO_ON = 1, - - DIS_LDO = (0x00 << 6), - EN_LDO = (0x3 << 6), -}; - -#endif /* __MAX8997_PMIC_H_ */ diff --git a/include/max8998_pmic.h b/include/max8998_pmic.h deleted file mode 100644 index ca21f882c2..0000000000 --- a/include/max8998_pmic.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics - * Lukasz Majewski - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __MAX8998_PMIC_H_ -#define __MAX8998_PMIC_H_ - -/* MAX 8998 registers */ -enum { - MAX8998_REG_IRQ1, - MAX8998_REG_IRQ2, - MAX8998_REG_IRQ3, - MAX8998_REG_IRQ4, - MAX8998_REG_IRQM1, - MAX8998_REG_IRQM2, - MAX8998_REG_IRQM3, - MAX8998_REG_IRQM4, - MAX8998_REG_STATUS1, - MAX8998_REG_STATUS2, - MAX8998_REG_STATUSM1, - MAX8998_REG_STATUSM2, - MAX8998_REG_CHGR1, - MAX8998_REG_CHGR2, - MAX8998_REG_LDO_ACTIVE_DISCHARGE1, - MAX8998_REG_LDO_ACTIVE_DISCHARGE2, - MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, - MAX8998_REG_ONOFF1, - MAX8998_REG_ONOFF2, - MAX8998_REG_ONOFF3, - MAX8998_REG_ONOFF4, - MAX8998_REG_BUCK1_VOLTAGE1, - MAX8998_REG_BUCK1_VOLTAGE2, - MAX8998_REG_BUCK1_VOLTAGE3, - MAX8998_REG_BUCK1_VOLTAGE4, - MAX8998_REG_BUCK2_VOLTAGE1, - MAX8998_REG_BUCK2_VOLTAGE2, - MAX8998_REG_BUCK3, - MAX8998_REG_BUCK4, - MAX8998_REG_LDO2_LDO3, - MAX8998_REG_LDO4, - MAX8998_REG_LDO5, - MAX8998_REG_LDO6, - MAX8998_REG_LDO7, - MAX8998_REG_LDO8_LDO9, - MAX8998_REG_LDO10_LDO11, - MAX8998_REG_LDO12, - MAX8998_REG_LDO13, - MAX8998_REG_LDO14, - MAX8998_REG_LDO15, - MAX8998_REG_LDO16, - MAX8998_REG_LDO17, - MAX8998_REG_BKCHR, - MAX8998_REG_LBCNFG1, - MAX8998_REG_LBCNFG2, - PMIC_NUM_OF_REGS, -}; - -#define MAX8998_LDO3 (1 << 2) -#define MAX8998_LDO4 (1 << 1) -#define MAX8998_LDO8 (1 << 5) -#define MAX8998_SAFEOUT1 (1 << 4) - -#define MAX8998_I2C_ADDR (0xCC >> 1) - -enum { LDO_OFF, LDO_ON }; - -#endif /* __MAX8998_PMIC_H_ */ diff --git a/include/pmic.h b/include/pmic.h deleted file mode 100644 index 1a2db05110..0000000000 --- a/include/pmic.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics - * Lukasz Majewski - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CORE_PMIC_H_ -#define __CORE_PMIC_H_ - -enum { PMIC_I2C, PMIC_SPI, }; -enum { I2C_PMIC, I2C_NUM, }; -enum { PMIC_READ, PMIC_WRITE, }; -enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, }; - -struct p_i2c { - unsigned char addr; - unsigned char *buf; - unsigned char tx_num; -}; - -struct p_spi { - unsigned int cs; - unsigned int mode; - unsigned int bitlen; - unsigned int clk; - unsigned int flags; - u32 (*prepare_tx)(u32 reg, u32 *val, u32 write); -}; - -struct pmic { - const char *name; - unsigned char bus; - unsigned char interface; - unsigned char sensor_byte_order; - unsigned char number_of_regs; - union hw { - struct p_i2c i2c; - struct p_spi spi; - } hw; -}; - -int pmic_init(void); -int pmic_dialog_init(void); -int check_reg(u32 reg); -struct pmic *get_pmic(void); -int pmic_probe(struct pmic *p); -int pmic_reg_read(struct pmic *p, u32 reg, u32 *val); -int pmic_reg_write(struct pmic *p, u32 reg, u32 val); -int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on); - -#define pmic_i2c_addr (p->hw.i2c.addr) -#define pmic_i2c_tx_num (p->hw.i2c.tx_num) - -#define pmic_spi_bitlen (p->hw.spi.bitlen) -#define pmic_spi_flags (p->hw.spi.flags) - -#endif /* __CORE_PMIC_H_ */ diff --git a/include/power/max8997_pmic.h b/include/power/max8997_pmic.h new file mode 100644 index 0000000000..1db7deb3be --- /dev/null +++ b/include/power/max8997_pmic.h @@ -0,0 +1,203 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX8997_PMIC_H_ +#define __MAX8997_PMIC_H_ + +/* MAX 8997 registers */ +enum { + MAX8997_REG_PMIC_ID0 = 0x00, + MAX8997_REG_PMIC_ID1 = 0x01, + MAX8997_REG_INTSRC = 0x02, + MAX8997_REG_INT1 = 0x03, + MAX8997_REG_INT2 = 0x04, + MAX8997_REG_INT3 = 0x05, + MAX8997_REG_INT4 = 0x06, + + MAX8997_REG_INT1MSK = 0x08, + MAX8997_REG_INT2MSK = 0x09, + MAX8997_REG_INT3MSK = 0x0a, + MAX8997_REG_INT4MSK = 0x0b, + + MAX8997_REG_STATUS1 = 0x0d, + MAX8997_REG_STATUS2 = 0x0e, + MAX8997_REG_STATUS3 = 0x0f, + MAX8997_REG_STATUS4 = 0x10, + + MAX8997_REG_MAINCON1 = 0x13, + MAX8997_REG_MAINCON2 = 0x14, + MAX8997_REG_BUCKRAMP = 0x15, + + MAX8997_REG_BUCK1CTRL = 0x18, + MAX8997_REG_BUCK1DVS1 = 0x19, + MAX8997_REG_BUCK1DVS2 = 0x1a, + MAX8997_REG_BUCK1DVS3 = 0x1b, + MAX8997_REG_BUCK1DVS4 = 0x1c, + MAX8997_REG_BUCK1DVS5 = 0x1d, + MAX8997_REG_BUCK1DVS6 = 0x1e, + MAX8997_REG_BUCK1DVS7 = 0x1f, + MAX8997_REG_BUCK1DVS8 = 0x20, + MAX8997_REG_BUCK2CTRL = 0x21, + MAX8997_REG_BUCK2DVS1 = 0x22, + MAX8997_REG_BUCK2DVS2 = 0x23, + MAX8997_REG_BUCK2DVS3 = 0x24, + MAX8997_REG_BUCK2DVS4 = 0x25, + MAX8997_REG_BUCK2DVS5 = 0x26, + MAX8997_REG_BUCK2DVS6 = 0x27, + MAX8997_REG_BUCK2DVS7 = 0x28, + MAX8997_REG_BUCK2DVS8 = 0x29, + MAX8997_REG_BUCK3CTRL = 0x2a, + MAX8997_REG_BUCK3DVS = 0x2b, + MAX8997_REG_BUCK4CTRL = 0x2c, + MAX8997_REG_BUCK4DVS = 0x2d, + MAX8997_REG_BUCK5CTRL = 0x2e, + MAX8997_REG_BUCK5DVS1 = 0x2f, + MAX8997_REG_BUCK5DVS2 = 0x30, + MAX8997_REG_BUCK5DVS3 = 0x31, + MAX8997_REG_BUCK5DVS4 = 0x32, + MAX8997_REG_BUCK5DVS5 = 0x33, + MAX8997_REG_BUCK5DVS6 = 0x34, + MAX8997_REG_BUCK5DVS7 = 0x35, + MAX8997_REG_BUCK5DVS8 = 0x36, + MAX8997_REG_BUCK6CTRL = 0x37, + MAX8997_REG_BUCK6BPSKIPCTRL = 0x38, + MAX8997_REG_BUCK7CTRL = 0x39, + MAX8997_REG_BUCK7DVS = 0x3a, + MAX8997_REG_LDO1CTRL = 0x3b, + MAX8997_REG_LDO2CTRL = 0x3c, + MAX8997_REG_LDO3CTRL = 0x3d, + MAX8997_REG_LDO4CTRL = 0x3e, + MAX8997_REG_LDO5CTRL = 0x3f, + MAX8997_REG_LDO6CTRL = 0x40, + MAX8997_REG_LDO7CTRL = 0x41, + MAX8997_REG_LDO8CTRL = 0x42, + MAX8997_REG_LDO9CTRL = 0x43, + MAX8997_REG_LDO10CTRL = 0x44, + MAX8997_REG_LDO11CTRL = 0x45, + MAX8997_REG_LDO12CTRL = 0x46, + MAX8997_REG_LDO13CTRL = 0x47, + MAX8997_REG_LDO14CTRL = 0x48, + MAX8997_REG_LDO15CTRL = 0x49, + MAX8997_REG_LDO16CTRL = 0x4a, + MAX8997_REG_LDO17CTRL = 0x4b, + MAX8997_REG_LDO18CTRL = 0x4c, + MAX8997_REG_LDO21CTRL = 0x4d, + + MAX8997_REG_MBCCTRL1 = 0x50, + MAX8997_REG_MBCCTRL2 = 0x51, + MAX8997_REG_MBCCTRL3 = 0x52, + MAX8997_REG_MBCCTRL4 = 0x53, + MAX8997_REG_MBCCTRL5 = 0x54, + MAX8997_REG_MBCCTRL6 = 0x55, + MAX8997_REG_OTPCGHCVS = 0x56, + + MAX8997_REG_SAFEOUTCTRL = 0x5a, + + MAX8997_REG_LBCNFG1 = 0x5e, + MAX8997_REG_LBCNFG2 = 0x5f, + MAX8997_REG_BBCCTRL = 0x60, + + MAX8997_REG_FLASH1_CUR = 0x63, /* 0x63 ~ 0x6e for FLASH */ + MAX8997_REG_FLASH2_CUR = 0x64, + MAX8997_REG_MOVIE_CUR = 0x65, + MAX8997_REG_GSMB_CUR = 0x66, + MAX8997_REG_BOOST_CNTL = 0x67, + MAX8997_REG_LEN_CNTL = 0x68, + MAX8997_REG_FLASH_CNTL = 0x69, + MAX8997_REG_WDT_CNTL = 0x6a, + MAX8997_REG_MAXFLASH1 = 0x6b, + MAX8997_REG_MAXFLASH2 = 0x6c, + MAX8997_REG_FLASHSTATUS = 0x6d, + MAX8997_REG_FLASHSTATUSMASK = 0x6e, + + MAX8997_REG_GPIOCNTL1 = 0x70, + MAX8997_REG_GPIOCNTL2 = 0x71, + MAX8997_REG_GPIOCNTL3 = 0x72, + MAX8997_REG_GPIOCNTL4 = 0x73, + MAX8997_REG_GPIOCNTL5 = 0x74, + MAX8997_REG_GPIOCNTL6 = 0x75, + MAX8997_REG_GPIOCNTL7 = 0x76, + MAX8997_REG_GPIOCNTL8 = 0x77, + MAX8997_REG_GPIOCNTL9 = 0x78, + MAX8997_REG_GPIOCNTL10 = 0x79, + MAX8997_REG_GPIOCNTL11 = 0x7a, + MAX8997_REG_GPIOCNTL12 = 0x7b, + + MAX8997_REG_LDO1CONFIG = 0x80, + MAX8997_REG_LDO2CONFIG = 0x81, + MAX8997_REG_LDO3CONFIG = 0x82, + MAX8997_REG_LDO4CONFIG = 0x83, + MAX8997_REG_LDO5CONFIG = 0x84, + MAX8997_REG_LDO6CONFIG = 0x85, + MAX8997_REG_LDO7CONFIG = 0x86, + MAX8997_REG_LDO8CONFIG = 0x87, + MAX8997_REG_LDO9CONFIG = 0x88, + MAX8997_REG_LDO10CONFIG = 0x89, + MAX8997_REG_LDO11CONFIG = 0x8a, + MAX8997_REG_LDO12CONFIG = 0x8b, + MAX8997_REG_LDO13CONFIG = 0x8c, + MAX8997_REG_LDO14CONFIG = 0x8d, + MAX8997_REG_LDO15CONFIG = 0x8e, + MAX8997_REG_LDO16CONFIG = 0x8f, + MAX8997_REG_LDO17CONFIG = 0x90, + MAX8997_REG_LDO18CONFIG = 0x91, + MAX8997_REG_LDO21CONFIG = 0x92, + + MAX8997_REG_DVSOKTIMER1 = 0x97, + MAX8997_REG_DVSOKTIMER2 = 0x98, + MAX8997_REG_DVSOKTIMER4 = 0x99, + MAX8997_REG_DVSOKTIMER5 = 0x9a, + + PMIC_NUM_OF_REGS = 0x9b, +}; + +#define ACTDISSAFEO1 (1 << 4) +#define ACTDISSAFEO2 (1 << 5) +#define ENSAFEOUT1 (1 << 6) +#define ENSAFEOUT2 (1 << 7) + +/* Charger */ +enum {CHARGER_ENABLE, CHARGER_DISABLE}; +#define DETBAT (1 << 2) +#define MBCICHFCSET (1 << 4) +#define MBCHOSTEN (1 << 6) +#define VCHGR_FC (1 << 7) + +#define CHARGER_MIN_CURRENT 200 +#define CHARGER_MAX_CURRENT 950 +#define CHARGER_CURRENT_RESOLUTION 50 + +#define MAX8997_I2C_ADDR (0xCC >> 1) +#define MAX8997_RTC_ADDR (0x0C >> 1) +#define MAX8997_MUIC_ADDR (0x4A >> 1) +#define MAX8997_FG_ADDR (0x6C >> 1) + +enum { + LDO_OFF = 0, + LDO_ON = 1, + + DIS_LDO = (0x00 << 6), + EN_LDO = (0x3 << 6), +}; + +#endif /* __MAX8997_PMIC_H_ */ diff --git a/include/power/max8998_pmic.h b/include/power/max8998_pmic.h new file mode 100644 index 0000000000..ca21f882c2 --- /dev/null +++ b/include/power/max8998_pmic.h @@ -0,0 +1,86 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX8998_PMIC_H_ +#define __MAX8998_PMIC_H_ + +/* MAX 8998 registers */ +enum { + MAX8998_REG_IRQ1, + MAX8998_REG_IRQ2, + MAX8998_REG_IRQ3, + MAX8998_REG_IRQ4, + MAX8998_REG_IRQM1, + MAX8998_REG_IRQM2, + MAX8998_REG_IRQM3, + MAX8998_REG_IRQM4, + MAX8998_REG_STATUS1, + MAX8998_REG_STATUS2, + MAX8998_REG_STATUSM1, + MAX8998_REG_STATUSM2, + MAX8998_REG_CHGR1, + MAX8998_REG_CHGR2, + MAX8998_REG_LDO_ACTIVE_DISCHARGE1, + MAX8998_REG_LDO_ACTIVE_DISCHARGE2, + MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, + MAX8998_REG_ONOFF1, + MAX8998_REG_ONOFF2, + MAX8998_REG_ONOFF3, + MAX8998_REG_ONOFF4, + MAX8998_REG_BUCK1_VOLTAGE1, + MAX8998_REG_BUCK1_VOLTAGE2, + MAX8998_REG_BUCK1_VOLTAGE3, + MAX8998_REG_BUCK1_VOLTAGE4, + MAX8998_REG_BUCK2_VOLTAGE1, + MAX8998_REG_BUCK2_VOLTAGE2, + MAX8998_REG_BUCK3, + MAX8998_REG_BUCK4, + MAX8998_REG_LDO2_LDO3, + MAX8998_REG_LDO4, + MAX8998_REG_LDO5, + MAX8998_REG_LDO6, + MAX8998_REG_LDO7, + MAX8998_REG_LDO8_LDO9, + MAX8998_REG_LDO10_LDO11, + MAX8998_REG_LDO12, + MAX8998_REG_LDO13, + MAX8998_REG_LDO14, + MAX8998_REG_LDO15, + MAX8998_REG_LDO16, + MAX8998_REG_LDO17, + MAX8998_REG_BKCHR, + MAX8998_REG_LBCNFG1, + MAX8998_REG_LBCNFG2, + PMIC_NUM_OF_REGS, +}; + +#define MAX8998_LDO3 (1 << 2) +#define MAX8998_LDO4 (1 << 1) +#define MAX8998_LDO8 (1 << 5) +#define MAX8998_SAFEOUT1 (1 << 4) + +#define MAX8998_I2C_ADDR (0xCC >> 1) + +enum { LDO_OFF, LDO_ON }; + +#endif /* __MAX8998_PMIC_H_ */ diff --git a/include/power/pmic.h b/include/power/pmic.h new file mode 100644 index 0000000000..e9affc8dd6 --- /dev/null +++ b/include/power/pmic.h @@ -0,0 +1,81 @@ +/* + * Copyright (C) 2011-2012 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CORE_PMIC_H_ +#define __CORE_PMIC_H_ + +#include +#include +#include + +enum { PMIC_I2C, PMIC_SPI, }; +enum { I2C_PMIC, I2C_NUM, }; +enum { PMIC_READ, PMIC_WRITE, }; +enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, }; + +struct p_i2c { + unsigned char addr; + unsigned char *buf; + unsigned char tx_num; +}; + +struct p_spi { + unsigned int cs; + unsigned int mode; + unsigned int bitlen; + unsigned int clk; + unsigned int flags; + u32 (*prepare_tx)(u32 reg, u32 *val, u32 write); +}; + +struct pmic { + const char *name; + unsigned char bus; + unsigned char interface; + unsigned char sensor_byte_order; + unsigned int number_of_regs; + union hw { + struct p_i2c i2c; + struct p_spi spi; + } hw; + + struct list_head list; +}; + +int pmic_init(unsigned char bus); +int pmic_dialog_init(unsigned char bus); +int check_reg(struct pmic *p, u32 reg); +struct pmic *pmic_alloc(void); +struct pmic *pmic_get(const char *s); +int pmic_probe(struct pmic *p); +int pmic_reg_read(struct pmic *p, u32 reg, u32 *val); +int pmic_reg_write(struct pmic *p, u32 reg, u32 val); +int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on); + +#define pmic_i2c_addr (p->hw.i2c.addr) +#define pmic_i2c_tx_num (p->hw.i2c.tx_num) + +#define pmic_spi_bitlen (p->hw.spi.bitlen) +#define pmic_spi_flags (p->hw.spi.flags) + +#endif /* __CORE_PMIC_H_ */ -- cgit v1.2.1 From 9a1c4b22862119f39b1452208e12abe5947cec30 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:21:58 +0000 Subject: pmic:chrg: Common information about charger and battery (power_chrg.h) New power_chrg.h file has been added to "bind" together common information about charging battery available in the system. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- include/power/power_chrg.h | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 include/power/power_chrg.h (limited to 'include') diff --git a/include/power/power_chrg.h b/include/power/power_chrg.h new file mode 100644 index 0000000000..24c4cde739 --- /dev/null +++ b/include/power/power_chrg.h @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __POWER_CHARGER_H_ +#define __POWER_CHARGER_H_ + +/* Type of available chargers */ +enum { + CHARGER_NO = 0, + CHARGER_TA, + CHARGER_USB, + CHARGER_TA_500, + CHARGER_UNKNOWN, +}; + +enum { + UNKNOWN, + EXT_SOURCE, + CHARGE, + NORMAL, +}; + +#endif /* __POWER_CHARGER_H_ */ -- cgit v1.2.1 From bd8479e8deca8d57c9b27096ced4153d9aacd962 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:00 +0000 Subject: pmic: Extend struct pmic to support battery and charger related operations Now it is possible to provide specific function per PMIC/power device instance. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park --- include/power/battery.h | 38 ++++++++++++++++++++++++++++++++++++++ include/power/pmic.h | 30 +++++++++++++++++++++++++++++- 2 files changed, 67 insertions(+), 1 deletion(-) create mode 100644 include/power/battery.h (limited to 'include') diff --git a/include/power/battery.h b/include/power/battery.h new file mode 100644 index 0000000000..e2fec687da --- /dev/null +++ b/include/power/battery.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __POWER_BATTERY_H_ +#define __POWER_BATTERY_H_ + +struct battery { + unsigned int version; + unsigned int state_of_chrg; + unsigned int time_to_empty; + unsigned int capacity; + unsigned int voltage_uV; + + unsigned int state; +}; + +int power_bat_init(unsigned char bus); +#endif /* __POWER_BATTERY_H_ */ diff --git a/include/power/pmic.h b/include/power/pmic.h index e9affc8dd6..1ecfc0543c 100644 --- a/include/power/pmic.h +++ b/include/power/pmic.h @@ -27,8 +27,9 @@ #include #include #include +#include -enum { PMIC_I2C, PMIC_SPI, }; +enum { PMIC_I2C, PMIC_SPI, PMIC_NONE}; enum { I2C_PMIC, I2C_NUM, }; enum { PMIC_READ, PMIC_WRITE, }; enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, }; @@ -48,6 +49,27 @@ struct p_spi { u32 (*prepare_tx)(u32 reg, u32 *val, u32 write); }; +struct pmic; +struct power_fg { + int (*fg_battery_check) (struct pmic *p, struct pmic *bat); + int (*fg_battery_update) (struct pmic *p, struct pmic *bat); +}; + +struct power_chrg { + int (*chrg_type) (struct pmic *p); + int (*chrg_bat_present) (struct pmic *p); + int (*chrg_state) (struct pmic *p, int state, int current); +}; + +struct power_battery { + struct battery *bat; + int (*battery_init) (struct pmic *bat, struct pmic *p1, + struct pmic *p2, struct pmic *p3); + int (*battery_charge) (struct pmic *bat); + /* Keep info about power devices involved with battery operation */ + struct pmic *chrg, *fg, *muic; +}; + struct pmic { const char *name; unsigned char bus; @@ -59,6 +81,12 @@ struct pmic { struct p_spi spi; } hw; + void (*low_power_mode) (void); + struct power_battery *pbat; + struct power_chrg *chrg; + struct power_fg *fg; + + struct pmic *parent; struct list_head list; }; -- cgit v1.2.1 From 294a97da34529bb318996806651ac314b1734c1c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:02 +0000 Subject: pmic:muic: Support for MUIC built into MAX8997 device Support for MUIC (Micro USB Integrated Circuit) built into the MAX8997 power management device. The MUIC device will work with redesigned PMIC framework. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- include/power/max8997_muic.h | 61 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 include/power/max8997_muic.h (limited to 'include') diff --git a/include/power/max8997_muic.h b/include/power/max8997_muic.h new file mode 100644 index 0000000000..0149c12435 --- /dev/null +++ b/include/power/max8997_muic.h @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX8997_MUIC_H_ +#define __MAX8997_MUIC_H_ + +#include + +/* MAX8997_MUIC_STATUS2 */ +#define MAX8997_MUIC_CHG_NO 0x00 +#define MAX8997_MUIC_CHG_USB 0x01 +#define MAX8997_MUIC_CHG_USB_D 0x02 +#define MAX8997_MUIC_CHG_TA 0x03 +#define MAX8997_MUIC_CHG_TA_500 0x04 +#define MAX8997_MUIC_CHG_TA_1A 0x05 +#define MAX8997_MUIC_CHG_MASK 0x07 + +/* MAX 8997 MUIC registers */ +enum { + MAX8997_MUIC_ID = 0x00, + MAX8997_MUIC_INT1 = 0x01, + MAX8997_MUIC_INT2 = 0x02, + MAX8997_MUIC_INT3 = 0x03, + MAX8997_MUIC_STATUS1 = 0x04, + MAX8997_MUIC_STATUS2 = 0x05, + MAX8997_MUIC_STATUS3 = 0x06, + MAX8997_MUIC_INTMASK1 = 0x07, + MAX8997_MUIC_INTMASK2 = 0x08, + MAX8997_MUIC_INTMASK3 = 0x09, + MAX8997_MUIC_CDETCTRL = 0x0A, + MAX8997_MUIC_CONTROL1 = 0x0C, + MAX8997_MUIC_CONTROL2 = 0x0D, + MAX8997_MUIC_CONTROL3 = 0x0E, + + MUIC_NUM_OF_REGS = 0x0F, +}; + +#define MAX8997_MUIC_I2C_ADDR (0x4A >> 1) + +int power_muic_init(unsigned int bus); +#endif /* __MAX8997_MUIC_H_ */ -- cgit v1.2.1 From b95aacd332cde91299cf05e1a87dc6d7de545adb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:03 +0000 Subject: pmic:fuel-gauge: Support for MAX17042 fuel-gauge Support for MAX17042 fuel-gauge (FG), which is built into the MAX8997 power management device. Special file - fg_battery_cell_params.h with cells characteristics added. The FG device will work with redesigned PMIC framework. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- include/power/fg_battery_cell_params.h | 90 ++++++++++++++++++++++++++++++++++ include/power/max17042_fg.h | 74 ++++++++++++++++++++++++++++ 2 files changed, 164 insertions(+) create mode 100644 include/power/fg_battery_cell_params.h create mode 100644 include/power/max17042_fg.h (limited to 'include') diff --git a/include/power/fg_battery_cell_params.h b/include/power/fg_battery_cell_params.h new file mode 100644 index 0000000000..7ddf6f2ffa --- /dev/null +++ b/include/power/fg_battery_cell_params.h @@ -0,0 +1,90 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __FG_BATTERY_CELL_PARAMS_H_ +#define __FG_BATTERY_CELL_PARAMS_H_ + +#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TRATS) + +/* Cell characteristics - Exynos4 TRATS development board */ +/* Shall be written to addr 0x80h */ +u16 cell_character0[16] = { + 0xA2A0, + 0xB6E0, + 0xB850, + 0xBAD0, + 0xBB20, + 0xBB70, + 0xBBC0, + 0xBC20, + 0xBC80, + 0xBCE0, + 0xBD80, + 0xBE20, + 0xC090, + 0xC420, + 0xC910, + 0xD070 +}; + +/* Shall be written to addr 0x90h */ +u16 cell_character1[16] = { + 0x0090, + 0x1A50, + 0x02F0, + 0x2060, + 0x2060, + 0x2E60, + 0x26A0, + 0x2DB0, + 0x2DB0, + 0x1870, + 0x2A20, + 0x16F0, + 0x08F0, + 0x0D40, + 0x08C0, + 0x08C0 +}; + +/* Shall be written to addr 0xA0h */ +u16 cell_character2[16] = { + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100, + 0x0100 +}; +#endif +#endif /* __FG_BATTERY_CELL_PARAMS_H_ */ diff --git a/include/power/max17042_fg.h b/include/power/max17042_fg.h new file mode 100644 index 0000000000..1103a483f2 --- /dev/null +++ b/include/power/max17042_fg.h @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX17042_FG_H_ +#define __MAX17042_FG_H_ + +/* MAX 17042 registers */ +enum { + MAX17042_STATUS = 0x00, + MAX17042_SOCREP = 0x06, + MAX17042_VCELL = 0x09, + MAX17042_CURRENT = 0x0A, + MAX17042_AVG_CURRENT = 0x0B, + MAX17042_SOCMIX = 0x0D, + MAX17042_SOCAV = 0x0E, + MAX17042_DESIGN_CAP = 0x18, + MAX17042_AVG_VCELL = 0x19, + MAX17042_CONFIG = 0x1D, + MAX17042_VERSION = 0x21, + MAX17042_LEARNCFG = 0x28, + MAX17042_FILTERCFG = 0x29, + MAX17042_RELAXCFG = 0x2A, + MAX17042_MISCCFG = 0x2B, + MAX17042_CGAIN = 0x2E, + MAX17042_COFF = 0x2F, + MAX17042_RCOMP0 = 0x38, + MAX17042_TEMPCO = 0x39, + MAX17042_FSTAT = 0x3D, + MAX17042_MLOCKReg1 = 0x62, + MAX17042_MLOCKReg2 = 0x63, + MAX17042_MODEL1 = 0x80, + MAX17042_MODEL2 = 0x90, + MAX17042_MODEL3 = 0xA0, + MAX17042_VFOCV = 0xFB, + MAX17042_VFSOC = 0xFF, + + FG_NUM_OF_REGS = 0x100, +}; + +#define RCOMP0 0x0060 +#define TempCo 0x1015 + + +#define MAX17042_POR (1 << 1) + +#define MODEL_UNLOCK1 0x0059 +#define MODEL_UNLOCK2 0x00c4 +#define MODEL_LOCK1 0x0000 +#define MODEL_LOCK2 0x0000 + +#define MAX17042_I2C_ADDR (0x6C >> 1) + +int power_fg_init(unsigned char bus); +#endif /* __MAX17042_FG_H_ */ -- cgit v1.2.1 From bf995a9a28c7a987be0b3df9d4f84da63c9bfb1c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:04 +0000 Subject: pmic:max8997: Function for calculating LDO internal register value Function for calculating LDO internal register value from passed micro Volt. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- include/power/max8997_pmic.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/power/max8997_pmic.h b/include/power/max8997_pmic.h index 1db7deb3be..03cac041f1 100644 --- a/include/power/max8997_pmic.h +++ b/include/power/max8997_pmic.h @@ -200,4 +200,6 @@ enum { EN_LDO = (0x3 << 6), }; +#define MAX8997_LDO_MAX_VAL 0x3F +unsigned char max8997_reg_ldo(int uV); #endif /* __MAX8997_PMIC_H_ */ -- cgit v1.2.1 From a52a7b14775bf54b3c6e279146e4f58c010b6823 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:05 +0000 Subject: arm:trats:pmic: Default PMIC(MAX8997) initialization for Samsung's TRATS board Default PMIC (MAX8997) initialization for Samsung's TRATS development board. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Minkyu Kang --- include/power/max8997_pmic.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/power/max8997_pmic.h b/include/power/max8997_pmic.h index 03cac041f1..5d2d94df9b 100644 --- a/include/power/max8997_pmic.h +++ b/include/power/max8997_pmic.h @@ -176,6 +176,15 @@ enum { #define ENSAFEOUT1 (1 << 6) #define ENSAFEOUT2 (1 << 7) +#define ENBUCK (1 << 0) +#define ACTIVE_DISCHARGE (1 << 3) +#define GNSLCT (1 << 2) +#define LDO_ADE (1 << 1) +#define SAFEOUT_4_85V 0x00 +#define SAFEOUT_4_90V 0x01 +#define SAFEOUT_4_95V 0x02 +#define SAFEOUT_3_30V 0x03 + /* Charger */ enum {CHARGER_ENABLE, CHARGER_DISABLE}; #define DETBAT (1 << 2) -- cgit v1.2.1 From 7dcda99d4f1f9f966383609b72edad4b76e9aad4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:06 +0000 Subject: arm:trats:pmic: Enable MUIC (MAX8997) at Samsung's TRATS board MUIC IC built into the MAX8997 device is enabled at TRATS. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Minkyu Kang --- include/configs/trats.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index d7808aa712..74c4a23773 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -238,6 +238,8 @@ #define CONFIG_PMIC_I2C #define CONFIG_PMIC_MAX8997 +#define CONFIG_POWER_MUIC +#define CONFIG_POWER_MUIC_MAX8997 #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG #define CONFIG_USB_GADGET_DUALSPEED -- cgit v1.2.1 From 5a77358c4b870a58ed68f5fcff32534c47f38b19 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:07 +0000 Subject: arm:trats:pmic: Enable fuel-gauge (MAX17042) at Samsung's TRATS board FG IC built into the MAX8997 device (compliant to MAX17042) is enabled at TRATS. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Minkyu Kang --- include/configs/trats.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index 74c4a23773..0bc1f3abc0 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -238,6 +238,8 @@ #define CONFIG_PMIC_I2C #define CONFIG_PMIC_MAX8997 +#define CONFIG_POWER_FG +#define CONFIG_POWER_FG_MAX17042 #define CONFIG_POWER_MUIC #define CONFIG_POWER_MUIC_MAX8997 #define CONFIG_USB_GADGET -- cgit v1.2.1 From 61365ffc2efc52717af1b4c38a71b4a3d8c77149 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:08 +0000 Subject: arm:trats:pmic: Enable battery support at Samsung's TRATS board Support for TRATS battery has been added. It is treated as a "normal" power related device and thereof controlled by pmic/power subsystem. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Minkyu Kang --- include/configs/trats.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index 0bc1f3abc0..2fdc597c00 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -242,6 +242,8 @@ #define CONFIG_POWER_FG_MAX17042 #define CONFIG_POWER_MUIC #define CONFIG_POWER_MUIC_MAX8997 +#define CONFIG_POWER_BATTERY +#define CONFIG_POWER_BATTERY_TRATS #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG #define CONFIG_USB_GADGET_DUALSPEED -- cgit v1.2.1 From be3b51aa4a450f3e3fcd9c6e5074ef435812a02d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:14 +0000 Subject: power:pmic: Rename CONFIG_PMIC* defines to CONFIG_POWER Rename all CONFIG_PMIC* defines to CONFIG_POWER* Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- include/configs/imx31_litekit.h | 6 +++--- include/configs/mx31ads.h | 6 +++--- include/configs/mx31pdk.h | 6 +++--- include/configs/mx35pdk.h | 6 +++--- include/configs/mx51_efikamx.h | 6 +++--- include/configs/mx51evk.h | 6 +++--- include/configs/mx53evk.h | 6 +++--- include/configs/mx53loco.h | 6 +++--- include/configs/qong.h | 6 +++--- include/configs/s5p_goni.h | 6 +++--- include/configs/s5pc210_universal.h | 6 +++--- include/configs/trats.h | 6 +++--- include/configs/tt01.h | 6 +++--- include/configs/vision2.h | 6 +++--- 14 files changed, 42 insertions(+), 42 deletions(-) (limited to 'include') diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 6ae764a2d4..8fc3942450 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -72,9 +72,9 @@ #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) /* PMIC Controller */ -#define CONFIG_PMIC -#define CONFIG_PMIC_SPI -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_SPI +#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 1000000 diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 9d9f4a7822..9e4006b441 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -68,9 +68,9 @@ #define CONFIG_MXC_GPIO /* PMIC Controller */ -#define CONFIG_PMIC -#define CONFIG_PMIC_SPI -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_SPI +#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 1000000 diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 223b5b0bb9..3b86c9ebf3 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -69,9 +69,9 @@ #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) /* PMIC Controller */ -#define CONFIG_PMIC -#define CONFIG_PMIC_SPI -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_SPI +#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 2 #define CONFIG_FSL_PMIC_CLK 1000000 diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 826c912494..342d53fee0 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -65,9 +65,9 @@ /* * PMIC Configs */ -#define CONFIG_PMIC -#define CONFIG_PMIC_I2C -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_FSL #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 #define CONFIG_RTC_MC13XXX diff --git a/include/configs/mx51_efikamx.h b/include/configs/mx51_efikamx.h index ffe771f2dc..3c1c056fe3 100644 --- a/include/configs/mx51_efikamx.h +++ b/include/configs/mx51_efikamx.h @@ -127,9 +127,9 @@ #endif /* SPI PMIC */ -#define CONFIG_PMIC -#define CONFIG_PMIC_SPI -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_SPI +#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS (0 | 120 << 8) #define CONFIG_FSL_PMIC_CLK 25000000 diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 225d359ecb..f00cec2809 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -69,9 +69,9 @@ #define CONFIG_MXC_SPI /* PMIC Controller */ -#define CONFIG_PMIC -#define CONFIG_PMIC_SPI -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_SPI +#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 2500000 diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index d1f684cbc5..1916b85e28 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -55,9 +55,9 @@ #define CONFIG_SYS_I2C_SPEED 100000 /* PMIC Configs */ -#define CONFIG_PMIC -#define CONFIG_PMIC_I2C -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_FSL #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 #define CONFIG_RTC_MC13XXX diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index a1b27cef53..d16de3306a 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -89,10 +89,10 @@ #define CONFIG_SYS_I2C_SPEED 100000 /* PMIC Controller */ -#define CONFIG_PMIC -#define CONFIG_PMIC_I2C +#define CONFIG_POWER +#define CONFIG_POWER_I2C #define CONFIG_DIALOG_PMIC -#define CONFIG_PMIC_FSL +#define CONFIG_POWER_FSL #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 diff --git a/include/configs/qong.h b/include/configs/qong.h index e43a02110e..d9bf2010b8 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -58,9 +58,9 @@ #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_RTC_MC13XXX -#define CONFIG_PMIC -#define CONFIG_PMIC_SPI -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_SPI +#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 100000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 7e0b302935..56e83478f8 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -215,9 +215,9 @@ #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_PMIC -#define CONFIG_PMIC_I2C -#define CONFIG_PMIC_MAX8998 +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_MAX8998 #include /* diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 5fc6136435..894f38bd7d 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -253,9 +253,9 @@ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_MAX_I2C_BUS 7 -#define CONFIG_PMIC -#define CONFIG_PMIC_I2C -#define CONFIG_PMIC_MAX8998 +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_MAX8998 #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG diff --git a/include/configs/trats.h b/include/configs/trats.h index 2fdc597c00..355029e8d8 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -234,9 +234,9 @@ #define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin() #define I2C_INIT multi_i2c_init() -#define CONFIG_PMIC -#define CONFIG_PMIC_I2C -#define CONFIG_PMIC_MAX8997 +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_MAX8997 #define CONFIG_POWER_FG #define CONFIG_POWER_FG_MAX17042 diff --git a/include/configs/tt01.h b/include/configs/tt01.h index f46efa55f1..9f8f240f82 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -149,9 +149,9 @@ #define CONFIG_MXC_GPIO /* MC13783 connected to CSPI3 and SS0 */ -#define CONFIG_PMIC -#define CONFIG_PMIC_SPI -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_SPI +#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 2 #define CONFIG_FSL_PMIC_CS 0 diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 848df88e7d..a72010ff21 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -87,9 +87,9 @@ #define CONFIG_ENV_IS_IN_SPI_FLASH /* PMIC Controller */ -#define CONFIG_PMIC -#define CONFIG_PMIC_SPI -#define CONFIG_PMIC_FSL +#define CONFIG_POWER +#define CONFIG_POWER_SPI +#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 2500000 -- cgit v1.2.1 From 2988e8662bba5b94c366bc3cb8eb26f0024f74de Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Majewski?= Date: Tue, 13 Nov 2012 03:22:15 +0000 Subject: power:pmic: Rename CONFIG_DIALOG_PMIC defines to CONFIG_DIALOG_POWER Rename CONFIG_DIALOG_PMIC to CONFIG_DIALOG_POWER Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- include/configs/mx53loco.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index d16de3306a..a1101762e3 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -91,7 +91,7 @@ /* PMIC Controller */ #define CONFIG_POWER #define CONFIG_POWER_I2C -#define CONFIG_DIALOG_PMIC +#define CONFIG_DIALOG_POWER #define CONFIG_POWER_FSL #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 -- cgit v1.2.1 From d858c335bf4f7e9eb0b1dd521a4bd6487a27cd54 Mon Sep 17 00:00:00 2001 From: "Jens Scharsig (BuS Elektronik)" Date: Tue, 30 Oct 2012 00:46:05 +0000 Subject: M68K: eb_cpu5282: general update and enhanced board support - update clock settings for higher perfomance - change standard baud rate to 115200 - fix flash base address - remove unused defines - add I2C support - switch form board dependent flash to cfi - remove board dependent flash code - use sdram bank 0 instead of bank 1 on boot - enable on board frame buffer instead external - remove fake mac address form config - add watchdog support - add status led support Signed-off-by: Jens Scharsig (BuS Elektronik) [agust: fixed small style issues and build warning] Signed-off-by: Anatolij Gustschin --- include/configs/eb_cpu5282.h | 102 ++++++++++++++++++++++++++++--------------- 1 file changed, 66 insertions(+), 36 deletions(-) (limited to 'include') diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 9ecc10bd1b..5a0d321f73 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -38,7 +38,7 @@ #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) -#define CONFIG_BAUDRATE 9600 +#define CONFIG_BAUDRATE 115200 #undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */ @@ -52,20 +52,24 @@ #define CONFIG_RESET_TO_RETRY #define CONFIG_SPLASH_SCREEN +#define CONFIG_HW_WATCHDOG + +#define CONFIG_STATUS_LED +#define CONFIG_BOARD_SPECIFIC_LED +#define STATUS_LED_ACTIVE 0 +#define STATUS_LED_BIT 0x0008 /* Timer7 GPIO */ +#define STATUS_LED_BOOT 0 +#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) +#define STATUS_LED_STATE STATUS_LED_OFF + /*----------------------------------------------------------------------* * Configuration for environment * * Environment is in the second sector of the first 256k of flash * *----------------------------------------------------------------------*/ -#ifndef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_ENV_ADDR 0xF003C000 /* End of 256K */ -#define CONFIG_ENV_SECT_SIZE 0x4000 -#define CONFIG_ENV_IS_IN_FLASH 1 -#else -#define CONFIG_ENV_ADDR 0xFFE04000 -#define CONFIG_ENV_SECT_SIZE 0x2000 +#define CONFIG_ENV_ADDR 0xFF040000 +#define CONFIG_ENV_SECT_SIZE 0x00020000 #define CONFIG_ENV_IS_IN_FLASH 1 -#endif /* * BOOTP options @@ -78,26 +82,24 @@ /* * Command line configuration. */ +#define CONFIG_CMDLINE_EDITING #include #undef CONFIG_CMD_LOADB +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_I2C +#define CONFIG_CMD_LED #define CONFIG_CMD_MII #define CONFIG_CMD_NET #define CONFIG_MCFTMR - #define CONFIG_BOOTDELAY 5 -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_PROMPT "\nEB+CPU5282> " #define CONFIG_SYS_LONGHELP 1 -#if defined(CONFIG_CMD_KGDB) #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE @@ -112,12 +114,12 @@ /*----------------------------------------------------------------------* * Clock and PLL Configuration * *----------------------------------------------------------------------*/ -#define CONFIG_SYS_HZ 10000000 -#define CONFIG_SYS_CLK 58982400 /* 9,8304MHz * 6 */ +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_CLK 80000000 /* 8MHz * 8 */ -/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */ +/* PLL Configuration: Ext Clock * 8 (see table 9-4 of MCF user manual) */ -#define CONFIG_SYS_MFD 0x01 /* PLL Multiplication Factor Devider */ +#define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ /*----------------------------------------------------------------------* @@ -135,7 +137,6 @@ #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE #define MCFFEC_TOUT_LOOP 50000 -#define CONFIG_ETHADDR 00:CF:52:82:EB:01 #define CONFIG_OVERWRITE_ETHADDR_ONCE /*------------------------------------------------------------------------- @@ -151,7 +152,7 @@ *-----------------------------------------------------------------------*/ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #define CONFIG_SYS_GBL_DATA_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET @@ -161,12 +162,11 @@ * (Set up by the startup code) * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE1 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE1 16 /* SDRAM size in MB */ - -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE1 -#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE1 +#define CONFIG_SYS_SDRAM_BASE0 0x00000000 +#define CONFIG_SYS_SDRAM_SIZE0 16 /* SDRAM size in MB */ +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 +#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 /* If M5282 port is fully implemented the monitor base will be behind * the vector table. */ @@ -190,16 +190,24 @@ /*----------------------------------------------------------------------- * FLASH organization */ +#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE #define CONFIG_SYS_INT_FLASH_BASE 0xF0000000 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 -#define CONFIG_SYS_MAX_FLASH_SECT 35 -#define CONFIG_SYS_MAX_FLASH_BANKS 2 +#define CONFIG_SYS_MAX_FLASH_SECT 128 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_FLASH_ERASE_TOUT 10000000 #define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_SIZE 16*1024*1024 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT + +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } + /*----------------------------------------------------------------------- * Cache Configuration */ @@ -221,12 +229,16 @@ * Memory bank definitions */ -#define CONFIG_SYS_CS0_BASE 0xFFE00000 +#define CONFIG_SYS_CS0_BASE 0xFF000000 #define CONFIG_SYS_CS0_CTRL 0x00001980 -#define CONFIG_SYS_CS0_MASK 0x001F0001 +#define CONFIG_SYS_CS0_MASK 0x00FF0001 -#define CONFIG_SYS_CS3_BASE 0xE0000000 -#define CONFIG_SYS_CS0_CTRL 0x00001980 +#define CONFIG_SYS_CS2_BASE 0xE0000000 +#define CONFIG_SYS_CS2_CTRL 0x00001980 +#define CONFIG_SYS_CS2_MASK 0x000F0001 + +#define CONFIG_SYS_CS3_BASE 0xE0100000 +#define CONFIG_SYS_CS3_CTRL 0x00001980 #define CONFIG_SYS_CS3_MASK 0x000F0001 /*----------------------------------------------------------------------- @@ -248,11 +260,30 @@ #define CONFIG_SYS_PCDDR 0x0000000 #define CONFIG_SYS_PCDAT 0x0000000 +#define CONFIG_SYS_PASPAR 0x0F0F #define CONFIG_SYS_PEHLPAR 0xC0 #define CONFIG_SYS_PUAPAR 0x0F #define CONFIG_SYS_DDRUA 0x05 #define CONFIG_SYS_PJPAR 0xFF +/*----------------------------------------------------------------------- + * I2C + */ + +#define CONFIG_HARD_I2C +#define CONFIG_FSL_I2C + +#define CONFIG_SYS_I2C_OFFSET 0x00000300 +#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR + +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0 + +#ifdef CONFIG_CMD_DATE +#define CONFIG_RTC_DS1338 +#define CONFIG_I2C_RTC_ADDR 0x68 +#endif + /*----------------------------------------------------------------------- * VIDEO configuration */ @@ -260,12 +291,11 @@ #define CONFIG_VIDEO #ifdef CONFIG_VIDEO -#define CONFIG_VIDEO_VCXK 1 +#define CONFIG_VIDEO_VCXK 1 #define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2 #define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1 -#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS3_BASE -#define CONFIG_SYS_VCXK_AUTODETECT 1 +#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS2_BASE #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT #define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR -- cgit v1.2.1 From c11ace6b7bcfef535198b607e43adea65c8ce7dd Mon Sep 17 00:00:00 2001 From: Jeroen Hofstee Date: Mon, 22 Oct 2012 22:35:46 +0200 Subject: boards: remove the no longer used CONFIG_EHCI_DCACHE CONFIG_EHCI_DCACHE was removed by commit b8adb12 "USB: Drop cache flush bloat in EHCI-HCD". Remove the defines from the boards configs as well. Signed-off-by: Jeroen Hofstee cc: Marek Vasut cc: Stefan Roese cc: Tom Rini cc: Wolfgang Denk cc: Thierry Reding cc: Tom Warren cc: Stephen Warren cc: Stefano Babic --- include/configs/lwmon5.h | 1 - include/configs/mcx.h | 1 - include/configs/omap3_beagle.h | 1 - include/configs/sequoia.h | 3 --- include/configs/tam3517-common.h | 2 -- include/configs/tegra20-common.h | 1 - include/configs/vct.h | 1 - 7 files changed, 10 deletions(-) (limited to 'include') diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 2d33ebcd71..2ebcd1615f 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -401,7 +401,6 @@ #define CONFIG_USB_EHCI /* Enable EHCI USB support */ #define CONFIG_USB_EHCI_PPC4XX /* on PPC4xx platform */ #define CONFIG_SYS_PPC4XX_USB_ADDR 0xe0000300 -#define CONFIG_EHCI_DCACHE /* with dcache handling support */ #define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_EHCI_DESC_BIG_ENDIAN #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */ diff --git a/include/configs/mcx.h b/include/configs/mcx.h index bf49cc1381..e18d87914d 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -114,7 +114,6 @@ #define CONFIG_USB_EHCI_OMAP #define CONFIG_USB_ULPI #define CONFIG_USB_ULPI_VIEWPORT_OMAP -/*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */ #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 7a3cc16a09..65353e8d1c 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -131,7 +131,6 @@ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP -/*#define CONFIG_EHCI_DCACHE*/ /* leave it disabled for now */ #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 #define CONFIG_USB_ULPI diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 8e6954e3aa..dd5d7cd260 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -288,9 +288,6 @@ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_EHCI_DESC_BIG_ENDIAN -#ifdef CONFIG_4xx_DCACHE -#define CONFIG_EHCI_DCACHE -#endif #else /* CONFIG_USB_EHCI */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_OHCI_BE_CONTROLLER diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index dd7757cb97..ac534ac761 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -106,8 +106,6 @@ #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_USB_STORAGE -/* #define CONFIG_EHCI_DCACHE */ - /* commands to include */ #include diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 15bd9bb146..2a14caaf60 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -100,7 +100,6 @@ */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 10 #define CONFIG_EHCI_IS_TDI -#define CONFIG_EHCI_DCACHE /* Total I2C ports on Tegra20 */ #define TEGRA_I2C_NUM_CONTROLLERS 4 diff --git a/include/configs/vct.h b/include/configs/vct.h index b4b0949522..7aeb66801e 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -136,7 +136,6 @@ */ #define CONFIG_USB_EHCI /* Enable EHCI USB support */ #define CONFIG_USB_EHCI_VCT /* on VCT platform */ -#define CONFIG_EHCI_DCACHE /* with dcache handling support */ #define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_EHCI_DESC_BIG_ENDIAN #define CONFIG_EHCI_IS_TDI -- cgit v1.2.1 From 7992bfbf8dcc5162a096b1da0be8807d0f892257 Mon Sep 17 00:00:00 2001 From: Allen Martin Date: Wed, 24 Oct 2012 08:32:05 +0000 Subject: tegra: move TEGRA_DEVICE_SETTINGS to tegra-common-post.h Move environment settings for stdin/stdout/stderr to tegra-common-post.h and generate them automaticaly based on input device selection. Signed-off-by: Allen Martin Acked-by: Stephen Warren Tested-by: Stephen Warren --- include/configs/seaboard.h | 5 ----- include/configs/tegra-common-post.h | 19 +++++++++++++++++++ include/configs/tegra20-common.h | 4 ---- 3 files changed, 19 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 74d3b94887..60ddeac666 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -99,11 +99,6 @@ #define CONFIG_TEGRA_KEYBOARD #define CONFIG_KEYBOARD -#undef TEGRA_DEVICE_SETTINGS -#define TEGRA_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \ - "stdout=serial\0" \ - "stderr=serial\0" - #include "tegra-common-post.h" /* NAND support */ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 6835155d11..6f310bee60 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -165,6 +165,25 @@ "fdt_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x02100000\0" \ +#ifdef CONFIG_TEGRA_KEYBOARD +#define STDIN_KBD_KBC ",tegra-kbc" +#else +#define STDIN_KBD_KBC "" +#endif + +#ifdef CONFIG_USB_KEYBOARD +#define STDIN_KBD_USB ",usbkbd" +#define CONFIG_SYS_USB_EVENT_POLL +#define CONFIG_PREBOOT "usb start" +#else +#define STDIN_KBD_USB "" +#endif + +#define TEGRA_DEVICE_SETTINGS \ + "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB "\0" \ + "stdout=serial\0" \ + "stderr=serial\0" \ + #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 2a14caaf60..31b68be4db 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -124,12 +124,8 @@ #define CONFIG_SYS_NO_FLASH -/* Environment information, boards can override if required */ #define CONFIG_CONSOLE_MUX #define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define TEGRA_DEVICE_SETTINGS "stdin=serial\0" \ - "stdout=serial\0" \ - "stderr=serial\0" #define CONFIG_LOADADDR 0x408000 /* def. location for kernel */ #define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */ -- cgit v1.2.1 From 5ddcc38bee7c4e58197ff8de7919aca2532a8e03 Mon Sep 17 00:00:00 2001 From: Allen Martin Date: Wed, 24 Oct 2012 08:32:06 +0000 Subject: tegra: Enable USB keyboard Enable USB keyboard for seaboard and ventana Signed-off-by: Allen Martin Acked-by: Stephen Warren Tested-by: Stephen Warren --- include/configs/seaboard.h | 3 +++ include/configs/ventana.h | 3 +++ 2 files changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 60ddeac666..ab10bd0abc 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -99,6 +99,9 @@ #define CONFIG_TEGRA_KEYBOARD #define CONFIG_KEYBOARD +/* USB keyboard */ +#define CONFIG_USB_KEYBOARD + #include "tegra-common-post.h" /* NAND support */ diff --git a/include/configs/ventana.h b/include/configs/ventana.h index b751d58bc8..4c9b31cce3 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -75,6 +75,9 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP +/* USB keyboard */ +#define CONFIG_USB_KEYBOARD + #include "tegra-common-post.h" #endif /* __CONFIG_H */ -- cgit v1.2.1 From 82651c39f6544e932fb86853bf9a648414ccca9a Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:19 +0000 Subject: linux/usb/ch9.h: update with the version from Linux tree Signed-off-by: Ilya Yanok --- include/linux/usb/ch9.h | 514 ++++++++++++++++++++++++++++++++++++++++++++++-- include/usb/s3c_udc.h | 1 - 2 files changed, 499 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/linux/usb/ch9.h b/include/linux/usb/ch9.h index ce1d1e10ba..d1d732c283 100644 --- a/include/linux/usb/ch9.h +++ b/include/linux/usb/ch9.h @@ -28,15 +28,13 @@ * [c] for consistency, removing all doubt even when it appears to * someone that the two other points are non-issues for that * particular descriptor type. - * - * Ported to U-boot by: Thomas Smits and - * Remy Bohmer */ #ifndef __LINUX_USB_CH9_H #define __LINUX_USB_CH9_H #include /* __u8 etc */ +#include /* le16_to_cpu */ /*-------------------------------------------------------------------------*/ @@ -70,7 +68,7 @@ #define USB_RECIP_OTHER 0x03 /* From Wireless USB 1.0 */ #define USB_RECIP_PORT 0x04 -#define USB_RECIP_RPIPE 0x05 +#define USB_RECIP_RPIPE 0x05 /* * Standard requests, for the bRequest field of a SETUP packet. @@ -90,6 +88,8 @@ #define USB_REQ_GET_INTERFACE 0x0A #define USB_REQ_SET_INTERFACE 0x0B #define USB_REQ_SYNCH_FRAME 0x0C +#define USB_REQ_SET_SEL 0x30 +#define USB_REQ_SET_ISOCH_DELAY 0x31 #define USB_REQ_SET_ENCRYPTION 0x0D /* Wireless USB */ #define USB_REQ_GET_ENCRYPTION 0x0E @@ -105,10 +105,16 @@ #define USB_REQ_LOOPBACK_DATA_READ 0x16 #define USB_REQ_SET_INTERFACE_DS 0x17 +/* The Link Power Management (LPM) ECN defines USB_REQ_TEST_AND_SET command, + * used by hubs to put ports into a new L1 suspend state, except that it + * forgot to define its number ... + */ + /* * USB feature flags are written using USB_REQ_{CLEAR,SET}_FEATURE, and * are read as a bit array returned by USB_REQ_GET_STATUS. (So there - * are at most sixteen features of each type.) + * are at most sixteen features of each type.) Hubs may also support a + * new USB_REQ_TEST_AND_SET_FEATURE to put ports into L1 suspend. */ #define USB_DEVICE_SELF_POWERED 0 /* (read only) */ #define USB_DEVICE_REMOTE_WAKEUP 1 /* dev may initiate wakeup */ @@ -120,8 +126,38 @@ #define USB_DEVICE_A_ALT_HNP_SUPPORT 5 /* (otg) other RH port does */ #define USB_DEVICE_DEBUG_MODE 6 /* (special devices only) */ +/* + * Test Mode Selectors + * See USB 2.0 spec Table 9-7 + */ +#define TEST_J 1 +#define TEST_K 2 +#define TEST_SE0_NAK 3 +#define TEST_PACKET 4 +#define TEST_FORCE_EN 5 + +/* + * New Feature Selectors as added by USB 3.0 + * See USB 3.0 spec Table 9-6 + */ +#define USB_DEVICE_U1_ENABLE 48 /* dev may initiate U1 transition */ +#define USB_DEVICE_U2_ENABLE 49 /* dev may initiate U2 transition */ +#define USB_DEVICE_LTM_ENABLE 50 /* dev may send LTM */ +#define USB_INTRF_FUNC_SUSPEND 0 /* function suspend */ + +#define USB_INTR_FUNC_SUSPEND_OPT_MASK 0xFF00 +/* + * Suspend Options, Table 9-7 USB 3.0 spec + */ +#define USB_INTRF_FUNC_SUSPEND_LP (1 << (8 + 0)) +#define USB_INTRF_FUNC_SUSPEND_RW (1 << (8 + 1)) + #define USB_ENDPOINT_HALT 0 /* IN/OUT will STALL */ +/* Bit array elements as returned by the USB_REQ_GET_STATUS request. */ +#define USB_DEV_STAT_U1_ENABLED 2 /* transition into U1 state */ +#define USB_DEV_STAT_U2_ENABLED 3 /* transition into U2 state */ +#define USB_DEV_STAT_LTM_ENABLED 4 /* Latency tolerance messages */ /** * struct usb_ctrlrequest - SETUP data for a USB device control request @@ -140,10 +176,6 @@ * For most devices, interfaces don't coordinate with each other, so * such requests may be made at any time. */ -#if defined(__BIG_ENDIAN) || defined(__ARMEB__) -#error (functionality not verified for big endian targets, todo...) -#endif - struct usb_ctrlrequest { __u8 bRequestType; __u8 bRequest; @@ -159,8 +191,12 @@ struct usb_ctrlrequest { * (rarely) accepted by SET_DESCRIPTOR. * * Note that all multi-byte values here are encoded in little endian - * byte order "on the wire". But when exposed through Linux-USB APIs, - * they've been converted to cpu byte order. + * byte order "on the wire". Within the kernel and when exposed + * through the Linux-USB APIs, they are not converted to cpu byte + * order; it is the responsibility of the client code to do this. + * The single exception is when device and configuration descriptors (but + * not other descriptors) are read from usbfs (i.e. /proc/bus/usb/BBB/DDD); + * in this case the fields are converted to host endianness by the kernel. */ /* @@ -187,6 +223,11 @@ struct usb_ctrlrequest { #define USB_DT_WIRELESS_ENDPOINT_COMP 0x11 #define USB_DT_WIRE_ADAPTER 0x21 #define USB_DT_RPIPE 0x22 +#define USB_DT_CS_RADIO_CONTROL 0x23 +/* From the T10 UAS specification */ +#define USB_DT_PIPE_USAGE 0x24 +/* From the USB 3.0 spec */ +#define USB_DT_SS_ENDPOINT_COMP 0x30 /* Conventional codes for class-specific descriptors. The convention is * defined in the USB "Common Class" Spec (3.11). Individual class specs @@ -204,6 +245,28 @@ struct usb_descriptor_header { __u8 bDescriptorType; } __attribute__ ((packed)); + +/*-------------------------------------------------------------------------*/ + +/* USB_DT_DEVICE: Device descriptor */ +struct usb_device_descriptor { + __u8 bLength; + __u8 bDescriptorType; + + __le16 bcdUSB; + __u8 bDeviceClass; + __u8 bDeviceSubClass; + __u8 bDeviceProtocol; + __u8 bMaxPacketSize0; + __le16 idVendor; + __le16 idProduct; + __le16 bcdDevice; + __u8 iManufacturer; + __u8 iProduct; + __u8 iSerialNumber; + __u8 bNumConfigurations; +} __attribute__ ((packed)); + #define USB_DT_DEVICE_SIZE 18 @@ -230,6 +293,8 @@ struct usb_descriptor_header { #define USB_CLASS_APP_SPEC 0xfe #define USB_CLASS_VENDOR_SPEC 0xff +#define USB_SUBCLASS_VENDOR_SPEC 0xff + /*-------------------------------------------------------------------------*/ /* USB_DT_CONFIG: Configuration descriptor information. @@ -260,11 +325,56 @@ struct usb_config_descriptor { #define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */ #define USB_CONFIG_ATT_BATTERY (1 << 4) /* battery powered */ +/*-------------------------------------------------------------------------*/ + +/* USB_DT_STRING: String descriptor */ +struct usb_string_descriptor { + __u8 bLength; + __u8 bDescriptorType; + + __le16 wData[1]; /* UTF-16LE encoded */ +} __attribute__ ((packed)); + /* note that "string" zero is special, it holds language codes that * the device supports, not Unicode characters. */ +/*-------------------------------------------------------------------------*/ + +/* USB_DT_INTERFACE: Interface descriptor */ +struct usb_interface_descriptor { + __u8 bLength; + __u8 bDescriptorType; + + __u8 bInterfaceNumber; + __u8 bAlternateSetting; + __u8 bNumEndpoints; + __u8 bInterfaceClass; + __u8 bInterfaceSubClass; + __u8 bInterfaceProtocol; + __u8 iInterface; +} __attribute__ ((packed)); + #define USB_DT_INTERFACE_SIZE 9 + +/*-------------------------------------------------------------------------*/ + +/* USB_DT_ENDPOINT: Endpoint descriptor */ +struct usb_endpoint_descriptor { + __u8 bLength; + __u8 bDescriptorType; + + __u8 bEndpointAddress; + __u8 bmAttributes; + __le16 wMaxPacketSize; + __u8 bInterval; + + /* NOTE: these two are _only_ in audio endpoints. */ + /* use USB_DT_ENDPOINT*_SIZE in bLength, not sizeof. */ + __u8 bRefresh; + __u8 bSynchAddress; +} __attribute__ ((packed)); + #define USB_DT_ENDPOINT_SIZE 7 #define USB_DT_ENDPOINT_AUDIO_SIZE 9 /* Audio extension */ @@ -282,6 +392,254 @@ struct usb_config_descriptor { #define USB_ENDPOINT_XFER_INT 3 #define USB_ENDPOINT_MAX_ADJUSTABLE 0x80 +/* The USB 3.0 spec redefines bits 5:4 of bmAttributes as interrupt ep type. */ +#define USB_ENDPOINT_INTRTYPE 0x30 +#define USB_ENDPOINT_INTR_PERIODIC (0 << 4) +#define USB_ENDPOINT_INTR_NOTIFICATION (1 << 4) + +#define USB_ENDPOINT_SYNCTYPE 0x0c +#define USB_ENDPOINT_SYNC_NONE (0 << 2) +#define USB_ENDPOINT_SYNC_ASYNC (1 << 2) +#define USB_ENDPOINT_SYNC_ADAPTIVE (2 << 2) +#define USB_ENDPOINT_SYNC_SYNC (3 << 2) + +#define USB_ENDPOINT_USAGE_MASK 0x30 +#define USB_ENDPOINT_USAGE_DATA 0x00 +#define USB_ENDPOINT_USAGE_FEEDBACK 0x10 +#define USB_ENDPOINT_USAGE_IMPLICIT_FB 0x20 /* Implicit feedback Data endpoint */ + +/*-------------------------------------------------------------------------*/ + +/** + * usb_endpoint_num - get the endpoint's number + * @epd: endpoint to be checked + * + * Returns @epd's number: 0 to 15. + */ +static inline int usb_endpoint_num(const struct usb_endpoint_descriptor *epd) +{ + return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; +} + +/** + * usb_endpoint_type - get the endpoint's transfer type + * @epd: endpoint to be checked + * + * Returns one of USB_ENDPOINT_XFER_{CONTROL, ISOC, BULK, INT} according + * to @epd's transfer type. + */ +static inline int usb_endpoint_type(const struct usb_endpoint_descriptor *epd) +{ + return epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; +} + +/** + * usb_endpoint_dir_in - check if the endpoint has IN direction + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type IN, otherwise it returns false. + */ +static inline int usb_endpoint_dir_in(const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN); +} + +/** + * usb_endpoint_dir_out - check if the endpoint has OUT direction + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type OUT, otherwise it returns false. + */ +static inline int usb_endpoint_dir_out( + const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT); +} + +/** + * usb_endpoint_xfer_bulk - check if the endpoint has bulk transfer type + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type bulk, otherwise it returns false. + */ +static inline int usb_endpoint_xfer_bulk( + const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_BULK); +} + +/** + * usb_endpoint_xfer_control - check if the endpoint has control transfer type + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type control, otherwise it returns false. + */ +static inline int usb_endpoint_xfer_control( + const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_CONTROL); +} + +/** + * usb_endpoint_xfer_int - check if the endpoint has interrupt transfer type + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type interrupt, otherwise it returns + * false. + */ +static inline int usb_endpoint_xfer_int( + const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_INT); +} + +/** + * usb_endpoint_xfer_isoc - check if the endpoint has isochronous transfer type + * @epd: endpoint to be checked + * + * Returns true if the endpoint is of type isochronous, otherwise it returns + * false. + */ +static inline int usb_endpoint_xfer_isoc( + const struct usb_endpoint_descriptor *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_ISOC); +} + +/** + * usb_endpoint_is_bulk_in - check if the endpoint is bulk IN + * @epd: endpoint to be checked + * + * Returns true if the endpoint has bulk transfer type and IN direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_bulk_in( + const struct usb_endpoint_descriptor *epd) +{ + return usb_endpoint_xfer_bulk(epd) && usb_endpoint_dir_in(epd); +} + +/** + * usb_endpoint_is_bulk_out - check if the endpoint is bulk OUT + * @epd: endpoint to be checked + * + * Returns true if the endpoint has bulk transfer type and OUT direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_bulk_out( + const struct usb_endpoint_descriptor *epd) +{ + return usb_endpoint_xfer_bulk(epd) && usb_endpoint_dir_out(epd); +} + +/** + * usb_endpoint_is_int_in - check if the endpoint is interrupt IN + * @epd: endpoint to be checked + * + * Returns true if the endpoint has interrupt transfer type and IN direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_int_in( + const struct usb_endpoint_descriptor *epd) +{ + return usb_endpoint_xfer_int(epd) && usb_endpoint_dir_in(epd); +} + +/** + * usb_endpoint_is_int_out - check if the endpoint is interrupt OUT + * @epd: endpoint to be checked + * + * Returns true if the endpoint has interrupt transfer type and OUT direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_int_out( + const struct usb_endpoint_descriptor *epd) +{ + return usb_endpoint_xfer_int(epd) && usb_endpoint_dir_out(epd); +} + +/** + * usb_endpoint_is_isoc_in - check if the endpoint is isochronous IN + * @epd: endpoint to be checked + * + * Returns true if the endpoint has isochronous transfer type and IN direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_isoc_in( + const struct usb_endpoint_descriptor *epd) +{ + return usb_endpoint_xfer_isoc(epd) && usb_endpoint_dir_in(epd); +} + +/** + * usb_endpoint_is_isoc_out - check if the endpoint is isochronous OUT + * @epd: endpoint to be checked + * + * Returns true if the endpoint has isochronous transfer type and OUT direction, + * otherwise it returns false. + */ +static inline int usb_endpoint_is_isoc_out( + const struct usb_endpoint_descriptor *epd) +{ + return usb_endpoint_xfer_isoc(epd) && usb_endpoint_dir_out(epd); +} + +/** + * usb_endpoint_maxp - get endpoint's max packet size + * @epd: endpoint to be checked + * + * Returns @epd's max packet + */ +static inline int usb_endpoint_maxp(const struct usb_endpoint_descriptor *epd) +{ + return __le16_to_cpu(epd->wMaxPacketSize); +} + +static inline int usb_endpoint_interrupt_type( + const struct usb_endpoint_descriptor *epd) +{ + return epd->bmAttributes & USB_ENDPOINT_INTRTYPE; +} + +/*-------------------------------------------------------------------------*/ + +/* USB_DT_SS_ENDPOINT_COMP: SuperSpeed Endpoint Companion descriptor */ +struct usb_ss_ep_comp_descriptor { + __u8 bLength; + __u8 bDescriptorType; + + __u8 bMaxBurst; + __u8 bmAttributes; + __le16 wBytesPerInterval; +} __attribute__ ((packed)); + +#define USB_DT_SS_EP_COMP_SIZE 6 + +/* Bits 4:0 of bmAttributes if this is a bulk endpoint */ +static inline int +usb_ss_max_streams(const struct usb_ss_ep_comp_descriptor *comp) +{ + int max_streams; + + if (!comp) + return 0; + + max_streams = comp->bmAttributes & 0x1f; + + if (!max_streams) + return 0; + + max_streams = 1 << max_streams; + + return max_streams; +} + +/* Bits 1:0 of bmAttributes if this is an isoc endpoint */ +#define USB_SS_MULT(p) (1 + ((p) & 0x3)) /*-------------------------------------------------------------------------*/ @@ -388,7 +746,7 @@ struct usb_encryption_descriptor { /*-------------------------------------------------------------------------*/ -/* USB_DT_BOS: group of wireless capabilities */ +/* USB_DT_BOS: group of device-level capabilities */ struct usb_bos_descriptor { __u8 bLength; __u8 bDescriptorType; @@ -397,6 +755,7 @@ struct usb_bos_descriptor { __u8 bNumDeviceCaps; } __attribute__((packed)); +#define USB_DT_BOS_SIZE 5 /*-------------------------------------------------------------------------*/ /* USB_DT_DEVICE_CAPABILITY: grouped with BOS */ @@ -434,6 +793,61 @@ struct usb_wireless_cap_descriptor { /* Ultra Wide Band */ __u8 bReserved; } __attribute__((packed)); +/* USB 2.0 Extension descriptor */ +#define USB_CAP_TYPE_EXT 2 + +struct usb_ext_cap_descriptor { /* Link Power Management */ + __u8 bLength; + __u8 bDescriptorType; + __u8 bDevCapabilityType; + __le32 bmAttributes; +#define USB_LPM_SUPPORT (1 << 1) /* supports LPM */ +#define USB_BESL_SUPPORT (1 << 2) /* supports BESL */ +#define USB_BESL_BASELINE_VALID (1 << 3) /* Baseline BESL valid*/ +#define USB_BESL_DEEP_VALID (1 << 4) /* Deep BESL valid */ +#define USB_GET_BESL_BASELINE(p) (((p) & (0xf << 8)) >> 8) +#define USB_GET_BESL_DEEP(p) (((p) & (0xf << 12)) >> 12) +} __attribute__((packed)); + +#define USB_DT_USB_EXT_CAP_SIZE 7 + +/* + * SuperSpeed USB Capability descriptor: Defines the set of SuperSpeed USB + * specific device level capabilities + */ +#define USB_SS_CAP_TYPE 3 +struct usb_ss_cap_descriptor { /* Link Power Management */ + __u8 bLength; + __u8 bDescriptorType; + __u8 bDevCapabilityType; + __u8 bmAttributes; +#define USB_LTM_SUPPORT (1 << 1) /* supports LTM */ + __le16 wSpeedSupported; +#define USB_LOW_SPEED_OPERATION (1) /* Low speed operation */ +#define USB_FULL_SPEED_OPERATION (1 << 1) /* Full speed operation */ +#define USB_HIGH_SPEED_OPERATION (1 << 2) /* High speed operation */ +#define USB_5GBPS_OPERATION (1 << 3) /* Operation at 5Gbps */ + __u8 bFunctionalitySupport; + __u8 bU1devExitLat; + __le16 bU2DevExitLat; +} __attribute__((packed)); + +#define USB_DT_USB_SS_CAP_SIZE 10 + +/* + * Container ID Capability descriptor: Defines the instance unique ID used to + * identify the instance across all operating modes + */ +#define CONTAINER_ID_TYPE 4 +struct usb_ss_container_id_descriptor { + __u8 bLength; + __u8 bDescriptorType; + __u8 bDevCapabilityType; + __u8 bReserved; + __u8 ContainerID[16]; /* 128-bit number */ +} __attribute__((packed)); + +#define USB_DT_USB_SS_CONTN_ID_SIZE 20 /*-------------------------------------------------------------------------*/ /* USB_DT_WIRELESS_ENDPOINT_COMP: companion descriptor associated with @@ -491,9 +905,22 @@ enum usb_device_speed { USB_SPEED_UNKNOWN = 0, /* enumerating */ USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */ USB_SPEED_HIGH, /* usb 2.0 */ - USB_SPEED_VARIABLE, /* wireless (usb 2.5) */ + USB_SPEED_WIRELESS, /* wireless (usb 2.5) */ + USB_SPEED_SUPER, /* usb 3.0 */ }; +#ifdef __KERNEL__ + +/** + * usb_speed_string() - Returns human readable-name of the speed. + * @speed: The speed to return human-readable name for. If it's not + * any of the speeds defined in usb_device_speed enum, string for + * USB_SPEED_UNKNOWN will be returned. + */ +extern const char *usb_speed_string(enum usb_device_speed speed); + +#endif + enum usb_device_state { /* NOTATTACHED isn't in the USB spec, and this state acts * the same as ATTACHED ... but it's clearer this way. @@ -503,8 +930,8 @@ enum usb_device_state { /* chapter 9 and authentication (wireless) device states */ USB_STATE_ATTACHED, USB_STATE_POWERED, /* wired */ - USB_STATE_UNAUTHENTICATED, /* auth */ USB_STATE_RECONNECTING, /* auth */ + USB_STATE_UNAUTHENTICATED, /* auth */ USB_STATE_DEFAULT, /* limited function */ USB_STATE_ADDRESS, USB_STATE_CONFIGURED, /* most functions */ @@ -514,7 +941,64 @@ enum usb_device_state { /* NOTE: there are actually four different SUSPENDED * states, returning to POWERED, DEFAULT, ADDRESS, or * CONFIGURED respectively when SOF tokens flow again. + * At this level there's no difference between L1 and L2 + * suspend states. (L2 being original USB 1.1 suspend.) */ }; -#endif /* __LINUX_USB_CH9_H */ +enum usb3_link_state { + USB3_LPM_U0 = 0, + USB3_LPM_U1, + USB3_LPM_U2, + USB3_LPM_U3 +}; + +/* + * A U1 timeout of 0x0 means the parent hub will reject any transitions to U1. + * 0xff means the parent hub will accept transitions to U1, but will not + * initiate a transition. + * + * A U1 timeout of 0x1 to 0x7F also causes the hub to initiate a transition to + * U1 after that many microseconds. Timeouts of 0x80 to 0xFE are reserved + * values. + * + * A U2 timeout of 0x0 means the parent hub will reject any transitions to U2. + * 0xff means the parent hub will accept transitions to U2, but will not + * initiate a transition. + * + * A U2 timeout of 0x1 to 0xFE also causes the hub to initiate a transition to + * U2 after N*256 microseconds. Therefore a U2 timeout value of 0x1 means a U2 + * idle timer of 256 microseconds, 0x2 means 512 microseconds, 0xFE means + * 65.024ms. + */ +#define USB3_LPM_DISABLED 0x0 +#define USB3_LPM_U1_MAX_TIMEOUT 0x7F +#define USB3_LPM_U2_MAX_TIMEOUT 0xFE +#define USB3_LPM_DEVICE_INITIATED 0xFF + +struct usb_set_sel_req { + __u8 u1_sel; + __u8 u1_pel; + __le16 u2_sel; + __le16 u2_pel; +} __attribute__ ((packed)); + +/* + * The Set System Exit Latency control transfer provides one byte each for + * U1 SEL and U1 PEL, so the max exit latency is 0xFF. U2 SEL and U2 PEL each + * are two bytes long. + */ +#define USB3_LPM_MAX_U1_SEL_PEL 0xFF +#define USB3_LPM_MAX_U2_SEL_PEL 0xFFFF + +/*-------------------------------------------------------------------------*/ + +/* + * As per USB compliance update, a device that is actively drawing + * more than 100mA from USB must report itself as bus-powered in + * the GetStatus(DEVICE) call. + * http://compliance.usb.org/index.asp?UpdateFile=Electrical&Format=Standard#34 + */ +#define USB_SELF_POWER_VBUS_MAX_DRAW 100 + +#endif /* __LINUX_USB_CH9_H */ diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 6a8fd44244..7114dae75d 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -24,7 +24,6 @@ #include #include -#include #include #include #include -- cgit v1.2.1 From c60795f41d37600b6ebd79ec99252ec2f5efecd4 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:20 +0000 Subject: usb: use linux/usb/ch9.h instead of usbdescriptors.h Linux usb/ch9.h seems to have all the same information (and more) as usbdescriptors.h so use the former instead of the later one. As a consequense of this change USB_SPEED_* values don't correspond directly to EHCI speed encoding anymore, I've added necessary recoding in EHCI driver. Also there is no point to put speed into pipe anymore so it's removed and a bunch of host drivers fixed to look at usb_device->speed instead. Old usbdescriptors.h included is not removed as it seems to be used by old USB device code. This makes usb.h and usbdevice.h incompatible. Fortunately the only place that tries to include both are the old MUSB code and it needs usb.h only for USB_DMA_MINALIGN used in aligned attribute on musb_regs structure but this attribute seems to be unneeded (old MUSB code doesn't support any DMA at all). Signed-off-by: Ilya Yanok --- include/usb.h | 15 +++------------ include/usb_defs.h | 6 ------ 2 files changed, 3 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/include/usb.h b/include/usb.h index 9dd8791947..4689db624d 100644 --- a/include/usb.h +++ b/include/usb.h @@ -27,7 +27,7 @@ #define _USB_H_ #include -#include +#include /* * The EHCI spec says that we must align to at least 32 bytes. However, @@ -67,12 +67,6 @@ struct devrequest { unsigned short length; } __attribute__ ((packed)); -/* All standard descriptors have these 2 fields in common */ -struct usb_descriptor_header { - unsigned char bLength; - unsigned char bDescriptorType; -} __attribute__ ((packed)); - /* Interface */ struct usb_interface { struct usb_interface_descriptor desc; @@ -86,7 +80,7 @@ struct usb_interface { /* Configuration information.. */ struct usb_config { - struct usb_configuration_descriptor desc; + struct usb_config_descriptor desc; unsigned char no_of_if; /* number of interfaces */ struct usb_interface if_desc[USB_MAXINTERFACES]; @@ -285,7 +279,6 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); * - device: bits 8-14 * - endpoint: bits 15-18 * - Data0/1: bit 19 - * - speed: bit 26 (0 = Full, 1 = Low Speed, 2 = High) * - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, * 10 = control, 11 = bulk) * @@ -297,7 +290,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); /* Create various pipes... */ #define create_pipe(dev,endpoint) \ (((dev)->devnum << 8) | ((endpoint) << 15) | \ - ((dev)->speed << 26) | (dev)->maxpacketsize) + (dev)->maxpacketsize) #define default_pipe(dev) ((dev)->speed << 26) #define usb_sndctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \ @@ -348,8 +341,6 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); #define usb_pipe_endpdev(pipe) (((pipe) >> 8) & 0x7ff) #define usb_pipeendpoint(pipe) (((pipe) >> 15) & 0xf) #define usb_pipedata(pipe) (((pipe) >> 19) & 1) -#define usb_pipespeed(pipe) (((pipe) >> 26) & 3) -#define usb_pipeslow(pipe) (usb_pipespeed(pipe) == USB_SPEED_LOW) #define usb_pipetype(pipe) (((pipe) >> 30) & 3) #define usb_pipeisoc(pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS) #define usb_pipeint(pipe) (usb_pipetype((pipe)) == PIPE_INTERRUPT) diff --git a/include/usb_defs.h b/include/usb_defs.h index 8032e57125..9502544b21 100644 --- a/include/usb_defs.h +++ b/include/usb_defs.h @@ -80,12 +80,6 @@ #define USB_DIR_OUT 0 #define USB_DIR_IN 0x80 -/* USB device speeds */ -#define USB_SPEED_FULL 0x0 /* 12Mbps */ -#define USB_SPEED_LOW 0x1 /* 1.5Mbps */ -#define USB_SPEED_HIGH 0x2 /* 480Mbps */ -#define USB_SPEED_RESERVED 0x3 - /* Descriptor types */ #define USB_DT_DEVICE 0x01 #define USB_DT_CONFIG 0x02 -- cgit v1.2.1 From eb81955bf0e34aeb33930cd4b2f63aa05c791fef Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:21 +0000 Subject: musb-new: port of Linux musb driver Existing U-Boot musb driver has no support for the new gadget framework and also seems to have other limitations. As gadget framework is ported from Linux it seems pretty natural to port musb gadget driver as well. This driver supports both host and peripheral modes. This is not a replacement for current musb driver (at least now) as there are still some consumers of the old UDC interface. No DMA operation support included, CONFIG_MUSB_PIO_ONLY should be defined. Virtual root hub device is not implemented. Known problems: with no devices connected usb_lowlevel_start() fails. Signed-off-by: Ilya Yanok --- include/linux/usb/musb.h | 162 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 162 insertions(+) create mode 100644 include/linux/usb/musb.h (limited to 'include') diff --git a/include/linux/usb/musb.h b/include/linux/usb/musb.h new file mode 100644 index 0000000000..9f65ef96ac --- /dev/null +++ b/include/linux/usb/musb.h @@ -0,0 +1,162 @@ +/* + * This is used to for host and peripheral modes of the driver for + * Inventra (Multidrop) Highspeed Dual-Role Controllers: (M)HDRC. + * + * Board initialization should put one of these into dev->platform_data, + * probably on some platform_device named "musb-hdrc". It encapsulates + * key configuration differences between boards. + */ + +#ifndef __LINUX_USB_MUSB_H +#define __LINUX_USB_MUSB_H + +#ifndef __deprecated +#define __deprecated +#endif + +/* The USB role is defined by the connector used on the board, so long as + * standards are being followed. (Developer boards sometimes won't.) + */ +enum musb_mode { + MUSB_UNDEFINED = 0, + MUSB_HOST, /* A or Mini-A connector */ + MUSB_PERIPHERAL, /* B or Mini-B connector */ + MUSB_OTG /* Mini-AB connector */ +}; + +struct clk; + +enum musb_fifo_style { + FIFO_RXTX, + FIFO_TX, + FIFO_RX +} __attribute__ ((packed)); + +enum musb_buf_mode { + BUF_SINGLE, + BUF_DOUBLE +} __attribute__ ((packed)); + +struct musb_fifo_cfg { + u8 hw_ep_num; + enum musb_fifo_style style; + enum musb_buf_mode mode; + u16 maxpacket; +}; + +#define MUSB_EP_FIFO(ep, st, m, pkt) \ +{ \ + .hw_ep_num = ep, \ + .style = st, \ + .mode = m, \ + .maxpacket = pkt, \ +} + +#define MUSB_EP_FIFO_SINGLE(ep, st, pkt) \ + MUSB_EP_FIFO(ep, st, BUF_SINGLE, pkt) + +#define MUSB_EP_FIFO_DOUBLE(ep, st, pkt) \ + MUSB_EP_FIFO(ep, st, BUF_DOUBLE, pkt) + +struct musb_hdrc_eps_bits { + const char name[16]; + u8 bits; +}; + +struct musb_hdrc_config { + struct musb_fifo_cfg *fifo_cfg; /* board fifo configuration */ + unsigned fifo_cfg_size; /* size of the fifo configuration */ + + /* MUSB configuration-specific details */ + unsigned multipoint:1; /* multipoint device */ + unsigned dyn_fifo:1 __deprecated; /* supports dynamic fifo sizing */ + unsigned soft_con:1 __deprecated; /* soft connect required */ + unsigned utm_16:1 __deprecated; /* utm data witdh is 16 bits */ + unsigned big_endian:1; /* true if CPU uses big-endian */ + unsigned mult_bulk_tx:1; /* Tx ep required for multbulk pkts */ + unsigned mult_bulk_rx:1; /* Rx ep required for multbulk pkts */ + unsigned high_iso_tx:1; /* Tx ep required for HB iso */ + unsigned high_iso_rx:1; /* Rx ep required for HD iso */ + unsigned dma:1 __deprecated; /* supports DMA */ + unsigned vendor_req:1 __deprecated; /* vendor registers required */ + + u8 num_eps; /* number of endpoints _with_ ep0 */ + u8 dma_channels __deprecated; /* number of dma channels */ + u8 dyn_fifo_size; /* dynamic size in bytes */ + u8 vendor_ctrl __deprecated; /* vendor control reg width */ + u8 vendor_stat __deprecated; /* vendor status reg witdh */ + u8 dma_req_chan __deprecated; /* bitmask for required dma channels */ + u8 ram_bits; /* ram address size */ + + struct musb_hdrc_eps_bits *eps_bits __deprecated; +#ifdef CONFIG_BLACKFIN + /* A GPIO controlling VRSEL in Blackfin */ + unsigned int gpio_vrsel; + unsigned int gpio_vrsel_active; + /* musb CLKIN in Blackfin in MHZ */ + unsigned char clkin; +#endif + +}; + +struct musb_hdrc_platform_data { + /* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */ + u8 mode; + + /* for clk_get() */ + const char *clock; + + /* (HOST or OTG) switch VBUS on/off */ + int (*set_vbus)(struct device *dev, int is_on); + + /* (HOST or OTG) mA/2 power supplied on (default = 8mA) */ + u8 power; + + /* (PERIPHERAL) mA/2 max power consumed (default = 100mA) */ + u8 min_power; + + /* (HOST or OTG) msec/2 after VBUS on till power good */ + u8 potpgt; + + /* (HOST or OTG) program PHY for external Vbus */ + unsigned extvbus:1; + + /* Power the device on or off */ + int (*set_power)(int state); + + /* MUSB configuration-specific details */ + struct musb_hdrc_config *config; + + /* Architecture specific board data */ + void *board_data; + + /* Platform specific struct musb_ops pointer */ + const void *platform_ops; +}; + + +/* TUSB 6010 support */ + +#define TUSB6010_OSCCLK_60 16667 /* psec/clk @ 60.0 MHz */ +#define TUSB6010_REFCLK_24 41667 /* psec/clk @ 24.0 MHz XI */ +#define TUSB6010_REFCLK_19 52083 /* psec/clk @ 19.2 MHz CLKIN */ + +#ifdef CONFIG_ARCH_OMAP2 + +extern int __init tusb6010_setup_interface( + struct musb_hdrc_platform_data *data, + unsigned ps_refclk, unsigned waitpin, + unsigned async_cs, unsigned sync_cs, + unsigned irq, unsigned dmachan); + +extern int tusb6010_platform_retime(unsigned is_refclk); + +#endif /* OMAP2 */ + +/* + * U-Boot specfic stuff + */ +int musb_register(struct musb_hdrc_platform_data *plat, void *bdata, + void *ctl_regs); + +#endif /* __LINUX_USB_MUSB_H */ -- cgit v1.2.1 From 37931f02c291a097f3012e66a1de440f6ed00753 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:22 +0000 Subject: musb-new: dsps backend driver Backend driver for MUSB OTG controllers found on TI AM33xx and TI81xx SoCs (tested with AM33xx only). Signed-off-by: Ilya Yanok --- include/usb.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/usb.h b/include/usb.h index 4689db624d..aa389e6c81 100644 --- a/include/usb.h +++ b/include/usb.h @@ -147,7 +147,8 @@ struct usb_device { defined(CONFIG_USB_SL811HS) || defined(CONFIG_USB_ISP116X_HCD) || \ defined(CONFIG_USB_R8A66597_HCD) || defined(CONFIG_USB_DAVINCI) || \ defined(CONFIG_USB_OMAP3) || defined(CONFIG_USB_DA8XX) || \ - defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) + defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) || \ + defined(CONFIG_USB_MUSB_DSPS) int usb_lowlevel_init(int index, void **controller); int usb_lowlevel_stop(int index); -- cgit v1.2.1 From d2aa1154b95a211416c1511005451dfcf076dd97 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:24 +0000 Subject: am335x_evm: enable both musb gadget and host Enable musb gadget in Ethernet mode on port 0 and musb host on port1. Signed-off-by: Ilya Yanok --- include/configs/am335x_evm.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index b6e48f8a63..ab9549b93b 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -257,6 +257,33 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif +/* + * USB configuration + */ +#define CONFIG_USB_MUSB_DSPS +#define CONFIG_ARCH_MISC_INIT +#define CONFIG_MUSB_GADGET +#define CONFIG_MUSB_PIO_ONLY +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_MUSB_HOST +#define CONFIG_AM335X_USB0 +#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL +#define CONFIG_AM335X_USB1 +#define CONFIG_AM335X_USB1_MODE MUSB_HOST + +#ifdef CONFIG_MUSB_HOST +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#endif + +#ifdef CONFIG_MUSB_GADGET +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_RNDIS +#endif /* CONFIG_MUSB_GADGET */ + +/* Unsupported features */ +#undef CONFIG_USE_IRQ + #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING -- cgit v1.2.1 From 833a53c627b839a28b5925ba283109b141f6cff0 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:25 +0000 Subject: musb-new: am35x backend driver Backend driver for MUSB OTG controllers found on TI AM35x. It seems that on AM35X interrupt status registers can be updated _before_ core registers. As we don't use true interrupts in U-Boot and poll interrupt status registers instead this can result in interrupt handler being called with non-updated core registers. This confuses the code and result in hanged transfers. Add a small delay in am35x_interrupt as a workaround. Signed-off-by: Ilya Yanok --- include/usb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/usb.h b/include/usb.h index aa389e6c81..bf510e4ff3 100644 --- a/include/usb.h +++ b/include/usb.h @@ -148,7 +148,7 @@ struct usb_device { defined(CONFIG_USB_R8A66597_HCD) || defined(CONFIG_USB_DAVINCI) || \ defined(CONFIG_USB_OMAP3) || defined(CONFIG_USB_DA8XX) || \ defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) || \ - defined(CONFIG_USB_MUSB_DSPS) + defined(CONFIG_USB_MUSB_DSPS) || defined(CONFIG_USB_MUSB_AM35X) int usb_lowlevel_init(int index, void **controller); int usb_lowlevel_stop(int index); -- cgit v1.2.1 From 88919ff7bf4d848ae0bb6dab933cc81bb24abc93 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:28 +0000 Subject: am3517_evm: switch to musb-new Use new musb framework instead of the old one on AM3517_EVM. Signed-off-by: Ilya Yanok --- include/configs/am3517_evm.h | 37 ++++++++++++++++--------------------- 1 file changed, 16 insertions(+), 21 deletions(-) (limited to 'include') diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index ce71d1335c..9484e55290 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -97,15 +97,16 @@ /* * USB configuration - * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard - * Enable CONFIG_MUSB_UDC for Device functionalities. + * Enable CONFIG_MUSB_HOST for Host functionalities MSC, keyboard + * Enable CONFIG_MUSB_GADGET for Device functionalities. */ -#define CONFIG_USB_AM35X 1 -#define CONFIG_MUSB_HCD 1 +#define CONFIG_USB_MUSB_AM35X +#define CONFIG_MUSB_HOST +#define CONFIG_MUSB_PIO_ONLY -#ifdef CONFIG_USB_AM35X +#ifdef CONFIG_USB_MUSB_AM35X -#ifdef CONFIG_MUSB_HCD +#ifdef CONFIG_MUSB_HOST #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE @@ -117,21 +118,15 @@ #define CONFIG_PREBOOT "usb start" #endif /* CONFIG_USB_KEYBOARD */ -#endif /* CONFIG_MUSB_HCD */ - -#ifdef CONFIG_MUSB_UDC -/* USB device configuration */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "AM3517EVM" -#endif /* CONFIG_MUSB_UDC */ - -#endif /* CONFIG_USB_AM35X */ +#endif /* CONFIG_MUSB_HOST */ + +#ifdef CONFIG_MUSB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_RNDIS +#endif /* CONFIG_MUSB_GADGET */ + +#endif /* CONFIG_USB_MUSB_AM35X */ /* commands to include */ #include -- cgit v1.2.1 From 673a524b6a71a7ab74a48b75728307b1a5303587 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:29 +0000 Subject: musb-new: omap2plus backend driver Backend driver for MUSB OTG controllers found on TI OMAP2/3/4 (tested only on OMAP3 Beagle). Signed-off-by: Ilya Yanok --- include/usb.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/usb.h b/include/usb.h index bf510e4ff3..8d8a2c9b9d 100644 --- a/include/usb.h +++ b/include/usb.h @@ -148,7 +148,8 @@ struct usb_device { defined(CONFIG_USB_R8A66597_HCD) || defined(CONFIG_USB_DAVINCI) || \ defined(CONFIG_USB_OMAP3) || defined(CONFIG_USB_DA8XX) || \ defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) || \ - defined(CONFIG_USB_MUSB_DSPS) || defined(CONFIG_USB_MUSB_AM35X) + defined(CONFIG_USB_MUSB_DSPS) || defined(CONFIG_USB_MUSB_AM35X) || \ + defined(CONFIG_USB_MUSB_OMAP2PLUS) int usb_lowlevel_init(int index, void **controller); int usb_lowlevel_stop(int index); -- cgit v1.2.1 From c642b151f359a62c764f55694de34d45ad8ad015 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:30 +0000 Subject: omap3_beagle: add musb-new init Add initialization for new MUSB framework. Signed-off-by: Ilya Yanok --- include/configs/omap3_beagle.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 65353e8d1c..ff7d57b7ca 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -120,6 +120,8 @@ #define CONFIG_MUSB_UDC 1 #define CONFIG_USB_OMAP3 1 #define CONFIG_TWL4030_USB 1 +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETHER_RNDIS /* USB device configuration */ #define CONFIG_USB_DEVICE 1 -- cgit v1.2.1 From c2af345ed5432edeff9b3684af0fffd1e69d32eb Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Tue, 6 Nov 2012 13:48:31 +0000 Subject: omap3_beagle: use new MUSB intstead of the old one Enable using of new MUSB framework on Beagle. NOTE! This is not just a change of backend code: top-level behavior is also changed, we now use USB device port for USB Ethernet instead of serial. Signed-off-by: Ilya Yanok --- include/configs/omap3_beagle.h | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index ff7d57b7ca..31ffb32332 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -117,17 +117,14 @@ #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}} /* USB */ -#define CONFIG_MUSB_UDC 1 -#define CONFIG_USB_OMAP3 1 +#define CONFIG_MUSB_GADGET +#define CONFIG_USB_MUSB_OMAP2PLUS +#define CONFIG_MUSB_PIO_ONLY +#define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_TWL4030_USB 1 #define CONFIG_USB_ETHER #define CONFIG_USB_ETHER_RNDIS -/* USB device configuration */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 - /* USB EHCI */ #define CONFIG_CMD_USB #define CONFIG_USB_EHCI -- cgit v1.2.1 From 6f2f01b9f30c390f216a065c8673c2c6933c0cbf Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Thu, 20 Sep 2012 19:09:07 -0500 Subject: spl/nand: introduce CONFIG_SPL_NAND_DRIVERS, _BASE, and _ECC. Some small SPLs do not use nand_base.c, and a subset of those also require a special driver. Some SPLs need software ECC but others can't fit it. All existing boards that specify CONFIG_SPL_NAND_SUPPORT have these symbols added to preserve existing behavior. Signed-off-by: Scott Wood -- v2: use positive logic for including bits of NAND, rather than a MINIMAL symbol that excludes things. --- include/configs/am3517_crane.h | 3 +++ include/configs/am3517_evm.h | 3 +++ include/configs/cam_enc_4xx.h | 3 +++ include/configs/da850evm.h | 3 +++ include/configs/devkit8000.h | 3 +++ include/configs/hawkboard.h | 3 +++ include/configs/igep00x0.h | 3 +++ include/configs/mcx.h | 3 +++ include/configs/omap3_beagle.h | 3 +++ include/configs/omap3_evm.h | 3 +++ include/configs/omap3_evm_quick_nand.h | 3 +++ include/configs/omap3_overo.h | 3 +++ include/configs/tam3517-common.h | 3 +++ include/configs/tricorder.h | 3 +++ 14 files changed, 42 insertions(+) (limited to 'include') diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 20a3df5db2..e1ad1e58ff 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -337,6 +337,9 @@ #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index ce71d1335c..f8332759d8 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -336,6 +336,9 @@ #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index 56dc1cbbd5..a7a698c0ca 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -219,6 +219,9 @@ #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index ddd615509f..99b4de7288 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -227,6 +227,9 @@ #define CONFIG_SYS_NAND_ECCBYTES 10 #define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_NAND_LOAD #endif diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index da3263f4f5..83a8b5d59f 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -316,6 +316,9 @@ #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index c0e3ed3efc..8d27590278 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -63,6 +63,9 @@ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */ #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h index c81ab7622e..be7937d70e 100644 --- a/include/configs/igep00x0.h +++ b/include/configs/igep00x0.h @@ -338,6 +338,9 @@ #ifdef CONFIG_BOOT_NAND #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/mcx.h b/include/configs/mcx.h index bf49cc1381..b5bcba7b7f 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -379,6 +379,9 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 7a3cc16a09..e6f2f2946e 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -414,6 +414,9 @@ #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_OMAP3_ID_NAND diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index f6e4236998..b4d925ed90 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -113,6 +113,9 @@ /* NAND SPL */ #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 diff --git a/include/configs/omap3_evm_quick_nand.h b/include/configs/omap3_evm_quick_nand.h index 362fa1d720..8f0258491e 100644 --- a/include/configs/omap3_evm_quick_nand.h +++ b/include/configs/omap3_evm_quick_nand.h @@ -81,6 +81,9 @@ */ #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 626cf7afd5..fd31c73964 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -319,6 +319,9 @@ #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index dd7757cb97..fb56a935eb 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -254,6 +254,9 @@ #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 5859a7337b..be0d2ec3c7 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -282,6 +282,9 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" -- cgit v1.2.1 From a796e72c78beb0bc29bbf068962b546639a099cd Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Fri, 21 Sep 2012 16:31:00 -0500 Subject: powerpc/mpc85xx/p1_p2_rdb_pc: convert from nand_spl to new spl Signed-off-by: Scott Wood Cc: Andy Fleming --- include/configs/p1_p2_rdb_pc.h | 54 ++++++++++++++++++++++-------------------- 1 file changed, 28 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 350150b115..7af4d93624 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -140,16 +140,25 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #endif -#if defined(CONFIG_NAND) && defined(CONFIG_NAND_FSL_ELBC) -#define CONFIG_NAND_U_BOOT -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_TEXT_BASE_SPL 0xff800000 -#ifdef CONFIG_NAND_SPL -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL -#else -#define CONFIG_SYS_TEXT_BASE 0x11001000 -#endif /* CONFIG_NAND_SPL */ +#ifdef CONFIG_NAND +#define CONFIG_SPL +#define CONFIG_SPL_INIT_MINIMAL +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" + +#define CONFIG_SYS_TEXT_BASE 0x00201000 +#define CONFIG_SPL_TEXT_BASE 0xfffff000 +#define CONFIG_SPL_MAX_SIZE (4 * 1024) +#define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 +#define CONFIG_SPL_RELOC_STACK 0x00100000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) + CONFIG_SPL_MAX_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0 +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #endif #ifndef CONFIG_SYS_TEXT_BASE @@ -161,8 +170,12 @@ #endif #ifndef CONFIG_SYS_MONITOR_BASE +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#else #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif +#endif /* High Level Configuration Options */ #define CONFIG_BOOKE @@ -221,7 +234,7 @@ /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k SPL code*/ -#if defined(CONFIG_NAND_SPL) +#ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif @@ -392,15 +405,6 @@ #define CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) -/* NAND boot: 4K NAND loader config */ -#define CONFIG_SYS_NAND_SPL_SIZE 0x1000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) + CONFIG_SYS_NAND_SPL_SIZE) -#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000 - CONFIG_SYS_NAND_SPL_SIZE) -#define CONFIG_SYS_NAND_U_BOOT_START 0x11000000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (0) -#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 -#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000) - #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | (2< 0xfff80000 -- cgit v1.2.1 From d674bccf738396ecdc4374f5b5cb3e7fd376a0ab Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Tue, 2 Oct 2012 19:35:18 -0500 Subject: powerpc/mpc85xx/p1_p2_rdb_pc: clean up memory map - Sort by address, and fix column alignment - Don't label things as localbus that aren't. Instead, put chipselect info at the end of the description for localbus windows. Note that NAND/NOR have their chipselects swapped when booting from NAND, and CS2 can be either PMC or VSC7385 depending on hwconfig. - Shrink NAND to the 32K that's actually mapped in the localbus - Assign an address and size to L2 SRAM. Remove the similarly named but unintelligible "L2 SDRAM(REV.)". - Remove the untrue comment about L1 stack being mapped with TLB0. Signed-off-by: Scott Wood Cc: Andy Fleming --- include/configs/p1_p2_rdb_pc.h | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7af4d93624..ba7a364889 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -331,21 +331,17 @@ /* * Memory map * - * 0x0000_0000 0x7fff_ffff DDR Up to 2GB cacheable + * 0x0000_0000 0x7fff_ffff DDR Up to 2GB cacheable * 0x8000_0000 0xdfff_ffff PCI Express Mem 1.5G non-cacheable(PCIe * 3) + * 0xec00_0000 0xefff_ffff NOR flash Up to 64M non-cacheable CS0/1 + * 0xff80_0000 0xff80_7fff NAND flash 32K non-cacheable CS1/0 + * 0xff98_0000 0xff98_ffff PMC 64K non-cacheable CS2 + * 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable CS3 + * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable CS2 * 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable - * - * Localbus cacheable (TBD) - * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable - * - * Localbus non-cacheable - * 0xec00_0000 0xefff_ffff FLASH Up to 64M non-cacheable - * 0xff80_0000 0xff8f_ffff NAND flash 1M non-cacheable - * 0xff90_0000 0xff97_ffff L2 SDRAM(REV.) 512K cacheable(optional) - * 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable - * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable - * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0 - * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable + * 0xffd0_0000 0xffd0_3fff L1 for stack 16K cacheable + * 0xffd8_0000 0xffdf_ffff L2 SRAM Up to 512K cacheable + * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable */ -- cgit v1.2.1 From 13d1143ffb4dc0c71478534b6b52402e95be9420 Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Fri, 12 Oct 2012 18:02:24 -0500 Subject: powerpc/mpc85xx/p2020rdb-pca: Use L2 SRAM for SPL boot This allows DDR configuration to be deferred to the final U-Boot image, which is able to make use of SPD data. The SPL itself cannot use SPD due to code size constraints. It previously used fixed register values for DDR configuration, and those values did not work on the p2020rdb-pca board I tested with. It's possible that different revisions of the board require different settings. Using SPD eliminates that problem. Signed-off-by: Scott Wood Cc: Andy Fleming --- include/configs/p1_p2_rdb_pc.h | 69 ++++++++++++++++++++---------------------- 1 file changed, 33 insertions(+), 36 deletions(-) (limited to 'include') diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index ba7a364889..964bfcd440 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -38,6 +38,7 @@ #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0xe4 #define __SW_BOOT_SD 0x54 +#define CONFIG_SYS_L2_SIZE (256 << 10) #endif #if defined(CONFIG_P1020UTM) @@ -46,6 +47,7 @@ #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0xe0 #define __SW_BOOT_SD 0x50 +#define CONFIG_SYS_L2_SIZE (256 << 10) #endif #if defined(CONFIG_P1020RDB) @@ -61,6 +63,7 @@ #define __SW_BOOT_SD 0x9c #define __SW_BOOT_NAND 0xec #define __SW_BOOT_PCIE 0x6c +#define CONFIG_SYS_L2_SIZE (256 << 10) #endif #if defined(CONFIG_P1021RDB) @@ -78,6 +81,7 @@ #define __SW_BOOT_SD 0x9c #define __SW_BOOT_NAND 0xec #define __SW_BOOT_PCIE 0x6c +#define CONFIG_SYS_L2_SIZE (256 << 10) #endif #if defined(CONFIG_P1024RDB) @@ -91,6 +95,7 @@ #define __SW_BOOT_SPI 0x08 #define __SW_BOOT_SD 0x04 #define __SW_BOOT_NAND 0x0c +#define CONFIG_SYS_L2_SIZE (256 << 10) #endif #if defined(CONFIG_P1025RDB) @@ -108,6 +113,7 @@ #define __SW_BOOT_SPI 0x08 #define __SW_BOOT_SD 0x04 #define __SW_BOOT_NAND 0x0c +#define CONFIG_SYS_L2_SIZE (256 << 10) #endif #if defined(CONFIG_P2020RDB) @@ -122,6 +128,14 @@ #define __SW_BOOT_SD 0x68 /* or 0x18 */ #define __SW_BOOT_NAND 0xe8 #define __SW_BOOT_PCIE 0xa8 +#define CONFIG_SYS_L2_SIZE (512 << 10) +#endif + +#if CONFIG_SYS_L2_SIZE >= (512 << 10) +/* must be 32-bit */ +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #endif #ifdef CONFIG_SDCARD @@ -149,14 +163,28 @@ #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_TEXT_BASE 0xfffff000 #define CONFIG_SPL_MAX_SIZE (4 * 1024) + +#ifdef CONFIG_SYS_INIT_L2_ADDR +/* We multiply CONFIG_SPL_MAX_SIZE by two to leave some room for BSS. */ +#define CONFIG_SYS_TEXT_BASE 0xf8f82000 +#define CONFIG_SPL_RELOC_TEXT_BASE \ + (CONFIG_SYS_INIT_L2_END - CONFIG_SPL_MAX_SIZE * 2) +#define CONFIG_SPL_RELOC_STACK \ + (CONFIG_SYS_INIT_L2_END - CONFIG_SPL_MAX_SIZE * 2) +#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) +#define CONFIG_SYS_NAND_U_BOOT_START \ + (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SPL_MAX_SIZE) +#else +#define CONFIG_SYS_TEXT_BASE 0x00201000 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 #define CONFIG_SPL_RELOC_STACK 0x00100000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) + CONFIG_SPL_MAX_SIZE) #define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 +#endif + +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_OFFS 0 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #endif @@ -261,39 +289,7 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Default settings for DDR3 */ -#ifdef CONFIG_P2020RDB -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202 -#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 -#define CONFIG_SYS_DDR_CS1_BNDS 0x00000000 -#define CONFIG_SYS_DDR_CS1_CONFIG 0x00000000 -#define CONFIG_SYS_DDR_CS1_CONFIG_2 0x00000000 - -#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef -#define CONFIG_SYS_DDR_INIT_ADDR 0x00000000 -#define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x00000000 -#define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 - -#define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600 -#define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8645F607 -#define CONFIG_SYS_DDR_SR_CNTR 0x00000000 -#define CONFIG_SYS_DDR_RCW_1 0x00000000 -#define CONFIG_SYS_DDR_RCW_2 0x00000000 -#define CONFIG_SYS_DDR_CONTROL 0xC7000000 /* Type = DDR3 */ -#define CONFIG_SYS_DDR_CONTROL_2 0x24401000 -#define CONFIG_SYS_DDR_TIMING_4 0x00220001 -#define CONFIG_SYS_DDR_TIMING_5 0x02401400 - -#define CONFIG_SYS_DDR_TIMING_3 0x00020000 -#define CONFIG_SYS_DDR_TIMING_0 0x00330104 -#define CONFIG_SYS_DDR_TIMING_1 0x6f6B4644 -#define CONFIG_SYS_DDR_TIMING_2 0x0FA88CCF -#define CONFIG_SYS_DDR_CLK_CTRL 0x02000000 -#define CONFIG_SYS_DDR_MODE_1 0x00421422 -#define CONFIG_SYS_DDR_MODE_2 0x04000000 -#define CONFIG_SYS_DDR_INTERVAL 0x0C300100 - -#else +#ifndef CONFIG_P2020RDB #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 @@ -334,13 +330,14 @@ * 0x0000_0000 0x7fff_ffff DDR Up to 2GB cacheable * 0x8000_0000 0xdfff_ffff PCI Express Mem 1.5G non-cacheable(PCIe * 3) * 0xec00_0000 0xefff_ffff NOR flash Up to 64M non-cacheable CS0/1 + * 0xf8f8_0000 0xf8ff_ffff L2 SRAM Up to 512K cacheable + * (early boot only) * 0xff80_0000 0xff80_7fff NAND flash 32K non-cacheable CS1/0 * 0xff98_0000 0xff98_ffff PMC 64K non-cacheable CS2 * 0xffa0_0000 0xffaf_ffff CPLD 1M non-cacheable CS3 * 0xffb0_0000 0xffbf_ffff VSC7385 switch 1M non-cacheable CS2 * 0xffc0_0000 0xffc3_ffff PCI IO range 256k non-cacheable * 0xffd0_0000 0xffd0_3fff L1 for stack 16K cacheable - * 0xffd8_0000 0xffdf_ffff L2 SRAM Up to 512K cacheable * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable */ -- cgit v1.2.1 From c788ecfdc3eb577757ffc1bfb8416added07ef33 Mon Sep 17 00:00:00 2001 From: Joe Hershberger Date: Mon, 5 Nov 2012 06:46:31 +0000 Subject: nand: Move the sub-page read support enable to a flag Use a flag instead of a hard-coded macro so that sub-page reads can be enabled in other cases (such as on-die ecc). This is the same as a5ff4f102937a3492bca4a9ff0c341d78813414c in Linux Signed-off-by: Joe Hershberger --- include/linux/mtd/nand.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index f63e04b634..e9e904523a 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -194,6 +194,9 @@ typedef enum { /* Device behaves just like nand, but is readonly */ #define NAND_ROM 0x00000800 +/* Device supports subpage reads */ +#define NAND_SUBPAGE_READ 0x00001000 + /* Options valid for Samsung large page devices */ #define NAND_SAMSUNG_LP_OPTIONS \ (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) @@ -203,9 +206,7 @@ typedef enum { #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) -/* Large page NAND with SOFT_ECC should support subpage reads */ -#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \ - && (chip->page_shift > 9)) +#define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) /* Non chip related options */ /* -- cgit v1.2.1 From 3287f6d3858faee768a7c47515bd21914ad591a2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beno=C3=AEt=20Th=C3=A9baudeau?= Date: Fri, 16 Nov 2012 20:20:54 +0100 Subject: nand: Add torture feature MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch adds a NAND Flash torture feature, which is useful as a block stress test to determine if a block is still good and reliable (or should be marked as bad), e.g. after a write error. This code is ported from mtd-utils' lib/libmtd.c. Signed-off-by: Benoît Thébaudeau Cc: Scott Wood [scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings] Signed-off-by: Scott Wood --- include/nand.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/nand.h b/include/nand.h index bbe28b20bb..dded4e27f0 100644 --- a/include/nand.h +++ b/include/nand.h @@ -139,6 +139,7 @@ int nand_read_skip_bad(nand_info_t *nand, loff_t offset, size_t *length, int nand_write_skip_bad(nand_info_t *nand, loff_t offset, size_t *length, u_char *buffer, int flags); int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts); +int nand_torture(nand_info_t *nand, loff_t offset); #define NAND_LOCK_STATUS_TIGHT 0x01 #define NAND_LOCK_STATUS_UNLOCK 0x04 -- cgit v1.2.1 From 66dc452bfe13b0e276adddf3997b9c5abc00115d Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Wed, 28 Nov 2012 02:43:54 +0000 Subject: Remove obsolete header file usbdescriptors.h conflicts with linux/usb/ch9.h Remove it. Signed-off-by: Pantelis Antoniou --- include/g_dnl.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/g_dnl.h b/include/g_dnl.h index 0ec7440306..f47395f35d 100644 --- a/include/g_dnl.h +++ b/include/g_dnl.h @@ -22,7 +22,6 @@ #define __G_DOWNLOAD_H_ #include -#include #include int g_dnl_register(const char *s); -- cgit v1.2.1 From b7e3129e550957f046c29a917c63f4b503fbfcb9 Mon Sep 17 00:00:00 2001 From: "Wu, Josh" Date: Fri, 2 Nov 2012 00:17:27 +0000 Subject: mmc: at91sam9x5: support to save environment in mmc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Josh Wu Acked-by: Andreas Bießmann Signed-off-by: Andy Fleming --- include/configs/at91sam9x5ek.h | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 71f765b494..131758279c 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -168,8 +168,7 @@ #define CONFIG_BOOTCOMMAND "nand read " \ "0x22000000 0x200000 0x300000; " \ "bootm 0x22000000" -#else -#ifdef CONFIG_SYS_USE_SPIFLASH +#elif defined(CONFIG_SYS_USE_SPIFLASH) /* bootstrap + u-boot + env + linux in spi flash */ #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_OFFSET 0x5000 @@ -179,14 +178,28 @@ #define CONFIG_BOOTCOMMAND "sf probe 0; " \ "sf read 0x22000000 0x100000 0x300000; " \ "bootm 0x22000000" -#endif +#else /* CONFIG_SYS_USE_MMC */ +/* bootstrap + u-boot + env + linux in mmc */ +#define CONFIG_ENV_IS_IN_MMC +/* For FAT system, most cases it should be in the reserved sector */ +#define CONFIG_ENV_OFFSET 0x2000 +#define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_SYS_MMC_ENV_DEV 0 #endif +#ifdef CONFIG_SYS_USE_MMC +#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ + "mtdparts=atmel_nand:" \ + "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ + "root=/dev/mmcblk0p2 " \ + "rw rootfstype=ext4 rootwait" +#else #define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ "mtdparts=atmel_nand:" \ "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ "root=/dev/mtdblock1 rw " \ "rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs" +#endif #define CONFIG_BAUDRATE 115200 -- cgit v1.2.1 From 688c2d140bcd457210a279dc489825e75ab1743a Mon Sep 17 00:00:00 2001 From: Mela Custodio Date: Sat, 3 Nov 2012 17:40:16 +0000 Subject: mmc: add no simultaenous power and vdd Bring in the code from Linux kernel. Added to Linux kernel by: commit e08c1694d9e2138204f2b79b73f0f159074ce2f5 Author: Andres Salomon Date: Fri Jul 4 10:00:03 2008 -0700 Some HW balks when writing both voltage setting and power up at the same time to SDHCI_POWER_CONTROL register. Signed-off-by: Rommel G Custodio CC: Andy Fleming v2: fix attribution and SOB Signed-off-by: Andy Fleming --- include/sdhci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/sdhci.h b/include/sdhci.h index c44793d5ec..cffbe53621 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -225,6 +225,7 @@ #define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4) #define SDHCI_QUIRK_NO_CD (1 << 5) #define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6) +#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1 << 7) /* to make gcc happy */ struct sdhci_host; -- cgit v1.2.1 From 640fb607849c777e4dfcbbad6fe614ce5f4b7395 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 6 Nov 2012 11:27:27 +0000 Subject: Replace CONFIG_MMC_BOUNCE_BUFFER with CONFIG_BOUNCE_BUFFER in configs Commits 6dc71c8 "MMC: MXS: Toggle the generic bounce buffer on the boards" and 49a627f "MMC: Remove the MMC bounce buffer" replaced CONFIG_MMC_BOUNCE_BUFFER with CONFIG_BOUNCE_BUFFER, but missed converting a few boards over to the new option. Fix this. Signed-off-by: Stephen Warren Acked-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Andy Fleming --- include/configs/mx6qarm2.h | 2 +- include/configs/mx6qsabre_common.h | 2 +- include/configs/mx6qsabrelite.h | 2 +- include/configs/sc_sps_1.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 23562a8776..28a3deb53e 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -50,7 +50,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index bfb9cd468e..a5c93d0af5 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -45,7 +45,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index b56d7ca8ca..a28d5a50c1 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -72,7 +72,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h index f5dc393020..cb99d58644 100644 --- a/include/configs/sc_sps_1.h +++ b/include/configs/sc_sps_1.h @@ -140,7 +140,7 @@ #ifdef CONFIG_CMD_MMC #define CONFIG_APBH_DMA #define CONFIG_MMC -#define CONFIG_MMC_BOUNCE_BUFFER +#define CONFIG_BOUNCE_BUFFER #define CONFIG_GENERIC_MMC #define CONFIG_MXS_MMC #endif -- cgit v1.2.1 From 4ea7a09fafdf0592cb99428090946bf15128ea44 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 6 Nov 2012 11:27:28 +0000 Subject: bouncebuf: remove dummy implementation If any driver ever needs to use the bounce buffer API, it always needs to use it. As such, providing a dummy implementation of those APIs when CONFIG_BOUNCE_BUFFER isn't defined does not make sense. Remove the dummy implementation. Signed-off-by: Stephen Warren Acked-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Andy Fleming --- include/bouncebuf.h | 14 -------------- 1 file changed, 14 deletions(-) (limited to 'include') diff --git a/include/bouncebuf.h b/include/bouncebuf.h index 31021c5b85..aa2278c8f9 100644 --- a/include/bouncebuf.h +++ b/include/bouncebuf.h @@ -51,7 +51,6 @@ */ #define GEN_BB_RW (GEN_BB_READ | GEN_BB_WRITE) -#ifdef CONFIG_BOUNCE_BUFFER /** * bounce_buffer_start() -- Start the bounce buffer session * data: pointer to buffer to be aligned @@ -70,18 +69,5 @@ int bounce_buffer_start(void **data, size_t len, void **backup, uint8_t flags); * flags: flags describing the transaction, see above. */ int bounce_buffer_stop(void **data, size_t len, void **backup, uint8_t flags); -#else -static inline int bounce_buffer_start(void **data, size_t len, void **backup, - uint8_t flags) -{ - return 0; -} - -static inline int bounce_buffer_stop(void **data, size_t len, void **backup, - uint8_t flags) -{ - return 0; -} -#endif #endif -- cgit v1.2.1 From 84d35b2863455bedb9986c2b076241e8a441fc3e Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 6 Nov 2012 11:27:29 +0000 Subject: common: rework bouncebuf implementation The current bouncebuf API requires all parameters to be passed to both bounce_buffer_start() and bounce_buffer_stop(). Modify the bouncebuf start function to accept a state structure as a parameter, and only require that state struct to be passed to the stop function. This simplifies usage of the bounce buffer by clients. Don't modify the data pointer, but rather store the temporary buffer in this state struct. The bouncebuf code ensures that client code can always use a single buffer pointer in the state structure, irrespective of whether a bounce buffer actually had to be allocated. Move cache management logic into the bounce buffer code, so that each client doesn't have to duplicate this. I believe there's no need to invalidate the buffer before a DMA operation, since flushing the cache should prevent any write-backs. Update the MXS MMC driver for this change. Signed-off-by: Stephen Warren Acked-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Andy Fleming --- include/bouncebuf.h | 33 ++++++++++++++++++++++++--------- 1 file changed, 24 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/bouncebuf.h b/include/bouncebuf.h index aa2278c8f9..707b588c73 100644 --- a/include/bouncebuf.h +++ b/include/bouncebuf.h @@ -25,6 +25,8 @@ #ifndef __INCLUDE_BOUNCEBUF_H__ #define __INCLUDE_BOUNCEBUF_H__ +#include + /* * GEN_BB_READ -- Data are read from the buffer eg. by DMA hardware. * The source buffer is copied into the bounce buffer (if unaligned, otherwise @@ -51,23 +53,36 @@ */ #define GEN_BB_RW (GEN_BB_READ | GEN_BB_WRITE) +struct bounce_buffer { + /* Copy of data parameter passed to start() */ + void *user_buffer; + /* + * DMA-aligned buffer. This field is always set to the value that + * should be used for DMA; either equal to .user_buffer, or to a + * freshly allocated aligned buffer. + */ + void *bounce_buffer; + /* Copy of len parameter passed to start() */ + size_t len; + /* DMA-aligned buffer length */ + size_t len_aligned; + /* Copy of flags parameter passed to start() */ + unsigned int flags; +}; + /** * bounce_buffer_start() -- Start the bounce buffer session + * state: stores state passed between bounce_buffer_{start,stop} * data: pointer to buffer to be aligned * len: length of the buffer - * backup: pointer to backup buffer (the original value is stored here if - * needed * flags: flags describing the transaction, see above. */ -int bounce_buffer_start(void **data, size_t len, void **backup, uint8_t flags); +int bounce_buffer_start(struct bounce_buffer *state, void *data, + size_t len, unsigned int flags); /** * bounce_buffer_stop() -- Finish the bounce buffer session - * data: pointer to buffer that was aligned - * len: length of the buffer - * backup: pointer to backup buffer (the original value is stored here if - * needed - * flags: flags describing the transaction, see above. + * state: stores state passed between bounce_buffer_{start,stop} */ -int bounce_buffer_stop(void **data, size_t len, void **backup, uint8_t flags); +int bounce_buffer_stop(struct bounce_buffer *state); #endif -- cgit v1.2.1 From 1981539914b3626efe4a97bde19ec5fe548b50cf Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 6 Nov 2012 11:27:30 +0000 Subject: mmc: tegra: use bounce buffer APIs Tegra's MMC driver does DMA, and hence needs cache-aligned buffers. In some cases (e.g. user load commands) this cannot be guaranteed by callers of the MMC APIs. To solve this, modify the Tegra MMC driver to use the new bounce_buffer_*() APIs. Note: Ideally, all U-Boot code will always provide address- and size- aligned buffers, so a bounce buffer will only ever be needed for user- supplied buffers (e.g. load commands). Ensuring this removes the need for performance-sucking bounce buffer cache management and memcpy()s. The one known exception at present is the SCR buffer in sd_change_freq(), which is only 8 bytes long. Solving this requires enhancing struct mmc_data to know the difference between buffer size and transferred data size, or forcing all callers of mmc_send_cmd() to have allocated buffers using ALLOC_CACHE_ALIGN_BUFFER(), which while true in this case, is not enforced in any way at present, and so cannot be assumed by the core MMC code. Signed-off-by: Stephen Warren Acked-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Andy Fleming --- include/configs/tegra20-common.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 31b68be4db..5c0833a4d8 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -202,4 +202,7 @@ #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION +/* Misc utility code */ +#define CONFIG_BOUNCE_BUFFER + #endif /* __TEGRA20_COMMON_H */ -- cgit v1.2.1 From 021382cad2fbe8a2cb69ea682e348ecd0bbedae2 Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 19 Oct 2012 08:35:12 +0000 Subject: powerpc/qoriq: Move FMAN microcode location Move FMAN microcude from 0xEF000000 to 0xEFF40000 to free up the beginning of this virtual bank so that this bank can store RCW or be used together with other banks to store large images. Signed-off-by: York Sun Signed-off-by: Andy Fleming --- include/configs/P1023RDS.h | 2 +- include/configs/P2041RDB.h | 2 +- include/configs/corenet_ds.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index 800d666ab2..878bd5fa5e 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -524,7 +524,7 @@ extern unsigned long get_clock_freq(void); /* Default address of microcode for the Linux Fman driver */ /* QE microcode/firmware address */ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NAND #define CONFIG_SYS_QE_FMAN_FW_ADDR 0x1f00000 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 5cdb628ab1..e2f86dbb86 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -539,7 +539,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index c41b039996..3f42cd9a38 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -549,7 +549,7 @@ #define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEF000000 +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) -- cgit v1.2.1 From d31e53b42c35a9285c1e688733ceaa995689418b Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Tue, 23 Oct 2012 09:40:22 +0000 Subject: powerpc/85xx: add support for the Freescale P5040DS Superhydra reference board The P5040DS reference board (a.k.a "Superhydra") is an enhanced version of P3041DS/P5020DS ("Hydra") reference board. Signed-off-by: Timur Tabi Signed-off-by: Shaohui Xie Signed-off-by: Andy Fleming --- include/configs/P5040DS.h | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 include/configs/P5040DS.h (limited to 'include') diff --git a/include/configs/P5040DS.h b/include/configs/P5040DS.h new file mode 100644 index 0000000000..50d9e541a8 --- /dev/null +++ b/include/configs/P5040DS.h @@ -0,0 +1,40 @@ +/* + * Copyright 2009-2011 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * P5040 DS board configuration file + * + */ +#define CONFIG_P5040DS +#define CONFIG_PHYS_64BIT +#define CONFIG_PPC_P5040 + +#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ + +#define CONFIG_MMC +#define CONFIG_NAND_FSL_ELBC +#define CONFIG_PCIE3 +#define CONFIG_SYS_FSL_RAID_ENGINE + +#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ + +#include "corenet_ds.h" -- cgit v1.2.1 From ca1b0b89568cecaf2ecdbcbef714722d70021094 Mon Sep 17 00:00:00 2001 From: York Sun Date: Fri, 26 Oct 2012 16:40:15 +0000 Subject: powerpc/P2041RDB: Fix Flash address LAW address P2041RDB uses common corenet TLB and LAW. However it doesn't have promjet connector. It is necessary to use the same base address for correct LAW address. An offset is added for NOR flash. Signed-off-by: York Sun Signed-off-by: Andy Fleming --- include/configs/P2041RDB.h | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index e2f86dbb86..c888d7a014 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -202,15 +202,21 @@ unsigned long get_board_sys_clk(unsigned long dummy); /* Set the local bus clock 1/8 of platform clock */ #define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8 -#define CONFIG_SYS_FLASH_BASE 0xe8000000 /* Start of PromJet */ +/* + * This board doesn't have a promjet connector. + * However, it uses commone corenet board LAW and TLB. + * It is necessary to use the same start address with proper offset. + */ +#define CONFIG_SYS_FLASH_BASE 0xe0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe8000000ull +#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull #else #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE #endif #define CONFIG_SYS_FLASH_BR_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) + (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | \ + BR_PS_16 | BR_V) #define CONFIG_SYS_FLASH_OR_PRELIM \ ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR) @@ -294,7 +300,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7 -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ -- cgit v1.2.1 From 9760b274df8fdc5a6d124f3192535ebe281a78a6 Mon Sep 17 00:00:00 2001 From: Zang Roy-R61911 Date: Mon, 26 Nov 2012 00:05:38 +0000 Subject: powerpc/corenet_ds: move SATA config to board configuration board configuration file is included before asm/config_mpc85xx.h. however, CONFIG_FSL_SATA_V2 is defined in asm/config_mpc85xx.h. it will never take effective in the board configuration file for this kind of code : #ifdef CONFIG_FSL_SATA_V2 ... #endif To solve this problem, move CONFIG_FSL_SATA_V2 to board configuration header file. This patch reverts Timur's commit:3e0529f742e893653848494ffb9f7cd0d91304bf Signed-off-by: Roy Zang Signed-off-by: Andy Fleming --- include/configs/P1010RDB.h | 1 + include/configs/P1022DS.h | 1 + include/configs/P2041RDB.h | 4 +++- include/configs/P3041DS.h | 1 + include/configs/P5020DS.h | 1 + 5 files changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 57aef21e96..437ee6ee6b 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -553,6 +553,7 @@ extern unsigned long get_sdram_size(void); /* SATA */ #define CONFIG_FSL_SATA +#define CONFIG_FSL_SATA_V2 #define CONFIG_LIBATA #ifdef CONFIG_FSL_SATA diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index b3c850d584..14d597aad2 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -360,6 +360,7 @@ /* SATA */ #define CONFIG_LIBATA #define CONFIG_FSL_SATA +#define CONFIG_FSL_SATA_V2 #define CONFIG_SYS_SATA_MAX_DEVICE 2 #define CONFIG_SATA1 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index c888d7a014..8b9b0dbc22 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -566,8 +566,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #endif /* CONFIG_PCI */ /* SATA */ +#define CONFIG_FSL_SATA_V2 + +#ifdef CONFIG_FSL_SATA_V2 #define CONFIG_FSL_SATA -#ifdef CONFIG_FSL_SATA #define CONFIG_LIBATA #define CONFIG_SYS_SATA_MAX_DEVICE 2 diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h index cf184e74ab..ce8f9b0b2e 100644 --- a/include/configs/P3041DS.h +++ b/include/configs/P3041DS.h @@ -32,6 +32,7 @@ #define CONFIG_MMC #define CONFIG_NAND_FSL_ELBC +#define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE3 #define CONFIG_PCIE4 #define CONFIG_SYS_DPAA_RMAN diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h index 7018d7a322..778230d335 100644 --- a/include/configs/P5020DS.h +++ b/include/configs/P5020DS.h @@ -32,6 +32,7 @@ #define CONFIG_MMC #define CONFIG_NAND_FSL_ELBC +#define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE3 #define CONFIG_PCIE4 #define CONFIG_SYS_FSL_RAID_ENGINE -- cgit v1.2.1 From 8d61625d6a73307857f80002949583105545dbbc Mon Sep 17 00:00:00 2001 From: Graeme Russ Date: Tue, 27 Nov 2012 15:38:36 +0000 Subject: x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ Signed-off-by: Simon Glass --- include/configs/coreboot.h | 5 ++--- include/configs/eNET.h | 6 ------ 2 files changed, 2 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index cc95e2be98..8d3c21f05d 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -210,12 +210,11 @@ * (128kB + Environment Sector Size) malloc pool */ #define CONFIG_SYS_STACK_SIZE (32 * 1024) -#define CONFIG_SYS_INIT_SP_ADDR (256 * 1024 + 16 * 1024) +#define CONFIG_SYS_CAR_ADDR 0x19200000 +#define CONFIG_SYS_CAR_SIZE (16 * 1024) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024) -/* Address of temporary Global Data */ -#define CONFIG_SYS_INIT_GD_ADDR (256 * 1024) /* allow to overwrite serial and ethaddr */ diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 4b1c21904c..28cf95b778 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -168,16 +168,10 @@ #define CONFIG_SYS_STACK_SIZE (32 * 1024) #define CONFIG_SYS_CAR_ADDR 0x19200000 #define CONFIG_SYS_CAR_SIZE (16 * 1024) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_CAR_ADDR + \ - CONFIG_SYS_CAR_SIZE) #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SECT_SIZE + \ 128*1024) -/* Address of temporary Global Data */ -#define CONFIG_SYS_INIT_GD_ADDR CONFIG_SYS_CAR_ADDR - - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -- cgit v1.2.1 From cd23e6923f371b16b9ee9f115d15c9dd46c2f558 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 27 Nov 2012 21:08:12 +0000 Subject: x86: Remove coreboot start16 code Now that coreboot doesn't need the start16 code, remove it. We need to remove the CONFIG_SYS_X86_RESET_VECTOR option from coreboot.h also. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 8d3c21f05d..12d1016522 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -37,7 +37,7 @@ #define CONFIG_SYS_COREBOOT #undef CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT - +#define CONFIG_X86_NO_RESET_VECTOR /*----------------------------------------------------------------------- * Watchdog Configuration -- cgit v1.2.1 From d02a568e9aa3c3500d9b680f60782c192fd51691 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 25 Nov 2012 20:12:16 +0000 Subject: x86: coreboot: Enable LPC TPM Coreboot boards have an LPC TPM connected, so enable this. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 12d1016522..5da006fbde 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -67,6 +67,10 @@ CONFIG_SYS_SCSI_MAX_LUN) #endif +/* Generic TPM interfaced through LPC bus */ +#define CONFIG_GENERIC_LPC_TPM +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 + /*----------------------------------------------------------------------- * Real Time Clock Configuration */ -- cgit v1.2.1 From f3269ad4e8faa4e9803245dd13ef0dc83f0339fc Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 14 Nov 2012 21:35:26 +0000 Subject: include/linux/byteorder: Always defines __fswab64, __swab64p and __swab64s MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When __BYTEORDER_HAS_U64__ is not defined, we got warning following: ----- /tmp/include/linux/byteorder/little_endian.h: In function ‘__cpu_to_be64p’: /tmp/include/linux/byteorder/little_endian.h:71:2: warning: implicit declaration of function ‘__swab64p’ [-Wimplicit-function-declaration] ----- Usually, __arch__swab64* required for __fswab64, __swab64p and __swab64s is defined. Therefore, __BYTEORDER_HAS_U64__ is unnecessary. This removes __BYTEORDER_HAS_U64__. Signed-off-by: Nobuhiro Iwamatsu CC: Kim Phillips Reviewed-by: Kim Phillips --- include/linux/byteorder/swab.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/linux/byteorder/swab.h b/include/linux/byteorder/swab.h index bb4a046937..4334fa77e3 100644 --- a/include/linux/byteorder/swab.h +++ b/include/linux/byteorder/swab.h @@ -122,7 +122,6 @@ static __inline__ void __swab32s(__u32 *addr) __arch__swab32s(addr); } -#ifdef __BYTEORDER_HAS_U64__ static __inline__ __attribute__((const)) __u64 __fswab64(__u64 x) { # ifdef __SWAB_64_THRU_32__ @@ -141,7 +140,6 @@ static __inline__ void __swab64s(__u64 *addr) { __arch__swab64s(addr); } -#endif /* __BYTEORDER_HAS_U64__ */ #if defined(__KERNEL__) #define swab16 __swab16 -- cgit v1.2.1 From 98ab435f736f24b503c8a9dbacc3ee1556a58106 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Fri, 12 Oct 2012 18:48:47 +0000 Subject: x86: Add CBMEM console driver for coreboot This patch builds upon the recently introduced CBMEM console feature of coreboot. CBMEM console uses a memry area allocated by coreboot to store the console output. The memory area has a certain structure, which allows to determine where the buffer is, the buffer size and the location of the pointer in the buffer. This allows different phases of the firmware (rom based coreboot, ram based coreboot, u-boot after relocation with this change) to keep adding text to the same buffer. Note that this patch introduces a new console driver and adds the driver to the list of drivers to be used for console output, i.e. it engages only after u-boot relocates. Usiong CBMEM console for capturing the pre-relocation console output will be done under a separate change. >From Linux, run the cbmem.py utility (which is a part of the coreboot package) to see the output, e.g.: vvvvvvvvvvvvvvvvv SCSI: AHCI 0001.0300 32 slots 6 ports ? Gbps 0xf impl SATA mode flags: 64bit ilck stag led pmp pio ... Magic signature found Kernel command line: "cros_secure quiet loglevel=1 console=tty2... ^^^^^^^^^^^^^^^^^ Note that the entire u-boot output fits into the buffer only if the coreboot log level is reduced from the most verbose. Ether the buffer size will have to be increased, or the coreboot verbosity permanently reduced. Signed-off-by: Vadim Bendebury Signed-off-by: Simon Glass --- include/stdio_dev.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/stdio_dev.h b/include/stdio_dev.h index 23e0ee15f2..932d093345 100644 --- a/include/stdio_dev.h +++ b/include/stdio_dev.h @@ -120,5 +120,8 @@ int drv_nc_init (void); #ifdef CONFIG_JTAG_CONSOLE int drv_jtag_console_init (void); #endif +#ifdef CONFIG_CBMEM_CONSOLE +int cbmemc_init(void); +#endif #endif -- cgit v1.2.1 From 420a2ca73f5805be5e69d01cfe60a06fba8c9754 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 29 Nov 2012 09:58:58 +0000 Subject: x86: Select stdio devices for coreboot We want to support VGA, serial, USB keyboard and the Coreboot memory console buffer. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 5da006fbde..cfe5db35a0 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -92,6 +92,15 @@ #define CONFIG_SYS_NS16550_COM2 UART1_BASE #define CONFIG_SYS_NS16550_PORT_MAPPED +#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \ + "stdout=vga,eserial0,cbmem\0" \ + "stderr=vga,eserial0,cbmem\0" + +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_STDIO_DEREGISTER +#define CONFIG_CBMEM_CONSOLE + /* max. 1 IDE bus */ #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 drive per IDE bus */ @@ -243,4 +252,7 @@ */ #define CONFIG_PCI +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_STD_DEVICES_SETTINGS + #endif /* __CONFIG_H */ -- cgit v1.2.1 From a78d49473c81b8c95adfe684e62e5af6aa4f902d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 20 Oct 2012 12:33:15 +0000 Subject: x86: Define CONFIG_SYS_VSNPRINTF for coreboot This option protects the printf() functions from overflow. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index cfe5db35a0..a010adc2d9 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -38,6 +38,7 @@ #undef CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT #define CONFIG_X86_NO_RESET_VECTOR +#define CONFIG_SYS_VSNPRINTF /*----------------------------------------------------------------------- * Watchdog Configuration -- cgit v1.2.1 From 13b4f639495db2d351be3882eebc4fefdf42d5b4 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 14 Aug 2012 15:04:19 +0200 Subject: mpc5200: Add a3m071 board support This patch adds support for the a3m071 board based on the MPC5200. Signed-off-by: Stefan Roese --- include/configs/a3m071.h | 380 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 380 insertions(+) create mode 100644 include/configs/a3m071.h (limited to 'include') diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h new file mode 100644 index 0000000000..df3b4ae90a --- /dev/null +++ b/include/configs/a3m071.h @@ -0,0 +1,380 @@ +/* + * Copyright 2012 Stefan Roese + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + * (easy to change) + */ + +#define CONFIG_MPC5200 +#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ +#define CONFIG_A3M071 /* ... on A3M071 board */ +#define CONFIG_MPC5200_DDR /* ... use DDR RAM */ + +#define CONFIG_SYS_TEXT_BASE 0x01000000 /* boot low for 32 MiB boards */ + +#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */ + +#define CONFIG_MISC_INIT_R +#define CONFIG_SYS_LOWBOOT /* Enable lowboot */ + +/* + * Serial console configuration + */ +#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ +#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + { 9600, 19200, 38400, 57600, 115200, 230400 } + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_BSP +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_REGINFO + +/* + * IPB Bus clocking configuration. + */ +#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ +/* define for 66MHz speed - undef for 33MHz PCI clock speed */ +#undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP + +/* maximum size of the flat tree (8K) */ +#define OF_FLAT_TREE_MAX_SIZE 8192 + +#define OF_CPU "PowerPC,5200@0" +#define OF_SOC "soc5200@f0000000" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000" + +/* + * I2C configuration + */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */ + +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x7F + +/* + * EEPROM configuration + */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 + +/* + * RTC configuration + */ +#define CONFIG_RTC_PCF8563 +#define CONFIG_SYS_I2C_RTC_ADDR 0x51 + +/* + * NOR flash configuration + */ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 +#define CONFIG_SYS_FLASH_SIZE 0x01000000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 +#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 +#define CONFIG_SYS_FLASH_LOCK_TOUT 5 +#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +/* + * Environment settings + */ +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_OVERWRITE + +/* + * Memory map + */ +#define CONFIG_SYS_MBAR 0xf0000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_DEFAULT_MBAR 0x80000000 + +/* Use SRAM until RAM will be available */ +#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM +#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE + + +#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ + CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) +#define CONFIG_SYS_MALLOC_LEN (1 << 20) +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) + +/* + * Ethernet configuration + */ +#define CONFIG_MPC5xxx_FEC +#define CONFIG_MPC5xxx_FEC_MII100 +#define CONFIG_PHY_ADDR 0x00 + +/* + * GPIO configuration + */ + +/* + * GPIO-config depends on failsave-level + * failsave 0 means just MPX-config, no digiboard, no fpga + * 1 means digiboard ok + * 2 means fpga ok + */ + +/* for failsave-level 0 - full failsave */ +#define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C005 +/* for failsave-level 1 - only digiboard ok */ +#define CONFIG_SYS_GPS_PORT_CONFIG_1 0x1005C005 +/* for failsave-level 2 - all ok */ +#define CONFIG_SYS_GPS_PORT_CONFIG_2 0x1005C005 + +/* + * Configuration matrix + * MSB LSB + * failsave 0 0x1005C005 00010000000001011100000001100101 ( full failsave ) + * failsave 1 0x1005C005 00010000000001011100000001100101 ( digib.-ver ok ) + * failsave 2 0x1005C005 00010000000001011100000001100101 ( all ok ) + * || ||| || | ||| | | | | + * || ||| || | ||| | | | | bit rev name + * ++-+++-++--+---+++-+---+---+---+- 0 31 CS1 + * +-+++-++--+---+++-+---+---+---+- 1 30 LPTZ + * ||| || | ||| | | | | 2 29 ALTs + * +++-++--+---+++-+---+---+---+- 3 28 ALTs + * ++-++--+---+++-+---+---+---+- 4 27 CS7 + * +-++--+---+++-+---+---+---+- 5 26 CS6 + * || | ||| | | | | 6 25 ATA + * ++--+---+++-+---+---+---+- 7 24 ATA + * +--+---+++-+---+---+---+- 8 23 IR_USB_CLK + * | ||| | | | | 9 22 IRDA + * | ||| | | | | 10 21 IRDA + * +---+++-+---+---+---+- 11 20 IRDA + * ||| | | | | 12 19 Ether + * ||| | | | | 13 18 Ether + * ||| | | | | 14 17 Ether + * +++-+---+---+---+- 15 16 Ether + * ++-+---+---+---+- 16 15 PCI_DIS + * +-+---+---+---+- 17 14 USB_SE + * | | | | 18 13 USB + * +---+---+---+- 19 12 USB + * | | | 20 11 PSC3 + * | | | 21 10 PSC3 + * | | | 22 9 PSC3 + * +---+---+- 23 8 PSC3 + * | | 24 7 - + * | | 25 6 PSC2 + * | | 26 5 PSC2 + * +---+- 27 4 PSC2 + * | 28 3 - + * | 29 2 PSC1 + * | 30 1 PSC1 + * +- 31 0 PSC1 + */ + + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +#if defined(CONFIG_CMD_KGDB) +#define CONFIG_SYS_CBSIZE 1024 +#else +#define CONFIG_SYS_CBSIZE 256 +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x00100000 +#define CONFIG_SYS_MEMTEST_END 0x00f00000 + +#define CONFIG_SYS_LOAD_ADDR 0x00100000 + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_LOOPW +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ + +/* + * Various low-level settings + */ +#define CONFIG_SYS_HID0_INIT (HID0_ICE | HID0_ICFI) +#define CONFIG_SYS_HID0_FINAL HID0_ICE + +#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE +#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE +#define CONFIG_SYS_CS2_START 0xe0000000 +#define CONFIG_SYS_CS2_SIZE 0x00100000 + +/* FPGA slave io (512kiB) - see ticket #66 */ +#define CONFIG_SYS_CS3_START 0xE9000000 +#define CONFIG_SYS_CS3_SIZE 0x00080000 +/* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */ +#define CONFIG_SYS_CS3_CFG 0x0032B900 + +/* Diagnosis Interface - see ticket #63 */ +#define CONFIG_SYS_CS4_START 0xEA000000 +#define CONFIG_SYS_CS4_SIZE 0x00000001 +/* 00000000 00000010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0002B900 */ +#define CONFIG_SYS_CS4_CFG 0x0002B900 + +/* FPGA master io (64kiB) - see ticket #66 */ +#define CONFIG_SYS_CS5_START 0xE8000000 +#define CONFIG_SYS_CS5_SIZE 0x00010000 +/* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */ +#define CONFIG_SYS_CS5_CFG 0x0032B900 + +#ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* for pci_clk = 66 MHz */ +#define CONFIG_SYS_BOOTCS_CFG 0x0006F900 +#define CONFIG_SYS_CS1_CFG 0x0004FB00 +#define CONFIG_SYS_CS2_CFG 0x0006F90C +#else /* for pci_clk = 33 MHz */ +#define CONFIG_SYS_BOOTCS_CFG 0x0002F900 +#define CONFIG_SYS_CS1_CFG 0x0001FB00 +#define CONFIG_SYS_CS2_CFG 0x0002F90C +#endif + +#define CONFIG_SYS_CS_BURST 0x00000000 +/* set DC for FPGA CS5 and CS3 to 0 - see ticket #66 */ +/* R 7 R 6 R 5 R 4 R 3 R 2 R 1 R 0 */ +/* 00 11 00 11 00 00 00 11 00 00 00 00 00 00 00 00 */ +#define CONFIG_SYS_CS_DEADCYCLE 0x33030000 + +#define CONFIG_SYS_RESET_ADDRESS 0xff000000 + +/* + * Environment Configuration + */ + +#define CONFIG_BOOTDELAY 0 /* -1 disables auto-boot */ +#undef CONFIG_BOOTARGS +#define CONFIG_ZERO_BOOTDELAY_CHECK + +#define CONFIG_PREBOOT "echo;" \ + "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \ + "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \ + "echo" + +#undef CONFIG_BOOTARGS + +#define CONFIG_SYS_OS_BASE 0xfc080000 +#define CONFIG_SYS_FDT_BASE 0xfc060000 + +#define xstr(s) str(s) +#define str(s) #s + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "verify=no\0" \ + "consoledev=ttyPSC0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "mtdargs=setenv bootargs root=/dev/mtdblock4 rw rootfstype=jffs2\0"\ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addtty=setenv bootargs ${bootargs} " \ + "console=${consoledev},${baudrate}\0" \ + "flash_nfs=run nfsargs addip addtty;" \ + "bootm ${kernel_addr} - ${fdtaddr}\0" \ + "flash_mtd=run mtdargs addip addtty;" \ + "bootm ${kernel_addr} - ${fdtaddr}\0" \ + "flash_self=run ramargs addip addtty;" \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdtaddr}\0" \ + "net_nfs=sleep 2; tftp ${loadaddr} ${bootfile};" \ + "tftp c00000 ${fdtfile};" \ + "run nfsargs addip addtty;" \ + "bootm ${loadaddr} - c00000\0" \ + "load=tftp ${loadaddr} u-boot.bin\0" \ + "update=protect off fc000000 fc03ffff; " \ + "era fc000000 fc03ffff; cp.b ${loadaddr} fc000000 40000\0"\ + "upd=run load;run update\0" \ + "fdtaddr=" xstr(CONFIG_SYS_FDT_BASE) "\0" \ + "fdtfile=dtbFile\0" \ + "kernel_addr=" xstr(CONFIG_SYS_OS_BASE) "\0" \ + "" + +#define CONFIG_BOOTCOMMAND "run flash_mtd" + +/* + * SPL related defines + */ +#define CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_NOR_SUPPORT +#define CONFIG_SPL_TEXT_BASE 0xfc000000 +#define CONFIG_SPL_START_S_PATH "arch/powerpc/cpu/mpc5xxx" +#define CONFIG_SPL_LDSCRIPT "arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds" +#define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */ +#define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */ +#define CONFIG_SPL_SERIAL_SUPPORT + +/* Place BSS for SPL near end of SDRAM */ +#define CONFIG_SPL_BSS_START_ADDR ((128 - 1) << 20) +#define CONFIG_SPL_BSS_MAX_SIZE (64 << 10) + +#define CONFIG_SPL_OS_BOOT +/* Place patched DT blob (fdt) at this address */ +#define CONFIG_SYS_SPL_ARGS_ADDR 0x01800000 + +/* Settings for real U-Boot to be loaded from NOR flash */ +#ifndef __ASSEMBLY__ +extern char __spl_flash_end[]; +#endif +#define CONFIG_SYS_UBOOT_BASE __spl_flash_end +#define CONFIG_SYS_SPL_MAX_LEN (32 << 10) +#define CONFIG_SYS_UBOOT_START 0x1000100 + +#endif /* __CONFIG_H */ -- cgit v1.2.1 From 468ebf190a737dd1021ca15ff350ceee2001372e Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Fri, 2 Nov 2012 14:30:34 +0100 Subject: 4xx: Fix PCI memory mapping on CPCI405 boards This patch fixes an issue with overlapping PCI regions on boards with more than 64MB RAM. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- include/configs/CPCI405.h | 2 +- include/configs/CPCI4052.h | 2 +- include/configs/CPCI405AB.h | 2 +- include/configs/CPCI405DT.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 9ecdad9c97..e3e5ebc53c 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -174,7 +174,7 @@ #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ #define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ #define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ +#define CONFIG_SYS_PCI_PTM2PCI (bd->bi_memsize) /* host use this pci address */ #define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index efab11991d..c4fff486d8 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -195,7 +195,7 @@ #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ #define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ #define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ +#define CONFIG_SYS_PCI_PTM2PCI (bd->bi_memsize) /* host use this pci address */ #define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 83e9a046ad..9122cbd877 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -192,7 +192,7 @@ #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ #define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ #define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ +#define CONFIG_SYS_PCI_PTM2PCI (bd->bi_memsize) /* host use this pci address */ #define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index 1944a071b4..f778af7e36 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -196,7 +196,7 @@ #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ #define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ #define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ +#define CONFIG_SYS_PCI_PTM2PCI (bd->bi_memsize) /* host use this pci address */ #define CONFIG_PCI_4xx_PTM_OVERWRITE 1 /* overwrite PTMx settings by env */ -- cgit v1.2.1 From 25920757765e22bdebf8e6fb1f777e21a31c9c21 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 5 Nov 2012 12:16:24 +0000 Subject: cbfs: Remove mention of CREDITS files As requested by Wolfgang, remove references to CREDITS in the CBFS files. Signed-off-by: Simon Glass --- include/cbfs.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/cbfs.h b/include/cbfs.h index 6ea3f35119..8a780c2dda 100644 --- a/include/cbfs.h +++ b/include/cbfs.h @@ -1,9 +1,6 @@ /* * Copyright (c) 2011 The Chromium OS Authors. All rights reserved. * - * See file CREDITS for list of people who contributed to this - * project. - * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of -- cgit v1.2.1 From e3ff797cdb3c4e4b2147013fa1b25a04ecc21fc4 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 5 Nov 2012 12:16:25 +0000 Subject: cbfs: Add docbook template This adds a docbook template for fs, and makes CBFS use it. Signed-off-by: Simon Glass --- include/cbfs.h | 69 ++++++++++++++++++++++++++++++---------------------------- 1 file changed, 36 insertions(+), 33 deletions(-) (limited to 'include') diff --git a/include/cbfs.h b/include/cbfs.h index 8a780c2dda..5bb12c355c 100644 --- a/include/cbfs.h +++ b/include/cbfs.h @@ -74,46 +74,47 @@ struct cbfs_cachenode { extern enum cbfs_result file_cbfs_result; -/* - * Return a string describing the most recent error condition. +/** + * file_cbfs_error() - Return a string describing the most recent error + * condition. * * @return A pointer to the constant string. */ const char *file_cbfs_error(void); -/* - * Initialize the CBFS driver and load metadata into RAM. +/** + * file_cbfs_init() - Initialize the CBFS driver and load metadata into RAM. * - * @param end_of_rom Points to the end of the ROM the CBFS should be read + * @end_of_rom: Points to the end of the ROM the CBFS should be read * from. */ void file_cbfs_init(uintptr_t end_of_rom); -/* - * Get the header structure for the current CBFS. +/** + * file_cbfs_get_header() - Get the header structure for the current CBFS. * * @return A pointer to the constant structure, or NULL if there is none. */ const struct cbfs_header *file_cbfs_get_header(void); -/* - * Get a handle for the first file in CBFS. +/** + * file_cbfs_get_first() - Get a handle for the first file in CBFS. * * @return A handle for the first file in CBFS, NULL on error. */ const struct cbfs_cachenode *file_cbfs_get_first(void); -/* - * Get a handle to the file after this one in CBFS. +/** + * file_cbfs_get_next() - Get a handle to the file after this one in CBFS. * - * @param file A pointer to the handle to advance. + * @file: A pointer to the handle to advance. */ void file_cbfs_get_next(const struct cbfs_cachenode **file); -/* - * Find a file with a particular name in CBFS. +/** + * file_cbfs_find() - Find a file with a particular name in CBFS. * - * @param name The name to search for. + * @name: The name to search for. * * @return A handle to the file, or NULL on error. */ @@ -124,53 +125,55 @@ const struct cbfs_cachenode *file_cbfs_find(const char *name); /* All of the functions below can be used without first initializing CBFS. */ /***************************************************************************/ -/* - * Find a file with a particular name in CBFS without using the heap. +/** + * file_cbfs_find_uncached() - Find a file with a particular name in CBFS + * without using the heap. * - * @param end_of_rom Points to the end of the ROM the CBFS should be read + * @end_of_rom: Points to the end of the ROM the CBFS should be read * from. - * @param name The name to search for. + * @name: The name to search for. * * @return A handle to the file, or NULL on error. */ const struct cbfs_cachenode *file_cbfs_find_uncached(uintptr_t end_of_rom, const char *name); -/* - * Get the name of a file in CBFS. +/** + * file_cbfs_name() - Get the name of a file in CBFS. * - * @param file The handle to the file. + * @file: The handle to the file. * * @return The name of the file, NULL on error. */ const char *file_cbfs_name(const struct cbfs_cachenode *file); -/* - * Get the size of a file in CBFS. +/** + * file_cbfs_size() - Get the size of a file in CBFS. * - * @param file The handle to the file. + * @file: The handle to the file. * * @return The size of the file, zero on error. */ u32 file_cbfs_size(const struct cbfs_cachenode *file); -/* - * Get the type of a file in CBFS. +/** + * file_cbfs_type() - Get the type of a file in CBFS. * - * @param file The handle to the file. + * @file: The handle to the file. * * @return The type of the file, zero on error. */ u32 file_cbfs_type(const struct cbfs_cachenode *file); -/* - * Read a file from CBFS into RAM +/** + * file_cbfs_read() - Read a file from CBFS into RAM * - * @param file A handle to the file to read. - * @param buffer Where to read it into memory. + * @file: A handle to the file to read. + * @buffer: Where to read it into memory. + * @maxsize: Maximum number of bytes to read * * @return If positive or zero, the number of characters read. If negative, an - * error occurred. + * error occurred. */ long file_cbfs_read(const struct cbfs_cachenode *file, void *buffer, unsigned long maxsize); -- cgit v1.2.1 From 55ae10f8dbdf306e210240937ee4d558c8590447 Mon Sep 17 00:00:00 2001 From: Bill Richardson Date: Sat, 20 Oct 2012 11:44:34 +0000 Subject: x86: gpio: Add GPIO driver for Intel ICH6 and later. Implement functions for Intel ICH6 and later. Only GPIOs 0-31 are handled by this code. Signed-off-by: Bill Richardson Signed-off-by: Simon Glass --- include/pci.h | 123 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 123 insertions(+) (limited to 'include') diff --git a/include/pci.h b/include/pci.h index eba122f8c0..15f583f069 100644 --- a/include/pci.h +++ b/include/pci.h @@ -67,7 +67,130 @@ #define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */ #define PCI_CLASS_DEVICE 0x0a /* Device class */ #define PCI_CLASS_CODE 0x0b /* Device class code */ +#define PCI_CLASS_CODE_TOO_OLD 0x00 +#define PCI_CLASS_CODE_STORAGE 0x01 +#define PCI_CLASS_CODE_NETWORK 0x02 +#define PCI_CLASS_CODE_DISPLAY 0x03 +#define PCI_CLASS_CODE_MULTIMEDIA 0x04 +#define PCI_CLASS_CODE_MEMORY 0x05 +#define PCI_CLASS_CODE_BRIDGE 0x06 +#define PCI_CLASS_CODE_COMM 0x07 +#define PCI_CLASS_CODE_PERIPHERAL 0x08 +#define PCI_CLASS_CODE_INPUT 0x09 +#define PCI_CLASS_CODE_DOCKING 0x0A +#define PCI_CLASS_CODE_PROCESSOR 0x0B +#define PCI_CLASS_CODE_SERIAL 0x0C +#define PCI_CLASS_CODE_WIRELESS 0x0D +#define PCI_CLASS_CODE_I2O 0x0E +#define PCI_CLASS_CODE_SATELLITE 0x0F +#define PCI_CLASS_CODE_CRYPTO 0x10 +#define PCI_CLASS_CODE_DATA 0x11 +/* Base Class 0x12 - 0xFE is reserved */ +#define PCI_CLASS_CODE_OTHER 0xFF + #define PCI_CLASS_SUB_CODE 0x0a /* Device sub-class code */ +#define PCI_CLASS_SUB_CODE_TOO_OLD_NOTVGA 0x00 +#define PCI_CLASS_SUB_CODE_TOO_OLD_VGA 0x01 +#define PCI_CLASS_SUB_CODE_STORAGE_SCSI 0x00 +#define PCI_CLASS_SUB_CODE_STORAGE_IDE 0x01 +#define PCI_CLASS_SUB_CODE_STORAGE_FLOPPY 0x02 +#define PCI_CLASS_SUB_CODE_STORAGE_IPIBUS 0x03 +#define PCI_CLASS_SUB_CODE_STORAGE_RAID 0x04 +#define PCI_CLASS_SUB_CODE_STORAGE_ATA 0x05 +#define PCI_CLASS_SUB_CODE_STORAGE_SATA 0x06 +#define PCI_CLASS_SUB_CODE_STORAGE_SAS 0x07 +#define PCI_CLASS_SUB_CODE_STORAGE_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_NETWORK_ETHERNET 0x00 +#define PCI_CLASS_SUB_CODE_NETWORK_TOKENRING 0x01 +#define PCI_CLASS_SUB_CODE_NETWORK_FDDI 0x02 +#define PCI_CLASS_SUB_CODE_NETWORK_ATM 0x03 +#define PCI_CLASS_SUB_CODE_NETWORK_ISDN 0x04 +#define PCI_CLASS_SUB_CODE_NETWORK_WORLDFIP 0x05 +#define PCI_CLASS_SUB_CODE_NETWORK_PICMG 0x06 +#define PCI_CLASS_SUB_CODE_NETWORK_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_DISPLAY_VGA 0x00 +#define PCI_CLASS_SUB_CODE_DISPLAY_XGA 0x01 +#define PCI_CLASS_SUB_CODE_DISPLAY_3D 0x02 +#define PCI_CLASS_SUB_CODE_DISPLAY_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_MULTIMEDIA_VIDEO 0x00 +#define PCI_CLASS_SUB_CODE_MULTIMEDIA_AUDIO 0x01 +#define PCI_CLASS_SUB_CODE_MULTIMEDIA_PHONE 0x02 +#define PCI_CLASS_SUB_CODE_MULTIMEDIA_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_MEMORY_RAM 0x00 +#define PCI_CLASS_SUB_CODE_MEMORY_FLASH 0x01 +#define PCI_CLASS_SUB_CODE_MEMORY_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_BRIDGE_HOST 0x00 +#define PCI_CLASS_SUB_CODE_BRIDGE_ISA 0x01 +#define PCI_CLASS_SUB_CODE_BRIDGE_EISA 0x02 +#define PCI_CLASS_SUB_CODE_BRIDGE_MCA 0x03 +#define PCI_CLASS_SUB_CODE_BRIDGE_PCI 0x04 +#define PCI_CLASS_SUB_CODE_BRIDGE_PCMCIA 0x05 +#define PCI_CLASS_SUB_CODE_BRIDGE_NUBUS 0x06 +#define PCI_CLASS_SUB_CODE_BRIDGE_CARDBUS 0x07 +#define PCI_CLASS_SUB_CODE_BRIDGE_RACEWAY 0x08 +#define PCI_CLASS_SUB_CODE_BRIDGE_SEMI_PCI 0x09 +#define PCI_CLASS_SUB_CODE_BRIDGE_INFINIBAND 0x0A +#define PCI_CLASS_SUB_CODE_BRIDGE_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_COMM_SERIAL 0x00 +#define PCI_CLASS_SUB_CODE_COMM_PARALLEL 0x01 +#define PCI_CLASS_SUB_CODE_COMM_MULTIPORT 0x02 +#define PCI_CLASS_SUB_CODE_COMM_MODEM 0x03 +#define PCI_CLASS_SUB_CODE_COMM_GPIB 0x04 +#define PCI_CLASS_SUB_CODE_COMM_SMARTCARD 0x05 +#define PCI_CLASS_SUB_CODE_COMM_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_PERIPHERAL_PIC 0x00 +#define PCI_CLASS_SUB_CODE_PERIPHERAL_DMA 0x01 +#define PCI_CLASS_SUB_CODE_PERIPHERAL_TIMER 0x02 +#define PCI_CLASS_SUB_CODE_PERIPHERAL_RTC 0x03 +#define PCI_CLASS_SUB_CODE_PERIPHERAL_HOTPLUG 0x04 +#define PCI_CLASS_SUB_CODE_PERIPHERAL_SD 0x05 +#define PCI_CLASS_SUB_CODE_PERIPHERAL_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_INPUT_KEYBOARD 0x00 +#define PCI_CLASS_SUB_CODE_INPUT_DIGITIZER 0x01 +#define PCI_CLASS_SUB_CODE_INPUT_MOUSE 0x02 +#define PCI_CLASS_SUB_CODE_INPUT_SCANNER 0x03 +#define PCI_CLASS_SUB_CODE_INPUT_GAMEPORT 0x04 +#define PCI_CLASS_SUB_CODE_INPUT_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_DOCKING_GENERIC 0x00 +#define PCI_CLASS_SUB_CODE_DOCKING_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_PROCESSOR_386 0x00 +#define PCI_CLASS_SUB_CODE_PROCESSOR_486 0x01 +#define PCI_CLASS_SUB_CODE_PROCESSOR_PENTIUM 0x02 +#define PCI_CLASS_SUB_CODE_PROCESSOR_ALPHA 0x10 +#define PCI_CLASS_SUB_CODE_PROCESSOR_POWERPC 0x20 +#define PCI_CLASS_SUB_CODE_PROCESSOR_MIPS 0x30 +#define PCI_CLASS_SUB_CODE_PROCESSOR_COPROC 0x40 +#define PCI_CLASS_SUB_CODE_SERIAL_1394 0x00 +#define PCI_CLASS_SUB_CODE_SERIAL_ACCESSBUS 0x01 +#define PCI_CLASS_SUB_CODE_SERIAL_SSA 0x02 +#define PCI_CLASS_SUB_CODE_SERIAL_USB 0x03 +#define PCI_CLASS_SUB_CODE_SERIAL_FIBRECHAN 0x04 +#define PCI_CLASS_SUB_CODE_SERIAL_SMBUS 0x05 +#define PCI_CLASS_SUB_CODE_SERIAL_INFINIBAND 0x06 +#define PCI_CLASS_SUB_CODE_SERIAL_IPMI 0x07 +#define PCI_CLASS_SUB_CODE_SERIAL_SERCOS 0x08 +#define PCI_CLASS_SUB_CODE_SERIAL_CANBUS 0x09 +#define PCI_CLASS_SUB_CODE_WIRELESS_IRDA 0x00 +#define PCI_CLASS_SUB_CODE_WIRELESS_IR 0x01 +#define PCI_CLASS_SUB_CODE_WIRELESS_RF 0x10 +#define PCI_CLASS_SUB_CODE_WIRELESS_BLUETOOTH 0x11 +#define PCI_CLASS_SUB_CODE_WIRELESS_BROADBAND 0x12 +#define PCI_CLASS_SUB_CODE_WIRELESS_80211A 0x20 +#define PCI_CLASS_SUB_CODE_WIRELESS_80211B 0x21 +#define PCI_CLASS_SUB_CODE_WIRELESS_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_I2O_V1_0 0x00 +#define PCI_CLASS_SUB_CODE_SATELLITE_TV 0x01 +#define PCI_CLASS_SUB_CODE_SATELLITE_AUDIO 0x02 +#define PCI_CLASS_SUB_CODE_SATELLITE_VOICE 0x03 +#define PCI_CLASS_SUB_CODE_SATELLITE_DATA 0x04 +#define PCI_CLASS_SUB_CODE_CRYPTO_NETWORK 0x00 +#define PCI_CLASS_SUB_CODE_CRYPTO_ENTERTAINMENT 0x10 +#define PCI_CLASS_SUB_CODE_CRYPTO_OTHER 0x80 +#define PCI_CLASS_SUB_CODE_DATA_DPIO 0x00 +#define PCI_CLASS_SUB_CODE_DATA_PERFCNTR 0x01 +#define PCI_CLASS_SUB_CODE_DATA_COMMSYNC 0x10 +#define PCI_CLASS_SUB_CODE_DATA_MGMT 0x20 +#define PCI_CLASS_SUB_CODE_DATA_OTHER 0x80 #define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */ #define PCI_LATENCY_TIMER 0x0d /* 8 bits */ -- cgit v1.2.1 From a7e6d5496c7981803482bfa6970eeda2954d3458 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 2 Dec 2012 03:44:44 +0000 Subject: x86: Enable ICH6 GPIO controller for coreboot Coreboot uses this controller to implement GPIO access. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index a010adc2d9..fcfa7edfb4 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -138,6 +138,9 @@ #undef CONFIG_VIDEO #undef CONFIG_CFB_CONSOLE +/* x86 GPIOs are accessed through a PCI device */ +#define CONFIG_INTEL_ICH6_GPIO + /*----------------------------------------------------------------------- * Command line configuration. */ @@ -150,6 +153,7 @@ #define CONFIG_CMD_ECHO #undef CONFIG_CMD_FLASH #define CONFIG_CMD_FPGA +#define CONFIG_CMD_GPIO #define CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS #define CONFIG_CMD_IRQ -- cgit v1.2.1 From 34d6057be1a162ce6424314026af12f8963f2df2 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 2 Dec 2012 04:49:55 +0000 Subject: x86: Enable CONFIG_CMD_ZBOOT for coreboot Enable this option to support booting a zImage. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index fcfa7edfb4..e45ecad7b4 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -39,6 +39,7 @@ #define CONFIG_LAST_STAGE_INIT #define CONFIG_X86_NO_RESET_VECTOR #define CONFIG_SYS_VSNPRINTF +#define CONFIG_ZBOOT_32 /*----------------------------------------------------------------------- * Watchdog Configuration @@ -175,6 +176,8 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 +#define CONFIG_CMD_ZBOOT + #define CONFIG_BOOTDELAY 2 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600" -- cgit v1.2.1 From 40fef0490610686022f99b8e070df7ac761c11a0 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sun, 2 Dec 2012 04:55:18 +0000 Subject: Introduce arch_phys_memset which works like memset but on physical memory The default implementation of this function is just memset, but other implementations will be needed when physical memory isn't accessible by U-Boot using normal addressing mechanisms. Signed-off-by: Gabe Black Signed-off-by: Che-Liang Chiou Signed-off-by: Simon Glass --- include/physmem.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 include/physmem.h (limited to 'include') diff --git a/include/physmem.h b/include/physmem.h new file mode 100644 index 0000000000..03d3a78b74 --- /dev/null +++ b/include/physmem.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2012 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Alternatively, this software may be distributed under the terms of the + * GNU General Public License ("GPL") version 2 as published by the Free + * Software Foundation. + */ + +/* + * These functions work like memset but operate on physical memory which may + * not be accessible directly. + * + * @param s The physical address to start setting memory at. + * @param c The character to set each byte of the region to. + * @param n The number of bytes to set. + * + * @return The physical address of the memory which was set. + */ +phys_addr_t arch_phys_memset(phys_addr_t s, int c, phys_size_t n); -- cgit v1.2.1 From 300081aa68d705ce954c516751a9c03efa1fba5e Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 3 Dec 2012 13:58:12 +0000 Subject: x86: Emit port 80 post codes in show_boot_progress() This helps us monitor boot progress and determine where U-Boot dies if there are any problems. Signed-off-by: Stefan Reinauer Signed-off-by: Simon Glass --- include/configs/coreboot.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index e45ecad7b4..94b6917632 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -35,7 +35,7 @@ * (easy to change) */ #define CONFIG_SYS_COREBOOT -#undef CONFIG_SHOW_BOOT_PROGRESS +#define CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT #define CONFIG_X86_NO_RESET_VECTOR #define CONFIG_SYS_VSNPRINTF -- cgit v1.2.1 From cbca883c46146e9b3128fcb51ab750089c47c241 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 3 Nov 2012 11:41:42 +0000 Subject: x86: coreboot: Enable video display Enable the display on coreboot, using CFB. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 94b6917632..46b8d78fbc 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -78,6 +78,7 @@ */ #define CONFIG_RTC_MC146818 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 +#define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS /*----------------------------------------------------------------------- * Serial Configuration @@ -136,8 +137,13 @@ /*----------------------------------------------------------------------- * Video Configuration */ -#undef CONFIG_VIDEO -#undef CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO +#define CONFIG_VIDEO_COREBOOT +#define CONFIG_VIDEO_SW_CURSOR +#define VIDEO_FB_16BPP_WORD_SWAP +#define CONFIG_I8042_KBD +#define CONFIG_CFB_CONSOLE +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* x86 GPIOs are accessed through a PCI device */ #define CONFIG_INTEL_ICH6_GPIO -- cgit v1.2.1 From d954a431ec4bbebc588ac810a1eb01f3512249a8 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 5 Dec 2012 15:10:58 +0000 Subject: x86: Turn on support for EFI's GPT in the coreboot config This allows u-boot to figure out the partitions of a chrome-os install. Signed-off-by: Gabe Black Signed-off-by: Simon Glass --- include/configs/coreboot.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 46b8d78fbc..06d2b2fb2e 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -126,13 +126,16 @@ /************************************************************ * DISK Partition support ************************************************************/ +#define CONFIG_EFI_PARTITION #define CONFIG_DOS_PARTITION #define CONFIG_MAC_PARTITION #define CONFIG_ISO_PARTITION /* Experimental */ +#define CONFIG_CMD_PART #define CONFIG_CMD_CBFS #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE +#define CONFIG_PARTITION_UUIDS /*----------------------------------------------------------------------- * Video Configuration -- cgit v1.2.1 From ac426b7290e3a96c97fbc093f15cd0660e0edaf2 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Dec 2012 15:11:27 +0000 Subject: x86: Fix coreboot config to boot on Chromebook The config is current broken. It compiles but does not boot because IDE is enabled. Remove all IDE options, and enable SCSI instead. Also add a working boot command and Linux bootargs, and enable command line editing to make it easier to work with. Signed-off-by: Simon Glass --- include/configs/coreboot.h | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 06d2b2fb2e..adeace0cf2 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -39,7 +39,9 @@ #define CONFIG_LAST_STAGE_INIT #define CONFIG_X86_NO_RESET_VECTOR #define CONFIG_SYS_VSNPRINTF +#define CONFIG_INTEL_CORE_ARCH /* Sandy bridge and ivy bridge chipsets. */ #define CONFIG_ZBOOT_32 +#define CONFIG_PHYSMEM /*----------------------------------------------------------------------- * Watchdog Configuration @@ -104,18 +106,9 @@ #define CONFIG_SYS_STDIO_DEREGISTER #define CONFIG_CBMEM_CONSOLE -/* max. 1 IDE bus */ -#define CONFIG_SYS_IDE_MAXBUS 1 -/* max. 1 drive per IDE bus */ -#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1) - -#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 -#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 -#define CONFIG_SYS_ATA_DATA_OFFSET 0 -#define CONFIG_SYS_ATA_REG_OFFSET 0 -#define CONFIG_SYS_ATA_ALT_OFFSET 0x200 - +#define CONFIG_CMDLINE_EDITING +#define CONFIG_COMMAND_HISTORY +#define CONFIG_AUTOCOMPLETE #define CONFIG_SUPPORT_VFAT /************************************************************ @@ -181,14 +174,19 @@ #define CONFIG_CMD_SETGETDCR #define CONFIG_CMD_SOURCE #define CONFIG_CMD_XIMG -#define CONFIG_CMD_IDE +#define CONFIG_CMD_SCSI + #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 #define CONFIG_CMD_ZBOOT #define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600" +#define CONFIG_BOOTARGS \ + "root=/dev/sdb3 init=/sbin/init rootwait ro" +#define CONFIG_BOOTCOMMAND \ + "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000" + #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 -- cgit v1.2.1 From 3fdf7596dff87a79e2b41d07479c608d91d06cb3 Mon Sep 17 00:00:00 2001 From: Luka Perkov Date: Mon, 3 Dec 2012 03:24:15 +0000 Subject: Change e-mail address of Luka Perkov Change e-mail address of Luka Perkov. Signed-off-by: Luka Perkov CC: Luka Perkov --- include/configs/ib62x0.h | 2 +- include/configs/iconnect.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 85856f290e..f646ae5776 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -1,7 +1,7 @@ /* * Copyright (C) 2011-2012 * Gerald Kerma - * Luka Perkov + * Luka Perkov * * See file CREDITS for list of people who contributed to this * project. diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index 2b523c9fc9..ba57849a60 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2009-2012 * Wojciech Dubowik - * Luka Perkov + * Luka Perkov * * See file CREDITS for list of people who contributed to this * project. -- cgit v1.2.1