INTEL_G4A = \ exa_sf.g4a \ exa_sf_mask.g4a \ exa_wm_src_affine.g4a \ exa_wm_src_projective.g4a \ exa_wm_src_sample_argb.g4a \ exa_wm_src_sample_a.g4a \ exa_wm_src_sample_nv12.g4a \ exa_wm_src_sample_planar.g4a \ exa_wm_mask_affine.g4a \ exa_wm_mask_projective.g4a \ exa_wm_mask_sample_argb.g4a \ exa_wm_mask_sample_a.g4a \ exa_wm_noca.g4a \ exa_wm_ca.g4a \ exa_wm_ca_srcalpha.g4a \ exa_wm_write.g4a \ exa_wm_yuv_rgb_bt601.g4a \ exa_wm_yuv_rgb_bt709.g4a \ exa_wm_xy.g4a \ $(NULL) INTEL_G4I = \ exa_wm.g4i \ exa_wm_affine.g4i \ exa_wm_projective.g4i \ exa_wm_sample_nv12.g4i \ exa_wm_sample_planar.g4i \ exa_wm_src_sample_argb.g4i \ $(NULL) INTEL_G4B = \ exa_sf.g4b \ exa_sf_mask.g4b \ exa_wm_src_affine.g4b \ exa_wm_src_projective.g4b \ exa_wm_src_sample_argb.g4b \ exa_wm_src_sample_a.g4b \ exa_wm_src_sample_nv12.g4b \ exa_wm_src_sample_planar.g4b \ exa_wm_mask_affine.g4b \ exa_wm_mask_projective.g4b \ exa_wm_mask_sample_argb.g4b \ exa_wm_mask_sample_a.g4b \ exa_wm_noca.g4b \ exa_wm_ca.g4b \ exa_wm_ca_srcalpha.g4b \ exa_wm_write.g4b \ exa_wm_yuv_rgb_bt601.g4b \ exa_wm_yuv_rgb_bt709.g4b \ exa_wm_xy.g4b \ $(NULL) INTEL_G4B_GEN5 = \ exa_sf.g4b.gen5 \ exa_sf_mask.g4b.gen5 \ exa_wm_src_affine.g4b.gen5 \ exa_wm_src_projective.g4b.gen5 \ exa_wm_src_sample_argb.g4b.gen5 \ exa_wm_src_sample_a.g4b.gen5 \ exa_wm_src_sample_nv12.g4b.gen5 \ exa_wm_src_sample_planar.g4b.gen5 \ exa_wm_mask_affine.g4b.gen5 \ exa_wm_mask_projective.g4b.gen5 \ exa_wm_mask_sample_argb.g4b.gen5 \ exa_wm_mask_sample_a.g4b.gen5 \ exa_wm_noca.g4b.gen5 \ exa_wm_ca.g4b.gen5 \ exa_wm_ca_srcalpha.g4b.gen5 \ exa_wm_write.g4b.gen5 \ exa_wm_yuv_rgb_bt601.g4b.gen5 \ exa_wm_yuv_rgb_bt709.g4b.gen5 \ exa_wm_xy.g4b.gen5 \ $(NULL) INTEL_G5A = \ exa_sf.g5a \ exa_sf_mask.g5a \ exa_wm_src_affine.g5a \ exa_wm_src_projective.g5a \ exa_wm_src_sample_argb.g5a \ exa_wm_src_sample_a.g5a \ exa_wm_src_sample_nv12.g5a \ exa_wm_src_sample_planar.g5a \ exa_wm_mask_affine.g5a \ exa_wm_mask_projective.g5a \ exa_wm_mask_sample_argb.g5a \ exa_wm_mask_sample_a.g5a \ exa_wm_noca.g5a \ exa_wm_ca.g5a \ exa_wm_ca_srcalpha.g5a \ exa_wm_write.g5a \ exa_wm_yuv_rgb_bt601.g5a \ exa_wm_yuv_rgb_bt709.g5a \ exa_wm_xy.g5a \ $(NULL) INTEL_G5B = \ exa_sf.g5b \ exa_sf_mask.g5b \ exa_wm_src_affine.g5b \ exa_wm_src_projective.g5b \ exa_wm_src_sample_argb.g5b \ exa_wm_src_sample_a.g5b \ exa_wm_src_sample_nv12.g5b \ exa_wm_src_sample_planar.g5b \ exa_wm_mask_affine.g5b \ exa_wm_mask_projective.g5b \ exa_wm_mask_sample_argb.g5b \ exa_wm_mask_sample_a.g5b \ exa_wm_noca.g5b \ exa_wm_ca.g5b \ exa_wm_ca_srcalpha.g5b \ exa_wm_write.g5b \ exa_wm_yuv_rgb_bt601.g5b \ exa_wm_yuv_rgb_bt709.g5b \ exa_wm_xy.g5b \ $(NULL) INTEL_G6I = \ exa_wm_affine.g6i \ exa_wm_write.g6i \ $(NULL) INTEL_G6A = \ exa_wm_src_affine.g6a \ exa_wm_src_projective.g6a \ exa_wm_src_sample_argb.g6a \ exa_wm_src_sample_nv12.g6a \ exa_wm_src_sample_planar.g6a \ exa_wm_src_sample_a.g6a \ exa_wm_mask_affine.g6a \ exa_wm_mask_projective.g6a \ exa_wm_mask_sample_argb.g6a \ exa_wm_mask_sample_a.g6a \ exa_wm_ca.g6a \ exa_wm_ca_srcalpha.g6a \ exa_wm_noca.g6a \ exa_wm_write.g6a \ exa_wm_yuv_rgb_bt601.g6a \ exa_wm_yuv_rgb_bt709.g6a \ $(NULL) INTEL_G6B = \ exa_wm_src_affine.g6b \ exa_wm_src_projective.g6b \ exa_wm_src_sample_argb.g6b \ exa_wm_src_sample_nv12.g6b \ exa_wm_src_sample_planar.g6b \ exa_wm_src_sample_a.g6b \ exa_wm_mask_affine.g6b \ exa_wm_mask_projective.g6b \ exa_wm_mask_sample_argb.g6b \ exa_wm_mask_sample_a.g6b \ exa_wm_ca.g6b \ exa_wm_ca_srcalpha.g6b \ exa_wm_noca.g6b \ exa_wm_write.g6b \ exa_wm_yuv_rgb_bt601.g6b \ exa_wm_yuv_rgb_bt709.g6b \ $(NULL) INTEL_G7A = \ exa_wm_mask_affine.g7a \ exa_wm_mask_projective.g7a \ exa_wm_mask_sample_a.g7a \ exa_wm_mask_sample_argb.g7a \ exa_wm_src_affine.g7a \ exa_wm_src_projective.g7a \ exa_wm_src_sample_a.g7a \ exa_wm_src_sample_argb.g7a \ exa_wm_src_sample_nv12.g7a \ exa_wm_src_sample_planar.g7a \ exa_wm_write.g7a \ exa_wm_yuv_rgb_bt601.g7a \ exa_wm_yuv_rgb_bt709.g7a \ $(NULL) INTEL_G7B = \ exa_wm_mask_affine.g7b \ exa_wm_mask_projective.g7b \ exa_wm_mask_sample_a.g7b \ exa_wm_mask_sample_argb.g7b \ exa_wm_src_affine.g7b \ exa_wm_src_projective.g7b \ exa_wm_src_sample_a.g7b \ exa_wm_src_sample_argb.g7b \ exa_wm_src_sample_nv12.g7b \ exa_wm_src_sample_planar.g7b \ exa_wm_write.g7b \ exa_wm_yuv_rgb_bt601.g7b \ exa_wm_yuv_rgb_bt709.g7b \ $(NULL) INTEL_G8A = \ exa_wm_src_affine.g8a \ exa_wm_src_sample_argb.g8a \ exa_wm_src_sample_argb_ayuv.g8a \ exa_wm_src_sample_nv12.g8a \ exa_wm_src_sample_planar.g8a \ exa_wm_write.g8a \ exa_wm_yuv_rgb_bt601.g8a \ exa_wm_yuv_rgb_bt709.g8a \ $(NULL) INTEL_G8B = \ exa_wm_src_affine.g8b \ exa_wm_src_sample_argb_ayuv.g8b \ exa_wm_src_sample_argb.g8b \ exa_wm_src_sample_nv12.g8b \ exa_wm_src_sample_planar.g8b \ exa_wm_write.g8b \ exa_wm_yuv_rgb_bt601.g8b \ exa_wm_yuv_rgb_bt709.g8b \ $(NULL) EXTRA_DIST = \ $(INTEL_G4A) \ $(INTEL_G4I) \ $(INTEL_G4B) \ $(INTEL_G4B_GEN5)\ $(INTEL_G5A) \ $(INTEL_G5B) \ $(INTEL_G6A) \ $(INTEL_G6B) \ $(INTEL_G6I) \ $(INTEL_G7A) \ $(INTEL_G7B) \ $(INTEL_G8A) \ $(INTEL_G8B) if HAVE_GEN4ASM SUFFIXES = .g4a .g4b .g5a .g5b .g6a .g6b .g7a .g7b .g8b .g4a.g4b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g4m && @INTEL_GEN4ASM@ -o $@ $*.g4m && @INTEL_GEN4ASM@ -g 5 -o $@.gen5 $*.g4m && rm $*.g4m .g5a.g5b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g5m && @INTEL_GEN4ASM@ -g 5 -o $@ $*.g5m && rm $*.g5m .g6a.g6b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g6m && @INTEL_GEN4ASM@ -g 6 -o $@ $*.g6m && rm $*.g6m .g7a.g7b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g7m && @INTEL_GEN4ASM@ -g 7 -o $@ $*.g7m && rm $*.g7m .g8a.g8b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g8m && @INTEL_GEN4ASM@ -g 8 -o $@ $*.g8m && rm $*.g8m $(INTEL_G4B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G5B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6I) $(INTEL_G7B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6I) $(INTEL_G8B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6I) BUILT_SOURCES=$(INTEL_G4B) $(INTEL_G4B_GEN5) $(INTEL_G5B) $(INTEL_G6B) $(INTEL_G7B) $(INTEL_G8B) clean-local: -rm -f $(BUILT_SOURCES) endif