diff options
author | Dave Airlie <airlied@linux.ie> | 2007-04-22 15:18:14 +1000 |
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committer | Dave Airlie <airlied@linux.ie> | 2007-04-22 15:18:14 +1000 |
commit | a6b98e0a2e15f4fe1a3f3d928c64bdc0f91984f1 (patch) | |
tree | 6c3beb06d39edfd4286b2f0a976e5a533ba1f0bb | |
parent | 0cbed35d4b8aec9305444e649e7c7b7e219d92a0 (diff) | |
download | xorg-driver-xf86-video-nouveau-a6b98e0a2e15f4fe1a3f3d928c64bdc0f91984f1.tar.gz |
nv28: VGA reg 0x59 appears to enable/disable the DVI output somehow
-rw-r--r-- | src/nv_crtc.c | 4 | ||||
-rw-r--r-- | src/nvreg.h | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/nv_crtc.c b/src/nv_crtc.c index e924924..3840cf1 100644 --- a/src/nv_crtc.c +++ b/src/nv_crtc.c @@ -863,6 +863,8 @@ nv_crtc_mode_set_regs(xf86CrtcPtr crtc, DisplayModePtr mode) if (is_fp) { regp->CRTC[NV_VGA_CRTCX_LCD] = savep->CRTC[NV_VGA_CRTCX_LCD] | 1; + /* this turns on the DFP on nv28 outputs */ + regp->CRTC[NV_VGA_CRTCX_59] = savep->CRTC[NV_VGA_CRTCX_59] | 1; } else { regp->CRTC[NV_VGA_CRTCX_LCD] = savep->CRTC[NV_VGA_CRTCX_LCD] & ~1; } @@ -1163,6 +1165,7 @@ static void nv_crtc_load_state_ext(xf86CrtcPtr crtc, RIVA_HW_STATE *state) NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_FP_HTIMING, regp->CRTC[NV_VGA_CRTCX_FP_HTIMING]); NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_FP_VTIMING, regp->CRTC[NV_VGA_CRTCX_FP_VTIMING]); + NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_59, regp->CRTC[NV_VGA_CRTCX_59]); NVWriteVgaCrtc(crtc, NV_VGA_CRTCX_EXTRA, regp->CRTC[NV_VGA_CRTCX_EXTRA]); } @@ -1229,6 +1232,7 @@ static void nv_crtc_save_state_ext(xf86CrtcPtr crtc, RIVA_HW_STATE *state) regp = &state->crtc_reg[nv_crtc->crtc]; + regp->CRTC[NV_VGA_CRTCX_59] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_59); regp->CRTC[NV_VGA_CRTCX_LCD] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_LCD); regp->CRTC[NV_VGA_CRTCX_REPAINT0] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_REPAINT0); regp->CRTC[NV_VGA_CRTCX_REPAINT1] = NVReadVgaCrtc(crtc, NV_VGA_CRTCX_REPAINT1); diff --git a/src/nvreg.h b/src/nvreg.h index e79e521..458a04e 100644 --- a/src/nvreg.h +++ b/src/nvreg.h @@ -120,6 +120,7 @@ #define NV_VGA_CRTCX_FIFO_LWM_NV30 0x47 #define NV_VGA_CRTCX_FP_HTIMING 0x53 #define NV_VGA_CRTCX_FP_VTIMING 0x54 +#define NV_VGA_CRTCX_59 0x59 #define NV_PGRAPH_STATUS (0x00000700) #define NV_PFIFO_RAMHT (0x00000210) |