diff options
| author | Dave Airlie <airlied@starflyer-ubuntu.(none)> | 2006-08-30 00:48:23 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@starflyer-ubuntu.(none)> | 2006-08-30 00:48:23 +1000 |
| commit | 6d5b1765e10856a7dfa75c27ad96f547dc26b23a (patch) | |
| tree | 585fcf5a2667817c683b02c660ccde79be31ac0f /src/nv_hw.c | |
| parent | 6140bdfe6959cd0f6ce8e06d34b6e838d8cef046 (diff) | |
| download | xorg-driver-xf86-video-nouveau-6d5b1765e10856a7dfa75c27ad96f547dc26b23a.tar.gz | |
remove PEXTDEV and PTIMER using macros
Diffstat (limited to 'src/nv_hw.c')
| -rw-r--r-- | src/nv_hw.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/nv_hw.c b/src/nv_hw.c index e3a05aa..ee9d29a 100644 --- a/src/nv_hw.c +++ b/src/nv_hw.c @@ -423,7 +423,7 @@ static void nv4UpdateArbitrationSettings ( sim_data.pix_bpp = (char)pixelDepth; sim_data.enable_video = 0; sim_data.enable_mp = 0; - sim_data.memory_width = (pNv->PEXTDEV[0x0000/4] & 0x10) ? 128 : 64; + sim_data.memory_width = (nvReadEXTDEV(pNv, 0x0000) & 0x10) ? 128 : 64; sim_data.mem_latency = (char)cfg1 & 0x0F; sim_data.mem_aligned = 1; sim_data.mem_page_miss = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01)); @@ -651,7 +651,7 @@ static void nv10UpdateArbitrationSettings ( sim_data.enable_video = 1; sim_data.enable_mp = 0; sim_data.memory_type = (nvReadFB(pNv, 0x0200) & 0x01) ? 1 : 0; - sim_data.memory_width = (pNv->PEXTDEV[0x0000/4] & 0x10) ? 128 : 64; + sim_data.memory_width = (nvReadEXTDEV(pNv, 0x0000) & 0x10) ? 128 : 64; sim_data.mem_latency = (char)cfg1 & 0x0F; sim_data.mem_aligned = 1; sim_data.mem_page_miss = (char)(((cfg1>>4) &0x0F) + ((cfg1>>31) & 0x01)); @@ -964,11 +964,11 @@ void NVLoadStateExt ( nvWriteMC(pNv, 0x0200, 0xFFFF00FF); nvWriteMC(pNv, 0x0200, 0xFFFFFFFF); - pNv->PTIMER[0x0200] = 0x00000008; - pNv->PTIMER[0x0210] = 0x00000003; + nvWriteTIMER(pNv, 0x0200, 0x00000008); + nvWriteTIMER(pNv, 0x0210, 0x00000003); /*TODO: DRM handle PTIMER interrupts */ - pNv->PTIMER[0x0140] = 0x00000000; - pNv->PTIMER[0x0100] = 0xFFFFFFFF; + nvWriteTIMER(pNv, 0x0140, 0x00000000); + nvWriteTIMER(pNv, 0x0100, 0xFFFFFFFF); /* begin surfaces */ /* it seems those regions are equivalent to the radeon's SURFACEs. needs to go in-kernel just like the SURFACEs */ |