diff options
-rw-r--r-- | src/Makefile.am | 7 | ||||
-rw-r--r-- | src/nv50_cursor.c | 104 | ||||
-rw-r--r-- | src/nv50_cursor.h | 12 | ||||
-rw-r--r-- | src/nv50_dac.c | 199 | ||||
-rw-r--r-- | src/nv50_display.c | 535 | ||||
-rw-r--r-- | src/nv50_display.h | 22 | ||||
-rw-r--r-- | src/nv50_output.c | 372 | ||||
-rw-r--r-- | src/nv50_output.h | 34 | ||||
-rw-r--r-- | src/nv50_sor.c | 152 | ||||
-rw-r--r-- | src/nv50_type.h | 22 | ||||
-rw-r--r-- | src/nv_accel_common.c | 1 | ||||
-rw-r--r-- | src/nv_dma.c | 3 | ||||
-rw-r--r-- | src/nv_driver.c | 3672 | ||||
-rw-r--r-- | src/nv_setup.c | 9 | ||||
-rw-r--r-- | src/nv_type.h | 14 |
15 files changed, 3379 insertions, 1779 deletions
diff --git a/src/Makefile.am b/src/Makefile.am index b53ebd9..c45c7d4 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -55,7 +55,12 @@ nouveau_drv_la_SOURCES = \ nv_xaa.c \ nv_output.c \ nv_crtc.c \ - nv_i2c.c \ + nv_i2c.c \ + nv50_cursor.c \ + nv50_dac.c \ + nv50_display.c \ + nv50_output.c \ + nv50_sor.c \ nv30_exa.c #riva128_la_LTLIBRARIES = riva128.la diff --git a/src/nv50_cursor.c b/src/nv50_cursor.c new file mode 100644 index 0000000..9b51afa --- /dev/null +++ b/src/nv50_cursor.c @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2007 NVIDIA, Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <string.h> + +#include <cursorstr.h> + +#include "nv_include.h" +#include "nv50_type.h" +#include "nv50_cursor.h" +#include "nv50_display.h" + +#define CURSOR_PTR ((CARD32*)pNv->Cursor->map) + +void NV50SetCursorPosition(xf86CrtcPtr crtc, int x, int y) +{ + NVPtr pNv = NVPTR(crtc->scrn); + const int headOff = 0x1000*NV50CrtcGetHead(crtc); + + x &= 0xffff; + y &= 0xffff; + pNv->REGS[(0x00647084 + headOff)/4] = y << 16 | x; + pNv->REGS[(0x00647080 + headOff)/4] = 0; +} + +void NV50LoadCursorARGB(xf86CrtcPtr crtc, CARD32 *src) +{ + NVPtr pNv = NVPTR(crtc->scrn); + CARD32 *dst = CURSOR_PTR; + + /* Assume cursor is 64x64 */ + memcpy(dst, src, 64 * 64 * 4); +} + +Bool NV50CursorAcquire(ScrnInfoPtr pScrn) +{ + NVPtr pNv = NVPTR(pScrn); + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + int i; + + if(!pNv->HWCursor) return TRUE; + + /* Initialize the cursor on each head */ + for(i = 0; i < xf86_config->num_crtc; i++) { + const int headOff = 0x10 * NV50CrtcGetHead(xf86_config->crtc[i]); + + pNv->REGS[(0x00610270+headOff)/4] = 0x2000; + while(pNv->REGS[(0x00610270+headOff)/4] & 0x30000); + + pNv->REGS[(0x00610270+headOff)/4] = 1; + while((pNv->REGS[(0x00610270+headOff)/4] & 0x30000) != 0x10000); + } + + return TRUE; +} + +void NV50CursorRelease(ScrnInfoPtr pScrn) +{ + NVPtr pNv = NVPTR(pScrn); + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + int i; + + if(!pNv->HWCursor) return; + + /* Release the cursor on each head */ + for(i = 0; i < xf86_config->num_crtc; i++) { + const int headOff = 0x10 * NV50CrtcGetHead(xf86_config->crtc[i]); + + pNv->REGS[(0x00610270+headOff)/4] = 0; + while(pNv->REGS[(0x00610270+headOff)/4] & 0x30000); + } +} + +Bool NV50CursorInit(ScreenPtr pScreen) +{ + return xf86_cursors_init(pScreen, 64, 64, + HARDWARE_CURSOR_TRUECOLOR_AT_8BPP | + HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_32 | + HARDWARE_CURSOR_ARGB); +} diff --git a/src/nv50_cursor.h b/src/nv50_cursor.h new file mode 100644 index 0000000..c856780 --- /dev/null +++ b/src/nv50_cursor.h @@ -0,0 +1,12 @@ +#ifndef __NV50_CURSOR_H__ +#define __NV50_CURSOR_H__ + +Bool NV50CursorInit(ScreenPtr); +Bool NV50CursorAcquire(ScrnInfoPtr); +void NV50CursorRelease(ScrnInfoPtr); + +/* CRTC cursor functions */ +void NV50SetCursorPosition(xf86CrtcPtr crtc, int x, int y); +void NV50LoadCursorARGB(xf86CrtcPtr crtc, CARD32 *src); + +#endif diff --git a/src/nv50_dac.c b/src/nv50_dac.c new file mode 100644 index 0000000..fcb4e97 --- /dev/null +++ b/src/nv50_dac.c @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2007 NVIDIA, Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <unistd.h> + +#define DPMS_SERVER +#include <X11/extensions/dpms.h> + +#include "nv_include.h" +#include "nv50_display.h" +#include "nv50_output.h" + +static void +NV50DacSetPClk(xf86OutputPtr output, int pclk) +{ + NVPtr pNv = NVPTR(output->scrn); + NV50OutputPrivPtr pPriv = output->driver_private; + const int orOff = 0x800 * pPriv->or; + + pNv->REGS[(0x00614280+orOff)/4] = 0; +} + +static void +NV50DacDPMSSet(xf86OutputPtr output, int mode) +{ + NVPtr pNv = NVPTR(output->scrn); + NV50OutputPrivPtr pPriv = output->driver_private; + const int off = 0x800 * pPriv->or; + CARD32 tmp; + + /* + * DPMSModeOn everything on + * DPMSModeStandby hsync disabled, vsync enabled + * DPMSModeSuspend hsync enabled, vsync disabled + * DPMSModeOff sync disabled + */ + while(pNv->REGS[(0x0061A004+off)/4] & 0x80000000); + + tmp = pNv->REGS[(0x0061A004+off)/4]; + tmp &= ~0x7f; + tmp |= 0x80000000; + + if(mode == DPMSModeStandby || mode == DPMSModeOff) + tmp |= 1; + if(mode == DPMSModeSuspend || mode == DPMSModeOff) + tmp |= 4; + if(mode != DPMSModeOn) + tmp |= 0x10; + if(mode == DPMSModeOff) + tmp |= 0x40; + + pNv->REGS[(0x0061A004+off)/4] = tmp; +} + +static void +NV50DacModeSet(xf86OutputPtr output, DisplayModePtr mode, + DisplayModePtr adjusted_mode) +{ + ScrnInfoPtr pScrn = output->scrn; + NV50OutputPrivPtr pPriv = output->driver_private; + const int dacOff = 0x80 * pPriv->or; + + if(!adjusted_mode) { + C(0x00000400 + dacOff, 0); + return; + } + + // This wouldn't be necessary, but the server is stupid and calls + // NV50DacDPMSSet after the output is disconnected, even though the hardware + // turns it off automatically. + NV50DacDPMSSet(output, DPMSModeOn); + + C(0x00000400 + dacOff, + (NV50CrtcGetHead(output->crtc) == HEAD0 ? 1 : 2) | 0x40); + C(0x00000404 + dacOff, + (adjusted_mode->Flags & V_NHSYNC) ? 1 : 0 | + (adjusted_mode->Flags & V_NVSYNC) ? 2 : 0); +} + +/* + * Perform DAC load detection to determine if there is a connected display. + */ +static xf86OutputStatus +NV50DacDetect(xf86OutputPtr output) +{ + NV50OutputPrivPtr pPriv = output->driver_private; + + /* Assume physical status isn't going to change before the BlockHandler */ + if(pPriv->cached_status != XF86OutputStatusUnknown) + return pPriv->cached_status; + + NV50OutputPartnersDetect(output, pPriv->partner, pPriv->i2c); + return pPriv->cached_status; +} + +Bool +NV50DacLoadDetect(xf86OutputPtr output) +{ + ScrnInfoPtr pScrn = output->scrn; + NVPtr pNv = NVPTR(pScrn); + NV50OutputPrivPtr pPriv = output->driver_private; + const int scrnIndex = pScrn->scrnIndex; + const int dacOff = 2048 * pPriv->or; + CARD32 load, tmp, tmp2; + + xf86DrvMsg(scrnIndex, X_PROBED, "Trying load detection on VGA%i ... ", + pPriv->or); + + pNv->REGS[(0x0061A010+dacOff)/4] = 0x00000001; + tmp2 = pNv->REGS[(0x0061A004+dacOff)/4]; + pNv->REGS[(0x0061A004+dacOff)/4] = 0x80150000; + while(pNv->REGS[(0x0061A004+dacOff)/4] & 0x80000000); + tmp = pNv->_Chipset == 0x50 ? 420 : 340; + pNv->REGS[(0x0061A00C+dacOff)/4] = tmp | 0x100000; + usleep(4500); + load = pNv->REGS[(0x0061A00C+dacOff)/4]; + pNv->REGS[(0x0061A00C+dacOff)/4] = 0; + pNv->REGS[(0x0061A004+dacOff)/4] = 0x80000000 | tmp2; + + // Use this DAC if all three channels show load. + if((load & 0x38000000) == 0x38000000) { + xf86ErrorF("found one!\n"); + return TRUE; + } + + xf86ErrorF("nothing.\n"); + return FALSE; +} + +static void +NV50DacDestroy(xf86OutputPtr output) +{ + NV50OutputDestroy(output); + + xfree(output->driver_private); + output->driver_private = NULL; +} + +static const xf86OutputFuncsRec NV50DacOutputFuncs = { + .dpms = NV50DacDPMSSet, + .save = NULL, + .restore = NULL, + .mode_valid = NV50OutputModeValid, + .mode_fixup = NV50OutputModeFixup, + .prepare = NV50OutputPrepare, + .commit = NV50OutputCommit, + .mode_set = NV50DacModeSet, + .detect = NV50DacDetect, + .get_modes = NV50OutputGetDDCModes, + .destroy = NV50DacDestroy, +}; + +xf86OutputPtr +NV50CreateDac(ScrnInfoPtr pScrn, ORNum or) +{ + NV50OutputPrivPtr pPriv = xnfcalloc(sizeof(*pPriv), 1); + xf86OutputPtr output; + char orName[5]; + + if(!pPriv) + return FALSE; + + snprintf(orName, 5, "VGA%i", or); + output = xf86OutputCreate(pScrn, &NV50DacOutputFuncs, orName); + + pPriv->type = DAC; + pPriv->or = or; + pPriv->cached_status = XF86OutputStatusUnknown; + pPriv->set_pclk = NV50DacSetPClk; + output->driver_private = pPriv; + output->interlaceAllowed = TRUE; + output->doubleScanAllowed = TRUE; + + return output; +} diff --git a/src/nv50_display.c b/src/nv50_display.c new file mode 100644 index 0000000..3eeb283 --- /dev/null +++ b/src/nv50_display.c @@ -0,0 +1,535 @@ +/* + * Copyright (c) 2007 NVIDIA, Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <float.h> +#include <math.h> +#include <strings.h> +#include <unistd.h> + +#include "nv_include.h" +#include "nv50_type.h" +#include "nv50_cursor.h" +#include "nv50_display.h" +#include "nv50_output.h" + +typedef struct NV50CrtcPrivRec { + Head head; + int pclk; /* Target pixel clock in kHz */ + Bool cursorVisible; +} NV50CrtcPrivRec, *NV50CrtcPrivPtr; + +static void NV50CrtcShowHideCursor(xf86CrtcPtr crtc, Bool show, Bool update); + +/* + * PLL calculation. pclk is in kHz. + */ +static void +NV50CalcPLL(float pclk, int *pNA, int *pMA, int *pNB, int *pMB, int *pP) +{ + const float refclk = 27000.0f; + const float minVcoA = 100000; + const float maxVcoA = 400000; + const float minVcoB = 600000; + float maxVcoB = 1400000; + const float minUA = 2000; + const float maxUA = 400000; + const float minUB = 50000; + const float maxUB = 200000; + const int minNA = 1, maxNA = 255; + const int minNB = 1, maxNB = 31; + const int minMA = 1, maxMA = 255; + const int minMB = 1, maxMB = 31; + const int minP = 0, maxP = 6; + int lowP, highP; + float vcoB; + + int na, ma, nb, mb, p; + float bestError = FLT_MAX; + + *pNA = *pMA = *pNB = *pMB = *pP = 0; + + if(maxVcoB < pclk + pclk / 200) + maxVcoB = pclk + pclk / 200; + if(minVcoB / (1 << maxP) > pclk) + pclk = minVcoB / (1 << maxP); + + vcoB = maxVcoB - maxVcoB / 200; + lowP = minP; + vcoB /= 1 << (lowP + 1); + + while(pclk <= vcoB && lowP < maxP) + { + vcoB /= 2; + lowP++; + } + + vcoB = maxVcoB + maxVcoB / 200; + highP = lowP; + vcoB /= 1 << (highP + 1); + + while(pclk <= vcoB && highP < maxP) + { + vcoB /= 2; + highP++; + } + + for(p = lowP; p <= highP; p++) + { + for(ma = minMA; ma <= maxMA; ma++) + { + if(refclk / ma < minUA) + break; + else if(refclk / ma > maxUA) + continue; + + for(na = minNA; na <= maxNA; na++) + { + if(refclk * na / ma < minVcoA || refclk * na / ma > maxVcoA) + continue; + + for(mb = minMB; mb <= maxMB; mb++) + { + if(refclk * na / ma / mb < minUB) + break; + else if(refclk * na / ma / mb > maxUB) + continue; + + nb = rint(pclk * (1 << p) * (ma / (float)na) * mb / refclk); + + if(nb > maxNB) + break; + else if(nb < minNB) + continue; + else + { + float freq = refclk * (na / (float)ma) * (nb / (float)mb) / (1 << p); + float error = fabsf(pclk - freq); + if(error < bestError) { + *pNA = na; + *pMA = ma; + *pNB = nb; + *pMB = mb; + *pP = p; + bestError = error; + } + } + } + } + } + } +} + +static void +NV50CrtcSetPClk(xf86CrtcPtr crtc) +{ + NVPtr pNv = NVPTR(crtc->scrn); + NV50CrtcPrivPtr pPriv = crtc->driver_private; + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(crtc->scrn); + const int headOff = 0x800 * pPriv->head; + int lo_n, lo_m, hi_n, hi_m, p, i; + CARD32 lo = pNv->REGS[(0x00614104+headOff)/4]; + CARD32 hi = pNv->REGS[(0x00614108+headOff)/4]; + + pNv->REGS[(0x00614100+headOff)/4] = 0x10000610; + lo &= 0xff00ff00; + hi &= 0x8000ff00; + + NV50CalcPLL(pPriv->pclk, &lo_n, &lo_m, &hi_n, &hi_m, &p); + + lo |= (lo_m << 16) | lo_n; + hi |= (p << 28) | (hi_m << 16) | hi_n; + pNv->REGS[(0x00614104+headOff)/4] = lo; + pNv->REGS[(0x00614108+headOff)/4] = hi; + pNv->REGS[(0x00614200+headOff)/4] = 0; + + for(i = 0; i < xf86_config->num_output; i++) { + xf86OutputPtr output = xf86_config->output[i]; + + if(output->crtc != crtc) + continue; + NV50OutputSetPClk(output, pPriv->pclk); + } +} + +void +NV50DispCommand(ScrnInfoPtr pScrn, CARD32 addr, CARD32 data) +{ + NVPtr pNv = NVPTR(pScrn); + + pNv->REGS[0x00610304/4] = data; + pNv->REGS[0x00610300/4] = addr | 0x80010001; + + while(pNv->REGS[0x00610300/4] & 0x80000000) { + const int super = ffs((pNv->REGS[0x00610024/4] >> 4) & 7); + + if(super) { + if(super == 2) { + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + const CARD32 r = pNv->REGS[0x00610030/4]; + int i; + + for(i = 0; i < xf86_config->num_crtc; i++) + { + xf86CrtcPtr crtc = xf86_config->crtc[i]; + NV50CrtcPrivPtr pPriv = crtc->driver_private; + + if(r & (0x200 << pPriv->head)) + NV50CrtcSetPClk(crtc); + } + } + + pNv->REGS[0x00610024/4] = 8 << super; + pNv->REGS[0x00610030/4] = 0x80000000; + } + } +} + +Head +NV50CrtcGetHead(xf86CrtcPtr crtc) +{ + NV50CrtcPrivPtr pPriv = crtc->driver_private; + return pPriv->head; +} + +Bool +NV50DispPreInit(ScrnInfoPtr pScrn) +{ + NVPtr pNv = NVPTR(pScrn); + + pNv->REGS[0x00610184/4] = pNv->REGS[0x00614004/4]; + pNv->REGS[0x00610190/4] = pNv->REGS[0x00616100/4]; + pNv->REGS[0x006101a0/4] = pNv->REGS[0x00616900/4]; + pNv->REGS[0x00610194/4] = pNv->REGS[0x00616104/4]; + pNv->REGS[0x006101a4/4] = pNv->REGS[0x00616904/4]; + pNv->REGS[0x00610198/4] = pNv->REGS[0x00616108/4]; + pNv->REGS[0x006101a8/4] = pNv->REGS[0x00616908/4]; + pNv->REGS[0x0061019C/4] = pNv->REGS[0x0061610C/4]; + pNv->REGS[0x006101ac/4] = pNv->REGS[0x0061690c/4]; + pNv->REGS[0x006101D0/4] = pNv->REGS[0x0061A000/4]; + pNv->REGS[0x006101D4/4] = pNv->REGS[0x0061A800/4]; + pNv->REGS[0x006101D8/4] = pNv->REGS[0x0061B000/4]; + pNv->REGS[0x006101E0/4] = pNv->REGS[0x0061C000/4]; + pNv->REGS[0x006101E4/4] = pNv->REGS[0x0061C800/4]; + pNv->REGS[0x0061c00c/4] = 0x03010700; + pNv->REGS[0x0061c010/4] = 0x0000152f; + pNv->REGS[0x0061c014/4] = 0x00000000; + pNv->REGS[0x0061c018/4] = 0x00245af8; + pNv->REGS[0x0061c80c/4] = 0x03010700; + pNv->REGS[0x0061c810/4] = 0x0000152f; + pNv->REGS[0x0061c814/4] = 0x00000000; + pNv->REGS[0x0061c818/4] = 0x00245af8; + pNv->REGS[0x0061A004/4] = 0x80550000; + pNv->REGS[0x0061A010/4] = 0x00000001; + pNv->REGS[0x0061A804/4] = 0x80550000; + pNv->REGS[0x0061A810/4] = 0x00000001; + pNv->REGS[0x0061B004/4] = 0x80550000; + pNv->REGS[0x0061B010/4] = 0x00000001; + + return TRUE; +} + +Bool +NV50DispInit(ScrnInfoPtr pScrn) +{ + NVPtr pNv = NVPTR(pScrn); + + if(pNv->REGS[0x00610024/4] & 0x100) { + pNv->REGS[0x00610024/4] = 0x100; + pNv->REGS[0x006194E8/4] &= ~1; + while(pNv->REGS[0x006194E8/4] & 2); + } + + pNv->REGS[0x00610200/4] = 0x2b00; + while((pNv->REGS[0x00610200/4] & 0x1e0000) != 0); + pNv->REGS[0x00610300/4] = 1; + pNv->REGS[0x00610200/4] = 0x1000b03; + while(!(pNv->REGS[0x00610200/4] & 0x40000000)); + + C(0x00000084, 0); + C(0x00000088, 0); + C(0x00000874, 0); + C(0x00000800, 0); + C(0x00000810, 0); + C(0x0000082C, 0); + + return TRUE; +} + +void +NV50DispShutdown(ScrnInfoPtr pScrn) +{ + NVPtr pNv = NVPTR(pScrn); + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + int i; + + for(i = 0; i < xf86_config->num_crtc; i++) { + xf86CrtcPtr crtc = xf86_config->crtc[i]; + + NV50CrtcBlankScreen(crtc, TRUE); + } + + C(0x00000080, 0); + + for(i = 0; i < xf86_config->num_crtc; i++) { + xf86CrtcPtr crtc = xf86_config->crtc[i]; + + if(crtc->enabled) { + const CARD32 mask = 4 << NV50CrtcGetHead(crtc); + + pNv->REGS[0x00610024/4] = mask; + while(!(pNv->REGS[0x00610024/4] & mask)); + } + } + + pNv->REGS[0x00610200/4] = 0; + pNv->REGS[0x00610300/4] = 0; + while((pNv->REGS[0x00610200/4] & 0x1e0000) != 0); +} + +static Bool +NV50CrtcModeFixup(xf86CrtcPtr crtc, + DisplayModePtr mode, DisplayModePtr adjusted_mode) +{ + // TODO: Fix up the mode here + return TRUE; +} + +static void +NV50CrtcModeSet(xf86CrtcPtr crtc, DisplayModePtr mode, + DisplayModePtr adjusted_mode, int x, int y) +{ + ScrnInfoPtr pScrn = crtc->scrn; + NV50CrtcPrivPtr pPriv = crtc->driver_private; + const int HDisplay = mode->HDisplay, VDisplay = mode->VDisplay; + const int headOff = 0x400 * NV50CrtcGetHead(crtc); + int interlaceDiv, fudge; + + // TODO: Use adjusted_mode and fix it up in NV50CrtcModeFixup + pPriv->pclk = mode->Clock; + + /* Magic mode timing fudge factor */ + fudge = ((mode->Flags & V_INTERLACE) && (mode->Flags & V_DBLSCAN)) ? 2 : 1; + interlaceDiv = (mode->Flags & V_INTERLACE) ? 2 : 1; + + C(0x00000804 + headOff, mode->Clock | 0x800000); + C(0x00000808 + headOff, (mode->Flags & V_INTERLACE) ? 2 : 0); + C(0x00000810 + headOff, 0); + C(0x0000082C + headOff, 0); + C(0x00000814 + headOff, mode->CrtcVTotal << 16 | mode->CrtcHTotal); + C(0x00000818 + headOff, + ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) / interlaceDiv - 1) << 16 | + (mode->CrtcHSyncEnd - mode->CrtcHSyncStart - 1)); + C(0x0000081C + headOff, + ((mode->CrtcVBlankEnd - mode->CrtcVSyncStart) / interlaceDiv - fudge) << 16 | + (mode->CrtcHBlankEnd - mode->CrtcHSyncStart - 1)); + C(0x00000820 + headOff, + ((mode->CrtcVTotal - mode->CrtcVSyncStart + mode->CrtcVBlankStart) / interlaceDiv - fudge) << 16 | + (mode->CrtcHTotal - mode->CrtcHSyncStart + mode->CrtcHBlankStart - 1)); + if(mode->Flags & V_INTERLACE) { + C(0x00000824 + headOff, + ((mode->CrtcVTotal + mode->CrtcVBlankEnd - mode->CrtcVSyncStart) / 2 - 2) << 16 | + ((2*mode->CrtcVTotal - mode->CrtcVSyncStart + mode->CrtcVBlankStart) / 2 - 2)); + } + C(0x00000868 + headOff, pScrn->virtualY << 16 | pScrn->virtualX); + C(0x0000086C + headOff, pScrn->displayWidth * (pScrn->bitsPerPixel / 8) | 0x100000); + switch(pScrn->depth) { + case 8: C(0x00000870 + headOff, 0x1E00); break; + case 15: C(0x00000870 + headOff, 0xE900); break; + case 16: C(0x00000870 + headOff, 0xE800); break; + case 24: C(0x00000870 + headOff, 0xCF00); break; + } + C(0x000008A0 + headOff, 0); + if((mode->Flags & V_DBLSCAN) || (mode->Flags & V_INTERLACE) || + mode->CrtcHDisplay != HDisplay || mode->CrtcVDisplay != VDisplay) { + C(0x000008A4 + headOff, 9); + } else { + C(0x000008A4 + headOff, 0); + } + C(0x000008A8 + headOff, 0x40000); + C(0x000008C0 + headOff, y << 16 | x); + C(0x000008C8 + headOff, VDisplay << 16 | HDisplay); + C(0x000008D4 + headOff, 0); + C(0x000008D8 + headOff, mode->CrtcVDisplay << 16 | mode->CrtcHDisplay); + C(0x000008DC + headOff, mode->CrtcVDisplay << 16 | mode->CrtcHDisplay); + + NV50CrtcBlankScreen(crtc, FALSE); +} + +void +NV50CrtcBlankScreen(xf86CrtcPtr crtc, Bool blank) +{ + ScrnInfoPtr pScrn = crtc->scrn; + NVPtr pNv = NVPTR(pScrn); + NV50CrtcPrivPtr pPriv = crtc->driver_private; + const int headOff = 0x400 * pPriv->head; + + if(blank) { + NV50CrtcShowHideCursor(crtc, FALSE, FALSE); + + C(0x00000840 + headOff, 0); + C(0x00000844 + headOff, 0); + if(pNv->_Chipset != 0x50) + C(0x0000085C + headOff, 0); + C(0x00000874 + headOff, 0); + if(pNv->_Chipset != 0x50) + C(0x0000089C + headOff, 0); + } else { + C(0x00000860 + headOff, 0); + C(0x00000864 + headOff, 0); + pNv->REGS[0x00610380/4] = 0; + /*XXX: in "nv" this is total vram size. our RamAmountKBytes is clamped + * to 256MiB. + */ + pNv->REGS[0x00610384/4] = pNv->RamAmountKBytes * 1024 - 1; + pNv->REGS[0x00610388/4] = 0x150000; + pNv->REGS[0x0061038C/4] = 0; + C(0x00000884 + headOff, pNv->Cursor->offset >> 8); + if(pNv->_Chipset != 0x50) + C(0x0000089C + headOff, 1); + if(pPriv->cursorVisible) + NV50CrtcShowHideCursor(crtc, TRUE, FALSE); + C(0x00000840 + headOff, pScrn->depth == 8 ? 0x80000000 : 0xc0000000); + C(0x00000844 + headOff, pNv->CLUT->offset >> 8); + if(pNv->_Chipset != 0x50) + C(0x0000085C + headOff, 1); + C(0x00000874 + headOff, 1); + } +} + +void +NV50CrtcDPMSSet(xf86CrtcPtr crtc, int mode) +{ +} + +/******************************** Cursor stuff ********************************/ +static void NV50CrtcShowHideCursor(xf86CrtcPtr crtc, Bool show, Bool update) +{ + ScrnInfoPtr pScrn = crtc->scrn; + NV50CrtcPrivPtr pPriv = crtc->driver_private; + const int headOff = 0x400 * NV50CrtcGetHead(crtc); + + C(0x00000880 + headOff, show ? 0x85000000 : 0x5000000); + if(update) { + pPriv->cursorVisible = show; + C(0x00000080, 0); + } +} + +void NV50CrtcShowCursor(xf86CrtcPtr crtc) +{ + NV50CrtcShowHideCursor(crtc, TRUE, TRUE); +} + +void NV50CrtcHideCursor(xf86CrtcPtr crtc) +{ + NV50CrtcShowHideCursor(crtc, FALSE, TRUE); +} + +/******************************** CRTC stuff ********************************/ + +static Bool +NV50CrtcLock(xf86CrtcPtr crtc) +{ + return FALSE; +} + +static void +NV50CrtcPrepare(xf86CrtcPtr crtc) +{ + ScrnInfoPtr pScrn = crtc->scrn; + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + int i; + + for(i = 0; i < xf86_config->num_output; i++) { + xf86OutputPtr output = xf86_config->output[i]; + + if(!output->crtc) + output->funcs->mode_set(output, NULL, NULL); + } +} + +static void +NV50CrtcCommit(xf86CrtcPtr crtc) +{ + ScrnInfoPtr pScrn = crtc->scrn; + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(crtc->scrn); + int i, crtc_mask = 0; + + /* If any heads are unused, blank them */ + for(i = 0; i < xf86_config->num_output; i++) { + xf86OutputPtr output = xf86_config->output[i]; + + if(output->crtc) + /* XXXagp: This assumes that xf86_config->crtc[i] is HEADi */ + crtc_mask |= 1 << NV50CrtcGetHead(output->crtc); + } + + for(i = 0; i < xf86_config->num_crtc; i++) + if(!((1 << i) & crtc_mask)) + NV50CrtcBlankScreen(xf86_config->crtc[i], TRUE); + + C(0x00000080, 0); +} + +static const xf86CrtcFuncsRec nv50_crtc_funcs = { + .dpms = NV50CrtcDPMSSet, + .save = NULL, + .restore = NULL, + .lock = NV50CrtcLock, + .unlock = NULL, + .mode_fixup = NV50CrtcModeFixup, + .prepare = NV50CrtcPrepare, + .mode_set = NV50CrtcModeSet, + // .gamma_set = NV50DispGammaSet, + .commit = NV50CrtcCommit, + .shadow_create = NULL, + .shadow_destroy = NULL, + .set_cursor_position = NV50SetCursorPosition, + .show_cursor = NV50CrtcShowCursor, + .hide_cursor = NV50CrtcHideCursor, + .load_cursor_argb = NV50LoadCursorARGB, + .destroy = NULL, +}; + +void +NV50DispCreateCrtcs(ScrnInfoPtr pScrn) +{ + Head head; + xf86CrtcPtr crtc; + NV50CrtcPrivPtr nv50_crtc; + + /* Create a "crtc" object for each head */ + for(head = HEAD0; head <= HEAD1; head++) { + crtc = xf86CrtcCreate(pScrn, &nv50_crtc_funcs); + if(!crtc) return; + + nv50_crtc = xnfcalloc(sizeof(*nv50_crtc), 1); + nv50_crtc->head = head; + crtc->driver_private = nv50_crtc; + } +} diff --git a/src/nv50_display.h b/src/nv50_display.h new file mode 100644 index 0000000..4f43e32 --- /dev/null +++ b/src/nv50_display.h @@ -0,0 +1,22 @@ +#ifndef __NV50_DISPLAY_H__ +#define __NV50_DISPLAY_H__ + +#include "nv50_type.h" + +Bool NV50DispPreInit(ScrnInfoPtr); +Bool NV50DispInit(ScrnInfoPtr); +void NV50DispShutdown(ScrnInfoPtr); + +void NV50DispCommand(ScrnInfoPtr, CARD32 addr, CARD32 data); +#define C(mthd, data) NV50DispCommand(pScrn, (mthd), (data)) + +Head NV50CrtcGetHead(xf86CrtcPtr); + +void NV50CrtcBlankScreen(xf86CrtcPtr, Bool blank); +void NV50CrtcEnableCursor(xf86CrtcPtr, Bool update); +void NV50CrtcDisableCursor(xf86CrtcPtr, Bool update); +void NV50CrtcSetCursorPosition(xf86CrtcPtr, int x, int y); + +void NV50DispCreateCrtcs(ScrnInfoPtr pScrn); + +#endif diff --git a/src/nv50_output.c b/src/nv50_output.c new file mode 100644 index 0000000..74ea05e --- /dev/null +++ b/src/nv50_output.c @@ -0,0 +1,372 @@ +/* + * Copyright (c) 2007 NVIDIA, Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <strings.h> +#include <xf86DDC.h> + +#include "nv_include.h" +#include "nv50_type.h" +#include "nv50_output.h" + +static unsigned const char * +NV50GetVBIOSImage(NVPtr pNv) +{ + unsigned char *VBIOS; + uint32_t old_bar0_pramin; + + VBIOS = xalloc(65536); + if (VBIOS) { + old_bar0_pramin = pNv->REGS[0x1700/4]; + pNv->REGS[0x1700/4] = pNv->REGS[0x00619f04/4] >> 8; + + memcpy(VBIOS, (const void *)&pNv->REGS[0x700000/4], 65536); + + pNv->REGS[0x1700/4] = old_bar0_pramin; + } + + return (unsigned const char *)VBIOS; +} + +static Bool NV50ReadPortMapping(int scrnIndex, NVPtr pNv) +{ + unsigned const char *VBIOS; + unsigned char *table2; + unsigned char headerSize, entries; + int i; + CARD16 a; + CARD32 b; + + VBIOS = NV50GetVBIOSImage(pNv); + if (!VBIOS) + goto fail; + + /* Clear the i2c map to invalid */ + for(i = 0; i < 4; i++) + pNv->i2cMap[i].dac = pNv->i2cMap[i].sor = -1; + + if(*(CARD16*)VBIOS != 0xaa55) goto fail; + + a = *(CARD16*)(VBIOS + 0x36); + table2 = (unsigned char*)VBIOS + a; + + if(table2[0] != 0x40) goto fail; + + b = *(CARD32*)(table2 + 6); + if(b != 0x4edcbdcb) goto fail; + + headerSize = table2[1]; + entries = table2[2]; + + for(i = 0; i < entries; i++) { + int type, port; + ORNum or; + + b = *(CARD32*)&table2[headerSize + 8*i]; + type = b & 0xf; + port = (b >> 4) & 0xf; + or = ffs((b >> 24) & 0xf) - 1; + + if(type < 4 && port != 0xf) { + switch(type) { + case 0: /* CRT */ + case 1: /* TV */ + if(pNv->i2cMap[port].dac != -1) { + xf86DrvMsg(scrnIndex, X_WARNING, + "DDC routing table corrupt! DAC %i -> %i " + "for port %i\n", + or, pNv->i2cMap[port].dac, port); + } + pNv->i2cMap[port].dac = or; + break; + case 2: /* TMDS */ + case 3: /* LVDS */ + if(pNv->i2cMap[port].sor != -1) + xf86DrvMsg(scrnIndex, X_WARNING, + "DDC routing table corrupt! SOR %i -> %i " + "for port %i\n", + or, pNv->i2cMap[port].sor, port); + pNv->i2cMap[port].sor = or; + break; + } + } + } + + xf86DrvMsg(scrnIndex, X_PROBED, "I2C map:\n"); + for(i = 0; i < 4; i++) { + if(pNv->i2cMap[i].dac != -1) + xf86DrvMsg(scrnIndex, X_PROBED, " Bus %i -> DAC%i\n", i, pNv->i2cMap[i].dac); + if(pNv->i2cMap[i].sor != -1) + xf86DrvMsg(scrnIndex, X_PROBED, " Bus %i -> SOR%i\n", i, pNv->i2cMap[i].sor); + } + + return TRUE; + +fail: + xf86DrvMsg(scrnIndex, X_ERROR, "Couldn't find the DDC routing table. " + "Mode setting will probably fail!\n"); + return FALSE; +} + +static void NV50_I2CPutBits(I2CBusPtr b, int clock, int data) +{ + NVPtr pNv = NVPTR(xf86Screens[b->scrnIndex]); + const int off = b->DriverPrivate.val * 0x18; + + pNv->REGS[(0x0000E138+off)/4] = 4 | clock | data << 1; +} + +static void NV50_I2CGetBits(I2CBusPtr b, int *clock, int *data) +{ + NVPtr pNv = NVPTR(xf86Screens[b->scrnIndex]); + const int off = b->DriverPrivate.val * 0x18; + unsigned char val; + + val = pNv->REGS[(0x0000E138+off)/4]; + *clock = !!(val & 1); + *data = !!(val & 2); +} + +static I2CBusPtr +NV50I2CInit(ScrnInfoPtr pScrn, const char *name, const int port) +{ + I2CBusPtr i2c; + + /* Allocate the I2C bus structure */ + i2c = xf86CreateI2CBusRec(); + if(!i2c) return NULL; + + i2c->BusName = strdup(name); + i2c->scrnIndex = pScrn->scrnIndex; + i2c->I2CPutBits = NV50_I2CPutBits; + i2c->I2CGetBits = NV50_I2CGetBits; + i2c->ByteTimeout = 2200; /* VESA DDC spec 3 p. 43 (+10 %) */ + i2c->StartTimeout = 550; + i2c->BitTimeout = 40; + i2c->ByteTimeout = 40; + i2c->AcknTimeout = 40; + i2c->DriverPrivate.val = port; + + if(xf86I2CBusInit(i2c)) { + return i2c; + } else { + xfree(i2c); + return NULL; + } +} + +void +NV50OutputSetPClk(xf86OutputPtr output, int pclk) +{ + NV50OutputPrivPtr pPriv = output->driver_private; + pPriv->set_pclk(output, pclk); +} + +int +NV50OutputModeValid(xf86OutputPtr output, DisplayModePtr mode) +{ + if(mode->Clock > 400000 || mode->Clock < 25000) + return MODE_CLOCK_RANGE; + + return MODE_OK; +} + +Bool +NV50OutputModeFixup(xf86OutputPtr output, DisplayModePtr mode, + DisplayModePtr adjusted_mode) +{ + return TRUE; +} + +void +NV50OutputPrepare(xf86OutputPtr output) +{ +} + +void +NV50OutputCommit(xf86OutputPtr output) +{ +} + +static xf86MonPtr +ProbeDDC(I2CBusPtr i2c) +{ + ScrnInfoPtr pScrn = xf86Screens[i2c->scrnIndex]; + NVPtr pNv = NVPTR(pScrn); + xf86MonPtr monInfo = NULL; + const int bus = i2c->DriverPrivate.val, off = bus * 0x18; + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Probing for EDID on I2C bus %i...\n", bus); + pNv->REGS[(0x0000E138+off)/4] = 7; + /* Should probably use xf86OutputGetEDID here */ + monInfo = xf86DoEDID_DDC2(pScrn->scrnIndex, i2c); + pNv->REGS[(0x0000E138+off)/4] = 3; + + if(monInfo) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "DDC detected a %s:\n", monInfo->features.input_type ? + "DFP" : "CRT"); + xf86PrintEDID(monInfo); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, " ... none found\n"); + } + + return monInfo; +} + +/* + * Read an EDID from the i2c port. Perform load detection on the DAC (if + * present) to see if the display is connected via VGA. Sets the cached status + * of both outputs. The status is marked dirty again in the BlockHandler. + */ +void NV50OutputPartnersDetect(xf86OutputPtr dac, xf86OutputPtr sor, I2CBusPtr i2c) +{ + xf86MonPtr monInfo = ProbeDDC(i2c); + xf86OutputPtr connected = NULL; + Bool load = dac && NV50DacLoadDetect(dac); + + if(dac) { + NV50OutputPrivPtr pPriv = dac->driver_private; + + if(load) { + pPriv->cached_status = XF86OutputStatusConnected; + connected = dac; + } else { + pPriv->cached_status = XF86OutputStatusDisconnected; + } + } + + if(sor) { + NV50OutputPrivPtr pPriv = sor->driver_private; + + if(monInfo && !load) { + pPriv->cached_status = XF86OutputStatusConnected; + connected = sor; + } else { + pPriv->cached_status = XF86OutputStatusDisconnected; + } + } + + if(connected) + xf86OutputSetEDID(connected, monInfo); +} + +/* + * Reset the cached output status for all outputs. Called from NV50BlockHandler. + */ +void +NV50OutputResetCachedStatus(ScrnInfoPtr pScrn) +{ + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + int i; + + for(i = 0; i < xf86_config->num_output; i++) { + NV50OutputPrivPtr pPriv = xf86_config->output[i]->driver_private; + pPriv->cached_status = XF86OutputStatusUnknown; + } +} + +DisplayModePtr +NV50OutputGetDDCModes(xf86OutputPtr output) +{ + /* The EDID is read as part of the detect step */ + output->funcs->detect(output); + return xf86OutputGetEDIDModes(output); +} + +void +NV50OutputDestroy(xf86OutputPtr output) +{ + NV50OutputPrivPtr pPriv = output->driver_private; + + if(pPriv->partner) + ((NV50OutputPrivPtr)pPriv->partner->driver_private)->partner = NULL; + else + xf86DestroyI2CBusRec(pPriv->i2c, TRUE, TRUE); + pPriv->i2c = NULL; +} + +Bool +NV50CreateOutputs(ScrnInfoPtr pScrn) +{ + NVPtr pNv = NVPTR(pScrn); + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + int i; + + if(!NV50ReadPortMapping(pScrn->scrnIndex, pNv)) + return FALSE; + + /* For each DDC port, create an output for the attached ORs */ + for(i = 0; i < 4; i++) { + xf86OutputPtr dac = NULL, sor = NULL; + I2CBusPtr i2c; + char i2cName[16]; + + if(pNv->i2cMap[i].dac == -1 && pNv->i2cMap[i].sor == -1) + /* No outputs on this port */ + continue; + + snprintf(i2cName, sizeof(i2cName), "I2C%i", i); + i2c = NV50I2CInit(pScrn, i2cName, i); + if(!i2c) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Failed to initialize I2C for port %i.\n", + i); + continue; + } + + if(pNv->i2cMap[i].dac != -1) + dac = NV50CreateDac(pScrn, pNv->i2cMap[i].dac); + if(pNv->i2cMap[i].sor != -1) + sor = NV50CreateSor(pScrn, pNv->i2cMap[i].sor); + + if(dac) { + NV50OutputPrivPtr pPriv = dac->driver_private; + + pPriv->partner = sor; + pPriv->i2c = i2c; + } + if(sor) { + NV50OutputPrivPtr pPriv = sor->driver_private; + + pPriv->partner = dac; + pPriv->i2c = i2c; + } + } + + /* For each output, set the crtc and clone masks */ + for(i = 0; i < xf86_config->num_output; i++) { + xf86OutputPtr output = xf86_config->output[i]; + + /* Any output can connect to any head */ + output->possible_crtcs = 0x3; + output->possible_clones = 0; + } + + return TRUE; +} diff --git a/src/nv50_output.h b/src/nv50_output.h new file mode 100644 index 0000000..4fac55a --- /dev/null +++ b/src/nv50_output.h @@ -0,0 +1,34 @@ +#ifndef __NV50_OUTPUT_H__ +#define __NV50_OUTPUT_H__ + +typedef struct NV50OutputPrivRec { + ORType type; + ORNum or; + + xf86OutputPtr partner; + I2CBusPtr i2c; + + xf86OutputStatus cached_status; + + void (*set_pclk)(xf86OutputPtr, int pclk); +} NV50OutputPrivRec, *NV50OutputPrivPtr; + +void NV50OutputSetPClk(xf86OutputPtr, int pclk); +int NV50OutputModeValid(xf86OutputPtr, DisplayModePtr); +Bool NV50OutputModeFixup(xf86OutputPtr, DisplayModePtr mode, DisplayModePtr adjusted_mode); +void NV50OutputPrepare(xf86OutputPtr); +void NV50OutputCommit(xf86OutputPtr); +void NV50OutputPartnersDetect(xf86OutputPtr dac, xf86OutputPtr sor, I2CBusPtr i2c); +void NV50OutputResetCachedStatus(ScrnInfoPtr); +DisplayModePtr NV50OutputGetDDCModes(xf86OutputPtr); +void NV50OutputDestroy(xf86OutputPtr); +Bool NV50CreateOutputs(ScrnInfoPtr); + +/* nv50_dac.c */ +xf86OutputPtr NV50CreateDac(ScrnInfoPtr, ORNum); +Bool NV50DacLoadDetect(xf86OutputPtr); + +/* nv50_sor.c */ +xf86OutputPtr NV50CreateSor(ScrnInfoPtr, ORNum); + +#endif diff --git a/src/nv50_sor.c b/src/nv50_sor.c new file mode 100644 index 0000000..d33bf4c --- /dev/null +++ b/src/nv50_sor.c @@ -0,0 +1,152 @@ +/* + * Copyright (c) 2007 NVIDIA, Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#define DPMS_SERVER +#include <X11/extensions/dpms.h> + +#include "nv_include.h" +#include "nv50_type.h" +#include "nv50_display.h" +#include "nv50_output.h" + +static void +NV50SorSetPClk(xf86OutputPtr output, int pclk) +{ + NVPtr pNv = NVPTR(output->scrn); + NV50OutputPrivPtr pPriv = output->driver_private; + const int orOff = 0x800 * pPriv->or; + + pNv->REGS[(0x00614300+orOff)/4] = (pclk > 165000) ? 0x101 : 0; +} + +static void +NV50SorDPMSSet(xf86OutputPtr output, int mode) +{ + NVPtr pNv = NVPTR(output->scrn); + NV50OutputPrivPtr pPriv = output->driver_private; + const int off = 0x800 * pPriv->or; + CARD32 tmp; + + while(pNv->REGS[(0x0061C004+off)/4] & 0x80000000); + + tmp = pNv->REGS[(0x0061C004+off)/4]; + tmp |= 0x80000000; + + if(mode == DPMSModeOn) + tmp |= 1; + else + tmp &= ~1; + + pNv->REGS[(0x0061C004+off)/4] = tmp; +} + +static void +NV50SorModeSet(xf86OutputPtr output, DisplayModePtr mode, + DisplayModePtr adjusted_mode) +{ + ScrnInfoPtr pScrn = output->scrn; + NV50OutputPrivPtr pPriv = output->driver_private; + const int sorOff = 0x40 * pPriv->or; + + if(!adjusted_mode) { + /* Disconnect the SOR */ + C(0x00000600 + sorOff, 0); + return; + } + + // This wouldn't be necessary, but the server is stupid and calls + // NV50SorDPMSSet after the output is disconnected, even though the hardware + // turns it off automatically. + NV50SorDPMSSet(output, DPMSModeOn); + + C(0x00000600 + sorOff, + (NV50CrtcGetHead(output->crtc) == HEAD0 ? 1 : 2) | + (adjusted_mode->Clock > 165000 ? 0x500 : 0x100) | + ((adjusted_mode->Flags & V_NHSYNC) ? 0x1000 : 0) | + ((adjusted_mode->Flags & V_NVSYNC) ? 0x2000 : 0)); +} + +static xf86OutputStatus +NV50SorDetect(xf86OutputPtr output) +{ + + NV50OutputPrivPtr pPriv = output->driver_private; + + /* Assume physical status isn't going to change before the BlockHandler */ + if(pPriv->cached_status != XF86OutputStatusUnknown) + return pPriv->cached_status; + + NV50OutputPartnersDetect(pPriv->partner, output, pPriv->i2c); + return pPriv->cached_status; +} + +static void +NV50SorDestroy(xf86OutputPtr output) +{ + NV50OutputDestroy(output); + + xfree(output->driver_private); + output->driver_private = NULL; +} + +static const xf86OutputFuncsRec NV50SorOutputFuncs = { + .dpms = NV50SorDPMSSet, + .save = NULL, + .restore = NULL, + .mode_valid = NV50OutputModeValid, + .mode_fixup = NV50OutputModeFixup, + .prepare = NV50OutputPrepare, + .commit = NV50OutputCommit, + .mode_set = NV50SorModeSet, + .detect = NV50SorDetect, + .get_modes = NV50OutputGetDDCModes, + .destroy = NV50SorDestroy, +}; + +xf86OutputPtr +NV50CreateSor(ScrnInfoPtr pScrn, ORNum or) +{ + NV50OutputPrivPtr pPriv = xnfcalloc(sizeof(*pPriv), 1); + xf86OutputPtr output; + char orName[5]; + + if(!pPriv) + return FALSE; + + snprintf(orName, 5, "DVI%i", or); + output = xf86OutputCreate(pScrn, &NV50SorOutputFuncs, orName); + + pPriv->type = SOR; + pPriv->or = or; + pPriv->cached_status = XF86OutputStatusUnknown; + pPriv->set_pclk = NV50SorSetPClk; + output->driver_private = pPriv; + output->interlaceAllowed = TRUE; + output->doubleScanAllowed = TRUE; + + return output; +} diff --git a/src/nv50_type.h b/src/nv50_type.h new file mode 100644 index 0000000..e3cba74 --- /dev/null +++ b/src/nv50_type.h @@ -0,0 +1,22 @@ +#ifndef __NV50_TYPE_H__ +#define __NV50_TYPE_H__ + +typedef enum Head { + HEAD0 = 0, + HEAD1 +} Head; + +typedef enum ORType { + DAC, + SOR +} ORType; + +typedef enum ORNum { + DAC0 = 0, + DAC1 = 1, + DAC2 = 2, + SOR0 = 0, + SOR1 = 1 +} ORNum; + +#endif diff --git a/src/nv_accel_common.c b/src/nv_accel_common.c index 51bb5a7..2b9b09e 100644 --- a/src/nv_accel_common.c +++ b/src/nv_accel_common.c @@ -410,7 +410,6 @@ NVAccelCommonInit(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); Bool ret; - if(pNv->NoAccel) return TRUE; INIT_CONTEXT_OBJECT(NullObject); INIT_CONTEXT_OBJECT(DmaNotifier0); diff --git a/src/nv_dma.c b/src/nv_dma.c index 6f66e9d..de9566f 100644 --- a/src/nv_dma.c +++ b/src/nv_dma.c @@ -260,9 +260,6 @@ Bool NVInitDma(ScrnInfoPtr pScrn) NVInitDmaCB(pScrn); - if (pNv->NoAccel) - return TRUE; - pNv->fifo.fb_ctxdma_handle = NvDmaFB; pNv->fifo.tt_ctxdma_handle = NvDmaTT; ret = drmCommandWriteRead(pNv->drm_fd, DRM_NOUVEAU_FIFO_ALLOC, diff --git a/src/nv_driver.c b/src/nv_driver.c index ef9efc6..e8ec8c6 100644 --- a/src/nv_driver.c +++ b/src/nv_driver.c @@ -42,33 +42,33 @@ Bool RivaGetScrnInfoRec(PciChipsets *chips, int chip);*/ * Forward definitions for the functions that make up the driver. */ /* Mandatory functions */ -static const OptionInfoRec * NVAvailableOptions(int chipid, int busid); -static void NVIdentify(int flags); -static Bool NVProbe(DriverPtr drv, int flags); -static Bool NVPreInit(ScrnInfoPtr pScrn, int flags); -static Bool NVScreenInit(int Index, ScreenPtr pScreen, int argc, - char **argv); -static Bool NVEnterVT(int scrnIndex, int flags); -static void NVLeaveVT(int scrnIndex, int flags); -static Bool NVCloseScreen(int scrnIndex, ScreenPtr pScreen); -static Bool NVSaveScreen(ScreenPtr pScreen, int mode); +static const OptionInfoRec *NVAvailableOptions(int chipid, int busid); +static void NVIdentify(int flags); +static Bool NVProbe(DriverPtr drv, int flags); +static Bool NVPreInit(ScrnInfoPtr pScrn, int flags); +static Bool NVScreenInit(int Index, ScreenPtr pScreen, int argc, + char **argv); +static Bool NVEnterVT(int scrnIndex, int flags); +static void NVLeaveVT(int scrnIndex, int flags); +static Bool NVCloseScreen(int scrnIndex, ScreenPtr pScreen); +static Bool NVSaveScreen(ScreenPtr pScreen, int mode); /* Optional functions */ -static void NVFreeScreen(int scrnIndex, int flags); +static void NVFreeScreen(int scrnIndex, int flags); static ModeStatus NVValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags); #ifdef RANDR -static Bool NVDriverFunc(ScrnInfoPtr pScrnInfo, xorgDriverFuncOp op, - pointer data); +static Bool NVDriverFunc(ScrnInfoPtr pScrnInfo, xorgDriverFuncOp op, + pointer data); #endif /* Internally used functions */ -static Bool NVMapMem(ScrnInfoPtr pScrn); -static Bool NVUnmapMem(ScrnInfoPtr pScrn); -static void NVSave(ScrnInfoPtr pScrn); -static void NVRestore(ScrnInfoPtr pScrn); -static Bool NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); +static Bool NVMapMem(ScrnInfoPtr pScrn); +static Bool NVUnmapMem(ScrnInfoPtr pScrn); +static void NVSave(ScrnInfoPtr pScrn); +static void NVRestore(ScrnInfoPtr pScrn); +static Bool NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); /* @@ -80,280 +80,277 @@ static Bool NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); */ _X_EXPORT DriverRec NV = { - NV_VERSION, + NV_VERSION, NV_DRIVER_NAME, - NVIdentify, - NVProbe, + NVIdentify, + NVProbe, NVAvailableOptions, - NULL, - 0 + NULL, + 0 }; -struct NvFamily -{ - char *name; - char *chipset; +struct NvFamily { + char *name; + char *chipset; }; -static struct NvFamily NVKnownFamilies[] = -{ - { "RIVA 128", "NV03" }, - { "RIVA TNT", "NV04" }, - { "RIVA TNT2", "NV05" }, - { "GeForce 256", "NV10" }, - { "GeForce 2", "NV11, NV15" }, - { "GeForce 4MX", "NV17, NV18" }, - { "GeForce 3", "NV20" }, - { "GeForce 4Ti", "NV25, NV28" }, - { "GeForce FX", "NV3x" }, - { "GeForce 6", "NV4x" }, - { "GeForce 7", "G7x" }, - { NULL, NULL} +static struct NvFamily NVKnownFamilies[] = { + {"RIVA 128", "NV03"}, + {"RIVA TNT", "NV04"}, + {"RIVA TNT2", "NV05"}, + {"GeForce 256", "NV10"}, + {"GeForce 2", "NV11, NV15"}, + {"GeForce 4MX", "NV17, NV18"}, + {"GeForce 3", "NV20"}, + {"GeForce 4Ti", "NV25, NV28"}, + {"GeForce FX", "NV3x"}, + {"GeForce 6", "NV4x"}, + {"GeForce 7", "G7x"}, + {NULL, NULL} }; /* Known cards as of 2006/06/16 */ -static SymTabRec NVKnownChipsets[] = -{ - { 0x12D20018, "RIVA 128" }, - { 0x12D20019, "RIVA 128ZX" }, - - { 0x10DE0020, "RIVA TNT" }, - - { 0x10DE0028, "RIVA TNT2" }, - { 0x10DE002A, "Unknown TNT2" }, - { 0x10DE002C, "Vanta" }, - { 0x10DE0029, "RIVA TNT2 Ultra" }, - { 0x10DE002D, "RIVA TNT2 Model 64" }, - - { 0x10DE00A0, "Aladdin TNT2" }, - - { 0x10DE0100, "GeForce 256" }, - { 0x10DE0101, "GeForce DDR" }, - { 0x10DE0103, "Quadro" }, - - { 0x10DE0110, "GeForce2 MX/MX 400" }, - { 0x10DE0111, "GeForce2 MX 100/200" }, - { 0x10DE0112, "GeForce2 Go" }, - { 0x10DE0113, "Quadro2 MXR/EX/Go" }, - - { 0x10DE01A0, "GeForce2 Integrated GPU" }, - - { 0x10DE0150, "GeForce2 GTS" }, - { 0x10DE0151, "GeForce2 Ti" }, - { 0x10DE0152, "GeForce2 Ultra" }, - { 0x10DE0153, "Quadro2 Pro" }, - - { 0x10DE0170, "GeForce4 MX 460" }, - { 0x10DE0171, "GeForce4 MX 440" }, - { 0x10DE0172, "GeForce4 MX 420" }, - { 0x10DE0173, "GeForce4 MX 440-SE" }, - { 0x10DE0174, "GeForce4 440 Go" }, - { 0x10DE0175, "GeForce4 420 Go" }, - { 0x10DE0176, "GeForce4 420 Go 32M" }, - { 0x10DE0177, "GeForce4 460 Go" }, - { 0x10DE0178, "Quadro4 550 XGL" }, +static SymTabRec NVKnownChipsets[] = { + {0x12D20018, "RIVA 128"}, + {0x12D20019, "RIVA 128ZX"}, + + {0x10DE0020, "RIVA TNT"}, + + {0x10DE0028, "RIVA TNT2"}, + {0x10DE002A, "Unknown TNT2"}, + {0x10DE002C, "Vanta"}, + {0x10DE0029, "RIVA TNT2 Ultra"}, + {0x10DE002D, "RIVA TNT2 Model 64"}, + + {0x10DE00A0, "Aladdin TNT2"}, + + {0x10DE0100, "GeForce 256"}, + {0x10DE0101, "GeForce DDR"}, + {0x10DE0103, "Quadro"}, + + {0x10DE0110, "GeForce2 MX/MX 400"}, + {0x10DE0111, "GeForce2 MX 100/200"}, + {0x10DE0112, "GeForce2 Go"}, + {0x10DE0113, "Quadro2 MXR/EX/Go"}, + + {0x10DE01A0, "GeForce2 Integrated GPU"}, + + {0x10DE0150, "GeForce2 GTS"}, + {0x10DE0151, "GeForce2 Ti"}, + {0x10DE0152, "GeForce2 Ultra"}, + {0x10DE0153, "Quadro2 Pro"}, + + {0x10DE0170, "GeForce4 MX 460"}, + {0x10DE0171, "GeForce4 MX 440"}, + {0x10DE0172, "GeForce4 MX 420"}, + {0x10DE0173, "GeForce4 MX 440-SE"}, + {0x10DE0174, "GeForce4 440 Go"}, + {0x10DE0175, "GeForce4 420 Go"}, + {0x10DE0176, "GeForce4 420 Go 32M"}, + {0x10DE0177, "GeForce4 460 Go"}, + {0x10DE0178, "Quadro4 550 XGL"}, #if defined(__powerpc__) - { 0x10DE0179, "GeForce4 MX (Mac)" }, + {0x10DE0179, "GeForce4 MX (Mac)"}, #else - { 0x10DE0179, "GeForce4 440 Go 64M" }, + {0x10DE0179, "GeForce4 440 Go 64M"}, #endif - { 0x10DE017A, "Quadro NVS" }, - { 0x10DE017C, "Quadro4 500 GoGL" }, - { 0x10DE017D, "GeForce4 410 Go 16M" }, - - { 0x10DE0181, "GeForce4 MX 440 with AGP8X" }, - { 0x10DE0182, "GeForce4 MX 440SE with AGP8X" }, - { 0x10DE0183, "GeForce4 MX 420 with AGP8X" }, - { 0x10DE0185, "GeForce4 MX 4000" }, - { 0x10DE0186, "GeForce4 448 Go" }, - { 0x10DE0187, "GeForce4 488 Go" }, - { 0x10DE0188, "Quadro4 580 XGL" }, + {0x10DE017A, "Quadro NVS"}, + {0x10DE017C, "Quadro4 500 GoGL"}, + {0x10DE017D, "GeForce4 410 Go 16M"}, + + {0x10DE0181, "GeForce4 MX 440 with AGP8X"}, + {0x10DE0182, "GeForce4 MX 440SE with AGP8X"}, + {0x10DE0183, "GeForce4 MX 420 with AGP8X"}, + {0x10DE0185, "GeForce4 MX 4000"}, + {0x10DE0186, "GeForce4 448 Go"}, + {0x10DE0187, "GeForce4 488 Go"}, + {0x10DE0188, "Quadro4 580 XGL"}, #if defined(__powerpc__) - { 0x10DE0189, "GeForce4 MX with AGP8X (Mac)" }, + {0x10DE0189, "GeForce4 MX with AGP8X (Mac)"}, #endif - { 0x10DE018A, "Quadro4 NVS 280 SD" }, - { 0x10DE018B, "Quadro4 380 XGL" }, - { 0x10DE018C, "Quadro NVS 50 PCI" }, - { 0x10DE018D, "GeForce4 448 Go" }, - - { 0x10DE01F0, "GeForce4 MX Integrated GPU" }, - - { 0x10DE0200, "GeForce3" }, - { 0x10DE0201, "GeForce3 Ti 200" }, - { 0x10DE0202, "GeForce3 Ti 500" }, - { 0x10DE0203, "Quadro DCC" }, - - { 0x10DE0250, "GeForce4 Ti 4600" }, - { 0x10DE0251, "GeForce4 Ti 4400" }, - { 0x10DE0253, "GeForce4 Ti 4200" }, - { 0x10DE0258, "Quadro4 900 XGL" }, - { 0x10DE0259, "Quadro4 750 XGL" }, - { 0x10DE025B, "Quadro4 700 XGL" }, - - { 0x10DE0280, "GeForce4 Ti 4800" }, - { 0x10DE0281, "GeForce4 Ti 4200 with AGP8X" }, - { 0x10DE0282, "GeForce4 Ti 4800 SE" }, - { 0x10DE0286, "GeForce4 4200 Go" }, - { 0x10DE028C, "Quadro4 700 GoGL" }, - { 0x10DE0288, "Quadro4 980 XGL" }, - { 0x10DE0289, "Quadro4 780 XGL" }, - - { 0x10DE0301, "GeForce FX 5800 Ultra" }, - { 0x10DE0302, "GeForce FX 5800" }, - { 0x10DE0308, "Quadro FX 2000" }, - { 0x10DE0309, "Quadro FX 1000" }, - - { 0x10DE0311, "GeForce FX 5600 Ultra" }, - { 0x10DE0312, "GeForce FX 5600" }, - { 0x10DE0314, "GeForce FX 5600XT" }, - { 0x10DE031A, "GeForce FX Go5600" }, - { 0x10DE031B, "GeForce FX Go5650" }, - { 0x10DE031C, "Quadro FX Go700" }, - - { 0x10DE0320, "GeForce FX 5200" }, - { 0x10DE0321, "GeForce FX 5200 Ultra" }, - { 0x10DE0322, "GeForce FX 5200" }, - { 0x10DE0323, "GeForce FX 5200LE" }, - { 0x10DE0324, "GeForce FX Go5200" }, - { 0x10DE0325, "GeForce FX Go5250" }, - { 0x10DE0326, "GeForce FX 5500" }, - { 0x10DE0327, "GeForce FX 5100" }, - { 0x10DE0328, "GeForce FX Go5200 32M/64M" }, + {0x10DE018A, "Quadro4 NVS 280 SD"}, + {0x10DE018B, "Quadro4 380 XGL"}, + {0x10DE018C, "Quadro NVS 50 PCI"}, + {0x10DE018D, "GeForce4 448 Go"}, + + {0x10DE01F0, "GeForce4 MX Integrated GPU"}, + + {0x10DE0200, "GeForce3"}, + {0x10DE0201, "GeForce3 Ti 200"}, + {0x10DE0202, "GeForce3 Ti 500"}, + {0x10DE0203, "Quadro DCC"}, + + {0x10DE0250, "GeForce4 Ti 4600"}, + {0x10DE0251, "GeForce4 Ti 4400"}, + {0x10DE0253, "GeForce4 Ti 4200"}, + {0x10DE0258, "Quadro4 900 XGL"}, + {0x10DE0259, "Quadro4 750 XGL"}, + {0x10DE025B, "Quadro4 700 XGL"}, + + {0x10DE0280, "GeForce4 Ti 4800"}, + {0x10DE0281, "GeForce4 Ti 4200 with AGP8X"}, + {0x10DE0282, "GeForce4 Ti 4800 SE"}, + {0x10DE0286, "GeForce4 4200 Go"}, + {0x10DE028C, "Quadro4 700 GoGL"}, + {0x10DE0288, "Quadro4 980 XGL"}, + {0x10DE0289, "Quadro4 780 XGL"}, + + {0x10DE0301, "GeForce FX 5800 Ultra"}, + {0x10DE0302, "GeForce FX 5800"}, + {0x10DE0308, "Quadro FX 2000"}, + {0x10DE0309, "Quadro FX 1000"}, + + {0x10DE0311, "GeForce FX 5600 Ultra"}, + {0x10DE0312, "GeForce FX 5600"}, + {0x10DE0314, "GeForce FX 5600XT"}, + {0x10DE031A, "GeForce FX Go5600"}, + {0x10DE031B, "GeForce FX Go5650"}, + {0x10DE031C, "Quadro FX Go700"}, + + {0x10DE0320, "GeForce FX 5200"}, + {0x10DE0321, "GeForce FX 5200 Ultra"}, + {0x10DE0322, "GeForce FX 5200"}, + {0x10DE0323, "GeForce FX 5200LE"}, + {0x10DE0324, "GeForce FX Go5200"}, + {0x10DE0325, "GeForce FX Go5250"}, + {0x10DE0326, "GeForce FX 5500"}, + {0x10DE0327, "GeForce FX 5100"}, + {0x10DE0328, "GeForce FX Go5200 32M/64M"}, #if defined(__powerpc__) - { 0x10DE0329, "GeForce FX 5200 (Mac)" }, + {0x10DE0329, "GeForce FX 5200 (Mac)"}, #endif - { 0x10DE032A, "Quadro NVS 55/280 PCI" }, - { 0x10DE032B, "Quadro FX 500/600 PCI" }, - { 0x10DE032C, "GeForce FX Go53xx Series" }, - { 0x10DE032D, "GeForce FX Go5100" }, - - { 0x10DE0330, "GeForce FX 5900 Ultra" }, - { 0x10DE0331, "GeForce FX 5900" }, - { 0x10DE0332, "GeForce FX 5900XT" }, - { 0x10DE0333, "GeForce FX 5950 Ultra" }, - { 0x10DE0334, "GeForce FX 5900ZT" }, - { 0x10DE0338, "Quadro FX 3000" }, - { 0x10DE033F, "Quadro FX 700" }, - - { 0x10DE0341, "GeForce FX 5700 Ultra" }, - { 0x10DE0342, "GeForce FX 5700" }, - { 0x10DE0343, "GeForce FX 5700LE" }, - { 0x10DE0344, "GeForce FX 5700VE" }, - { 0x10DE0347, "GeForce FX Go5700" }, - { 0x10DE0348, "GeForce FX Go5700" }, - { 0x10DE034C, "Quadro FX Go1000" }, - { 0x10DE034E, "Quadro FX 1100" }, - - { 0x10DE0040, "GeForce 6800 Ultra" }, - { 0x10DE0041, "GeForce 6800" }, - { 0x10DE0042, "GeForce 6800 LE" }, - { 0x10DE0043, "GeForce 6800 XE" }, - { 0x10DE0044, "GeForce 6800 XT" }, - { 0x10DE0045, "GeForce 6800 GT" }, - { 0x10DE0046, "GeForce 6800 GT" }, - { 0x10DE0047, "GeForce 6800 GS" }, - { 0x10DE0048, "GeForce 6800 XT" }, - { 0x10DE004E, "Quadro FX 4000" }, - - { 0x10DE00C0, "GeForce 6800 GS" }, - { 0x10DE00C1, "GeForce 6800" }, - { 0x10DE00C2, "GeForce 6800 LE" }, - { 0x10DE00C3, "GeForce 6800 XT" }, - { 0x10DE00C8, "GeForce Go 6800" }, - { 0x10DE00C9, "GeForce Go 6800 Ultra" }, - { 0x10DE00CC, "Quadro FX Go1400" }, - { 0x10DE00CD, "Quadro FX 3450/4000 SDI" }, - { 0x10DE00CE, "Quadro FX 1400" }, - - { 0x10DE0140, "GeForce 6600 GT" }, - { 0x10DE0141, "GeForce 6600" }, - { 0x10DE0142, "GeForce 6600 LE" }, - { 0x10DE0143, "GeForce 6600 VE" }, - { 0x10DE0144, "GeForce Go 6600" }, - { 0x10DE0145, "GeForce 6610 XL" }, - { 0x10DE0146, "GeForce Go 6600 TE/6200 TE" }, - { 0x10DE0147, "GeForce 6700 XL" }, - { 0x10DE0148, "GeForce Go 6600" }, - { 0x10DE0149, "GeForce Go 6600 GT" }, - { 0x10DE014C, "Quadro FX 550" }, - { 0x10DE014D, "Quadro FX 550" }, - { 0x10DE014E, "Quadro FX 540" }, - { 0x10DE014F, "GeForce 6200" }, - - { 0x10DE0160, "GeForce 6500" }, - { 0x10DE0161, "GeForce 6200 TurboCache(TM)" }, - { 0x10DE0162, "GeForce 6200SE TurboCache(TM)" }, - { 0x10DE0163, "GeForce 6200 LE" }, - { 0x10DE0164, "GeForce Go 6200" }, - { 0x10DE0165, "Quadro NVS 285" }, - { 0x10DE0166, "GeForce Go 6400" }, - { 0x10DE0167, "GeForce Go 6200" }, - { 0x10DE0168, "GeForce Go 6400" }, - { 0x10DE0169, "GeForce 6250" }, - - { 0x10DE0211, "GeForce 6800" }, - { 0x10DE0212, "GeForce 6800 LE" }, - { 0x10DE0215, "GeForce 6800 GT" }, - { 0x10DE0218, "GeForce 6800 XT" }, - - { 0x10DE0221, "GeForce 6200" }, - { 0x10DE0222, "GeForce 6200 A-LE" }, - - { 0x10DE0090, "GeForce 7800 GTX" }, - { 0x10DE0091, "GeForce 7800 GTX" }, - { 0x10DE0092, "GeForce 7800 GT" }, - { 0x10DE0093, "GeForce 7800 GS" }, - { 0x10DE0095, "GeForce 7800 SLI" }, - { 0x10DE0098, "GeForce Go 7800" }, - { 0x10DE0099, "GeForce Go 7800 GTX" }, - { 0x10DE009D, "Quadro FX 4500" }, - - { 0x10DE01D1, "GeForce 7300 LE" }, - { 0x10DE01D3, "GeForce 7300 SE" }, - { 0x10DE01D6, "GeForce Go 7200" }, - { 0x10DE01D7, "GeForce Go 7300" }, - { 0x10DE01D8, "GeForce Go 7400" }, - { 0x10DE01D9, "GeForce Go 7400 GS" }, - { 0x10DE01DA, "Quadro NVS 110M" }, - { 0x10DE01DB, "Quadro NVS 120M" }, - { 0x10DE01DC, "Quadro FX 350M" }, - { 0x10DE01DD, "GeForce 7500 LE" }, - { 0x10DE01DE, "Quadro FX 350" }, - { 0x10DE01DF, "GeForce 7300 GS" }, - - { 0x10DE0391, "GeForce 7600 GT" }, - { 0x10DE0392, "GeForce 7600 GS" }, - { 0x10DE0393, "GeForce 7300 GT" }, - { 0x10DE0394, "GeForce 7600 LE" }, - { 0x10DE0395, "GeForce 7300 GT" }, - { 0x10DE0397, "GeForce Go 7700" }, - { 0x10DE0398, "GeForce Go 7600" }, - { 0x10DE0399, "GeForce Go 7600 GT"}, - { 0x10DE039A, "Quadro NVS 300M" }, - { 0x10DE039B, "GeForce Go 7900 SE" }, - { 0x10DE039C, "Quadro FX 550M" }, - { 0x10DE039E, "Quadro FX 560" }, - - { 0x10DE0290, "GeForce 7900 GTX" }, - { 0x10DE0291, "GeForce 7900 GT" }, - { 0x10DE0292, "GeForce 7900 GS" }, - { 0x10DE0298, "GeForce Go 7900 GS" }, - { 0x10DE0299, "GeForce Go 7900 GTX" }, - { 0x10DE029A, "Quadro FX 2500M" }, - { 0x10DE029B, "Quadro FX 1500M" }, - { 0x10DE029C, "Quadro FX 5500" }, - { 0x10DE029D, "Quadro FX 3500" }, - { 0x10DE029E, "Quadro FX 1500" }, - { 0x10DE029F, "Quadro FX 4500 X2" }, - - { 0x10DE0240, "GeForce 6150" }, - { 0x10DE0241, "GeForce 6150 LE" }, - { 0x10DE0242, "GeForce 6100" }, - { 0x10DE0244, "GeForce Go 6150" }, - { 0x10DE0247, "GeForce Go 6100" }, - - {-1, NULL} + {0x10DE032A, "Quadro NVS 55/280 PCI"}, + {0x10DE032B, "Quadro FX 500/600 PCI"}, + {0x10DE032C, "GeForce FX Go53xx Series"}, + {0x10DE032D, "GeForce FX Go5100"}, + + {0x10DE0330, "GeForce FX 5900 Ultra"}, + {0x10DE0331, "GeForce FX 5900"}, + {0x10DE0332, "GeForce FX 5900XT"}, + {0x10DE0333, "GeForce FX 5950 Ultra"}, + {0x10DE0334, "GeForce FX 5900ZT"}, + {0x10DE0338, "Quadro FX 3000"}, + {0x10DE033F, "Quadro FX 700"}, + + {0x10DE0341, "GeForce FX 5700 Ultra"}, + {0x10DE0342, "GeForce FX 5700"}, + {0x10DE0343, "GeForce FX 5700LE"}, + {0x10DE0344, "GeForce FX 5700VE"}, + {0x10DE0347, "GeForce FX Go5700"}, + {0x10DE0348, "GeForce FX Go5700"}, + {0x10DE034C, "Quadro FX Go1000"}, + {0x10DE034E, "Quadro FX 1100"}, + + {0x10DE0040, "GeForce 6800 Ultra"}, + {0x10DE0041, "GeForce 6800"}, + {0x10DE0042, "GeForce 6800 LE"}, + {0x10DE0043, "GeForce 6800 XE"}, + {0x10DE0044, "GeForce 6800 XT"}, + {0x10DE0045, "GeForce 6800 GT"}, + {0x10DE0046, "GeForce 6800 GT"}, + {0x10DE0047, "GeForce 6800 GS"}, + {0x10DE0048, "GeForce 6800 XT"}, + {0x10DE004E, "Quadro FX 4000"}, + + {0x10DE00C0, "GeForce 6800 GS"}, + {0x10DE00C1, "GeForce 6800"}, + {0x10DE00C2, "GeForce 6800 LE"}, + {0x10DE00C3, "GeForce 6800 XT"}, + {0x10DE00C8, "GeForce Go 6800"}, + {0x10DE00C9, "GeForce Go 6800 Ultra"}, + {0x10DE00CC, "Quadro FX Go1400"}, + {0x10DE00CD, "Quadro FX 3450/4000 SDI"}, + {0x10DE00CE, "Quadro FX 1400"}, + + {0x10DE0140, "GeForce 6600 GT"}, + {0x10DE0141, "GeForce 6600"}, + {0x10DE0142, "GeForce 6600 LE"}, + {0x10DE0143, "GeForce 6600 VE"}, + {0x10DE0144, "GeForce Go 6600"}, + {0x10DE0145, "GeForce 6610 XL"}, + {0x10DE0146, "GeForce Go 6600 TE/6200 TE"}, + {0x10DE0147, "GeForce 6700 XL"}, + {0x10DE0148, "GeForce Go 6600"}, + {0x10DE0149, "GeForce Go 6600 GT"}, + {0x10DE014C, "Quadro FX 550"}, + {0x10DE014D, "Quadro FX 550"}, + {0x10DE014E, "Quadro FX 540"}, + {0x10DE014F, "GeForce 6200"}, + + {0x10DE0160, "GeForce 6500"}, + {0x10DE0161, "GeForce 6200 TurboCache(TM)"}, + {0x10DE0162, "GeForce 6200SE TurboCache(TM)"}, + {0x10DE0163, "GeForce 6200 LE"}, + {0x10DE0164, "GeForce Go 6200"}, + {0x10DE0165, "Quadro NVS 285"}, + {0x10DE0166, "GeForce Go 6400"}, + {0x10DE0167, "GeForce Go 6200"}, + {0x10DE0168, "GeForce Go 6400"}, + {0x10DE0169, "GeForce 6250"}, + + {0x10DE0211, "GeForce 6800"}, + {0x10DE0212, "GeForce 6800 LE"}, + {0x10DE0215, "GeForce 6800 GT"}, + {0x10DE0218, "GeForce 6800 XT"}, + + {0x10DE0221, "GeForce 6200"}, + {0x10DE0222, "GeForce 6200 A-LE"}, + + {0x10DE0090, "GeForce 7800 GTX"}, + {0x10DE0091, "GeForce 7800 GTX"}, + {0x10DE0092, "GeForce 7800 GT"}, + {0x10DE0093, "GeForce 7800 GS"}, + {0x10DE0095, "GeForce 7800 SLI"}, + {0x10DE0098, "GeForce Go 7800"}, + {0x10DE0099, "GeForce Go 7800 GTX"}, + {0x10DE009D, "Quadro FX 4500"}, + + {0x10DE01D1, "GeForce 7300 LE"}, + {0x10DE01D3, "GeForce 7300 SE"}, + {0x10DE01D6, "GeForce Go 7200"}, + {0x10DE01D7, "GeForce Go 7300"}, + {0x10DE01D8, "GeForce Go 7400"}, + {0x10DE01D9, "GeForce Go 7400 GS"}, + {0x10DE01DA, "Quadro NVS 110M"}, + {0x10DE01DB, "Quadro NVS 120M"}, + {0x10DE01DC, "Quadro FX 350M"}, + {0x10DE01DD, "GeForce 7500 LE"}, + {0x10DE01DE, "Quadro FX 350"}, + {0x10DE01DF, "GeForce 7300 GS"}, + + {0x10DE0391, "GeForce 7600 GT"}, + {0x10DE0392, "GeForce 7600 GS"}, + {0x10DE0393, "GeForce 7300 GT"}, + {0x10DE0394, "GeForce 7600 LE"}, + {0x10DE0395, "GeForce 7300 GT"}, + {0x10DE0397, "GeForce Go 7700"}, + {0x10DE0398, "GeForce Go 7600"}, + {0x10DE0399, "GeForce Go 7600 GT"}, + {0x10DE039A, "Quadro NVS 300M"}, + {0x10DE039B, "GeForce Go 7900 SE"}, + {0x10DE039C, "Quadro FX 550M"}, + {0x10DE039E, "Quadro FX 560"}, + + {0x10DE0290, "GeForce 7900 GTX"}, + {0x10DE0291, "GeForce 7900 GT"}, + {0x10DE0292, "GeForce 7900 GS"}, + {0x10DE0298, "GeForce Go 7900 GS"}, + {0x10DE0299, "GeForce Go 7900 GTX"}, + {0x10DE029A, "Quadro FX 2500M"}, + {0x10DE029B, "Quadro FX 1500M"}, + {0x10DE029C, "Quadro FX 5500"}, + {0x10DE029D, "Quadro FX 3500"}, + {0x10DE029E, "Quadro FX 1500"}, + {0x10DE029F, "Quadro FX 4500 X2"}, + + {0x10DE0240, "GeForce 6150"}, + {0x10DE0241, "GeForce 6150 LE"}, + {0x10DE0242, "GeForce 6100"}, + {0x10DE0244, "GeForce Go 6150"}, + {0x10DE0247, "GeForce Go 6100"}, + + {-1, NULL} }; @@ -367,147 +364,147 @@ static SymTabRec NVKnownChipsets[] = */ static const char *vgahwSymbols[] = { - "vgaHWUnmapMem", - "vgaHWDPMSSet", - "vgaHWFreeHWRec", - "vgaHWGetHWRec", - "vgaHWGetIndex", - "vgaHWInit", - "vgaHWMapMem", - "vgaHWProtect", - "vgaHWRestore", - "vgaHWSave", - "vgaHWSaveScreen", - NULL + "vgaHWUnmapMem", + "vgaHWDPMSSet", + "vgaHWFreeHWRec", + "vgaHWGetHWRec", + "vgaHWGetIndex", + "vgaHWInit", + "vgaHWMapMem", + "vgaHWProtect", + "vgaHWRestore", + "vgaHWSave", + "vgaHWSaveScreen", + NULL }; static const char *fbSymbols[] = { - "fbPictureInit", - "fbScreenInit", - NULL + "fbPictureInit", + "fbScreenInit", + NULL }; static const char *xaaSymbols[] = { - "XAACopyROP", - "XAACreateInfoRec", - "XAADestroyInfoRec", - "XAAFallbackOps", - "XAAInit", - "XAAPatternROP", - NULL + "XAACopyROP", + "XAACreateInfoRec", + "XAADestroyInfoRec", + "XAAFallbackOps", + "XAAInit", + "XAAPatternROP", + NULL }; static const char *exaSymbols[] = { - "exaDriverInit", - "exaOffscreenInit", - NULL + "exaDriverInit", + "exaOffscreenInit", + NULL }; static const char *ramdacSymbols[] = { - "xf86CreateCursorInfoRec", - "xf86DestroyCursorInfoRec", - "xf86InitCursor", - NULL + "xf86CreateCursorInfoRec", + "xf86DestroyCursorInfoRec", + "xf86InitCursor", + NULL }; static const char *ddcSymbols[] = { - "xf86PrintEDID", - "xf86DoEDID_DDC2", - "xf86SetDDCproperties", - NULL + "xf86PrintEDID", + "xf86DoEDID_DDC2", + "xf86SetDDCproperties", + NULL }; static const char *vbeSymbols[] = { - "VBEInit", - "vbeFree", - "vbeDoEDID", - NULL + "VBEInit", + "vbeFree", + "vbeDoEDID", + NULL }; static const char *i2cSymbols[] = { - "xf86CreateI2CBusRec", - "xf86I2CBusInit", - NULL + "xf86CreateI2CBusRec", + "xf86I2CBusInit", + NULL }; static const char *shadowSymbols[] = { - "ShadowFBInit", - NULL + "ShadowFBInit", + NULL }; static const char *int10Symbols[] = { - "xf86FreeInt10", - "xf86InitInt10", - NULL + "xf86FreeInt10", + "xf86InitInt10", + NULL }; static const char *rivaSymbols[] = { - "RivaGetScrnInfoRec", - "RivaAvailableOptions", - NULL + "RivaGetScrnInfoRec", + "RivaAvailableOptions", + NULL }; const char *drmSymbols[] = { - "drmOpen", - "drmAddBufs", - "drmAddMap", - "drmAgpAcquire", - "drmAgpVersionMajor", - "drmAgpVersionMinor", - "drmAgpAlloc", - "drmAgpBind", - "drmAgpEnable", - "drmAgpFree", - "drmAgpRelease", - "drmAgpUnbind", - "drmAuthMagic", - "drmCommandNone", - "drmCommandWrite", - "drmCommandWriteRead", - "drmCreateContext", - "drmCtlInstHandler", - "drmCtlUninstHandler", - "drmDestroyContext", - "drmFreeVersion", - "drmGetInterruptFromBusID", - "drmGetLibVersion", - "drmGetVersion", - NULL + "drmOpen", + "drmAddBufs", + "drmAddMap", + "drmAgpAcquire", + "drmAgpVersionMajor", + "drmAgpVersionMinor", + "drmAgpAlloc", + "drmAgpBind", + "drmAgpEnable", + "drmAgpFree", + "drmAgpRelease", + "drmAgpUnbind", + "drmAuthMagic", + "drmCommandNone", + "drmCommandWrite", + "drmCommandWriteRead", + "drmCreateContext", + "drmCtlInstHandler", + "drmCtlUninstHandler", + "drmDestroyContext", + "drmFreeVersion", + "drmGetInterruptFromBusID", + "drmGetLibVersion", + "drmGetVersion", + NULL }; const char *driSymbols[] = { - "DRICloseScreen", - "DRICreateInfoRec", - "DRIDestroyInfoRec", - "DRIFinishScreenInit", - "DRIGetSAREAPrivate", - "DRILock", - "DRIQueryVersion", - "DRIScreenInit", - "DRIUnlock", - "GlxSetVisualConfigs", - "DRICreatePCIBusID", - NULL + "DRICloseScreen", + "DRICreateInfoRec", + "DRIDestroyInfoRec", + "DRIFinishScreenInit", + "DRIGetSAREAPrivate", + "DRILock", + "DRIQueryVersion", + "DRIScreenInit", + "DRIUnlock", + "GlxSetVisualConfigs", + "DRICreatePCIBusID", + NULL }; static MODULESETUPPROTO(nouveauSetup); -static XF86ModuleVersionInfo nouveauVersRec = -{ - "nouveau", - MODULEVENDORSTRING, - MODINFOSTRING1, - MODINFOSTRING2, - XORG_VERSION_CURRENT, - NV_MAJOR_VERSION, NV_MINOR_VERSION, NV_PATCHLEVEL, - ABI_CLASS_VIDEODRV, /* This is a video driver */ - ABI_VIDEODRV_VERSION, - MOD_CLASS_VIDEODRV, - {0,0,0,0} +static XF86ModuleVersionInfo nouveauVersRec = { + "nouveau", + MODULEVENDORSTRING, + MODINFOSTRING1, + MODINFOSTRING2, + XORG_VERSION_CURRENT, + NV_MAJOR_VERSION, NV_MINOR_VERSION, NV_PATCHLEVEL, + ABI_CLASS_VIDEODRV, /* This is a video driver */ + ABI_VIDEODRV_VERSION, + MOD_CLASS_VIDEODRV, + {0, 0, 0, 0} }; -_X_EXPORT XF86ModuleData nouveauModuleData = { &nouveauVersRec, nouveauSetup, NULL }; +_X_EXPORT XF86ModuleData nouveauModuleData = + { &nouveauVersRec, nouveauSetup, NULL }; /* @@ -519,65 +516,67 @@ static int pix24bpp = 0; static Bool NVGetRec(ScrnInfoPtr pScrn) { - /* - * Allocate an NVRec, and hook it into pScrn->driverPrivate. - * pScrn->driverPrivate is initialised to NULL, so we can check if - * the allocation has already been done. - */ - if (pScrn->driverPrivate != NULL) - return TRUE; - - pScrn->driverPrivate = xnfcalloc(sizeof(NVRec), 1); - /* Initialise it */ - - return TRUE; + /* + * Allocate an NVRec, and hook it into pScrn->driverPrivate. + * pScrn->driverPrivate is initialised to NULL, so we can check if + * the allocation has already been done. + */ + if (pScrn->driverPrivate != NULL) + return TRUE; + + pScrn->driverPrivate = xnfcalloc(sizeof(NVRec), 1); + /* Initialise it */ + + return TRUE; } static void NVFreeRec(ScrnInfoPtr pScrn) { - if (pScrn->driverPrivate == NULL) - return; - xfree(pScrn->driverPrivate); - pScrn->driverPrivate = NULL; + if (pScrn->driverPrivate == NULL) + return; + xfree(pScrn->driverPrivate); + pScrn->driverPrivate = NULL; } static pointer nouveauSetup(pointer module, pointer opts, int *errmaj, int *errmin) { - static Bool setupDone = FALSE; - - /* This module should be loaded only once, but check to be sure. */ - - if (!setupDone) { - setupDone = TRUE; - xf86AddDriver(&NV, module, 0); - - /* - * Modules that this driver always requires may be loaded here - * by calling LoadSubModule(). - */ - /* - * Tell the loader about symbols from other modules that this module - * might refer to. - */ - LoaderRefSymLists(vgahwSymbols, xaaSymbols, exaSymbols, fbSymbols, + static Bool setupDone = FALSE; + + /* This module should be loaded only once, but check to be sure. */ + + if (!setupDone) { + setupDone = TRUE; + xf86AddDriver(&NV, module, 0); + + /* + * Modules that this driver always requires may be loaded here + * by calling LoadSubModule(). + */ + /* + * Tell the loader about symbols from other modules that this module + * might refer to. + */ + LoaderRefSymLists(vgahwSymbols, xaaSymbols, exaSymbols, + fbSymbols, #ifdef XF86DRI - drmSymbols, + drmSymbols, #endif - ramdacSymbols, shadowSymbols, rivaSymbols, - i2cSymbols, ddcSymbols, vbeSymbols, - int10Symbols, NULL); - - /* - * The return value must be non-NULL on success even though there - * is no TearDownProc. - */ - return (pointer)1; - } else { - if (errmaj) *errmaj = LDR_ONCEONLY; - return NULL; - } + ramdacSymbols, shadowSymbols, + rivaSymbols, i2cSymbols, ddcSymbols, + vbeSymbols, int10Symbols, NULL); + + /* + * The return value must be non-NULL on success even though there + * is no TearDownProc. + */ + return (pointer) 1; + } else { + if (errmaj) + *errmaj = LDR_ONCEONLY; + return NULL; + } } static const OptionInfoRec * @@ -589,102 +588,101 @@ NVAvailableOptions(int chipid, int busid) } else return RivaAvailableOptions(chipid, busid); }*/ - - return NVOptions; + + return NVOptions; } /* Mandatory */ static void NVIdentify(int flags) { - struct NvFamily *family; - size_t maxLen=0; - - xf86DrvMsg(0, X_INFO, NV_NAME " driver " NV_DRIVER_DATE "\n"); - xf86DrvMsg(0, X_INFO, NV_NAME " driver for NVIDIA chipset families :\n"); - - /* maximum length for alignment */ - family = NVKnownFamilies; - while(family->name && family->chipset) - { - maxLen = max(maxLen, strlen(family->name)); - family++; - } - - /* display */ - family = NVKnownFamilies; - while(family->name && family->chipset) - { - size_t len = strlen(family->name); - xf86ErrorF("\t%s", family->name); - while(len<maxLen+1) - { - xf86ErrorF(" "); - len++; - } - xf86ErrorF("(%s)\n", family->chipset); - family++; - } + struct NvFamily *family; + size_t maxLen = 0; + + xf86DrvMsg(0, X_INFO, NV_NAME " driver " NV_DRIVER_DATE "\n"); + xf86DrvMsg(0, X_INFO, + NV_NAME " driver for NVIDIA chipset families :\n"); + + /* maximum length for alignment */ + family = NVKnownFamilies; + while (family->name && family->chipset) { + maxLen = max(maxLen, strlen(family->name)); + family++; + } + + /* display */ + family = NVKnownFamilies; + while (family->name && family->chipset) { + size_t len = strlen(family->name); + xf86ErrorF("\t%s", family->name); + while (len < maxLen + 1) { + xf86ErrorF(" "); + len++; + } + xf86ErrorF("(%s)\n", family->chipset); + family++; + } } static Bool -NVGetScrnInfoRec(PciChipsets *chips, int chip) +NVGetScrnInfoRec(PciChipsets * chips, int chip) { - ScrnInfoPtr pScrn; + ScrnInfoPtr pScrn; - pScrn = xf86ConfigPciEntity(NULL, 0, chip, - chips, NULL, NULL, NULL, - NULL, NULL); + pScrn = xf86ConfigPciEntity(NULL, 0, chip, + chips, NULL, NULL, NULL, NULL, NULL); - if(!pScrn) return FALSE; + if (!pScrn) + return FALSE; - pScrn->driverVersion = NV_VERSION; - pScrn->driverName = NV_DRIVER_NAME; - pScrn->name = NV_NAME; + pScrn->driverVersion = NV_VERSION; + pScrn->driverName = NV_DRIVER_NAME; + pScrn->name = NV_NAME; - pScrn->Probe = NVProbe; - pScrn->PreInit = NVPreInit; - pScrn->ScreenInit = NVScreenInit; - pScrn->SwitchMode = NVSwitchMode; - pScrn->AdjustFrame = NVAdjustFrame; - pScrn->EnterVT = NVEnterVT; - pScrn->LeaveVT = NVLeaveVT; - pScrn->FreeScreen = NVFreeScreen; - pScrn->ValidMode = NVValidMode; + pScrn->Probe = NVProbe; + pScrn->PreInit = NVPreInit; + pScrn->ScreenInit = NVScreenInit; + pScrn->SwitchMode = NVSwitchMode; + pScrn->AdjustFrame = NVAdjustFrame; + pScrn->EnterVT = NVEnterVT; + pScrn->LeaveVT = NVLeaveVT; + pScrn->FreeScreen = NVFreeScreen; + pScrn->ValidMode = NVValidMode; - return TRUE; + return TRUE; } #define MAX_CHIPS MAXSCREENS -static CARD32 -NVGetPCIXpressChip (pciVideoPtr pVideo) +static CARD32 +NVGetPCIXpressChip(pciVideoPtr pVideo) { - volatile CARD32 *regs; - CARD32 pciid, pcicmd; - PCITAG Tag = ((pciConfigPtr)(pVideo->thisCard))->tag; + volatile CARD32 *regs; + CARD32 pciid, pcicmd; + PCITAG Tag = ((pciConfigPtr) (pVideo->thisCard))->tag; + + pcicmd = pciReadLong(Tag, PCI_CMD_STAT_REG); + pciWriteLong(Tag, PCI_CMD_STAT_REG, pcicmd | PCI_CMD_MEM_ENABLE); - pcicmd = pciReadLong(Tag, PCI_CMD_STAT_REG); - pciWriteLong(Tag, PCI_CMD_STAT_REG, pcicmd | PCI_CMD_MEM_ENABLE); - - regs = xf86MapPciMem(-1, VIDMEM_MMIO, Tag, pVideo->memBase[0], 0x2000); + regs = + xf86MapPciMem(-1, VIDMEM_MMIO, Tag, pVideo->memBase[0], + 0x2000); - pciid = regs[0x1800/4]; + pciid = regs[0x1800 / 4]; - xf86UnMapVidMem(-1, (pointer)regs, 0x2000); + xf86UnMapVidMem(-1, (pointer) regs, 0x2000); - pciWriteLong(Tag, PCI_CMD_STAT_REG, pcicmd); + pciWriteLong(Tag, PCI_CMD_STAT_REG, pcicmd); - if((pciid & 0x0000ffff) == 0x000010DE) - pciid = 0x10DE0000 | (pciid >> 16); - else - if((pciid & 0xffff0000) == 0xDE100000) /* wrong endian */ - pciid = 0x10DE0000 | ((pciid << 8) & 0x0000ff00) | - ((pciid >> 8) & 0x000000ff); + if ((pciid & 0x0000ffff) == 0x000010DE) + pciid = 0x10DE0000 | (pciid >> 16); + else if ((pciid & 0xffff0000) == 0xDE100000) /* wrong endian */ + pciid = 0x10DE0000 | ((pciid << 8) & 0x0000ff00) | + ((pciid >> 8) & 0x000000ff); - return pciid; + return pciid; } @@ -692,142 +690,152 @@ NVGetPCIXpressChip (pciVideoPtr pVideo) static Bool NVProbe(DriverPtr drv, int flags) { - int i; - GDevPtr *devSections; - int *usedChips; - SymTabRec NVChipsets[MAX_CHIPS + 1]; - PciChipsets NVPciChipsets[MAX_CHIPS + 1]; - pciVideoPtr *ppPci; - int numDevSections; - int numUsed; - Bool foundScreen = FALSE; - - - if ((numDevSections = xf86MatchDevice(NV_DRIVER_NAME, &devSections)) <= 0) - return FALSE; /* no matching device section */ - - if (!(ppPci = xf86GetPciVideoInfo())) - return FALSE; /* no PCI cards found */ - - numUsed = 0; - - /* Create the NVChipsets and NVPciChipsets from found devices */ - while (*ppPci && (numUsed < MAX_CHIPS)) { - if(((*ppPci)->vendor == PCI_VENDOR_NVIDIA_SGS) || - ((*ppPci)->vendor == PCI_VENDOR_NVIDIA)) - { - SymTabRec *nvchips = NVKnownChipsets; - int pciid = ((*ppPci)->vendor << 16) | (*ppPci)->chipType; - int token = pciid; - - if(((token & 0xfff0) == CHIPSET_MISC_BRIDGED) || - ((token & 0xfff0) == CHIPSET_G73_BRIDGED)) - { - token = NVGetPCIXpressChip(*ppPci); - } - - while(nvchips->name) { - if(token == nvchips->token) - break; - nvchips++; - } - - if(nvchips->name) { /* found one */ - NVChipsets[numUsed].token = pciid; - NVChipsets[numUsed].name = nvchips->name; - NVPciChipsets[numUsed].numChipset = pciid; - NVPciChipsets[numUsed].PCIid = pciid; - NVPciChipsets[numUsed].resList = RES_SHARED_VGA; - numUsed++; - } else if ((*ppPci)->vendor == PCI_VENDOR_NVIDIA) { - /* look for a compatible devices which may be newer than - the NVKnownChipsets list above. */ - switch(token & 0xfff0) { - case CHIPSET_NV17: - case CHIPSET_NV18: - case CHIPSET_NV25: - case CHIPSET_NV28: - case CHIPSET_NV30: - case CHIPSET_NV31: - case CHIPSET_NV34: - case CHIPSET_NV35: - case CHIPSET_NV36: - case CHIPSET_NV40: - case CHIPSET_NV41: - case 0x0120: - case CHIPSET_NV43: - case CHIPSET_NV44: - case 0x0130: - case CHIPSET_G72: - case CHIPSET_G70: - case CHIPSET_NV45: - case CHIPSET_NV44A: - case 0x0230: - case CHIPSET_G71: - case CHIPSET_G73: - case CHIPSET_C512: - NVChipsets[numUsed].token = pciid; - NVChipsets[numUsed].name = "Unknown NVIDIA chip"; - NVPciChipsets[numUsed].numChipset = pciid; - NVPciChipsets[numUsed].PCIid = pciid; - NVPciChipsets[numUsed].resList = RES_SHARED_VGA; - numUsed++; - break; - default: break; /* we don't recognize it */ - } - } - } - ppPci++; - } - - /* terminate the list */ - NVChipsets[numUsed].token = -1; - NVChipsets[numUsed].name = NULL; - NVPciChipsets[numUsed].numChipset = -1; - NVPciChipsets[numUsed].PCIid = -1; - NVPciChipsets[numUsed].resList = RES_UNDEFINED; - - numUsed = xf86MatchPciInstances(NV_NAME, 0, NVChipsets, NVPciChipsets, - devSections, numDevSections, drv, - &usedChips); - - if (numUsed <= 0) - return FALSE; - - if (flags & PROBE_DETECT) - foundScreen = TRUE; - else for (i = 0; i < numUsed; i++) { - pciVideoPtr pPci; - - pPci = xf86GetPciInfoForEntity(usedChips[i]); - if(NVGetScrnInfoRec(NVPciChipsets, usedChips[i])) - foundScreen = TRUE; - } - - xfree(devSections); - xfree(usedChips); - - return foundScreen; + int i; + GDevPtr *devSections; + int *usedChips; + SymTabRec NVChipsets[MAX_CHIPS + 1]; + PciChipsets NVPciChipsets[MAX_CHIPS + 1]; + pciVideoPtr *ppPci; + int numDevSections; + int numUsed; + Bool foundScreen = FALSE; + + + if ((numDevSections = + xf86MatchDevice(NV_DRIVER_NAME, &devSections)) <= 0) + return FALSE; /* no matching device section */ + + if (!(ppPci = xf86GetPciVideoInfo())) + return FALSE; /* no PCI cards found */ + + numUsed = 0; + + /* Create the NVChipsets and NVPciChipsets from found devices */ + while (*ppPci && (numUsed < MAX_CHIPS)) { + if (((*ppPci)->vendor == PCI_VENDOR_NVIDIA_SGS) || + ((*ppPci)->vendor == PCI_VENDOR_NVIDIA)) { + SymTabRec *nvchips = NVKnownChipsets; + int pciid = + ((*ppPci)->vendor << 16) | (*ppPci)->chipType; + int token = pciid; + + if (((token & 0xfff0) == CHIPSET_MISC_BRIDGED) || + ((token & 0xfff0) == CHIPSET_G73_BRIDGED)) { + token = NVGetPCIXpressChip(*ppPci); + } + + while (nvchips->name) { + if (token == nvchips->token) + break; + nvchips++; + } + + if (nvchips->name) { /* found one */ + NVChipsets[numUsed].token = pciid; + NVChipsets[numUsed].name = nvchips->name; + NVPciChipsets[numUsed].numChipset = pciid; + NVPciChipsets[numUsed].PCIid = pciid; + NVPciChipsets[numUsed].resList = + RES_SHARED_VGA; + numUsed++; + } else if ((*ppPci)->vendor == PCI_VENDOR_NVIDIA) { + /* look for a compatible devices which may be newer than + the NVKnownChipsets list above. */ + switch (token & 0xfff0) { + case CHIPSET_NV17: + case CHIPSET_NV18: + case CHIPSET_NV25: + case CHIPSET_NV28: + case CHIPSET_NV30: + case CHIPSET_NV31: + case CHIPSET_NV34: + case CHIPSET_NV35: + case CHIPSET_NV36: + case CHIPSET_NV40: + case CHIPSET_NV41: + case 0x0120: + case CHIPSET_NV43: + case CHIPSET_NV44: + case 0x0130: + case CHIPSET_G72: + case CHIPSET_G70: + case CHIPSET_NV45: + case CHIPSET_NV44A: + case 0x0230: + case CHIPSET_NV50: + case CHIPSET_NV84: + case CHIPSET_G71: + case CHIPSET_G73: + case CHIPSET_C512: + NVChipsets[numUsed].token = pciid; + NVChipsets[numUsed].name = + "Unknown NVIDIA chip"; + NVPciChipsets[numUsed].numChipset = + pciid; + NVPciChipsets[numUsed].PCIid = + pciid; + NVPciChipsets[numUsed].resList = + RES_SHARED_VGA; + numUsed++; + break; + default: + break; /* we don't recognize it */ + } + } + } + ppPci++; + } + + /* terminate the list */ + NVChipsets[numUsed].token = -1; + NVChipsets[numUsed].name = NULL; + NVPciChipsets[numUsed].numChipset = -1; + NVPciChipsets[numUsed].PCIid = -1; + NVPciChipsets[numUsed].resList = RES_UNDEFINED; + + numUsed = + xf86MatchPciInstances(NV_NAME, 0, NVChipsets, NVPciChipsets, + devSections, numDevSections, drv, + &usedChips); + + if (numUsed <= 0) + return FALSE; + + if (flags & PROBE_DETECT) + foundScreen = TRUE; + else + for (i = 0; i < numUsed; i++) { + pciVideoPtr pPci; + + pPci = xf86GetPciInfoForEntity(usedChips[i]); + if (NVGetScrnInfoRec(NVPciChipsets, usedChips[i])) + foundScreen = TRUE; + } + + xfree(devSections); + xfree(usedChips); + + return foundScreen; } /* Usually mandatory */ Bool NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) { - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; - NVPtr pNv = NVPTR(pScrn); - Bool ret = TRUE; + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + NVPtr pNv = NVPTR(pScrn); + Bool ret = TRUE; + + NVFBLayout *pLayout = &pNv->CurrentLayout; - NVFBLayout *pLayout = &pNv->CurrentLayout; + if (pLayout->mode != mode) { + if (!NVSetMode(pScrn, mode, RR_Rotate_0)) + ret = FALSE; + } - if (pLayout->mode != mode) { - if (!NVSetMode(pScrn, mode, RR_Rotate_0)) - ret = FALSE; - } + pLayout->mode = mode; - pLayout->mode = mode; - - return ret; + return ret; } /* @@ -835,44 +843,64 @@ NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) * displayed location in the video memory. */ /* Usually mandatory */ -void +void NVAdjustFrame(int scrnIndex, int x, int y, int flags) { - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; - xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn); - int startAddr; - NVPtr pNv = NVPTR(pScrn); - NVFBLayout *pLayout = &pNv->CurrentLayout; - xf86CrtcPtr crtc = config->output[config->compat_output]->crtc; - - if (crtc && crtc->enabled) { - NVCrtcSetBase(crtc, x, y); - } + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn); + int startAddr; + NVPtr pNv = NVPTR(pScrn); + NVFBLayout *pLayout = &pNv->CurrentLayout; + xf86CrtcPtr crtc = config->output[config->compat_output]->crtc; + + if (crtc && crtc->enabled) { + NVCrtcSetBase(crtc, x, y); + } } void NVResetCrtcConfig(ScrnInfoPtr pScrn, int set) { - xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn); - NVPtr pNv = NVPTR(pScrn); - int i; - CARD32 val = 0; + xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn); + NVPtr pNv = NVPTR(pScrn); + int i; + CARD32 val = 0; + + for (i = 0; i < config->num_crtc; i++) { + xf86CrtcPtr crtc = config->crtc[i]; + NVCrtcPrivatePtr nv_crtc = crtc->driver_private; - for (i = 0; i < config->num_crtc; i++) { - xf86CrtcPtr crtc = config->crtc[i]; - NVCrtcPrivatePtr nv_crtc = crtc->driver_private; + if (set) { + NVCrtcRegPtr regp; - if (set) { - NVCrtcRegPtr regp; + regp = &pNv->ModeReg.crtc_reg[nv_crtc->crtc]; + val = regp->head; + } + + nvWriteCRTC(pNv, nv_crtc->crtc, NV_CRTC_FSEL, val); + } +} - regp = &pNv->ModeReg.crtc_reg[nv_crtc->crtc]; - val = regp->head; - } +static Bool +NV50AcquireDisplay(ScrnInfoPtr pScrn) +{ + if (!NV50DispInit(pScrn)) + return FALSE; + if (!NV50CursorAcquire(pScrn)) + return FALSE; + xf86SetDesiredModes(pScrn); - nvWriteCRTC(pNv, nv_crtc->crtc, NV_CRTC_FSEL, val); - } + return TRUE; } +static Bool +NV50ReleaseDisplay(ScrnInfoPtr pScrn) +{ + NV50CursorRelease(pScrn); + NV50DispShutdown(pScrn); + + return TRUE; +} /* * This is called when VT switching back to the X server. Its job is @@ -885,28 +913,34 @@ NVResetCrtcConfig(ScrnInfoPtr pScrn, int set) static Bool NVEnterVT(int scrnIndex, int flags) { - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; - xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); - NVPtr pNv = NVPTR(pScrn); - int i; - - /* Save the current state */ - if (pNv->SaveGeneration != serverGeneration) { - pNv->SaveGeneration = serverGeneration; - NVSave(pScrn); - } - - pScrn->vtSema = TRUE; - - NVResetCrtcConfig(pScrn, 0); - if (!xf86SetDesiredModes(pScrn)) - return FALSE; - NVResetCrtcConfig(pScrn, 1); - pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); - - if(pNv->overlayAdaptor) - NVResetVideo(pScrn); - return TRUE; + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + NVPtr pNv = NVPTR(pScrn); + int i; + + pScrn->vtSema = TRUE; + + if (pNv->Architecture == NV_ARCH_50) { + if (!NV50AcquireDisplay(pScrn)) + return FALSE; + return TRUE; + } + + /* Save the current state */ + if (pNv->SaveGeneration != serverGeneration) { + pNv->SaveGeneration = serverGeneration; + NVSave(pScrn); + } + + NVResetCrtcConfig(pScrn, 0); + if (!xf86SetDesiredModes(pScrn)) + return FALSE; + NVResetCrtcConfig(pScrn, 1); + pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + + if (pNv->overlayAdaptor) + NVResetVideo(pScrn); + return TRUE; } /* @@ -920,36 +954,38 @@ NVEnterVT(int scrnIndex, int flags) static void NVLeaveVT(int scrnIndex, int flags) { - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; - NVPtr pNv = NVPTR(pScrn); + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + NVPtr pNv = NVPTR(pScrn); - NVSync(pScrn); - NVRestore(pScrn); + if (pNv->Architecture == NV_ARCH_50) { + NV50ReleaseDisplay(pScrn); + return; + } + + NVSync(pScrn); + NVRestore(pScrn); } -static void -NVBlockHandler ( - int i, - pointer blockData, - pointer pTimeout, - pointer pReadmask -) +static void +NVBlockHandler(int i, + pointer blockData, pointer pTimeout, pointer pReadmask) { - ScreenPtr pScreen = screenInfo.screens[i]; - ScrnInfoPtr pScrnInfo = xf86Screens[i]; - NVPtr pNv = NVPTR(pScrnInfo); + ScreenPtr pScreen = screenInfo.screens[i]; + ScrnInfoPtr pScrnInfo = xf86Screens[i]; + NVPtr pNv = NVPTR(pScrnInfo); - if (pNv->DMAKickoffCallback) - (*pNv->DMAKickoffCallback)(pNv); - - pScreen->BlockHandler = pNv->BlockHandler; - (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask); - pScreen->BlockHandler = NVBlockHandler; + if (pNv->DMAKickoffCallback) + (*pNv->DMAKickoffCallback) (pNv); - if (pNv->VideoTimerCallback) - (*pNv->VideoTimerCallback)(pScrnInfo, currentTime.milliseconds); + pScreen->BlockHandler = pNv->BlockHandler; + (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask); + pScreen->BlockHandler = NVBlockHandler; + + if (pNv->VideoTimerCallback) + (*pNv->VideoTimerCallback) (pScrnInfo, + currentTime.milliseconds); } @@ -962,34 +998,39 @@ NVBlockHandler ( */ /* Mandatory */ -static Bool +static Bool NVCloseScreen(int scrnIndex, ScreenPtr pScreen) { - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; - NVPtr pNv = NVPTR(pScrn); - - if (pScrn->vtSema) { - pScrn->vtSema = FALSE; - NVSync(pScrn); - NVRestore(pScrn); - } - - NVUnmapMem(pScrn); - vgaHWUnmapMem(pScrn); - if (pNv->AccelInfoRec) - XAADestroyInfoRec(pNv->AccelInfoRec); - if (pNv->CursorInfoRec) - xf86DestroyCursorInfoRec(pNv->CursorInfoRec); - if (pNv->ShadowPtr) - xfree(pNv->ShadowPtr); - if (pNv->overlayAdaptor) - xfree(pNv->overlayAdaptor); - if (pNv->blitAdaptor) - xfree(pNv->blitAdaptor); - - pScreen->CloseScreen = pNv->CloseScreen; - pScreen->BlockHandler = pNv->BlockHandler; - return (*pScreen->CloseScreen)(scrnIndex, pScreen); + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + NVPtr pNv = NVPTR(pScrn); + + if (pScrn->vtSema) { + ErrorF("*************\n"); + if (pNv->Architecture == NV_ARCH_50) { + NV50ReleaseDisplay(pScrn); + } else { + NVSync(pScrn); + NVRestore(pScrn); + } + } + + NVUnmapMem(pScrn); + vgaHWUnmapMem(pScrn); + if (pNv->AccelInfoRec) + XAADestroyInfoRec(pNv->AccelInfoRec); + if (pNv->CursorInfoRec) + xf86DestroyCursorInfoRec(pNv->CursorInfoRec); + if (pNv->ShadowPtr) + xfree(pNv->ShadowPtr); + if (pNv->overlayAdaptor) + xfree(pNv->overlayAdaptor); + if (pNv->blitAdaptor) + xfree(pNv->blitAdaptor); + + pScrn->vtSema = FALSE; + pScreen->CloseScreen = pNv->CloseScreen; + pScreen->BlockHandler = pNv->BlockHandler; + return (*pScreen->CloseScreen) (scrnIndex, pScreen); } /* Free up any persistent data structures */ @@ -998,13 +1039,13 @@ NVCloseScreen(int scrnIndex, ScreenPtr pScreen) static void NVFreeScreen(int scrnIndex, int flags) { - /* - * This only gets called when a screen is being deleted. It does not - * get called routinely at the end of a server generation. - */ - if (xf86LoaderCheckSymbol("vgaHWFreeHWRec")) - vgaHWFreeHWRec(xf86Screens[scrnIndex]); - NVFreeRec(xf86Screens[scrnIndex]); + /* + * This only gets called when a screen is being deleted. It does not + * get called routinely at the end of a server generation. + */ + if (xf86LoaderCheckSymbol("vgaHWFreeHWRec")) + vgaHWFreeHWRec(xf86Screens[scrnIndex]); + NVFreeRec(xf86Screens[scrnIndex]); } @@ -1014,758 +1055,744 @@ NVFreeScreen(int scrnIndex, int flags) static ModeStatus NVValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) { - NVPtr pNv = NVPTR(xf86Screens[scrnIndex]); + NVPtr pNv = NVPTR(xf86Screens[scrnIndex]); - if(pNv->fpWidth && pNv->fpHeight) - if((pNv->fpWidth < mode->HDisplay) || (pNv->fpHeight < mode->VDisplay)) - return (MODE_PANEL); + if (pNv->fpWidth && pNv->fpHeight) + if ((pNv->fpWidth < mode->HDisplay) + || (pNv->fpHeight < mode->VDisplay)) + return (MODE_PANEL); - return (MODE_OK); + return (MODE_OK); } static void nvProbeDDC(ScrnInfoPtr pScrn, int index) { - vbeInfoPtr pVbe; + vbeInfoPtr pVbe; - if (xf86LoadSubModule(pScrn, "vbe")) { - pVbe = VBEInit(NULL,index); - ConfiguredMonitor = vbeDoEDID(pVbe, NULL); - vbeFree(pVbe); - } + if (xf86LoadSubModule(pScrn, "vbe")) { + pVbe = VBEInit(NULL, index); + ConfiguredMonitor = vbeDoEDID(pVbe, NULL); + vbeFree(pVbe); + } } -Bool NVI2CInit(ScrnInfoPtr pScrn) +Bool +NVI2CInit(ScrnInfoPtr pScrn) { - char *mod = "i2c"; + char *mod = "i2c"; - if (xf86LoadSubModule(pScrn, mod)) { - xf86LoaderReqSymLists(i2cSymbols,NULL); + if (xf86LoadSubModule(pScrn, mod)) { + xf86LoaderReqSymLists(i2cSymbols, NULL); - mod = "ddc"; - if(xf86LoadSubModule(pScrn, mod)) { - xf86LoaderReqSymLists(ddcSymbols, NULL); - return TRUE; - } - } + mod = "ddc"; + if (xf86LoadSubModule(pScrn, mod)) { + xf86LoaderReqSymLists(ddcSymbols, NULL); + return TRUE; + } + } - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Couldn't load %s module. DDC probing can't be done\n", mod); + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Couldn't load %s module. DDC probing can't be done\n", + mod); - return FALSE; + return FALSE; } -static Bool NVPreInitDRI(ScrnInfoPtr pScrn) +static Bool +NVPreInitDRI(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); - if (!NVDRIGetVersion(pScrn)) + if (!NVDRIGetVersion(pScrn)) return FALSE; - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "[dri] Found DRI library version %d.%d.%d and kernel" - " module version %d.%d.%d\n", - pNv->pLibDRMVersion->version_major, - pNv->pLibDRMVersion->version_minor, - pNv->pLibDRMVersion->version_patchlevel, - pNv->pKernelDRMVersion->version_major, - pNv->pKernelDRMVersion->version_minor, - pNv->pKernelDRMVersion->version_patchlevel); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[dri] Found DRI library version %d.%d.%d and kernel" + " module version %d.%d.%d\n", + pNv->pLibDRMVersion->version_major, + pNv->pLibDRMVersion->version_minor, + pNv->pLibDRMVersion->version_patchlevel, + pNv->pKernelDRMVersion->version_major, + pNv->pKernelDRMVersion->version_minor, + pNv->pKernelDRMVersion->version_patchlevel); return TRUE; } static Bool -nv_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height) +nv_xf86crtc_resize(ScrnInfoPtr scrn, int width, int height) { - scrn->virtualX = width; - scrn->virtualY = height; - return TRUE; + scrn->virtualX = width; + scrn->virtualY = height; + return TRUE; } static const xf86CrtcConfigFuncsRec nv_xf86crtc_config_funcs = { - nv_xf86crtc_resize + nv_xf86crtc_resize }; +static Bool +NVDetermineChipsetArch(ScrnInfoPtr pScrn) +{ + NVPtr pNv = NVPTR(pScrn); + + switch (pNv->Chipset & 0x0ff0) { + case CHIPSET_NV03: /* Riva128 */ + pNv->Architecture = NV_ARCH_03; + break; + case CHIPSET_NV04: /* TNT/TNT2 */ + pNv->Architecture = NV_ARCH_04; + break; + case CHIPSET_NV10: /* GeForce 256 */ + case CHIPSET_NV11: /* GeForce2 MX */ + case CHIPSET_NV15: /* GeForce2 */ + case CHIPSET_NV17: /* GeForce4 MX */ + case CHIPSET_NV18: /* GeForce4 MX (8x AGP) */ + case CHIPSET_NFORCE: /* nForce */ + case CHIPSET_NFORCE2: /* nForce2 */ + pNv->Architecture = NV_ARCH_10; + break; + case CHIPSET_NV20: /* GeForce3 */ + case CHIPSET_NV25: /* GeForce4 Ti */ + case CHIPSET_NV28: /* GeForce4 Ti (8x AGP) */ + pNv->Architecture = NV_ARCH_20; + break; + case CHIPSET_NV30: /* GeForceFX 5800 */ + case CHIPSET_NV31: /* GeForceFX 5600 */ + case CHIPSET_NV34: /* GeForceFX 5200 */ + case CHIPSET_NV35: /* GeForceFX 5900 */ + case CHIPSET_NV36: /* GeForceFX 5700 */ + pNv->Architecture = NV_ARCH_30; + break; + case CHIPSET_NV40: /* GeForce 6800 */ + case CHIPSET_NV41: /* GeForce 6800 */ + case 0x0120: /* GeForce 6800 */ + case CHIPSET_NV43: /* GeForce 6600 */ + case CHIPSET_NV44: /* GeForce 6200 */ + case CHIPSET_G72: /* GeForce 7200, 7300, 7400 */ + case CHIPSET_G70: /* GeForce 7800 */ + case CHIPSET_NV45: /* GeForce 6800 */ + case CHIPSET_NV44A: /* GeForce 6200 */ + case CHIPSET_G71: /* GeForce 7900 */ + case CHIPSET_G73: /* GeForce 7600 */ + case CHIPSET_C51: /* GeForce 6100 */ + case CHIPSET_C512: /* Geforce 6100 (nForce 4xx) */ + pNv->Architecture = NV_ARCH_40; + break; + case CHIPSET_NV50: + case CHIPSET_NV84: + pNv->Architecture = NV_ARCH_50; + break; + default: /* Unknown, probably >=NV40 */ + pNv->Architecture = NV_ARCH_40; + break; + } + + return TRUE; +} + +#define NVPreInitFail(fmt, args...) do { \ + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "%d: "fmt, __LINE__, ##args); \ + if (pNv->pInt10) \ + xf86FreeInt10(pNv->pInt10); \ + NVFreeRec(pScrn); \ + return FALSE; \ +} while(0) + /* Mandatory */ Bool NVPreInit(ScrnInfoPtr pScrn, int flags) { - xf86CrtcConfigPtr xf86_config; - NVPtr pNv; - MessageType from; - int i, max_width, max_height; - ClockRangePtr clockRanges; - const char *s; - int num_crtc; - - if (flags & PROBE_DETECT) { - EntityInfoPtr pEnt = xf86GetEntityInfo(pScrn->entityList[0]); - - if (!pEnt) - return FALSE; - - i = pEnt->index; - xfree(pEnt); - - nvProbeDDC(pScrn, i); - return TRUE; - } - - /* - * Note: This function is only called once at server startup, and - * not at the start of each server generation. This means that - * only things that are persistent across server generations can - * be initialised here. xf86Screens[] is (pScrn is a pointer to one - * of these). Privates allocated using xf86AllocateScrnInfoPrivateIndex() - * are too, and should be used for data that must persist across - * server generations. - * - * Per-generation data should be allocated with - * AllocateScreenPrivateIndex() from the ScreenInit() function. - */ - - /* Check the number of entities, and fail if it isn't one. */ - if (pScrn->numEntities != 1) - return FALSE; + xf86CrtcConfigPtr xf86_config; + NVPtr pNv; + MessageType from; + int i, max_width, max_height; + ClockRangePtr clockRanges; + const char *s; + int num_crtc; + + if (flags & PROBE_DETECT) { + EntityInfoPtr pEnt = + xf86GetEntityInfo(pScrn->entityList[0]); + + if (!pEnt) + return FALSE; + + i = pEnt->index; + xfree(pEnt); + + nvProbeDDC(pScrn, i); + return TRUE; + } - /* Allocate the NVRec driverPrivate */ - if (!NVGetRec(pScrn)) { - return FALSE; - } - pNv = NVPTR(pScrn); + /* + * Note: This function is only called once at server startup, and + * not at the start of each server generation. This means that + * only things that are persistent across server generations can + * be initialised here. xf86Screens[] is (pScrn is a pointer to one + * of these). Privates allocated using xf86AllocateScrnInfoPrivateIndex() + * are too, and should be used for data that must persist across + * server generations. + * + * Per-generation data should be allocated with + * AllocateScreenPrivateIndex() from the ScreenInit() function. + */ - /* Get the entity, and make sure it is PCI. */ - pNv->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); - if (pNv->pEnt->location.type != BUS_PCI) - return FALSE; - - /* Find the PCI info for this screen */ - pNv->PciInfo = xf86GetPciInfoForEntity(pNv->pEnt->index); - pNv->PciTag = pciTag(pNv->PciInfo->bus, pNv->PciInfo->device, - pNv->PciInfo->func); + /* Check the number of entities, and fail if it isn't one. */ + if (pScrn->numEntities != 1) + return FALSE; - pNv->Primary = xf86IsPrimaryPci(pNv->PciInfo); + /* Allocate the NVRec driverPrivate */ + if (!NVGetRec(pScrn)) { + return FALSE; + } + pNv = NVPTR(pScrn); - /* Initialize the card through int10 interface if needed */ - if (xf86LoadSubModule(pScrn, "int10")) { - xf86LoaderReqSymLists(int10Symbols, NULL); + /* Get the entity, and make sure it is PCI. */ + pNv->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); + if (pNv->pEnt->location.type != BUS_PCI) + return FALSE; + + /* Find the PCI info for this screen */ + pNv->PciInfo = xf86GetPciInfoForEntity(pNv->pEnt->index); + pNv->PciTag = pciTag(pNv->PciInfo->bus, pNv->PciInfo->device, + pNv->PciInfo->func); + + pNv->Primary = xf86IsPrimaryPci(pNv->PciInfo); + + /* Initialize the card through int10 interface if needed */ + if (xf86LoadSubModule(pScrn, "int10")) { + xf86LoaderReqSymLists(int10Symbols, NULL); #if !defined(__alpha__) && !defined(__powerpc__) - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Initializing int10\n"); - pNv->pInt = xf86InitInt10(pNv->pEnt->index); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Initializing int10\n"); + pNv->pInt10 = xf86InitInt10(pNv->pEnt->index); #endif - } - - xf86SetOperatingState(resVgaIo, pNv->pEnt->index, ResUnusedOpr); - xf86SetOperatingState(resVgaMem, pNv->pEnt->index, ResDisableOpr); - - /* Set pScrn->monitor */ - pScrn->monitor = pScrn->confScreen->monitor; - - /* - * Set the Chipset and ChipRev, allowing config file entries to - * override. - */ - if (pNv->pEnt->device->chipset && *pNv->pEnt->device->chipset) { - pScrn->chipset = pNv->pEnt->device->chipset; - pNv->Chipset = xf86StringToToken(NVKnownChipsets, pScrn->chipset); - from = X_CONFIG; - } else if (pNv->pEnt->device->chipID >= 0) { - pNv->Chipset = pNv->pEnt->device->chipID; - pScrn->chipset = (char *)xf86TokenToString(NVKnownChipsets, - pNv->Chipset); - from = X_CONFIG; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n", - pNv->Chipset); - } else { - from = X_PROBED; - pNv->Chipset = (pNv->PciInfo->vendor << 16) | pNv->PciInfo->chipType; - - if(((pNv->Chipset & 0xfff0) == CHIPSET_MISC_BRIDGED) || - ((pNv->Chipset & 0xfff0) == CHIPSET_G73_BRIDGED)) - { - pNv->Chipset = NVGetPCIXpressChip(pNv->PciInfo); - } - - pScrn->chipset = (char *)xf86TokenToString(NVKnownChipsets, - pNv->Chipset); - if(!pScrn->chipset) - pScrn->chipset = "Unknown NVIDIA chipset"; - } - - if (pNv->pEnt->device->chipRev >= 0) { - pNv->ChipRev = pNv->pEnt->device->chipRev; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n", - pNv->ChipRev); - } else { - pNv->ChipRev = pNv->PciInfo->chipRev; - } - - /* - * This shouldn't happen because such problems should be caught in - * NVProbe(), but check it just in case. - */ - if (pScrn->chipset == NULL) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "ChipID 0x%04X is not recognised\n", pNv->Chipset); - xf86FreeInt10(pNv->pInt); - return FALSE; - } - if (pNv->Chipset < 0) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Chipset \"%s\" is not recognised\n", pScrn->chipset); - xf86FreeInt10(pNv->pInt); - return FALSE; - } + } - xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset); + xf86SetOperatingState(resVgaIo, pNv->pEnt->index, ResUnusedOpr); + xf86SetOperatingState(resVgaMem, pNv->pEnt->index, ResDisableOpr); + /* Set pScrn->monitor */ + pScrn->monitor = pScrn->confScreen->monitor; - /* - * The first thing we should figure out is the depth, bpp, etc. - */ + /* + * Set the Chipset and ChipRev, allowing config file entries to + * override. + */ + if (pNv->pEnt->device->chipset && *pNv->pEnt->device->chipset) { + pScrn->chipset = pNv->pEnt->device->chipset; + pNv->Chipset = + xf86StringToToken(NVKnownChipsets, pScrn->chipset); + from = X_CONFIG; + } else if (pNv->pEnt->device->chipID >= 0) { + pNv->Chipset = pNv->pEnt->device->chipID; + pScrn->chipset = + (char *) xf86TokenToString(NVKnownChipsets, + pNv->Chipset); + from = X_CONFIG; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "ChipID override: 0x%04X\n", pNv->Chipset); + } else { + from = X_PROBED; + pNv->Chipset = + (pNv->PciInfo->vendor << 16) | pNv->PciInfo->chipType; + + if (((pNv->Chipset & 0xfff0) == CHIPSET_MISC_BRIDGED) || + ((pNv->Chipset & 0xfff0) == CHIPSET_G73_BRIDGED)) { + pNv->Chipset = NVGetPCIXpressChip(pNv->PciInfo); + } + + pScrn->chipset = + (char *) xf86TokenToString(NVKnownChipsets, + pNv->Chipset); + if (!pScrn->chipset) + pScrn->chipset = "Unknown NVIDIA chipset"; + } + + if (pNv->pEnt->device->chipRev >= 0) { + pNv->ChipRev = pNv->pEnt->device->chipRev; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "ChipRev override: %d\n", pNv->ChipRev); + } else { + pNv->ChipRev = pNv->PciInfo->chipRev; + } + + /* + * This shouldn't happen because such problems should be caught in + * NVProbe(), but check it just in case. + */ + if (pScrn->chipset == NULL) + NVPreInitFail("ChipID 0x%04X is not recognised\n", + pNv->Chipset); + + if (pNv->Chipset < 0) + NVPreInitFail("Chipset \"%s\" is not recognised\n", + pScrn->chipset); + + xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", + pScrn->chipset); + NVDetermineChipsetArch(pScrn); + + /* + * The first thing we should figure out is the depth, bpp, etc. + */ + + if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) + NVPreInitFail("\n"); - if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) { - xf86FreeInt10(pNv->pInt); - return FALSE; - } else { /* Check that the returned depth is one we support */ switch (pScrn->depth) { - case 8: - case 15: - case 16: - case 24: - /* OK */ - break; - default: - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Given depth (%d) is not supported by this driver\n", - pScrn->depth); - xf86FreeInt10(pNv->pInt); - return FALSE; - } - } - xf86PrintDepthBpp(pScrn); - - /* Get the depth24 pixmap format */ - if (pScrn->depth == 24 && pix24bpp == 0) - pix24bpp = xf86GetBppFromDepth(pScrn, 24); - - /* - * This must happen after pScrn->display has been set because - * xf86SetWeight references it. - */ - if (pScrn->depth > 8) { - /* The defaults are OK for us */ - rgb zeros = {0, 0, 0}; - - if (!xf86SetWeight(pScrn, zeros, zeros)) { - xf86FreeInt10(pNv->pInt); - return FALSE; - } - } - - if (!xf86SetDefaultVisual(pScrn, -1)) { - xf86FreeInt10(pNv->pInt); - return FALSE; - } else { + case 8: + case 15: + case 16: + case 24: + /* OK */ + break; + default: + NVPreInitFail("Given depth" + " (%d) is not supported by this driver\n", + pScrn->depth); + break; + } + xf86PrintDepthBpp(pScrn); + + /* Get the depth24 pixmap format */ + if (pScrn->depth == 24 && pix24bpp == 0) + pix24bpp = xf86GetBppFromDepth(pScrn, 24); + + /* + * This must happen after pScrn->display has been set because + * xf86SetWeight references it. + */ + if (pScrn->depth > 8) { + /* The defaults are OK for us */ + rgb zeros = { 0, 0, 0 }; + + if (!xf86SetWeight(pScrn, zeros, zeros)) + NVPreInitFail("\n"); + } + + if (!xf86SetDefaultVisual(pScrn, -1)) + NVPreInitFail("\n"); + /* We don't currently support DirectColor at > 8bpp */ - if (pScrn->depth > 8 && (pScrn->defaultVisual != TrueColor)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual" - " (%s) is not supported at depth %d\n", - xf86GetVisualName(pScrn->defaultVisual), pScrn->depth); - xf86FreeInt10(pNv->pInt); - return FALSE; - } - } - - /* The vgahw module should be loaded here when needed */ - if (!xf86LoadSubModule(pScrn, "vgahw")) { - xf86FreeInt10(pNv->pInt); - return FALSE; - } - - xf86LoaderReqSymLists(vgahwSymbols, NULL); - - /* - * Allocate a vgaHWRec - */ - if (!vgaHWGetHWRec(pScrn)) { - xf86FreeInt10(pNv->pInt); - return FALSE; - } - - /* We use a programmable clock */ - pScrn->progClock = TRUE; + if (pScrn->depth > 8 && (pScrn->defaultVisual != TrueColor)) + NVPreInitFail("Given default visual" + " (%s) is not supported at depth %d\n", + xf86GetVisualName(pScrn->defaultVisual), + pScrn->depth); + + /* The vgahw module should be loaded here when needed */ + if (!xf86LoadSubModule(pScrn, "vgahw")) + NVPreInitFail("\n"); + xf86LoaderReqSymLists(vgahwSymbols, NULL); + + /* + * Allocate a vgaHWRec + */ + if (!vgaHWGetHWRec(pScrn)) + NVPreInitFail("\n"); + + /* We use a programmable clock */ + pScrn->progClock = TRUE; + + /* Collect all of the relevant option flags (fill in pScrn->options) */ + xf86CollectOptions(pScrn, NULL); + + /* Process the options */ + if (!(pNv->Options = xalloc(sizeof(NVOptions)))) + NVPreInitFail("\n"); + memcpy(pNv->Options, NVOptions, sizeof(NVOptions)); + xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pNv->Options); + + /* Set the bits per RGB for 8bpp mode */ + if (pScrn->depth == 8) + pScrn->rgbBits = 8; + + from = X_DEFAULT; + pNv->HWCursor = TRUE; + /* + * The preferred method is to use the "hw cursor" option as a tri-state + * option, with the default set above. + */ + if (xf86GetOptValBool + (pNv->Options, OPTION_HW_CURSOR, &pNv->HWCursor)) { + from = X_CONFIG; + } + /* For compatibility, accept this too (as an override) */ + if (xf86ReturnOptValBool(pNv->Options, OPTION_SW_CURSOR, FALSE)) { + from = X_CONFIG; + pNv->HWCursor = FALSE; + } + xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", + pNv->HWCursor ? "HW" : "SW"); + + pNv->FpScale = TRUE; + if (xf86GetOptValBool + (pNv->Options, OPTION_FP_SCALE, &pNv->FpScale)) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Flat panel scaling %s\n", + pNv->FpScale ? "on" : "off"); + } + if (xf86ReturnOptValBool(pNv->Options, OPTION_NOACCEL, FALSE)) { + pNv->NoAccel = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Acceleration disabled\n"); + } else if (pNv->Architecture == NV_ARCH_50) { + pNv->NoAccel = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "NV50 detected, acceleration not currently supported\n"); + } - /* Collect all of the relevant option flags (fill in pScrn->options) */ - xf86CollectOptions(pScrn, NULL); + if (xf86ReturnOptValBool(pNv->Options, OPTION_SHADOW_FB, FALSE)) { + pNv->ShadowFB = TRUE; + pNv->NoAccel = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using \"Shadow Framebuffer\" - acceleration disabled\n"); + } + if (!pNv->NoAccel) { + from = X_DEFAULT; + pNv->useEXA = TRUE; + if ((s = + (char *) xf86GetOptValString(pNv->Options, + OPTION_ACCELMETHOD))) { + if (!xf86NameCmp(s, "XAA")) { + from = X_CONFIG; + pNv->useEXA = FALSE; + } else if (!xf86NameCmp(s, "EXA")) { + from = X_CONFIG; + pNv->useEXA = TRUE; + } + } + xf86DrvMsg(pScrn->scrnIndex, from, + "Using %s acceleration method\n", + pNv->useEXA ? "EXA" : "XAA"); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Acceleration disabled\n"); + } - /* Process the options */ - if (!(pNv->Options = xalloc(sizeof(NVOptions)))) - return FALSE; - memcpy(pNv->Options, NVOptions, sizeof(NVOptions)); - xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pNv->Options); - - /* Set the bits per RGB for 8bpp mode */ - if (pScrn->depth == 8) - pScrn->rgbBits = 8; - - from = X_DEFAULT; - pNv->HWCursor = TRUE; - /* - * The preferred method is to use the "hw cursor" option as a tri-state - * option, with the default set above. - */ - if (xf86GetOptValBool(pNv->Options, OPTION_HW_CURSOR, &pNv->HWCursor)) { - from = X_CONFIG; - } - /* For compatibility, accept this too (as an override) */ - if (xf86ReturnOptValBool(pNv->Options, OPTION_SW_CURSOR, FALSE)) { - from = X_CONFIG; - pNv->HWCursor = FALSE; - } - xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", - pNv->HWCursor ? "HW" : "SW"); - - pNv->FpScale = TRUE; - if (xf86GetOptValBool(pNv->Options, OPTION_FP_SCALE, &pNv->FpScale)) { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Flat panel scaling %s\n", - pNv->FpScale ? "on" : "off"); - } - if (xf86ReturnOptValBool(pNv->Options, OPTION_NOACCEL, FALSE)) { - pNv->NoAccel = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n"); - } - if (xf86ReturnOptValBool(pNv->Options, OPTION_SHADOW_FB, FALSE)) { - pNv->ShadowFB = TRUE; - pNv->NoAccel = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "Using \"Shadow Framebuffer\" - acceleration disabled\n"); - } - if (!pNv->NoAccel) { - from = X_DEFAULT; - pNv->useEXA = TRUE; - if((s = (char *)xf86GetOptValString(pNv->Options, OPTION_ACCELMETHOD))) { - if(!xf86NameCmp(s,"XAA")) { - from = X_CONFIG; - pNv->useEXA = FALSE; - } else if(!xf86NameCmp(s,"EXA")) { - from = X_CONFIG; - pNv->useEXA = TRUE; - } - } - xf86DrvMsg(pScrn->scrnIndex, from, "Using %s acceleration method\n", pNv->useEXA ? "EXA" : "XAA"); - } else { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n"); - } - - pNv->Rotate = 0; - pNv->RandRRotation = FALSE; - if ((s = xf86GetOptValString(pNv->Options, OPTION_ROTATE))) { - if(!xf86NameCmp(s, "CW")) { - pNv->ShadowFB = TRUE; - pNv->NoAccel = TRUE; - pNv->HWCursor = FALSE; - pNv->Rotate = 1; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "Rotating screen clockwise - acceleration disabled\n"); - } else - if(!xf86NameCmp(s, "CCW")) { - pNv->ShadowFB = TRUE; - pNv->NoAccel = TRUE; - pNv->HWCursor = FALSE; - pNv->Rotate = -1; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "Rotating screen counter clockwise - acceleration disabled\n"); - } else - if(!xf86NameCmp(s, "RandR")) { + pNv->Rotate = 0; + pNv->RandRRotation = FALSE; + if ((s = xf86GetOptValString(pNv->Options, OPTION_ROTATE))) { + if (!xf86NameCmp(s, "CW")) { + pNv->ShadowFB = TRUE; + pNv->NoAccel = TRUE; + pNv->HWCursor = FALSE; + pNv->Rotate = 1; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Rotating screen clockwise - acceleration disabled\n"); + } else if (!xf86NameCmp(s, "CCW")) { + pNv->ShadowFB = TRUE; + pNv->NoAccel = TRUE; + pNv->HWCursor = FALSE; + pNv->Rotate = -1; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Rotating screen counter clockwise - acceleration disabled\n"); + } else if (!xf86NameCmp(s, "RandR")) { #ifdef RANDR - pNv->ShadowFB = TRUE; - pNv->NoAccel = TRUE; - pNv->HWCursor = FALSE; - pNv->RandRRotation = TRUE; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "Using RandR rotation - acceleration disabled\n"); + pNv->ShadowFB = TRUE; + pNv->NoAccel = TRUE; + pNv->HWCursor = FALSE; + pNv->RandRRotation = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using RandR rotation - acceleration disabled\n"); #else - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "This driver was not compiled with support for the Resize and " - "Rotate extension. Cannot honor 'Option \"Rotate\" " - "\"RandR\"'.\n"); + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "This driver was not compiled with support for the Resize and " + "Rotate extension. Cannot honor 'Option \"Rotate\" " + "\"RandR\"'.\n"); #endif - } else { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "\"%s\" is not a valid value for Option \"Rotate\"\n", s); - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Valid options are \"CW\", \"CCW\", and \"RandR\"\n"); - } - } - - if(xf86GetOptValInteger(pNv->Options, OPTION_VIDEO_KEY, &(pNv->videoKey))) { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "video key set to 0x%x\n", - pNv->videoKey); - } else { - pNv->videoKey = (1 << pScrn->offset.red) | - (1 << pScrn->offset.green) | - (((pScrn->mask.blue >> pScrn->offset.blue) - 1) << pScrn->offset.blue); - } - - if (xf86GetOptValBool(pNv->Options, OPTION_FLAT_PANEL, &(pNv->FlatPanel))) { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "forcing %s usage\n", - pNv->FlatPanel ? "DFP" : "CRTC"); - } else { - pNv->FlatPanel = -1; /* autodetect later */ - } - - pNv->FPDither = FALSE; - if (xf86GetOptValBool(pNv->Options, OPTION_FP_DITHER, &(pNv->FPDither))) - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "enabling flat panel dither\n"); - - if (xf86GetOptValInteger(pNv->Options, OPTION_CRTC_NUMBER, - &pNv->CRTCnumber)) - { - if((pNv->CRTCnumber < 0) || (pNv->CRTCnumber > 1)) { - pNv->CRTCnumber = -1; - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, - "Invalid CRTC number. Must be 0 or 1\n"); - } - } else { - pNv->CRTCnumber = -1; /* autodetect later */ - } - - - if (xf86GetOptValInteger(pNv->Options, OPTION_FP_TWEAK, - &pNv->PanelTweak)) - { - pNv->usePanelTweak = TRUE; - } else { - pNv->usePanelTweak = FALSE; - } - - if (pNv->pEnt->device->MemBase != 0) { - /* Require that the config file value matches one of the PCI values. */ - if (!xf86CheckPciMemBase(pNv->PciInfo, pNv->pEnt->device->MemBase)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "MemBase 0x%08lX doesn't match any PCI base register.\n", - pNv->pEnt->device->MemBase); - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } - pNv->VRAMPhysical = pNv->pEnt->device->MemBase; - from = X_CONFIG; - } else { - if (pNv->PciInfo->memBase[1] != 0) { - pNv->VRAMPhysical = pNv->PciInfo->memBase[1] & 0xff800000; - from = X_PROBED; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "\"%s\" is not a valid value for Option \"Rotate\"\n", + s); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Valid options are \"CW\", \"CCW\", and \"RandR\"\n"); + } + } + + if (xf86GetOptValInteger + (pNv->Options, OPTION_VIDEO_KEY, &(pNv->videoKey))) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "video key set to 0x%x\n", pNv->videoKey); } else { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "No valid FB address in PCI config space\n"); - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } - } - xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n", - (unsigned long)pNv->VRAMPhysical); - - if (pNv->pEnt->device->IOBase != 0) { - /* Require that the config file value matches one of the PCI values. */ - if (!xf86CheckPciMemBase(pNv->PciInfo, pNv->pEnt->device->IOBase)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "IOBase 0x%08lX doesn't match any PCI base register.\n", - pNv->pEnt->device->IOBase); - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } - pNv->IOAddress = pNv->pEnt->device->IOBase; - from = X_CONFIG; - } else { - if (pNv->PciInfo->memBase[0] != 0) { - pNv->IOAddress = pNv->PciInfo->memBase[0] & 0xffffc000; - from = X_PROBED; + pNv->videoKey = (1 << pScrn->offset.red) | + (1 << pScrn->offset.green) | + (((pScrn->mask.blue >> pScrn->offset.blue) - + 1) << pScrn->offset.blue); + } + + if (xf86GetOptValBool + (pNv->Options, OPTION_FLAT_PANEL, &(pNv->FlatPanel))) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "forcing %s usage\n", + pNv->FlatPanel ? "DFP" : "CRTC"); } else { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "No valid MMIO address in PCI config space\n"); - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } - } - xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n", - (unsigned long)pNv->IOAddress); - - if (xf86RegisterResources(pNv->pEnt->index, NULL, ResExclusive)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "xf86RegisterResources() found resource conflicts\n"); - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } - - switch (pNv->Chipset & 0x0ff0) { - case CHIPSET_NV03: /* Riva128 */ - pNv->Architecture = NV_ARCH_03; - break; - case CHIPSET_NV04: /* TNT/TNT2 */ - pNv->Architecture = NV_ARCH_04; - break; - case CHIPSET_NV10: /* GeForce 256 */ - case CHIPSET_NV11: /* GeForce2 MX */ - case CHIPSET_NV15: /* GeForce2 */ - case CHIPSET_NV17: /* GeForce4 MX */ - case CHIPSET_NV18: /* GeForce4 MX (8x AGP) */ - case CHIPSET_NFORCE: /* nForce */ - case CHIPSET_NFORCE2:/* nForce2 */ - pNv->Architecture = NV_ARCH_10; - break; - case CHIPSET_NV20: /* GeForce3 */ - case CHIPSET_NV25: /* GeForce4 Ti */ - case CHIPSET_NV28: /* GeForce4 Ti (8x AGP) */ - pNv->Architecture = NV_ARCH_20; - break; - case CHIPSET_NV30: /* GeForceFX 5800 */ - case CHIPSET_NV31: /* GeForceFX 5600 */ - case CHIPSET_NV34: /* GeForceFX 5200 */ - case CHIPSET_NV35: /* GeForceFX 5900 */ - case CHIPSET_NV36: /* GeForceFX 5700 */ - pNv->Architecture = NV_ARCH_30; - break; - case CHIPSET_NV40: /* GeForce 6800 */ - case CHIPSET_NV41: /* GeForce 6800 */ - case 0x0120: /* GeForce 6800 */ - case CHIPSET_NV43: /* GeForce 6600 */ - case CHIPSET_NV44: /* GeForce 6200 */ - case CHIPSET_G72: /* GeForce 7200, 7300, 7400 */ - case CHIPSET_G70: /* GeForce 7800 */ - case CHIPSET_NV45: /* GeForce 6800 */ - case CHIPSET_NV44A: /* GeForce 6200 */ - case CHIPSET_G71: /* GeForce 7900 */ - case CHIPSET_G73: /* GeForce 7600 */ - case CHIPSET_C51: /* GeForce 6100 */ - case CHIPSET_C512: /* Geforce 6100 (nForce 4xx) */ - pNv->Architecture = NV_ARCH_40; - break; - default: /* Unknown, probably >=NV40 */ - pNv->Architecture = NV_ARCH_40; - break; - } - - pNv->alphaCursor = (pNv->Architecture >= NV_ARCH_10) && - ((pNv->Chipset & 0x0ff0) != CHIPSET_NV10); - - - /* Allocate an xf86CrtcConfig */ - xf86CrtcConfigInit (pScrn, &nv_xf86crtc_config_funcs); - xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); - - max_width = 16384; - xf86CrtcSetSizeRange (pScrn, 320, 200, max_width, 2048); - - if (NVPreInitDRI(pScrn) == FALSE) { - xf86FreeInt10(pNv->pInt); - return FALSE; - } - - NVCommonSetup(pScrn); - NVI2CInit(pScrn); - - num_crtc = pNv->twoHeads ? 2 : 1; - for (i = 0; i < num_crtc; i++) { - nv_crtc_init(pScrn, i); - } - - NvSetupOutputs(pScrn); + pNv->FlatPanel = -1; /* autodetect later */ + } + + pNv->FPDither = FALSE; + if (xf86GetOptValBool + (pNv->Options, OPTION_FP_DITHER, &(pNv->FPDither))) + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "enabling flat panel dither\n"); + + if (xf86GetOptValInteger(pNv->Options, OPTION_CRTC_NUMBER, + &pNv->CRTCnumber)) { + if ((pNv->CRTCnumber < 0) || (pNv->CRTCnumber > 1)) { + pNv->CRTCnumber = -1; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Invalid CRTC number. Must be 0 or 1\n"); + } + } else { + pNv->CRTCnumber = -1; /* autodetect later */ + } + + + if (xf86GetOptValInteger(pNv->Options, OPTION_FP_TWEAK, + &pNv->PanelTweak)) { + pNv->usePanelTweak = TRUE; + } else { + pNv->usePanelTweak = FALSE; + } + + if (pNv->pEnt->device->MemBase != 0) { + /* Require that the config file value matches one of the PCI values. */ + if (!xf86CheckPciMemBase + (pNv->PciInfo, pNv->pEnt->device->MemBase)) + NVPreInitFail("MemBase 0x%08lX doesn't match any" + " PCI base register.\n", + pNv->pEnt->device->MemBase); + pNv->VRAMPhysical = pNv->pEnt->device->MemBase; + from = X_CONFIG; + } else { + if (pNv->PciInfo->memBase[1] == 0) + NVPreInitFail("No valid FB address in PCI" + " config space\n"); + + pNv->VRAMPhysical = pNv->PciInfo->memBase[1] & 0xff800000; + from = X_PROBED; + } + xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n", + (unsigned long) pNv->VRAMPhysical); + + if (pNv->pEnt->device->IOBase != 0) { + /* Require that the config file value matches one of the PCI values. */ + if (!xf86CheckPciMemBase + (pNv->PciInfo, pNv->pEnt->device->IOBase)) + NVPreInitFail("IOBase 0x%08lX doesn't match any" + " PCI base register.\n", + pNv->pEnt->device->IOBase); + pNv->IOAddress = pNv->pEnt->device->IOBase; + from = X_CONFIG; + } else { + if (pNv->PciInfo->memBase[0] == 0) + NVPreInitFail("No valid MMIO address in" + " PCI config space\n"); + + pNv->IOAddress = pNv->PciInfo->memBase[0] & 0xffffc000; + from = X_PROBED; + } + xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n", + (unsigned long) pNv->IOAddress); + + if (xf86RegisterResources(pNv->pEnt->index, NULL, ResExclusive)) + NVPreInitFail("xf86RegisterResources() found" + " resource conflicts\n"); + + pNv->alphaCursor = (pNv->Architecture >= NV_ARCH_10) && + ((pNv->Chipset & 0x0ff0) != CHIPSET_NV10); + + + /* Allocate an xf86CrtcConfig */ + xf86CrtcConfigInit(pScrn, &nv_xf86crtc_config_funcs); + xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + + max_width = 16384; + xf86CrtcSetSizeRange(pScrn, 320, 200, max_width, 2048); + + if (!NVPreInitDRI(pScrn)) + NVPreInitFail("\n"); + + NVCommonSetup(pScrn); + + if (pNv->Architecture < NV_ARCH_50) { + NVI2CInit(pScrn); + + num_crtc = pNv->twoHeads ? 2 : 1; + for (i = 0; i < num_crtc; i++) { + nv_crtc_init(pScrn, i); + } + + NvSetupOutputs(pScrn); + } else { + if (!NV50DispPreInit(pScrn)) + NVPreInitFail("\n"); + if (!NV50CreateOutputs(pScrn)) + NVPreInitFail("\n"); + NV50DispCreateCrtcs(pScrn); + } + #if 0 - /* Do an initial detection of the outputs while none are configured on yet. - * This will give us some likely legitimate response for later if both - * pipes are already allocated and we're asked to do a detect. - */ - for (i = 0; i < xf86_config->num_output; i++) { - xf86OutputPtr output = xf86_config->output[i]; - - output->status = (*output->funcs->detect) (output); - } + /* Do an initial detection of the outputs while none are configured on yet. + * This will give us some likely legitimate response for later if both + * pipes are already allocated and we're asked to do a detect. + */ + for (i = 0; i < xf86_config->num_output; i++) { + xf86OutputPtr output = xf86_config->output[i]; + + output->status = (*output->funcs->detect) (output); + } #endif - - if (!xf86InitialConfiguration (pScrn, FALSE)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes.\n"); - return FALSE; - } + if (!xf86InitialConfiguration(pScrn, FALSE)) + NVPreInitFail("No valid modes.\n"); + + pScrn->videoRam = pNv->RamAmountKBytes; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "VideoRAM: %d kBytes\n", + pScrn->videoRam); - pScrn->videoRam = pNv->RamAmountKBytes; - xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "VideoRAM: %d kBytes\n", - pScrn->videoRam); - pNv->VRAMPhysicalSize = pScrn->videoRam * 1024; - /* - * If the driver can do gamma correction, it should call xf86SetGamma() - * here. - */ - - { - Gamma zeros = {0.0, 0.0, 0.0}; - - if (!xf86SetGamma(pScrn, zeros)) { - xf86FreeInt10(pNv->pInt); - return FALSE; - } - } - - /* - * Setup the ClockRanges, which describe what clock ranges are available, - * and what sort of modes they can be used for. - */ - - clockRanges = xnfcalloc(sizeof(ClockRange), 1); - clockRanges->next = NULL; - clockRanges->minClock = pNv->MinVClockFreqKHz; - clockRanges->maxClock = pNv->MaxVClockFreqKHz; - clockRanges->clockIndex = -1; /* programmable */ - clockRanges->doubleScanAllowed = TRUE; - if((pNv->Architecture == NV_ARCH_20) || - ((pNv->Architecture == NV_ARCH_10) && - ((pNv->Chipset & 0x0ff0) != CHIPSET_NV10) && - ((pNv->Chipset & 0x0ff0) != CHIPSET_NV15))) - { - /* HW is broken */ - clockRanges->interlaceAllowed = FALSE; - } else { - clockRanges->interlaceAllowed = TRUE; - } - - if(pNv->FlatPanel == 1) { - clockRanges->interlaceAllowed = FALSE; - clockRanges->doubleScanAllowed = FALSE; - } - - if(pNv->Architecture < NV_ARCH_10) { - max_width = (pScrn->bitsPerPixel > 16) ? 2032 : 2048; - max_height = 2048; - } else { - max_width = (pScrn->bitsPerPixel > 16) ? 4080 : 4096; - max_height = 4096; - } - - /* - * xf86ValidateModes will check that the mode HTotal and VTotal values - * don't exceed the chipset's limit if pScrn->maxHValue and - * pScrn->maxVValue are set. Since our NVValidMode() already takes - * care of this, we don't worry about setting them here. - */ - i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, - pScrn->display->modes, clockRanges, - NULL, 256, max_width, - 512, 128, max_height, - pScrn->display->virtualX, - pScrn->display->virtualY, - pNv->VRAMPhysicalSize / 2, - LOOKUP_BEST_REFRESH); - - if (i == -1) { - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } + /* + * If the driver can do gamma correction, it should call xf86SetGamma() + * here. + */ - /* Prune the modes marked as invalid */ - xf86PruneDriverModes(pScrn); + { + Gamma zeros = { 0.0, 0.0, 0.0 }; - if (i == 0 || pScrn->modes == NULL) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } + if (!xf86SetGamma(pScrn, zeros)) + NVPreInitFail("\n"); + } + + /* + * Setup the ClockRanges, which describe what clock ranges are available, + * and what sort of modes they can be used for. + */ + + clockRanges = xnfcalloc(sizeof(ClockRange), 1); + clockRanges->next = NULL; + clockRanges->minClock = pNv->MinVClockFreqKHz; + clockRanges->maxClock = pNv->MaxVClockFreqKHz; + clockRanges->clockIndex = -1; /* programmable */ + clockRanges->doubleScanAllowed = TRUE; + if ((pNv->Architecture == NV_ARCH_20) || + ((pNv->Architecture == NV_ARCH_10) && + ((pNv->Chipset & 0x0ff0) != CHIPSET_NV10) && + ((pNv->Chipset & 0x0ff0) != CHIPSET_NV15))) { + /* HW is broken */ + clockRanges->interlaceAllowed = FALSE; + } else { + clockRanges->interlaceAllowed = TRUE; + } + + if (pNv->FlatPanel == 1) { + clockRanges->interlaceAllowed = FALSE; + clockRanges->doubleScanAllowed = FALSE; + } + + if (pNv->Architecture < NV_ARCH_10) { + max_width = (pScrn->bitsPerPixel > 16) ? 2032 : 2048; + max_height = 2048; + } else { + max_width = (pScrn->bitsPerPixel > 16) ? 4080 : 4096; + max_height = 4096; + } - /* - * Set the CRTC parameters for all of the modes based on the type - * of mode, and the chipset's interlace requirements. - * - * Calling this is required if the mode->Crtc* values are used by the - * driver and if the driver doesn't provide code to set them. They - * are not pre-initialised at all. - */ - xf86SetCrtcForModes(pScrn, 0); + /* + * xf86ValidateModes will check that the mode HTotal and VTotal values + * don't exceed the chipset's limit if pScrn->maxHValue and + * pScrn->maxVValue are set. Since our NVValidMode() already takes + * care of this, we don't worry about setting them here. + */ + i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, + pScrn->display->modes, clockRanges, + NULL, 256, max_width, + 512, 128, max_height, + pScrn->display->virtualX, + pScrn->display->virtualY, + pNv->VRAMPhysicalSize / 2, + LOOKUP_BEST_REFRESH); + + if (i == -1) + NVPreInitFail("\n"); + + /* Prune the modes marked as invalid */ + xf86PruneDriverModes(pScrn); + + if (i == 0 || pScrn->modes == NULL) + NVPreInitFail("No valid modes found.\n"); + + /* + * Set the CRTC parameters for all of the modes based on the type + * of mode, and the chipset's interlace requirements. + * + * Calling this is required if the mode->Crtc* values are used by the + * driver and if the driver doesn't provide code to set them. They + * are not pre-initialised at all. + */ + xf86SetCrtcForModes(pScrn, 0); - /* Set the current mode to the first in the list */ - pScrn->currentMode = pScrn->modes; + /* Set the current mode to the first in the list */ + pScrn->currentMode = pScrn->modes; - /* Print the list of modes being used */ - xf86PrintModes(pScrn); + /* Print the list of modes being used */ + xf86PrintModes(pScrn); - /* Set display resolution */ - xf86SetDpi(pScrn, 0, 0); + /* Set display resolution */ + xf86SetDpi(pScrn, 0, 0); - /* - * XXX This should be taken into account in some way in the mode valdation - * section. - */ + /* + * XXX This should be taken into account in some way in the mode valdation + * section. + */ - if (xf86LoadSubModule(pScrn, "fb") == NULL) { - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } - - xf86LoaderReqSymLists(fbSymbols, NULL); - - /* Load XAA if needed */ - if (!pNv->NoAccel) { - if (!xf86LoadSubModule(pScrn, pNv->useEXA ? "exa" : "xaa")) { - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } - xf86LoaderReqSymLists(xaaSymbols, NULL); - } - - /* Load ramdac if needed */ - if (pNv->HWCursor) { - if (!xf86LoadSubModule(pScrn, "ramdac")) { - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } - xf86LoaderReqSymLists(ramdacSymbols, NULL); - } - - /* Load shadowfb if needed */ - if (pNv->ShadowFB) { - if (!xf86LoadSubModule(pScrn, "shadowfb")) { - xf86FreeInt10(pNv->pInt); - NVFreeRec(pScrn); - return FALSE; - } - xf86LoaderReqSymLists(shadowSymbols, NULL); - } - - pNv->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel; - pNv->CurrentLayout.depth = pScrn->depth; - pNv->CurrentLayout.displayWidth = pScrn->displayWidth; - pNv->CurrentLayout.weight.red = pScrn->weight.red; - pNv->CurrentLayout.weight.green = pScrn->weight.green; - pNv->CurrentLayout.weight.blue = pScrn->weight.blue; - pNv->CurrentLayout.mode = pScrn->currentMode; - - if (pScrn->modes == NULL) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No modes.\n"); - PreInitCleanup(pScrn); - return FALSE; - } + if (xf86LoadSubModule(pScrn, "fb") == NULL) + NVPreInitFail("\n"); + xf86LoaderReqSymLists(fbSymbols, NULL); - pScrn->currentMode = pScrn->modes; + /* Load XAA if needed */ + if (!pNv->NoAccel) { + if (!xf86LoadSubModule(pScrn, pNv->useEXA ? "exa" : "xaa")) + NVPreInitFail("\n"); + xf86LoaderReqSymLists(xaaSymbols, NULL); + } - xf86FreeInt10(pNv->pInt); + /* Load ramdac if needed */ + if (pNv->HWCursor) { + if (!xf86LoadSubModule(pScrn, "ramdac")) + NVPreInitFail("\n"); + xf86LoaderReqSymLists(ramdacSymbols, NULL); + } + + /* Load shadowfb if needed */ + if (pNv->ShadowFB) { + if (!xf86LoadSubModule(pScrn, "shadowfb")) + NVPreInitFail("\n"); + xf86LoaderReqSymLists(shadowSymbols, NULL); + } - pNv->pInt = NULL; - return TRUE; + pNv->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel; + pNv->CurrentLayout.depth = pScrn->depth; + pNv->CurrentLayout.displayWidth = pScrn->displayWidth; + pNv->CurrentLayout.weight.red = pScrn->weight.red; + pNv->CurrentLayout.weight.green = pScrn->weight.green; + pNv->CurrentLayout.weight.blue = pScrn->weight.blue; + pNv->CurrentLayout.mode = pScrn->currentMode; + + if (pScrn->modes == NULL) + NVPreInitFail("No modes.\n"); + + pScrn->currentMode = pScrn->modes; + + return TRUE; } @@ -1778,7 +1805,9 @@ NVMapMem(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); - pNv->FB = NVAllocateMemory(pNv, NOUVEAU_MEM_FB, pNv->VRAMPhysicalSize/2); + pNv->FB = + NVAllocateMemory(pNv, NOUVEAU_MEM_FB, + pNv->VRAMPhysicalSize / 2); if (!pNv->FB) { ErrorF("Failed to allocate memory for framebuffer!\n"); return FALSE; @@ -1790,10 +1819,12 @@ NVMapMem(ScrnInfoPtr pScrn) /*XXX: have to get these after we've allocated something, otherwise * they're uninitialised in the DRM! */ - pNv->VRAMSize = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_FB_SIZE); - pNv->VRAMPhysical = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_FB_PHYSICAL); - pNv->AGPSize = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_AGP_SIZE); - pNv->AGPPhysical = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_AGP_PHYSICAL); + pNv->VRAMSize = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_FB_SIZE); + pNv->VRAMPhysical = + NVDRMGetParam(pNv, NOUVEAU_GETPARAM_FB_PHYSICAL); + pNv->AGPSize = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_AGP_SIZE); + pNv->AGPPhysical = + NVDRMGetParam(pNv, NOUVEAU_GETPARAM_AGP_PHYSICAL); if (pNv->AGPSize) { int gart_scratch_size; @@ -1802,8 +1833,8 @@ NVMapMem(ScrnInfoPtr pScrn) "GART: %dMiB available\n", (unsigned int)(pNv->AGPSize >> 20)); - if (pNv->AGPSize > (16*1024*1024)) - gart_scratch_size = 16*1024*1024; + if (pNv->AGPSize > (16 * 1024 * 1024)) + gart_scratch_size = 16 * 1024 * 1024; else gart_scratch_size = pNv->AGPSize; @@ -1820,24 +1851,33 @@ NVMapMem(ScrnInfoPtr pScrn) } } - pNv->Cursor = NVAllocateMemory(pNv, NOUVEAU_MEM_FB, 64*1024); + pNv->Cursor = NVAllocateMemory(pNv, NOUVEAU_MEM_FB, 64 * 1024); if (!pNv->Cursor) { ErrorF("Failed to allocate memory for hardware cursor\n"); return FALSE; } xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Allocated %dKiB VRAM for cursor\n", - pNv->Cursor->size >> 10 - ); + "Allocated %dKiB VRAM for cursor\n", + pNv->Cursor->size >> 10); + + if (pNv->Architecture == NV_ARCH_50) { + pNv->CLUT = NVAllocateMemory(pNv, NOUVEAU_MEM_FB, 0x1000); + if (!pNv->CLUT) { + ErrorF("Failed to allocate memory for CLUT\n"); + return FALSE; + } + } else + pNv->CLUT = NULL; pNv->ScratchBuffer = NVAllocateMemory(pNv, NOUVEAU_MEM_FB, - pNv->Architecture <NV_ARCH_10 ? 8192 : 16384); + pNv->Architecture < + NV_ARCH_10 ? 8192 : 16384); if (!pNv->ScratchBuffer) { ErrorF("Failed to allocate memory for scratch buffer\n"); return FALSE; } - return TRUE; + return TRUE; } /* @@ -1853,7 +1893,7 @@ NVUnmapMem(ScrnInfoPtr pScrn) NVFreeMemory(pNv, pNv->ScratchBuffer); NVFreeMemory(pNv, pNv->Cursor); - return TRUE; + return TRUE; } @@ -1864,37 +1904,38 @@ NVUnmapMem(ScrnInfoPtr pScrn) /* * Restore the initial (text) mode. */ -static void +static void NVRestore(ScrnInfoPtr pScrn) { - vgaHWPtr hwp = VGAHWPTR(pScrn); - vgaRegPtr vgaReg = &hwp->SavedReg; - NVPtr pNv = NVPTR(pScrn); - xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); - NVRegPtr nvReg = &pNv->SavedReg; - int i; - int vgaflags = VGA_SR_CMAP | VGA_SR_MODE; + vgaHWPtr hwp = VGAHWPTR(pScrn); + vgaRegPtr vgaReg = &hwp->SavedReg; + NVPtr pNv = NVPTR(pScrn); + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + NVRegPtr nvReg = &pNv->SavedReg; + int i; + int vgaflags = VGA_SR_CMAP | VGA_SR_MODE; - NVCrtcLockUnlock(xf86_config->crtc[0], 0); - NVCrtcLockUnlock(xf86_config->crtc[1], 0); + NVCrtcLockUnlock(xf86_config->crtc[0], 0); + NVCrtcLockUnlock(xf86_config->crtc[1], 0); - for (i = 0; i < xf86_config->num_crtc; i++) { - xf86_config->crtc[i]->funcs->restore(xf86_config->crtc[i]); - } + for (i = 0; i < xf86_config->num_crtc; i++) { + xf86_config->crtc[i]->funcs->restore(xf86_config->crtc[i]); + } - for (i = 0; i< xf86_config->num_output; i++) { - xf86_config->output[i]->funcs->restore(xf86_config->output[i]); - } + for (i = 0; i < xf86_config->num_output; i++) { + xf86_config->output[i]->funcs->restore(xf86_config-> + output[i]); + } #ifndef __powerpc__ - vgaflags |= VGA_SR_FONTS; + vgaflags |= VGA_SR_FONTS; #endif - vgaHWRestore(pScrn, vgaReg, vgaflags); + vgaHWRestore(pScrn, vgaReg, vgaflags); - vgaHWLock(hwp); - NVCrtcLockUnlock(xf86_config->crtc[0], 1); - NVCrtcLockUnlock(xf86_config->crtc[1], 1); + vgaHWLock(hwp); + NVCrtcLockUnlock(xf86_config->crtc[0], 1); + NVCrtcLockUnlock(xf86_config->crtc[1], 1); } @@ -1906,52 +1947,109 @@ static void NVLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO * colors, VisualPtr pVisual) { - xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); - int c; - NVPtr pNv = NVPTR(pScrn); - int i, index; - - for (c = 0; c < xf86_config->num_crtc; c++){ - xf86CrtcPtr crtc = xf86_config->crtc[c]; - NVCrtcPrivatePtr nv_crtc = crtc->driver_private; - NVCrtcRegPtr regp; - - regp = &pNv->ModeReg.crtc_reg[nv_crtc->crtc]; - - if (crtc->enabled == 0) - continue; - - switch(pNv->CurrentLayout.depth) { - case 15: - for(i = 0; i < numColors; i++) { - index = indices[i]; - regp->DAC[MAKE_INDEX(index, 5) + 0] = colors[index].red; - regp->DAC[MAKE_INDEX(index, 5) + 1] = colors[index].green; - regp->DAC[MAKE_INDEX(index, 5) + 2] = colors[index].blue; - } - break; - case 16: - for(i = 0; i < numColors; i++) { - index = indices[i]; - regp->DAC[MAKE_INDEX(index, 6) + 1] = colors[index].green; - if(index < 32) { - regp->DAC[MAKE_INDEX(index, 5) + 0] = colors[index].red; - regp->DAC[MAKE_INDEX(index, 5) + 2] = colors[index].blue; - } - } - break; - default: - for(i = 0; i < numColors; i++) { - index = indices[i]; - regp->DAC[index*3] = colors[index].red; - regp->DAC[(index*3)+1] = colors[index].green; - regp->DAC[(index*3)+2] = colors[index].blue; - } - break; - } - - NVCrtcLoadPalette(crtc); - } + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + int c; + NVPtr pNv = NVPTR(pScrn); + int i, index; + + for (c = 0; c < xf86_config->num_crtc; c++) { + xf86CrtcPtr crtc = xf86_config->crtc[c]; + NVCrtcPrivatePtr nv_crtc = crtc->driver_private; + NVCrtcRegPtr regp; + + regp = &pNv->ModeReg.crtc_reg[nv_crtc->crtc]; + + if (crtc->enabled == 0) + continue; + + switch (pNv->CurrentLayout.depth) { + case 15: + for (i = 0; i < numColors; i++) { + index = indices[i]; + regp->DAC[MAKE_INDEX(index, 5) + 0] = + colors[index].red; + regp->DAC[MAKE_INDEX(index, 5) + 1] = + colors[index].green; + regp->DAC[MAKE_INDEX(index, 5) + 2] = + colors[index].blue; + } + break; + case 16: + for (i = 0; i < numColors; i++) { + index = indices[i]; + regp->DAC[MAKE_INDEX(index, 6) + 1] = + colors[index].green; + if (index < 32) { + regp->DAC[MAKE_INDEX(index, 5) + + 0] = colors[index].red; + regp->DAC[MAKE_INDEX(index, 5) + + 2] = colors[index].blue; + } + } + break; + default: + for (i = 0; i < numColors; i++) { + index = indices[i]; + regp->DAC[index * 3] = colors[index].red; + regp->DAC[(index * 3) + 1] = + colors[index].green; + regp->DAC[(index * 3) + 2] = + colors[index].blue; + } + break; + } + + NVCrtcLoadPalette(crtc); + } +} + +//#define DEPTH_SHIFT(val, w) ((val << (8 - w)) | (val >> ((w << 1) - 8))) +#define COLOR(c) (unsigned int)(0x3fff * ((c)/255.0)) +static void +NV50LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, + LOCO * colors, VisualPtr pVisual) +{ + NVPtr pNv = NVPTR(pScrn); + int i, index; + volatile struct { + unsigned short red, green, blue, unused; + } *lut = (void *) pNv->CLUT->map; + + ErrorF("NV50LoadPalette\n"); + switch (pScrn->depth) { + case 15: + for (i = 0; i < numColors; i++) { + index = indices[i]; + lut[DEPTH_SHIFT(index, 5)].red = + COLOR(colors[index].red); + lut[DEPTH_SHIFT(index, 5)].green = + COLOR(colors[index].green); + lut[DEPTH_SHIFT(index, 5)].blue = + COLOR(colors[index].blue); + } + break; + case 16: + for (i = 0; i < numColors; i++) { + index = indices[i]; + lut[DEPTH_SHIFT(index, 6)].green = + COLOR(colors[index].green); + if (index < 32) { + lut[DEPTH_SHIFT(index, 5)].red = + COLOR(colors[index].red); + lut[DEPTH_SHIFT(index, 5)].blue = + COLOR(colors[index].blue); + } + } + break; + default: + for (i = 0; i < numColors; i++) { + index = indices[i]; + lut[index].red = COLOR(colors[index].red); + lut[index].green = COLOR(colors[index].green); + lut[index].blue = COLOR(colors[index].blue); + } + break; + } } /* Mandatory */ @@ -1961,29 +2059,29 @@ NVLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, static Bool NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) { - ScrnInfoPtr pScrn; - vgaHWPtr hwp; - NVPtr pNv; - int ret; - VisualPtr visual; - unsigned char *FBStart; - int width, height, displayWidth, offscreenHeight, shadowHeight; - BoxRec AvailFBArea; - - /* - * First get the ScrnInfoRec - */ - pScrn = xf86Screens[pScreen->myNum]; - - hwp = VGAHWPTR(pScrn); - pNv = NVPTR(pScrn); - - /* Map the VGA memory when the primary video */ - if (pNv->Primary) { - hwp->MapSize = 0x10000; - if (!vgaHWMapMem(pScrn)) - return FALSE; - } + ScrnInfoPtr pScrn; + vgaHWPtr hwp; + NVPtr pNv; + int ret; + VisualPtr visual; + unsigned char *FBStart; + int width, height, displayWidth, offscreenHeight, shadowHeight; + BoxRec AvailFBArea; + + /* + * First get the ScrnInfoRec + */ + pScrn = xf86Screens[pScreen->myNum]; + + hwp = VGAHWPTR(pScrn); + pNv = NVPTR(pScrn); + + /* Map the VGA memory when the primary video */ + if (pNv->Primary) { + hwp->MapSize = 0x10000; + if (!vgaHWMapMem(pScrn)) + return FALSE; + } /* First init DRI/DRM */ if (!NVDRIScreenInit(pScrn)) @@ -1993,339 +2091,369 @@ NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) if (!NVMapMem(pScrn)) return FALSE; - /* Init DRM - Alloc FIFO */ - if (!NVInitDma(pScrn)) - return FALSE; + if (!pNv->NoAccel) { + /* Init DRM - Alloc FIFO */ + if (!NVInitDma(pScrn)) + return FALSE; - /* setup graphics objects */ - if (!NVAccelCommonInit(pScrn)) - return FALSE; + /* setup graphics objects */ + if (!NVAccelCommonInit(pScrn)) + return FALSE; + } pScrn->memPhysBase = pNv->VRAMPhysical; pScrn->fbOffset = 0; - + if (!NVEnterVT(scrnIndex, 0)) - return FALSE; + return FALSE; - /* Darken the screen for aesthetic reasons and set the viewport */ + /* Darken the screen for aesthetic reasons and set the viewport */ // NVSaveScreen(pScreen, SCREEN_SAVER_ON); - // pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); - - /* - * The next step is to setup the screen's visuals, and initialise the - * framebuffer code. In cases where the framebuffer's default - * choices for things like visual layouts and bits per RGB are OK, - * this may be as simple as calling the framebuffer's ScreenInit() - * function. If not, the visuals will need to be setup before calling - * a fb ScreenInit() function and fixed up after. - * - * For most PC hardware at depths >= 8, the defaults that fb uses - * are not appropriate. In this driver, we fixup the visuals after. - */ - - /* - * Reset the visual list. - */ - miClearVisualTypes(); - - /* Setup the visuals we support. */ - - if (!miSetVisualTypes(pScrn->depth, - miGetDefaultVisualMask(pScrn->depth), 8, - pScrn->defaultVisual)) - return FALSE; - if (!miSetPixmapDepths ()) return FALSE; - - /* - * Call the framebuffer layer's ScreenInit function, and fill in other - * pScreen fields. - */ - - width = pScrn->virtualX; - height = pScrn->virtualY; - displayWidth = pScrn->displayWidth; - - - if(pNv->Rotate) { - height = pScrn->virtualX; - width = pScrn->virtualY; - } - - /* If RandR rotation is enabled, leave enough space in the - * framebuffer for us to rotate the screen dimensions without - * changing the pitch. - */ - if(pNv->RandRRotation) - shadowHeight = max(width, height); - else - shadowHeight = height; - - if(pNv->ShadowFB) { - pNv->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width); - pNv->ShadowPtr = xalloc(pNv->ShadowPitch * shadowHeight); - displayWidth = pNv->ShadowPitch / (pScrn->bitsPerPixel >> 3); - FBStart = pNv->ShadowPtr; - } else { - pNv->ShadowPtr = NULL; - FBStart = pNv->FB->map; - } - - switch (pScrn->bitsPerPixel) { - case 8: - case 16: - case 32: - ret = fbScreenInit(pScreen, FBStart, width, height, - pScrn->xDpi, pScrn->yDpi, - displayWidth, pScrn->bitsPerPixel); - break; - default: - xf86DrvMsg(scrnIndex, X_ERROR, - "Internal error: invalid bpp (%d) in NVScreenInit\n", - pScrn->bitsPerPixel); - ret = FALSE; - break; - } - if (!ret) - return FALSE; + // pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + + /* + * The next step is to setup the screen's visuals, and initialise the + * framebuffer code. In cases where the framebuffer's default + * choices for things like visual layouts and bits per RGB are OK, + * this may be as simple as calling the framebuffer's ScreenInit() + * function. If not, the visuals will need to be setup before calling + * a fb ScreenInit() function and fixed up after. + * + * For most PC hardware at depths >= 8, the defaults that fb uses + * are not appropriate. In this driver, we fixup the visuals after. + */ - if (pScrn->bitsPerPixel > 8) { - /* Fixup RGB ordering */ - visual = pScreen->visuals + pScreen->numVisuals; - while (--visual >= pScreen->visuals) { - if ((visual->class | DynamicClass) == DirectColor) { - visual->offsetRed = pScrn->offset.red; - visual->offsetGreen = pScrn->offset.green; - visual->offsetBlue = pScrn->offset.blue; - visual->redMask = pScrn->mask.red; - visual->greenMask = pScrn->mask.green; - visual->blueMask = pScrn->mask.blue; - } - } - } - - fbPictureInit (pScreen, 0, 0); - - xf86SetBlackWhitePixels(pScreen); - - offscreenHeight = pNv->FB->size / - (pScrn->displayWidth * pScrn->bitsPerPixel >> 3); - if(offscreenHeight > 32767) - offscreenHeight = 32767; - - if (!pNv->useEXA) { - AvailFBArea.x1 = 0; - AvailFBArea.y1 = 0; - AvailFBArea.x2 = pScrn->displayWidth; - AvailFBArea.y2 = offscreenHeight; - xf86InitFBManager(pScreen, &AvailFBArea); - } - - if (!pNv->NoAccel) { - if (pNv->useEXA) - NVExaInit(pScreen); - else /* XAA */ - NVXaaInit(pScreen); - } - NVResetGraphics(pScrn); - - miInitializeBackingStore(pScreen); - xf86SetBackingStore(pScreen); - xf86SetSilkenMouse(pScreen); - - /* Finish DRI init */ - NVDRIFinishScreenInit(pScrn); - - /* Initialize software cursor. - Must precede creation of the default colormap */ - miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); - - /* Initialize HW cursor layer. - Must follow software cursor initialization*/ - if (pNv->HWCursor) { - if(!NVCursorInit(pScreen)) - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Hardware cursor initialization failed\n"); - } - - /* Initialise default colourmap */ - if (!miCreateDefColormap(pScreen)) - return FALSE; + /* + * Reset the visual list. + */ + miClearVisualTypes(); - /* Initialize colormap layer. - Must follow initialization of the default colormap */ - if(!xf86HandleColormaps(pScreen, 256, 8, NVLoadPalette, - NULL, CMAP_RELOAD_ON_MODE_SWITCH | CMAP_PALETTED_TRUECOLOR)) - return FALSE; + /* Setup the visuals we support. */ + + if (!miSetVisualTypes(pScrn->depth, + miGetDefaultVisualMask(pScrn->depth), 8, + pScrn->defaultVisual)) + return FALSE; + if (!miSetPixmapDepths()) + return FALSE; + + /* + * Call the framebuffer layer's ScreenInit function, and fill in other + * pScreen fields. + */ + + width = pScrn->virtualX; + height = pScrn->virtualY; + displayWidth = pScrn->displayWidth; + + + if (pNv->Rotate) { + height = pScrn->virtualX; + width = pScrn->virtualY; + } + + /* If RandR rotation is enabled, leave enough space in the + * framebuffer for us to rotate the screen dimensions without + * changing the pitch. + */ + if (pNv->RandRRotation) + shadowHeight = max(width, height); + else + shadowHeight = height; + + if (pNv->ShadowFB) { + pNv->ShadowPitch = + BitmapBytePad(pScrn->bitsPerPixel * width); + pNv->ShadowPtr = xalloc(pNv->ShadowPitch * shadowHeight); + displayWidth = + pNv->ShadowPitch / (pScrn->bitsPerPixel >> 3); + FBStart = pNv->ShadowPtr; + } else { + pNv->ShadowPtr = NULL; + FBStart = pNv->FB->map; + } + + switch (pScrn->bitsPerPixel) { + case 8: + case 16: + case 32: + ret = fbScreenInit(pScreen, FBStart, width, height, + pScrn->xDpi, pScrn->yDpi, + displayWidth, pScrn->bitsPerPixel); + break; + default: + xf86DrvMsg(scrnIndex, X_ERROR, + "Internal error: invalid bpp (%d) in NVScreenInit\n", + pScrn->bitsPerPixel); + ret = FALSE; + break; + } + if (!ret) + return FALSE; + + if (pScrn->bitsPerPixel > 8) { + /* Fixup RGB ordering */ + visual = pScreen->visuals + pScreen->numVisuals; + while (--visual >= pScreen->visuals) { + if ((visual->class | DynamicClass) == DirectColor) { + visual->offsetRed = pScrn->offset.red; + visual->offsetGreen = pScrn->offset.green; + visual->offsetBlue = pScrn->offset.blue; + visual->redMask = pScrn->mask.red; + visual->greenMask = pScrn->mask.green; + visual->blueMask = pScrn->mask.blue; + } + } + } + + fbPictureInit(pScreen, 0, 0); + + xf86SetBlackWhitePixels(pScreen); + + offscreenHeight = pNv->FB->size / + (pScrn->displayWidth * pScrn->bitsPerPixel >> 3); + if (offscreenHeight > 32767) + offscreenHeight = 32767; + + if (!pNv->useEXA) { + AvailFBArea.x1 = 0; + AvailFBArea.y1 = 0; + AvailFBArea.x2 = pScrn->displayWidth; + AvailFBArea.y2 = offscreenHeight; + xf86InitFBManager(pScreen, &AvailFBArea); + } + + if (!pNv->NoAccel) { + if (pNv->useEXA) + NVExaInit(pScreen); + else /* XAA */ + NVXaaInit(pScreen); + } + NVResetGraphics(pScrn); + + miInitializeBackingStore(pScreen); + xf86SetBackingStore(pScreen); + xf86SetSilkenMouse(pScreen); + + /* Finish DRI init */ + NVDRIFinishScreenInit(pScrn); + + /* Initialize software cursor. + Must precede creation of the default colormap */ + miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); + /* Initialize HW cursor layer. + Must follow software cursor initialization */ + if (pNv->HWCursor) { + if (pNv->Architecture < NV_ARCH_50) + ret = NVCursorInit(pScreen); + else + ret = NV50CursorInit(pScreen); + if (ret != TRUE) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Hardware cursor initialization failed\n"); + pNv->HWCursor = FALSE; + } + } - xf86DPMSInit(pScreen, xf86DPMSSet, 0); + /* Initialise default colourmap */ + if (!miCreateDefColormap(pScreen)) + return FALSE; - if (!xf86CrtcScreenInit (pScreen)) - return FALSE; + /* Initialize colormap layer. + Must follow initialization of the default colormap */ + if (pNv->Architecture < NV_ARCH_50) { + if (!xf86HandleColormaps(pScreen, 256, 8, NVLoadPalette, + NULL, + CMAP_RELOAD_ON_MODE_SWITCH | + CMAP_PALETTED_TRUECOLOR)) + return FALSE; + } else { + if (!xf86HandleColormaps(pScreen, 256, 8, NV50LoadPalette, + NULL, CMAP_PALETTED_TRUECOLOR)) + return FALSE; + } - pNv->PointerMoved = pScrn->PointerMoved; - pScrn->PointerMoved = NVPointerMoved; - if(pNv->ShadowFB) { - RefreshAreaFuncPtr refreshArea = NVRefreshArea; + xf86DPMSInit(pScreen, xf86DPMSSet, 0); - if(pNv->Rotate || pNv->RandRRotation) { - pNv->PointerMoved = pScrn->PointerMoved; - if(pNv->Rotate) - pScrn->PointerMoved = NVPointerMoved; + if (!xf86CrtcScreenInit(pScreen)) + return FALSE; - switch(pScrn->bitsPerPixel) { - case 8: refreshArea = NVRefreshArea8; break; - case 16: refreshArea = NVRefreshArea16; break; - case 32: refreshArea = NVRefreshArea32; break; - } - if(!pNv->RandRRotation) { - xf86DisableRandR(); - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Driver rotation enabled, RandR disabled\n"); - } + pNv->PointerMoved = pScrn->PointerMoved; + pScrn->PointerMoved = NVPointerMoved; + + if (pNv->ShadowFB) { + RefreshAreaFuncPtr refreshArea = NVRefreshArea; + + if (pNv->Rotate || pNv->RandRRotation) { + pNv->PointerMoved = pScrn->PointerMoved; + if (pNv->Rotate) + pScrn->PointerMoved = NVPointerMoved; + + switch (pScrn->bitsPerPixel) { + case 8: + refreshArea = NVRefreshArea8; + break; + case 16: + refreshArea = NVRefreshArea16; + break; + case 32: + refreshArea = NVRefreshArea32; + break; + } + if (!pNv->RandRRotation) { + xf86DisableRandR(); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Driver rotation enabled, RandR disabled\n"); + } + } + + ShadowFBInit(pScreen, refreshArea); } - ShadowFBInit(pScreen, refreshArea); - } + pScrn->memPhysBase = pNv->VRAMPhysical; + pScrn->fbOffset = 0; - pScrn->memPhysBase = pNv->VRAMPhysical; - pScrn->fbOffset = 0; + if (pNv->Rotate == 0 && !pNv->RandRRotation) + NVInitVideo(pScreen); - if(pNv->Rotate == 0 && !pNv->RandRRotation) - NVInitVideo(pScreen); + if (pNv->Architecture == NV_ARCH_50 && !NV50AcquireDisplay(pScrn)) + return FALSE; - pScreen->SaveScreen = NVSaveScreen; + pScreen->SaveScreen = NVSaveScreen; - /* Wrap the current CloseScreen function */ - pNv->CloseScreen = pScreen->CloseScreen; - pScreen->CloseScreen = NVCloseScreen; + /* Wrap the current CloseScreen function */ + pNv->CloseScreen = pScreen->CloseScreen; + pScreen->CloseScreen = NVCloseScreen; - pNv->BlockHandler = pScreen->BlockHandler; - pScreen->BlockHandler = NVBlockHandler; + pNv->BlockHandler = pScreen->BlockHandler; + pScreen->BlockHandler = NVBlockHandler; -#if 0 //def RANDR - /* Install our DriverFunc. We have to do it this way instead of using the - * HaveDriverFuncs argument to xf86AddDriver, because InitOutput clobbers - * pScrn->DriverFunc */ - pScrn->DriverFunc = NVDriverFunc; +#if 0 //def RANDR + /* Install our DriverFunc. We have to do it this way instead of using the + * HaveDriverFuncs argument to xf86AddDriver, because InitOutput clobbers + * pScrn->DriverFunc */ + pScrn->DriverFunc = NVDriverFunc; #endif - /* Report any unused options (only for the first generation) */ - if (serverGeneration == 1) { - xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); - } - return TRUE; + /* Report any unused options (only for the first generation) */ + if (serverGeneration == 1) { + xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); + } + return TRUE; } static Bool NVSaveScreen(ScreenPtr pScreen, int mode) { - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); - NVPtr pNv = NVPTR(pScrn); - int i; - Bool on = xf86IsUnblank(mode); + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + NVPtr pNv = NVPTR(pScrn); + int i; + Bool on = xf86IsUnblank(mode); + + if (pScrn->vtSema) { + for (i = 0; i < xf86_config->num_crtc; i++) { + + if (xf86_config->crtc[i]->enabled) { + NVCrtcBlankScreen(xf86_config->crtc[i], + on); + } + } - if (pScrn->vtSema) { - for (i = 0; i < xf86_config->num_crtc; i++) { - - if (xf86_config->crtc[i]->enabled) { - NVCrtcBlankScreen(xf86_config->crtc[i], on); - } } + return TRUE; - } - return TRUE; - } static void NVSave(ScrnInfoPtr pScrn) { - NVPtr pNv = NVPTR(pScrn); - NVRegPtr nvReg = &pNv->SavedReg; - vgaHWPtr pVga = VGAHWPTR(pScrn); - vgaRegPtr vgaReg = &pVga->SavedReg; - xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); - int i; - int vgaflags = VGA_SR_CMAP | VGA_SR_MODE; - - for (i = 0; i < xf86_config->num_crtc; i++) { - xf86_config->crtc[i]->funcs->save(xf86_config->crtc[i]); - } - - - for (i = 0; i< xf86_config->num_output; i++) { - xf86_config->output[i]->funcs->save(xf86_config->output[i]); - } - - vgaHWUnlock(pVga); + NVPtr pNv = NVPTR(pScrn); + NVRegPtr nvReg = &pNv->SavedReg; + vgaHWPtr pVga = VGAHWPTR(pScrn); + vgaRegPtr vgaReg = &pVga->SavedReg; + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + int i; + int vgaflags = VGA_SR_CMAP | VGA_SR_MODE; + + for (i = 0; i < xf86_config->num_crtc; i++) { + xf86_config->crtc[i]->funcs->save(xf86_config->crtc[i]); + } + + + for (i = 0; i < xf86_config->num_output; i++) { + xf86_config->output[i]->funcs->save(xf86_config-> + output[i]); + } + + vgaHWUnlock(pVga); #ifndef __powerpc__ - vgaflags |= VGA_SR_FONTS; + vgaflags |= VGA_SR_FONTS; #endif - vgaHWSave(pScrn, vgaReg, vgaflags); + vgaHWSave(pScrn, vgaReg, vgaflags); } #ifdef RANDR static Bool -NVRandRGetInfo(ScrnInfoPtr pScrn, Rotation *rotations) +NVRandRGetInfo(ScrnInfoPtr pScrn, Rotation * rotations) { - NVPtr pNv = NVPTR(pScrn); + NVPtr pNv = NVPTR(pScrn); - if(pNv->RandRRotation) - *rotations = RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_270; - else - *rotations = RR_Rotate_0; + if (pNv->RandRRotation) + *rotations = RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_270; + else + *rotations = RR_Rotate_0; - return TRUE; + return TRUE; } static Bool -NVRandRSetConfig(ScrnInfoPtr pScrn, xorgRRConfig *config) +NVRandRSetConfig(ScrnInfoPtr pScrn, xorgRRConfig * config) { - NVPtr pNv = NVPTR(pScrn); - - switch(config->rotation) { - case RR_Rotate_0: - pNv->Rotate = 0; - pScrn->PointerMoved = pNv->PointerMoved; - break; - - case RR_Rotate_90: - pNv->Rotate = -1; - pScrn->PointerMoved = NVPointerMoved; - break; - - case RR_Rotate_270: - pNv->Rotate = 1; - pScrn->PointerMoved = NVPointerMoved; - break; - - default: - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Unexpected rotation in NVRandRSetConfig!\n"); - pNv->Rotate = 0; - pScrn->PointerMoved = pNv->PointerMoved; - return FALSE; - } - - return TRUE; + NVPtr pNv = NVPTR(pScrn); + + switch (config->rotation) { + case RR_Rotate_0: + pNv->Rotate = 0; + pScrn->PointerMoved = pNv->PointerMoved; + break; + + case RR_Rotate_90: + pNv->Rotate = -1; + pScrn->PointerMoved = NVPointerMoved; + break; + + case RR_Rotate_270: + pNv->Rotate = 1; + pScrn->PointerMoved = NVPointerMoved; + break; + + default: + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Unexpected rotation in NVRandRSetConfig!\n"); + pNv->Rotate = 0; + pScrn->PointerMoved = pNv->PointerMoved; + return FALSE; + } + + return TRUE; } static Bool NVDriverFunc(ScrnInfoPtr pScrn, xorgDriverFuncOp op, pointer data) { - switch(op) { - case RR_GET_INFO: - return NVRandRGetInfo(pScrn, (Rotation*)data); - case RR_SET_CONFIG: - return NVRandRSetConfig(pScrn, (xorgRRConfig*)data); - default: - return FALSE; - } - - return FALSE; + switch (op) { + case RR_GET_INFO: + return NVRandRGetInfo(pScrn, (Rotation *) data); + case RR_SET_CONFIG: + return NVRandRSetConfig(pScrn, (xorgRRConfig *) data); + default: + return FALSE; + } + + return FALSE; } #endif diff --git a/src/nv_setup.c b/src/nv_setup.c index 310f46f..55d144d 100644 --- a/src/nv_setup.c +++ b/src/nv_setup.c @@ -357,15 +357,22 @@ NVCommonSetup(ScrnInfoPtr pScrn) pNv->BlendingPossible = ((pNv->Chipset & 0xffff) > CHIPSET_NV04); - + /* Chipset from PMC_BOOT_0 register */ + if (pNv->Architecture == NV_ARCH_04) { + pNv->_Chipset = 0x04; + } else { + pNv->_Chipset = (nvReadMC(pNv, 0) >> 20) & 0xff; + } /* Parse the bios to initialize the card */ NVSelectHeadRegisters(pScrn, 0); NVParseBios(pScrn); +#if 0 /* reset PFIFO and PGRAPH, then power up all the card units */ nvWriteMC(pNv, 0x200, 0x17110013); usleep(1000); nvWriteMC(pNv, 0x200, 0x17111113); +#endif if(pNv->Architecture == NV_ARCH_03) nv3GetConfig(pNv); diff --git a/src/nv_type.h b/src/nv_type.h index fd5054f..9515bb0 100644 --- a/src/nv_type.h +++ b/src/nv_type.h @@ -20,12 +20,15 @@ #error "This driver requires a DRI-enabled X server" #endif +#include "nv50_type.h" + #define NV_ARCH_03 0x03 #define NV_ARCH_04 0x04 #define NV_ARCH_10 0x10 #define NV_ARCH_20 0x20 #define NV_ARCH_30 0x30 #define NV_ARCH_40 0x40 +#define NV_ARCH_50 0x50 #define CHIPSET_NV03 0x0010 #define CHIPSET_NV04 0x0020 @@ -50,6 +53,8 @@ #define CHIPSET_NV44 0x0160 #define CHIPSET_NV44A 0x0220 #define CHIPSET_NV45 0x0210 +#define CHIPSET_NV50 0x0190 +#define CHIPSET_NV84 0x0400 #define CHIPSET_MISC_BRIDGED 0x00F0 #define CHIPSET_G70 0x0090 #define CHIPSET_G71 0x0290 @@ -174,6 +179,7 @@ typedef struct _NVRec { pciVideoPtr PciInfo; PCITAG PciTag; int Chipset; + int _Chipset; int ChipRev; Bool Primary; CARD32 IOAddress; @@ -192,6 +198,7 @@ typedef struct _NVRec { NVAllocRec * FB; NVAllocRec * Cursor; + NVAllocRec * CLUT; /* NV50 only */ NVAllocRec * ScratchBuffer; NVAllocRec * AGPScratch; @@ -250,7 +257,7 @@ typedef struct _NVRec { CARD32 curImage[256]; /* I2C / DDC */ int ddc2; - xf86Int10InfoPtr pInt; + xf86Int10InfoPtr pInt10; void (*VideoTimerCallback)(ScrnInfoPtr, Time); void (*DMAKickoffCallback)(NVPtr pNv); XF86VideoAdaptorPtr overlayAdaptor; @@ -311,6 +318,11 @@ typedef struct _NVRec { int analog_count; int digital_count; CARD32 dcb_table[NV40_NUM_DCB_ENTRIES]; /* 10 is a good limit */ + + struct { + ORNum dac; + ORNum sor; + } i2cMap[4]; } NVRec; #define NVPTR(p) ((NVPtr)((p)->driverPrivate)) |