diff options
Diffstat (limited to 'src/nv30_shaders.c')
| -rw-r--r-- | src/nv30_shaders.c | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/src/nv30_shaders.c b/src/nv30_shaders.c index fb93ef8..e3cbc3c 100644 --- a/src/nv30_shaders.c +++ b/src/nv30_shaders.c @@ -24,6 +24,8 @@ #include "nv30_shaders.h" #include "nv04_pushbuf.h" +#include "hwdefs/nv30-40_3d.xml.h" + void NV30_UploadFragProg(NVPtr pNv, nv_shader_t *shader, int *hw_offset) { uint32_t data, i; @@ -54,10 +56,10 @@ void NV40_UploadVtxProg(NVPtr pNv, nv_shader_t *shader, int *hw_id) shader->hw_id = *hw_id; - BEGIN_RING(chan, curie, NV40TCL_VP_UPLOAD_FROM_ID, 1); + BEGIN_RING(chan, curie, NV30_3D_VP_UPLOAD_FROM_ID, 1); OUT_RING (chan, (shader->hw_id)); for (i=0; i<shader->size; i+=4) { - BEGIN_RING(chan, curie, NV40TCL_VP_UPLOAD_INST(0), 4); + BEGIN_RING(chan, curie, NV30_3D_VP_UPLOAD_INST(0), 4); OUT_RING (chan, shader->data[i + 0]); OUT_RING (chan, shader->data[i + 1]); OUT_RING (chan, shader->data[i + 2]); @@ -73,18 +75,18 @@ NV30_LoadFragProg(ScrnInfoPtr pScrn, nv_shader_t *shader) struct nouveau_channel *chan = pNv->chan; struct nouveau_grobj *rankine = pNv->Nv3D; - BEGIN_RING(chan, rankine, NV34TCL_FP_ACTIVE_PROGRAM, 1); + BEGIN_RING(chan, rankine, NV30_3D_FP_ACTIVE_PROGRAM, 1); if (OUT_RELOC(chan, pNv->shader_mem, shader->hw_id, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, - NV34TCL_FP_ACTIVE_PROGRAM_DMA0, - NV34TCL_FP_ACTIVE_PROGRAM_DMA1)) + NV30_3D_FP_ACTIVE_PROGRAM_DMA0, + NV30_3D_FP_ACTIVE_PROGRAM_DMA1)) return FALSE; - BEGIN_RING(chan, rankine, NV34TCL_FP_REG_CONTROL, 1); + BEGIN_RING(chan, rankine, NV30_3D_FP_REG_CONTROL, 1); OUT_RING (chan, (1 << 16)| 0xf); - BEGIN_RING(chan, rankine, NV34TCL_MULTISAMPLE_CONTROL, 1); + BEGIN_RING(chan, rankine, NV30_3D_MULTISAMPLE_CONTROL, 1); OUT_RING (chan, 0xffff0000); - BEGIN_RING(chan, rankine, NV34TCL_FP_CONTROL,1); + BEGIN_RING(chan, rankine, NV30_3D_FP_CONTROL,1); OUT_RING (chan, (shader->card_priv.NV30FP.num_regs-1)/2); return TRUE; @@ -97,10 +99,9 @@ NV40_LoadVtxProg(ScrnInfoPtr pScrn, nv_shader_t *shader) struct nouveau_channel *chan = pNv->chan; struct nouveau_grobj *curie = pNv->Nv3D; - BEGIN_RING(chan, curie, NV40TCL_VP_START_FROM_ID, 1); + BEGIN_RING(chan, curie, NV30_3D_VP_START_FROM_ID, 1); OUT_RING (chan, (shader->hw_id)); - - BEGIN_RING(chan, curie, NV40TCL_VP_ATTRIB_EN, 2); + BEGIN_RING(chan, curie, NV40_3D_VP_ATTRIB_EN, 2); OUT_RING (chan, shader->card_priv.NV30VP.vp_in_reg); OUT_RING (chan, shader->card_priv.NV30VP.vp_out_reg); } @@ -112,15 +113,16 @@ NV40_LoadFragProg(ScrnInfoPtr pScrn, nv_shader_t *shader) struct nouveau_channel *chan = pNv->chan; struct nouveau_grobj *curie = pNv->Nv3D; - BEGIN_RING(chan, curie, NV40TCL_FP_ADDRESS, 1); + BEGIN_RING(chan, curie, NV30_3D_FP_ACTIVE_PROGRAM, 1); if (OUT_RELOC(chan, pNv->shader_mem, shader->hw_id, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, - NV40TCL_FP_ADDRESS_DMA0, NV40TCL_FP_ADDRESS_DMA1)) + NV30_3D_FP_ACTIVE_PROGRAM_DMA0, + NV30_3D_FP_ACTIVE_PROGRAM_DMA1)) return FALSE; - BEGIN_RING(chan, curie, NV40TCL_FP_CONTROL, 1); + BEGIN_RING(chan, curie, NV30_3D_FP_CONTROL, 1); OUT_RING (chan, shader->card_priv.NV30FP.num_regs << - NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT); + NV40_3D_FP_CONTROL_TEMP_COUNT__SHIFT); return TRUE; } |