From 3d2a752ca8aafee5e1e94dabfd7deec439890e95 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 1 Dec 2011 11:31:49 +1000 Subject: move away from libdrm's BEGIN_RING (and variants) macros subchan auto-assignment is now gone. --- src/nouveau_exa.c | 1 - src/nouveau_local.h | 88 +++++++++++++++++++++++ src/nouveau_xv.c | 11 ++- src/nv04_exa.c | 76 +++++++++----------- src/nv04_xv_blit.c | 22 +++--- src/nv10_exa.c | 173 +++++++++++++++++++++----------------------- src/nv30_exa.c | 120 +++++++++++++++---------------- src/nv30_shaders.c | 25 +++---- src/nv30_xv_tex.c | 35 +++++---- src/nv40_exa.c | 104 +++++++++++++-------------- src/nv40_xv_tex.c | 25 +++---- src/nv50_accel.c | 114 ++++++++++++++--------------- src/nv50_accel.h | 11 ++- src/nv50_exa.c | 113 ++++++++++++++--------------- src/nv50_xv.c | 51 +++++++------ src/nv_accel_common.c | 139 ++++++++++++++++++----------------- src/nvc0_accel.c | 196 +++++++++++++++++++++++++------------------------- src/nvc0_accel.h | 17 ++--- src/nvc0_exa.c | 115 +++++++++++++++-------------- src/nvc0_xv.c | 72 +++++++++---------- 20 files changed, 768 insertions(+), 740 deletions(-) diff --git a/src/nouveau_exa.c b/src/nouveau_exa.c index e2f1496..f75b0db 100644 --- a/src/nouveau_exa.c +++ b/src/nouveau_exa.c @@ -21,7 +21,6 @@ */ #include "nv_include.h" -#include "nv04_pushbuf.h" #include "exa.h" #include "hwdefs/nv_m2mf.xml.h" diff --git a/src/nouveau_local.h b/src/nouveau_local.h index 98b33dc..cc2fe34 100644 --- a/src/nouveau_local.h +++ b/src/nouveau_local.h @@ -26,6 +26,8 @@ #include "compiler.h" #include "xf86_OSproc.h" +#include "nouveau_pushbuf.h" + /* Debug output */ #define NOUVEAU_MSG(fmt,args...) ErrorF(fmt, ##args) #define NOUVEAU_ERR(fmt,args...) \ @@ -83,4 +85,90 @@ static inline int round_down_pow2(int x) (y) = __z; \ } while (0) +static inline void +BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size) +{ + WAIT_RING(chan, size + 1); + OUT_RING (chan, 0x00000000 | (size << 18) | (subc << 13) | mthd); +} + +static inline void +BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size) +{ + WAIT_RING(chan, size + 1); + OUT_RING (chan, 0x40000000 | (size << 18) | (subc << 13) | mthd); +} + +static inline void +BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size) +{ + WAIT_RING(chan, size + 1); + OUT_RING (chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2)); +} + +static inline void +BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size) +{ + WAIT_RING(chan, size + 1); + OUT_RING (chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2)); +} + +static inline void +BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, int data) +{ + WAIT_RING(chan, 1); + OUT_RING (chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2)); +} + +static inline void +BEGIN_1IC0(struct nouveau_channel *chan, int subc, int mthd, int size) +{ + WAIT_RING(chan, size + 1); + OUT_RING (chan, 0xa0000000 | (size << 16) | (subc << 13) | (mthd >> 2)); +} + +/* subchannel assignment */ +#define SUBC_M2MF(mthd) 0, (mthd) /* nv04: */ +#define NV03_M2MF(mthd) SUBC_M2MF(NV03_M2MF_##mthd) +#define NV50_M2MF(mthd) SUBC_M2MF(NV50_M2MF_##mthd) +#define NVC0_M2MF(mthd) SUBC_M2MF(NVC0_M2MF_##mthd) +#define SUBC_NVSW(mthd) 1, (mthd) +#define SUBC_SF2D(mthd) 2, (mthd) /* nv04:nv50 */ +#define SUBC_2D(mthd) 2, (mthd) /* nv50: */ +#define NV04_SF2D(mthd) SUBC_SF2D(NV04_SURFACE_2D_##mthd) +#define NV10_SF2D(mthd) SUBC_SF2D(NV10_SURFACE_2D_##mthd) +#define NV50_2D(mthd) SUBC_2D(NV50_2D_##mthd) +#define NVC0_2D(mthd) SUBC_2D(NVC0_2D_##mthd) +#define SUBC_RECT(mthd) 3, (mthd) /* nv04:nv50 */ +#define NV04_RECT(mthd) SUBC_RECT(NV04_GDI_##mthd) +#define SUBC_BLIT(mthd) 4, (mthd) /* nv04:nv50 */ +#define NV01_BLIT(mthd) SUBC_BLIT(NV01_BLIT_##mthd) +#define NV04_BLIT(mthd) SUBC_BLIT(NV04_BLIT_##mthd) +#define NV15_BLIT(mthd) SUBC_BLIT(NV15_BLIT_##mthd) +#define SUBC_IFC(mthd) 5, (mthd) /* nv04:nv50 */ +#define NV01_IFC(mthd) SUBC_IFC(NV01_IFC_##mthd) +#define NV04_IFC(mthd) SUBC_IFC(NV04_IFC_##mthd) +#define SUBC_MISC(mthd) 6, (mthd) /* nv04:nv50 */ +#define NV03_SIFM(mthd) SUBC_MISC(NV03_SIFM_##mthd) +#define NV05_SIFM(mthd) SUBC_MISC(NV05_SIFM_##mthd) +#define NV01_BETA(mthd) SUBC_MISC(NV01_BETA_##mthd) +#define NV04_BETA4(mthd) SUBC_MISC(NV04_BETA4_##mthd) +#define NV01_PATT(mthd) SUBC_MISC(NV01_PATTERN_##mthd) +#define NV04_PATT(mthd) SUBC_MISC(NV04_PATTERN_##mthd) +#define NV01_ROP(mthd) SUBC_MISC(NV01_ROP_##mthd) +#define NV01_CLIP(mthd) SUBC_MISC(NV01_CLIP_##mthd) +#define SUBC_3D(mthd) 7, (mthd) /* nv10: */ +#define NV10_3D(mthd) SUBC_3D(NV10_3D_##mthd) +#define NV30_3D(mthd) SUBC_3D(NV30_3D_##mthd) +#define NV40_3D(mthd) SUBC_3D(NV40_3D_##mthd) +#define NV50_3D(mthd) SUBC_3D(NV50_3D_##mthd) +#define NVC0_3D(mthd) SUBC_3D(NVC0_3D_##mthd) + +#define NV01_SUBC(subc, mthd) SUBC_##subc((NV01_SUBCHAN_##mthd)) +#define NV11_SUBC(subc, mthd) SUBC_##subc((NV11_SUBCHAN_##mthd)) + +#define NV04_GRAPH(subc, mthd) SUBC_##subc((NV04_GRAPH_##mthd)) +#define NV50_GRAPH(subc, mthd) SUBC_##subc((NV50_GRAPH_##mthd)) +#define NVC0_GRAPH(subc, mthd) SUBC_##subc((NVC0_GRAPH_##mthd)) + #endif diff --git a/src/nouveau_xv.c b/src/nouveau_xv.c index a07de3d..7cb48da 100644 --- a/src/nouveau_xv.c +++ b/src/nouveau_xv.c @@ -35,7 +35,6 @@ #include "nv_include.h" #include "nv_dma.h" -#include "nv04_pushbuf.h" #include "vl_hwmc.h" @@ -1122,15 +1121,15 @@ NVPutImage(ScrnInfoPtr pScrn, short src_x, short src_y, short drw_x, if (MARK_RING(chan, 64, 4)) return FALSE; - BEGIN_RING(chan, m2mf, NV03_M2MF_DMA_BUFFER_IN, 2); + BEGIN_NV04(chan, NV03_M2MF(DMA_BUFFER_IN), 2); OUT_RING (chan, pNv->chan->gart->handle); OUT_RING (chan, pNv->chan->vram->handle); if (pNv->Architecture >= NV_ARCH_50) { - BEGIN_RING(chan, m2mf, NV50_M2MF_LINEAR_IN, 1); + BEGIN_NV04(chan, NV50_M2MF(LINEAR_IN), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NV50_M2MF_LINEAR_OUT, 7); + BEGIN_NV04(chan, NV50_M2MF(LINEAR_OUT), 7); OUT_RING (chan, 0); OUT_RING (chan, destination_buffer->tile_mode << 4); OUT_RING (chan, dstPitch); @@ -1145,7 +1144,7 @@ NVPutImage(ScrnInfoPtr pScrn, short src_x, short src_y, short drw_x, !(action_flags & CONVERT_TO_YUY2)) { /* we start the color plane transfer separately */ - BEGIN_RING(chan, m2mf, NV03_M2MF_OFFSET_IN, 8); + BEGIN_NV04(chan, NV03_M2MF(OFFSET_IN), 8); if (OUT_RELOCl(chan, destination_buffer, line_len * nlines, NOUVEAU_BO_GART | NOUVEAU_BO_RD) || @@ -1163,7 +1162,7 @@ NVPutImage(ScrnInfoPtr pScrn, short src_x, short src_y, short drw_x, OUT_RING (chan, 0); } - BEGIN_RING(chan, m2mf, NV03_M2MF_OFFSET_IN, 8); + BEGIN_NV04(chan, NV03_M2MF(OFFSET_IN), 8); if (OUT_RELOCl(chan, destination_buffer, 0, NOUVEAU_BO_GART | NOUVEAU_BO_RD) || OUT_RELOCl(chan, pPriv->video_mem, offset, diff --git a/src/nv04_exa.c b/src/nv04_exa.c index 4e12da2..9c5c4a2 100644 --- a/src/nv04_exa.c +++ b/src/nv04_exa.c @@ -23,7 +23,6 @@ #include "nv_include.h" #include "nv_rop.h" -#include "nv04_pushbuf.h" #include "hwdefs/nv_object.xml.h" #include "hwdefs/nv_m2mf.xml.h" @@ -35,9 +34,10 @@ NV04EXASetPattern(ScrnInfoPtr pScrn, CARD32 clr0, CARD32 clr1, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *patt = pNv->NvImagePattern; - BEGIN_RING(chan, patt, NV01_PATTERN_MONOCHROME_COLOR(0), 4); + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvImagePattern->handle); + BEGIN_NV04(chan, NV01_PATT(MONOCHROME_COLOR(0)), 4); OUT_RING (chan, clr0); OUT_RING (chan, clr1); OUT_RING (chan, pat0); @@ -49,12 +49,13 @@ NV04EXASetROP(ScrnInfoPtr pScrn, CARD32 alu, CARD32 planemask) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rop = pNv->NvRop; if (planemask != ~0) { NV04EXASetPattern(pScrn, 0, planemask, ~0, ~0); if (pNv->currentRop != (alu + 32)) { - BEGIN_RING(chan, rop, NV01_ROP_ROP, 1); + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvRop->handle); + BEGIN_NV04(chan, NV01_ROP(ROP), 1); OUT_RING (chan, NVROP[alu].copy_planemask); pNv->currentRop = alu + 32; } @@ -62,7 +63,9 @@ NV04EXASetROP(ScrnInfoPtr pScrn, CARD32 alu, CARD32 planemask) if (pNv->currentRop != alu) { if(pNv->currentRop >= 16) NV04EXASetPattern(pScrn, ~0, ~0, ~0, ~0); - BEGIN_RING(chan, rop, NV01_ROP_ROP, 1); + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvRop->handle); + BEGIN_NV04(chan, NV01_ROP(ROP), 1); OUT_RING (chan, NVROP[alu].copy); pNv->currentRop = alu; } @@ -83,8 +86,6 @@ NV04EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg) ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *surf2d = pNv->NvContextSurfaces; - struct nouveau_grobj *rect = pNv->NvRectangle; struct nouveau_bo *bo = nouveau_pixmap_bo(pPixmap); unsigned int fmt, pitch, fmt2 = NV04_GDI_COLOR_FORMAT_A8R8G8B8; @@ -95,11 +96,11 @@ NV04EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg) if (planemask != ~0 || alu != GXcopy) { if (pPixmap->drawable.bitsPerPixel == 32) return FALSE; - BEGIN_RING(chan, rect, NV04_GDI_OPERATION, 1); + BEGIN_NV04(chan, NV04_RECT(OPERATION), 1); OUT_RING (chan, 1); /* ROP_AND */ NV04EXASetROP(pScrn, alu, planemask); } else { - BEGIN_RING(chan, rect, NV04_GDI_OPERATION, 1); + BEGIN_NV04(chan, NV04_RECT(OPERATION), 1); OUT_RING (chan, 3); /* SRCCOPY */ } @@ -122,7 +123,7 @@ NV04EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg) if (fmt == NV04_SURFACE_2D_FORMAT_A8R8G8B8) fmt = NV04_SURFACE_2D_FORMAT_Y32; - BEGIN_RING(chan, surf2d, NV04_SURFACE_2D_FORMAT, 4); + BEGIN_NV04(chan, NV04_SF2D(FORMAT), 4); OUT_RING (chan, fmt); OUT_RING (chan, (pitch << 16) | pitch); if (OUT_RELOCl(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || @@ -131,9 +132,9 @@ NV04EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg) return FALSE; } - BEGIN_RING(chan, rect, NV04_GDI_COLOR_FORMAT, 1); + BEGIN_NV04(chan, NV04_RECT(COLOR_FORMAT), 1); OUT_RING (chan, fmt2); - BEGIN_RING(chan, rect, NV04_GDI_COLOR1_A, 1); + BEGIN_NV04(chan, NV04_RECT(COLOR1_A), 1); OUT_RING (chan, fg); pNv->pdpix = pPixmap; @@ -150,11 +151,10 @@ NV04EXASolid (PixmapPtr pPixmap, int x1, int y1, int x2, int y2) ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rect = pNv->NvRectangle; int width = x2-x1; int height = y2-y1; - BEGIN_RING(chan, rect, NV04_GDI_UNCLIPPED_RECTANGLE_POINT(0), 2); + BEGIN_NV04(chan, NV04_RECT(UNCLIPPED_RECTANGLE_POINT(0)), 2); OUT_RING (chan, (x1 << 16) | y1); OUT_RING (chan, (width << 16) | height); @@ -188,8 +188,6 @@ NV04EXAPrepareCopy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int dx, int dy, ScrnInfoPtr pScrn = xf86Screens[pSrcPixmap->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *surf2d = pNv->NvContextSurfaces; - struct nouveau_grobj *blit = pNv->NvImageBlit; struct nouveau_bo *src_bo = nouveau_pixmap_bo(pSrcPixmap); struct nouveau_bo *dst_bo = nouveau_pixmap_bo(pDstPixmap); int fmt; @@ -211,16 +209,16 @@ NV04EXAPrepareCopy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int dx, int dy, return FALSE; } - BEGIN_RING(chan, blit, NV01_BLIT_OPERATION, 1); + BEGIN_NV04(chan, NV01_BLIT(OPERATION), 1); OUT_RING (chan, 1); /* ROP_AND */ NV04EXASetROP(pScrn, alu, planemask); } else { - BEGIN_RING(chan, blit, NV01_BLIT_OPERATION, 1); + BEGIN_NV04(chan, NV01_BLIT(OPERATION), 1); OUT_RING (chan, 3); /* SRCCOPY */ } - BEGIN_RING(chan, surf2d, NV04_SURFACE_2D_FORMAT, 4); + BEGIN_NV04(chan, NV04_SF2D(FORMAT), 4); OUT_RING (chan, fmt); OUT_RING (chan, (exaGetPixmapPitch(pDstPixmap) << 16) | (exaGetPixmapPitch(pSrcPixmap))); @@ -245,7 +243,6 @@ NV04EXACopy(PixmapPtr pDstPixmap, int srcX, int srcY, int dstX, int dstY, ScrnInfoPtr pScrn = xf86Screens[pDstPixmap->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *blit = pNv->NvImageBlit; int split_dstY = NOUVEAU_ALIGN(dstY + 1, 64); int split_height = split_dstY - dstY; @@ -260,20 +257,18 @@ NV04EXACopy(PixmapPtr pDstPixmap, int srcX, int srcY, int dstX, int dstY, * different (not nicer) trick to achieve the same * effect. */ - struct nouveau_grobj *surf2d = pNv->NvContextSurfaces; struct nouveau_bo *dst_bo = nouveau_pixmap_bo(pNv->pdpix); unsigned dst_pitch = exaGetPixmapPitch(pNv->pdpix); if (MARK_RING(chan, 10, 1)) return; - BEGIN_RING(chan, blit, NV01_BLIT_POINT_IN, 3); + BEGIN_NV04(chan, NV01_BLIT(POINT_IN), 3); OUT_RING (chan, (srcY << 16) | srcX); OUT_RING (chan, (dstY << 16) | dstX); OUT_RING (chan, (split_height << 16) | width); - BEGIN_RING(chan, surf2d, - NV04_SURFACE_2D_OFFSET_DESTIN, 1); + BEGIN_NV04(chan, NV04_SF2D(OFFSET_DESTIN), 1); OUT_RELOCl(chan, dst_bo, split_dstY * dst_pitch, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); @@ -282,7 +277,7 @@ NV04EXACopy(PixmapPtr pDstPixmap, int srcX, int srcY, int dstX, int dstY, dstY = 0; } - BEGIN_RING(chan, blit, NV01_BLIT_POINT_IN, 3); + BEGIN_NV04(chan, NV01_BLIT(POINT_IN), 3); OUT_RING (chan, (srcY << 16) | srcX); OUT_RING (chan, (dstY << 16) | dstX); OUT_RING (chan, (height << 16) | width); @@ -305,8 +300,6 @@ NV04EXAStateIFCSubmit(struct nouveau_channel *chan) { ScrnInfoPtr pScrn = chan->user_private; NVPtr pNv = NVPTR(pScrn); - struct nouveau_grobj *surf2d = pNv->NvContextSurfaces; - struct nouveau_grobj *ifc = pNv->NvImageFromCpu; struct nouveau_bo *bo = nouveau_pixmap_bo(pNv->pdpix); int surf_fmt; @@ -315,7 +308,7 @@ NV04EXAStateIFCSubmit(struct nouveau_channel *chan) if (MARK_RING(chan, 64, 2)) return FALSE; - BEGIN_RING(chan, surf2d, NV04_SURFACE_2D_FORMAT, 4); + BEGIN_NV04(chan, NV04_SF2D(FORMAT), 4); OUT_RING (chan, surf_fmt); OUT_RING (chan, (exaGetPixmapPitch(pNv->pdpix) << 16) | exaGetPixmapPitch(pNv->pdpix)); @@ -324,7 +317,7 @@ NV04EXAStateIFCSubmit(struct nouveau_channel *chan) MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, ifc, NV01_IFC_POINT, 3); + BEGIN_NV04(chan, NV01_IFC(POINT), 3); OUT_RING (chan, (pNv->point_y << 16) | pNv->point_x); OUT_RING (chan, (pNv->height_out << 16) | pNv->width_out); OUT_RING (chan, (pNv->height_in << 16) | pNv->width_in); @@ -345,8 +338,6 @@ NV04EXAUploadIFC(ScrnInfoPtr pScrn, const char *src, int src_pitch, NVPtr pNv = NVPTR(pScrn); ScreenPtr pScreen = pDst->drawable.pScreen; struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *clip = pNv->NvClipRectangle; - struct nouveau_grobj *ifc = pNv->NvImageFromCpu; int line_len = w * cpp; int iw, id, surf_fmt, ifc_fmt; int padbytes; @@ -380,10 +371,12 @@ NV04EXAUploadIFC(ScrnInfoPtr pScrn, const char *src, int src_pitch, if (id > 1792) return FALSE; - BEGIN_RING(chan, clip, NV01_CLIP_POINT, 2); + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvClipRectangle->handle); + BEGIN_NV04(chan, NV01_CLIP(POINT), 2); OUT_RING (chan, (y << 16) | x); OUT_RING (chan, (h << 16) | w); - BEGIN_RING(chan, ifc, NV01_IFC_OPERATION, 2); + BEGIN_NV04(chan, NV01_IFC(OPERATION), 2); OUT_RING (chan, NV01_IFC_OPERATION_SRCCOPY); OUT_RING (chan, ifc_fmt); @@ -401,7 +394,7 @@ NV04EXAUploadIFC(ScrnInfoPtr pScrn, const char *src, int src_pitch, h--; while (h--) { /* send a line */ - BEGIN_RING(chan, ifc, NV01_IFC_COLOR(0), id); + BEGIN_NV04(chan, NV01_IFC(COLOR(0)), id); OUT_RINGp (chan, src, id); src += src_pitch; @@ -410,7 +403,7 @@ NV04EXAUploadIFC(ScrnInfoPtr pScrn, const char *src, int src_pitch, if (padbytes) { char padding[8]; int aux = (padbytes + 7) >> 2; - BEGIN_RING(chan, ifc, NV01_IFC_COLOR(0), id); + BEGIN_NV04(chan, NV01_IFC(COLOR(0)), id); OUT_RINGp (chan, src, id - aux); memcpy(padding, src + (id - aux) * 4, padbytes); OUT_RINGp (chan, padding, aux); @@ -429,8 +422,7 @@ NV04EXARectM2MF(NVPtr pNv, int w, int h, int cpp, int src_h, int src_x, int src_y, struct nouveau_bo *dst, int dst_dom, int dst_pitch, int dst_h, int dst_x, int dst_y) { - struct nouveau_grobj *m2mf = pNv->NvMemFormat; - struct nouveau_channel *chan = m2mf->channel; + struct nouveau_channel *chan = pNv->chan; unsigned src_off = src_y * src_pitch + src_x * cpp; unsigned dst_off = dst_y * dst_pitch + dst_x * cpp; @@ -443,13 +435,13 @@ NV04EXARectM2MF(NVPtr pNv, int w, int h, int cpp, if (MARK_RING (chan, 16, 4)) return FALSE; - BEGIN_RING(chan, m2mf, NV03_M2MF_DMA_BUFFER_IN, 2); + BEGIN_NV04(chan, NV03_M2MF(DMA_BUFFER_IN), 2); if (OUT_RELOCo(chan, src, src_dom | NOUVEAU_BO_RD) || OUT_RELOCo(chan, dst, dst_dom | NOUVEAU_BO_WR)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NV03_M2MF_OFFSET_IN, 8); + BEGIN_NV04(chan, NV03_M2MF(OFFSET_IN), 8); if (OUT_RELOCl(chan, src, src_off, src_dom | NOUVEAU_BO_RD) || OUT_RELOCl(chan, dst, dst_off, dst_dom | NOUVEAU_BO_WR)) { MARK_UNDO(chan); @@ -461,9 +453,9 @@ NV04EXARectM2MF(NVPtr pNv, int w, int h, int cpp, OUT_RING (chan, line_count); OUT_RING (chan, 0x00000101); OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, m2mf, NV04_GRAPH_NOP, 1); + BEGIN_NV04(chan, NV04_GRAPH(M2MF, NOP), 1); OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, m2mf, NV03_M2MF_OFFSET_OUT, 1); + BEGIN_NV04(chan, NV03_M2MF(OFFSET_OUT), 1); OUT_RING (chan, 0x00000000); src_off += src_pitch * line_count; diff --git a/src/nv04_xv_blit.c b/src/nv04_xv_blit.c index 4377841..4261a20 100644 --- a/src/nv04_xv_blit.c +++ b/src/nv04_xv_blit.c @@ -34,8 +34,7 @@ #include "nv_include.h" #include "nv_dma.h" -#include "nv04_pushbuf.h" - +#include "hwdefs/nv_object.xml.h" #include "hwdefs/nv01_2d.xml.h" #define FOURCC_RGB 0x0000003 @@ -82,9 +81,6 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, CARD32 dst_size, dst_point; CARD32 src_point, src_format; struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *surf2d = pNv->NvContextSurfaces; - struct nouveau_grobj *rect = pNv->NvRectangle; - struct nouveau_grobj *sifm = pNv->NvScaledImage; struct nouveau_bo *bo = nouveau_pixmap_bo(ppix); int dst_format; @@ -94,7 +90,7 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, if (MARK_RING(chan, 64, 4)) return BadImplementation; - BEGIN_RING(chan, surf2d, NV04_SURFACE_2D_FORMAT, 4); + BEGIN_NV04(chan, NV04_SF2D(FORMAT), 4); OUT_RING (chan, dst_format); OUT_RING (chan, (exaGetPixmapPitch(ppix) << 16) | exaGetPixmapPitch(ppix)); if (OUT_RELOCl(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || @@ -134,24 +130,26 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, NV11SyncToVBlank(ppix, dstBox); } + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvScaledImage->handle); if (pNv->dev->chipset >= 0x05) { - BEGIN_RING(chan, sifm, NV03_SIFM_COLOR_FORMAT, 2); + BEGIN_NV04(chan, NV03_SIFM(COLOR_FORMAT), 2); OUT_RING (chan, src_format); OUT_RING (chan, NV03_SIFM_OPERATION_SRCCOPY); } else { - BEGIN_RING(chan, sifm, NV03_SIFM_COLOR_FORMAT, 1); + BEGIN_NV04(chan, NV03_SIFM(COLOR_FORMAT), 1); OUT_RING (chan, src_format); } - BEGIN_RING(chan, sifm, NV03_SIFM_DMA_IMAGE, 1); + BEGIN_NV04(chan, NV03_SIFM(DMA_IMAGE), 1); OUT_RELOCo(chan, src, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD); while (nbox--) { - BEGIN_RING(chan, rect, NV04_GDI_COLOR1_A, 1); + BEGIN_NV04(chan, NV04_RECT(COLOR1_A), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, sifm, NV03_SIFM_CLIP_POINT, 6); + BEGIN_NV04(chan, NV03_SIFM(CLIP_POINT), 6); OUT_RING (chan, (pbox->y1 << 16) | pbox->x1); OUT_RING (chan, ((pbox->y2 - pbox->y1) << 16) | (pbox->x2 - pbox->x1)); @@ -160,7 +158,7 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, OUT_RING (chan, dsdx); OUT_RING (chan, dtdy); - BEGIN_RING(chan, sifm, NV03_SIFM_SIZE, 4); + BEGIN_NV04(chan, NV03_SIFM(SIZE), 4); OUT_RING (chan, (height << 16) | width); OUT_RING (chan, src_pitch); if (OUT_RELOCl(chan, src, src_offset, NOUVEAU_BO_VRAM | diff --git a/src/nv10_exa.c b/src/nv10_exa.c index 01d7002..2824f58 100644 --- a/src/nv10_exa.c +++ b/src/nv10_exa.c @@ -28,7 +28,6 @@ #endif #include "nv_include.h" -#include "nv04_pushbuf.h" #include "hwdefs/nv_object.xml.h" #include "hwdefs/nv10_3d.xml.h" @@ -376,7 +375,6 @@ static Bool setup_texture(NVPtr pNv, int unit, PicturePtr pict, PixmapPtr pixmap) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *celsius = pNv->Nv3D; struct nouveau_bo *bo = nouveau_pixmap_bo(pixmap); unsigned tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; long w = pict->pDrawable->width, @@ -389,7 +387,7 @@ setup_texture(NVPtr pNv, int unit, PicturePtr pict, PixmapPtr pixmap) get_tex_format(pict) | 0x50 /* UNK */; - BEGIN_RING(chan, celsius, NV10_3D_TEX_OFFSET(unit), 1); + BEGIN_NV04(chan, NV10_3D(TEX_OFFSET(unit)), 1); if (OUT_RELOCl(chan, bo, 0, tex_reloc)) return FALSE; @@ -402,22 +400,22 @@ setup_texture(NVPtr pNv, int unit, PicturePtr pict, PixmapPtr pixmap) */ w = (w + 1) &~ 1; - BEGIN_RING(chan, celsius, NV10_3D_TEX_NPOT_PITCH(unit), 1); + BEGIN_NV04(chan, NV10_3D(TEX_NPOT_PITCH(unit)), 1); OUT_RING (chan, exaGetPixmapPitch(pixmap) << 16); - BEGIN_RING(chan, celsius, NV10_3D_TEX_NPOT_SIZE(unit), 1); + BEGIN_NV04(chan, NV10_3D(TEX_NPOT_SIZE(unit)), 1); OUT_RING (chan, w << 16 | h); } - BEGIN_RING(chan, celsius, NV10_3D_TEX_FORMAT(unit), 1 ); + BEGIN_NV04(chan, NV10_3D(TEX_FORMAT(unit)), 1 ); if (OUT_RELOCd(chan, bo, txfmt, tex_reloc | NOUVEAU_BO_OR, NV10_3D_TEX_FORMAT_DMA0, NV10_3D_TEX_FORMAT_DMA1)) return FALSE; - BEGIN_RING(chan, celsius, NV10_3D_TEX_ENABLE(unit), 1 ); + BEGIN_NV04(chan, NV10_3D(TEX_ENABLE(unit)), 1 ); OUT_RING (chan, NV10_3D_TEX_ENABLE_ENABLE); - BEGIN_RING(chan, celsius, NV10_3D_TEX_FILTER(unit), 1); + BEGIN_NV04(chan, NV10_3D(TEX_FILTER(unit)), 1); if (pict->filter == PictFilterNearest) OUT_RING(chan, (NV10_3D_TEX_FILTER_MAGNIFY_NEAREST | NV10_3D_TEX_FILTER_MINIFY_NEAREST)); @@ -432,15 +430,14 @@ static Bool setup_render_target(NVPtr pNv, PicturePtr pict, PixmapPtr pixmap) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *celsius = pNv->Nv3D; struct nouveau_bo *bo = nouveau_pixmap_bo(pixmap); - BEGIN_RING(chan, celsius, NV10_3D_RT_FORMAT, 2); + BEGIN_NV04(chan, NV10_3D(RT_FORMAT), 2); OUT_RING (chan, get_rt_format(pict)); OUT_RING (chan, (exaGetPixmapPitch(pixmap) << 16 | exaGetPixmapPitch(pixmap))); - BEGIN_RING(chan, celsius, NV10_3D_COLOR_OFFSET, 1); + BEGIN_NV04(chan, NV10_3D(COLOR_OFFSET), 1); if (OUT_RELOCl(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) return FALSE; @@ -488,7 +485,6 @@ static void setup_combiners(NVPtr pNv, PicturePtr src, PicturePtr mask) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *celsius = pNv->Nv3D; uint32_t rc_in_alpha = 0, rc_in_rgb = 0; if (PICT_FORMAT_A(src->format)) @@ -532,9 +528,9 @@ setup_combiners(NVPtr pNv, PicturePtr src, PicturePtr mask) rc_in_rgb |= RC_IN_ONE(B); } - BEGIN_RING(chan, celsius, NV10_3D_RC_IN_ALPHA(0), 1); + BEGIN_NV04(chan, NV10_3D(RC_IN_ALPHA(0)), 1); OUT_RING (chan, rc_in_alpha); - BEGIN_RING(chan, celsius, NV10_3D_RC_IN_RGB(0), 1); + BEGIN_NV04(chan, NV10_3D(RC_IN_RGB(0)), 1); OUT_RING (chan, rc_in_rgb); } @@ -542,7 +538,6 @@ static void setup_blend_function(NVPtr pNv) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *celsius = pNv->Nv3D; struct pict_op *op = &nv10_pict_op[pNv->alu]; int src_factor = op->src; int dst_factor = op->dst; @@ -562,10 +557,10 @@ setup_blend_function(NVPtr pNv) dst_factor = DF(ONE_MINUS_SRC_COLOR); } - BEGIN_RING(chan, celsius, NV10_3D_BLEND_FUNC_SRC, 2); + BEGIN_NV04(chan, NV10_3D(BLEND_FUNC_SRC), 2); OUT_RING (chan, src_factor); OUT_RING (chan, dst_factor); - BEGIN_RING(chan, celsius, NV10_3D_BLEND_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(BLEND_FUNC_ENABLE), 1); OUT_RING (chan, 1); } @@ -655,19 +650,18 @@ emit_vertex(NVPtr pNv, int i, PictVector pos[], PictVector tex0[], PictVector tex1[]) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *celsius = pNv->Nv3D; - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_TX0_2F_S, 2); + BEGIN_NV04(chan, NV10_3D(VERTEX_TX0_2F_S), 2); OUT_RINGi (chan, tex0[i], 0); OUT_RINGi (chan, tex0[i], 1); if (tex1) { - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_TX1_2F_S, 2); + BEGIN_NV04(chan, NV10_3D(VERTEX_TX1_2F_S), 2); OUT_RINGi (chan, tex1[i], 0); OUT_RINGi (chan, tex1[i], 1); } - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_POS_3F_X, 3); + BEGIN_NV04(chan, NV10_3D(VERTEX_POS_3F_X), 3); OUT_RINGi (chan, pos[i], 0); OUT_RINGi (chan, pos[i], 1); OUT_RINGf (chan, 0); @@ -690,7 +684,6 @@ NV10EXAComposite(PixmapPtr pix_dst, ScrnInfoPtr pScrn = xf86Screens[pix_dst->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *celsius = pNv->Nv3D; PicturePtr mask = pNv->pmpict, src = pNv->pspict; PictVector dstq[4] = QUAD(dstX, dstY, width, height), @@ -702,12 +695,12 @@ NV10EXAComposite(PixmapPtr pix_dst, MAP(transform_vertex, mask->transform, maskq); WAIT_RING (chan, 64); - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV10_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, NV10_3D_VERTEX_BEGIN_END_QUADS); MAP(emit_vertex, pNv, dstq, srcq, mask ? maskq : NULL); - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV10_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, NV10_3D_VERTEX_BEGIN_END_STOP); } @@ -726,7 +719,6 @@ NVAccelInitNV10TCL(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *celsius; uint32_t class = 0; int i; @@ -747,112 +739,113 @@ NVAccelInitNV10TCL(ScrnInfoPtr pScrn) if (nouveau_grobj_alloc(pNv->chan, Nv3D, class, &pNv->Nv3D)) return FALSE; } - celsius = pNv->Nv3D; - BEGIN_RING(chan, celsius, NV10_3D_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(3D, OBJECT), 1); + OUT_RING (chan, pNv->Nv3D->handle); + BEGIN_NV04(chan, NV10_3D(DMA_NOTIFY), 1); OUT_RING (chan, chan->nullobj->handle); - BEGIN_RING(chan, celsius, NV10_3D_DMA_TEXTURE0, 2); + BEGIN_NV04(chan, NV10_3D(DMA_TEXTURE0), 2); OUT_RING (chan, pNv->chan->vram->handle); OUT_RING (chan, pNv->chan->gart->handle); - BEGIN_RING(chan, celsius, NV10_3D_DMA_COLOR, 2); + BEGIN_NV04(chan, NV10_3D(DMA_COLOR), 2); OUT_RING (chan, pNv->chan->vram->handle); OUT_RING (chan, pNv->chan->vram->handle); - BEGIN_RING(chan, celsius, NV04_GRAPH_NOP, 1); + BEGIN_NV04(chan, NV04_GRAPH(3D, NOP), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_RT_HORIZ, 2); + BEGIN_NV04(chan, NV10_3D(RT_HORIZ), 2); OUT_RING (chan, 2048 << 16 | 0); OUT_RING (chan, 2048 << 16 | 0); - BEGIN_RING(chan, celsius, NV10_3D_ZETA_OFFSET, 1); + BEGIN_NV04(chan, NV10_3D(ZETA_OFFSET), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_VIEWPORT_CLIP_MODE, 1); + BEGIN_NV04(chan, NV10_3D(VIEWPORT_CLIP_MODE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_VIEWPORT_CLIP_HORIZ(0), 1); + BEGIN_NV04(chan, NV10_3D(VIEWPORT_CLIP_HORIZ(0)), 1); OUT_RING (chan, 0x7ff << 16 | 0x800800); - BEGIN_RING(chan, celsius, NV10_3D_VIEWPORT_CLIP_VERT(0), 1); + BEGIN_NV04(chan, NV10_3D(VIEWPORT_CLIP_VERT(0)), 1); OUT_RING (chan, 0x7ff << 16 | 0x800800); for (i = 1; i < 8; i++) { - BEGIN_RING(chan, celsius, NV10_3D_VIEWPORT_CLIP_HORIZ(i), 1); + BEGIN_NV04(chan, NV10_3D(VIEWPORT_CLIP_HORIZ(i)), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_VIEWPORT_CLIP_VERT(i), 1); + BEGIN_NV04(chan, NV10_3D(VIEWPORT_CLIP_VERT(i)), 1); OUT_RING (chan, 0); } - BEGIN_RING(chan, celsius, 0x290, 1); + BEGIN_NV04(chan, SUBC_3D(0x290), 1); OUT_RING (chan, (0x10<<16)|1); - BEGIN_RING(chan, celsius, 0x3f4, 1); + BEGIN_NV04(chan, SUBC_3D(0x3f4), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV04_GRAPH_NOP, 1); + BEGIN_NV04(chan, NV04_GRAPH(3D, NOP), 1); OUT_RING (chan, 0); if (class != NV10_3D_CLASS) { /* For nv11, nv17 */ - BEGIN_RING(chan, celsius, 0x120, 3); + BEGIN_NV04(chan, SUBC_3D(0x120), 3); OUT_RING (chan, 0); OUT_RING (chan, 1); OUT_RING (chan, 2); - BEGIN_RING(chan, pNv->NvImageBlit, 0x120, 3); + BEGIN_NV04(chan, SUBC_BLIT(0x120), 3); OUT_RING (chan, 0); OUT_RING (chan, 1); OUT_RING (chan, 2); - BEGIN_RING(chan, celsius, NV04_GRAPH_NOP, 1); + BEGIN_NV04(chan, NV04_GRAPH(3D, NOP), 1); OUT_RING (chan, 0); } - BEGIN_RING(chan, celsius, NV04_GRAPH_NOP, 1); + BEGIN_NV04(chan, NV04_GRAPH(3D, NOP), 1); OUT_RING (chan, 0); /* Set state */ - BEGIN_RING(chan, celsius, NV10_3D_FOG_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(FOG_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_ALPHA_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(ALPHA_FUNC_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_ALPHA_FUNC_FUNC, 2); + BEGIN_NV04(chan, NV10_3D(ALPHA_FUNC_FUNC), 2); OUT_RING (chan, 0x207); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_TEX_ENABLE(0), 2); + BEGIN_NV04(chan, NV10_3D(TEX_ENABLE(0)), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_RC_IN_ALPHA(0), 6); + BEGIN_NV04(chan, NV10_3D(RC_IN_ALPHA(0)), 6); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_RC_OUT_ALPHA(0), 6); + BEGIN_NV04(chan, NV10_3D(RC_OUT_ALPHA(0)), 6); OUT_RING (chan, 0x00000c00); OUT_RING (chan, 0); OUT_RING (chan, 0x00000c00); OUT_RING (chan, 0x18000000); OUT_RING (chan, 0x300c0000); OUT_RING (chan, 0x00001c80); - BEGIN_RING(chan, celsius, NV10_3D_BLEND_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(BLEND_FUNC_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_DITHER_ENABLE, 2); + BEGIN_NV04(chan, NV10_3D(DITHER_ENABLE), 2); OUT_RING (chan, 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_LINE_SMOOTH_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(LINE_SMOOTH_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_WEIGHT_ENABLE, 2); + BEGIN_NV04(chan, NV10_3D(VERTEX_WEIGHT_ENABLE), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_BLEND_FUNC_SRC, 4); + BEGIN_NV04(chan, NV10_3D(BLEND_FUNC_SRC), 4); OUT_RING (chan, 1); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0x8006); - BEGIN_RING(chan, celsius, NV10_3D_STENCIL_MASK, 8); + BEGIN_NV04(chan, NV10_3D(STENCIL_MASK), 8); OUT_RING (chan, 0xff); OUT_RING (chan, 0x207); OUT_RING (chan, 0); @@ -861,113 +854,113 @@ NVAccelInitNV10TCL(ScrnInfoPtr pScrn) OUT_RING (chan, 0x1e00); OUT_RING (chan, 0x1e00); OUT_RING (chan, 0x1d01); - BEGIN_RING(chan, celsius, NV10_3D_NORMALIZE_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(NORMALIZE_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_FOG_ENABLE, 2); + BEGIN_NV04(chan, NV10_3D(FOG_ENABLE), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_LIGHT_MODEL, 1); + BEGIN_NV04(chan, NV10_3D(LIGHT_MODEL), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_SEPARATE_SPECULAR_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(SEPARATE_SPECULAR_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_ENABLED_LIGHTS, 1); + BEGIN_NV04(chan, NV10_3D(ENABLED_LIGHTS), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_POLYGON_OFFSET_POINT_ENABLE, 3); + BEGIN_NV04(chan, NV10_3D(POLYGON_OFFSET_POINT_ENABLE), 3); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_DEPTH_FUNC, 1); + BEGIN_NV04(chan, NV10_3D(DEPTH_FUNC), 1); OUT_RING (chan, 0x201); - BEGIN_RING(chan, celsius, NV10_3D_DEPTH_WRITE_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(DEPTH_WRITE_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_DEPTH_TEST_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(DEPTH_TEST_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_POLYGON_OFFSET_FACTOR, 2); + BEGIN_NV04(chan, NV10_3D(POLYGON_OFFSET_FACTOR), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_POINT_SIZE, 1); + BEGIN_NV04(chan, NV10_3D(POINT_SIZE), 1); OUT_RING (chan, 8); - BEGIN_RING(chan, celsius, NV10_3D_POINT_PARAMETERS_ENABLE, 2); + BEGIN_NV04(chan, NV10_3D(POINT_PARAMETERS_ENABLE), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_LINE_WIDTH, 1); + BEGIN_NV04(chan, NV10_3D(LINE_WIDTH), 1); OUT_RING (chan, 8); - BEGIN_RING(chan, celsius, NV10_3D_LINE_SMOOTH_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(LINE_SMOOTH_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_POLYGON_MODE_FRONT, 2); + BEGIN_NV04(chan, NV10_3D(POLYGON_MODE_FRONT), 2); OUT_RING (chan, 0x1b02); OUT_RING (chan, 0x1b02); - BEGIN_RING(chan, celsius, NV10_3D_CULL_FACE, 2); + BEGIN_NV04(chan, NV10_3D(CULL_FACE), 2); OUT_RING (chan, 0x405); OUT_RING (chan, 0x901); - BEGIN_RING(chan, celsius, NV10_3D_POLYGON_SMOOTH_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(POLYGON_SMOOTH_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_CULL_FACE_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(CULL_FACE_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_TEX_GEN_MODE(0, 0), 8); + BEGIN_NV04(chan, NV10_3D(TEX_GEN_MODE(0, 0)), 8); for (i = 0; i < 8; i++) OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_FOG_COEFF(0), 3); + BEGIN_NV04(chan, NV10_3D(FOG_COEFF(0)), 3); OUT_RING (chan, 0x3fc00000); /* -1.50 */ OUT_RING (chan, 0xbdb8aa0a); /* -0.09 */ OUT_RING (chan, 0); /* 0.00 */ - BEGIN_RING(chan, celsius, NV04_GRAPH_NOP, 1); + BEGIN_NV04(chan, NV04_GRAPH(3D, NOP), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_FOG_MODE, 2); + BEGIN_NV04(chan, NV10_3D(FOG_MODE), 2); OUT_RING (chan, 0x802); OUT_RING (chan, 2); /* for some reason VIEW_MATRIX_ENABLE need to be 6 instead of 4 when * using texturing, except when using the texture matrix */ - BEGIN_RING(chan, celsius, NV10_3D_VIEW_MATRIX_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(VIEW_MATRIX_ENABLE), 1); OUT_RING (chan, 6); - BEGIN_RING(chan, celsius, NV10_3D_COLOR_MASK, 1); + BEGIN_NV04(chan, NV10_3D(COLOR_MASK), 1); OUT_RING (chan, 0x01010101); - BEGIN_RING(chan, celsius, NV10_3D_PROJECTION_MATRIX(0), 16); + BEGIN_NV04(chan, NV10_3D(PROJECTION_MATRIX(0)), 16); for(i = 0; i < 16; i++) OUT_RINGf(chan, i/4 == i%4 ? 1.0 : 0.0); - BEGIN_RING(chan, celsius, NV10_3D_DEPTH_RANGE_NEAR, 2); + BEGIN_NV04(chan, NV10_3D(DEPTH_RANGE_NEAR), 2); OUT_RING (chan, 0); OUT_RINGf (chan, 65536.0); - BEGIN_RING(chan, celsius, NV10_3D_VIEWPORT_TRANSLATE_X, 4); + BEGIN_NV04(chan, NV10_3D(VIEWPORT_TRANSLATE_X), 4); OUT_RINGf (chan, -2048.0); OUT_RINGf (chan, -2048.0); OUT_RINGf (chan, 0); OUT_RING (chan, 0); /* Set vertex component */ - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_COL_4F_R, 4); + BEGIN_NV04(chan, NV10_3D(VERTEX_COL_4F_R), 4); OUT_RINGf (chan, 1.0); OUT_RINGf (chan, 1.0); OUT_RINGf (chan, 1.0); OUT_RINGf (chan, 1.0); - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_COL2_3F_R, 3); + BEGIN_NV04(chan, NV10_3D(VERTEX_COL2_3F_R), 3); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_NOR_3F_X, 3); + BEGIN_NV04(chan, NV10_3D(VERTEX_NOR_3F_X), 3); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RINGf (chan, 1.0); - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_TX0_4F_S, 4); + BEGIN_NV04(chan, NV10_3D(VERTEX_TX0_4F_S), 4); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 1.0); - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_TX1_4F_S, 4); + BEGIN_NV04(chan, NV10_3D(VERTEX_TX1_4F_S), 4); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 1.0); - BEGIN_RING(chan, celsius, NV10_3D_VERTEX_FOG_1F, 1); + BEGIN_NV04(chan, NV10_3D(VERTEX_FOG_1F), 1); OUT_RINGf (chan, 0.0); - BEGIN_RING(chan, celsius, NV10_3D_EDGEFLAG_ENABLE, 1); + BEGIN_NV04(chan, NV10_3D(EDGEFLAG_ENABLE), 1); OUT_RING (chan, 1); return TRUE; diff --git a/src/nv30_exa.c b/src/nv30_exa.c index 822bdd6..ce9bbb3 100644 --- a/src/nv30_exa.c +++ b/src/nv30_exa.c @@ -25,7 +25,6 @@ #include "nv_include.h" #include "nv30_shaders.h" -#include "nv04_pushbuf.h" #include "hwdefs/nv_object.xml.h" #include "hwdefs/nv30-40_3d.xml.h" @@ -260,7 +259,6 @@ NV30_SetupBlend(ScrnInfoPtr pScrn, nv_pict_op_t *blend, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rankine = pNv->Nv3D; uint32_t sblend, dblend; sblend = blend->src_card_op; @@ -291,10 +289,10 @@ NV30_SetupBlend(ScrnInfoPtr pScrn, nv_pict_op_t *blend, } if (sblend == BF(ONE) && dblend == BF(ZERO)) { - BEGIN_RING(chan, rankine, NV30_3D_BLEND_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(BLEND_FUNC_ENABLE), 1); OUT_RING (chan, 0); } else { - BEGIN_RING(chan, rankine, NV30_3D_BLEND_FUNC_ENABLE, 3); + BEGIN_NV04(chan, NV30_3D(BLEND_FUNC_ENABLE), 3); OUT_RING (chan, 1); OUT_RING (chan, (sblend << 16) | sblend); OUT_RING (chan, (dblend << 16) | dblend); @@ -306,7 +304,6 @@ NV30EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rankine = pNv->Nv3D; struct nouveau_bo *bo = nouveau_pixmap_bo(pPix); nv_pict_texture_format_t *fmt; uint32_t card_filter, card_repeat; @@ -324,7 +321,7 @@ NV30EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit) else card_filter = 1; - BEGIN_RING(chan, rankine, NV30_3D_TEX_OFFSET(unit), 8); + BEGIN_NV04(chan, NV30_3D(TEX_OFFSET(unit)), 8); if (OUT_RELOCl(chan, bo, 0, tex_reloc) || OUT_RELOCd(chan, bo, NV30_3D_TEX_FORMAT_DIMS_2D | (1 << 16) | 8 | (fmt->card_fmt << NV30_3D_TEX_FORMAT_FORMAT__SHIFT) | @@ -360,7 +357,6 @@ NV30_SetupSurface(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rankine = pNv->Nv3D; struct nouveau_bo *bo = nouveau_pixmap_bo(pPix); nv_pict_surface_format_t *fmt; @@ -372,7 +368,7 @@ NV30_SetupSurface(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict) uint32_t pitch = (uint32_t)exaGetPixmapPitch(pPix); - BEGIN_RING(chan, rankine, NV30_3D_RT_FORMAT, 3); + BEGIN_NV04(chan, NV30_3D(RT_FORMAT), 3); OUT_RING (chan, fmt->card_fmt); /* format */ OUT_RING (chan, pitch << 16 | pitch); if (OUT_RELOCl(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) @@ -474,7 +470,6 @@ NV30EXAPrepareComposite(int op, PicturePtr psPict, ScrnInfoPtr pScrn = xf86Screens[psPix->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rankine = pNv->Nv3D; nv_pict_op_t *blend; int fpid = NV30EXA_FPID_PASS_COL0; NV30EXA_STATE; @@ -536,7 +531,7 @@ NV30EXAPrepareComposite(int op, PicturePtr psPict, return FALSE; } - BEGIN_RING(chan, rankine, 0x23c, 1); + BEGIN_NV04(chan, SUBC_3D(0x23c), 1); OUT_RING (chan, pmPict?3:1); pNv->alu = op; @@ -573,16 +568,16 @@ NV30EXATransformCoord(PictTransformPtr t, int x, int y, float sx, float sy, } #define CV_OUTm(sx,sy,mx,my,dx,dy) do { \ - BEGIN_RING(chan, rankine, NV30_3D_VTX_ATTR_2F_X(8), 4); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2F_X(8)), 4); \ OUT_RINGf (chan, (sx)); OUT_RINGf (chan, (sy)); \ OUT_RINGf (chan, (mx)); OUT_RINGf (chan, (my)); \ - BEGIN_RING(chan, rankine, NV30_3D_VTX_ATTR_2I(0), 1); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2I(0)), 1); \ OUT_RING (chan, ((dy)<<16)|(dx)); \ } while(0) #define CV_OUT(sx,sy,dx,dy) do { \ - BEGIN_RING(chan, rankine, NV30_3D_VTX_ATTR_2F_X(8), 2); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2F_X(8)), 2); \ OUT_RINGf (chan, (sx)); OUT_RINGf (chan, (sy)); \ - BEGIN_RING(chan, rankine, NV30_3D_VTX_ATTR_2I(0), 1); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2I(0)), 1); \ OUT_RING (chan, ((dy)<<16)|(dx)); \ } while(0) @@ -595,7 +590,6 @@ NV30EXAComposite(PixmapPtr pdPix, int srcX , int srcY, ScrnInfoPtr pScrn = xf86Screens[pdPix->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rankine = pNv->Nv3D; float sX0, sX1, sX2, sY0, sY1, sY2; float mX0, mX1, mX2, mY0, mY1, mY2; NV30EXA_STATE; @@ -605,10 +599,10 @@ NV30EXAComposite(PixmapPtr pdPix, int srcX , int srcY, /* We're drawing a triangle, we need to scissor it to a quad. */ /* The scissors are here for a good reason, we don't get the full image, but just a part. */ /* Handling the cliprects is done for us already. */ - BEGIN_RING(chan, rankine, NV30_3D_SCISSOR_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(SCISSOR_HORIZ), 2); OUT_RING (chan, (width << 16) | dstX); OUT_RING (chan, (height << 16) | dstY); - BEGIN_RING(chan, rankine, NV30_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV30_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, NV30_3D_VERTEX_BEGIN_END_TRIANGLES); #if 0 @@ -650,7 +644,7 @@ NV30EXAComposite(PixmapPtr pdPix, int srcX , int srcY, CV_OUT(sX2 , sY2 , dstX + 2*width , dstY + height); } - BEGIN_RING(chan, rankine, NV30_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV30_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, 0); } @@ -669,7 +663,6 @@ NVAccelInitNV30TCL(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rankine; uint32_t class = 0, chipset; int next_hw_offset = 0, i; @@ -702,7 +695,6 @@ NVAccelInitNV30TCL(ScrnInfoPtr pScrn) if (nouveau_grobj_alloc(chan, Nv3D, class, &pNv->Nv3D)) return FALSE; } - rankine = pNv->Nv3D; if (!pNv->shader_mem) { if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_MAP, @@ -714,113 +706,115 @@ NVAccelInitNV30TCL(ScrnInfoPtr pScrn) } } - BEGIN_RING(chan, rankine, NV30_3D_DMA_TEXTURE0, 3); + BEGIN_NV04(chan, NV01_SUBC(3D, OBJECT), 1); + OUT_RING (chan, pNv->Nv3D->handle); + BEGIN_NV04(chan, NV30_3D(DMA_TEXTURE0), 3); OUT_RING (chan, pNv->chan->vram->handle); OUT_RING (chan, pNv->chan->gart->handle); OUT_RING (chan, pNv->chan->vram->handle); - BEGIN_RING(chan, rankine, NV30_3D_DMA_UNK1AC, 1); + BEGIN_NV04(chan, NV30_3D(DMA_UNK1AC), 1); OUT_RING (chan, pNv->chan->vram->handle); - BEGIN_RING(chan, rankine, NV30_3D_DMA_COLOR0, 2); + BEGIN_NV04(chan, NV30_3D(DMA_COLOR0), 2); OUT_RING (chan, pNv->chan->vram->handle); OUT_RING (chan, pNv->chan->vram->handle); - BEGIN_RING(chan, rankine, NV30_3D_DMA_UNK1B0, 1); + BEGIN_NV04(chan, NV30_3D(DMA_UNK1B0), 1); OUT_RING (chan, pNv->chan->vram->handle); for (i=1; i<8; i++) { - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_CLIP_HORIZ(i), 2); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_CLIP_HORIZ(i)), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); } - BEGIN_RING(chan, rankine, 0x220, 1); + BEGIN_NV04(chan, SUBC_3D(0x220), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, rankine, 0x03b0, 1); + BEGIN_NV04(chan, SUBC_3D(0x03b0), 1); OUT_RING (chan, 0x00100000); - BEGIN_RING(chan, rankine, 0x1454, 1); + BEGIN_NV04(chan, SUBC_3D(0x1454), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, rankine, 0x1d80, 1); + BEGIN_NV04(chan, SUBC_3D(0x1d80), 1); OUT_RING (chan, 3); - BEGIN_RING(chan, rankine, 0x1450, 1); + BEGIN_NV04(chan, SUBC_3D(0x1450), 1); OUT_RING (chan, 0x00030004); /* NEW */ - BEGIN_RING(chan, rankine, 0x1e98, 1); + BEGIN_NV04(chan, SUBC_3D(0x1e98), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, rankine, 0x17e0, 3); + BEGIN_NV04(chan, SUBC_3D(0x17e0), 3); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0x3f800000); - BEGIN_RING(chan, rankine, 0x1f80, 16); + BEGIN_NV04(chan, SUBC_3D(0x1f80), 16); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0x0000ffff); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, rankine, 0x120, 3); + BEGIN_NV04(chan, SUBC_3D(0x120), 3); OUT_RING (chan, 0); OUT_RING (chan, 1); OUT_RING (chan, 2); - BEGIN_RING(chan, pNv->NvImageBlit, 0x120, 3); + BEGIN_NV04(chan, SUBC_BLIT(0x120), 3); OUT_RING (chan, 0); OUT_RING (chan, 1); OUT_RING (chan, 2); - BEGIN_RING(chan, rankine, 0x1d88, 1); + BEGIN_NV04(chan, SUBC_3D(0x1d88), 1); OUT_RING (chan, 0x00001200); - BEGIN_RING(chan, rankine, NV30_3D_RC_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(RC_ENABLE), 1); OUT_RING (chan, 0); /* Attempt to setup a known state.. Probably missing a heap of * stuff here.. */ - BEGIN_RING(chan, rankine, NV30_3D_STENCIL_ENABLE(0), 1); + BEGIN_NV04(chan, NV30_3D(STENCIL_ENABLE(0)), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, rankine, NV30_3D_STENCIL_ENABLE(1), 1); + BEGIN_NV04(chan, NV30_3D(STENCIL_ENABLE(1)), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, rankine, NV30_3D_ALPHA_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(ALPHA_FUNC_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, rankine, NV30_3D_DEPTH_WRITE_ENABLE, 2); + BEGIN_NV04(chan, NV30_3D(DEPTH_WRITE_ENABLE), 2); OUT_RING (chan, 0); /* wr disable */ OUT_RING (chan, 0); /* test disable */ - BEGIN_RING(chan, rankine, NV30_3D_COLOR_MASK, 1); + BEGIN_NV04(chan, NV30_3D(COLOR_MASK), 1); OUT_RING (chan, 0x01010101); /* TR,TR,TR,TR */ - BEGIN_RING(chan, rankine, NV30_3D_CULL_FACE_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(CULL_FACE_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, rankine, NV30_3D_BLEND_FUNC_ENABLE, 5); + BEGIN_NV04(chan, NV30_3D(BLEND_FUNC_ENABLE), 5); OUT_RING (chan, 0); /* Blend enable */ OUT_RING (chan, 0); /* Blend src */ OUT_RING (chan, 0); /* Blend dst */ OUT_RING (chan, 0x00000000); /* Blend colour */ OUT_RING (chan, 0x8006); /* FUNC_ADD */ - BEGIN_RING(chan, rankine, NV30_3D_COLOR_LOGIC_OP_ENABLE, 2); + BEGIN_NV04(chan, NV30_3D(COLOR_LOGIC_OP_ENABLE), 2); OUT_RING (chan, 0); OUT_RING (chan, 0x1503 /*GL_COPY*/); - BEGIN_RING(chan, rankine, NV30_3D_DITHER_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(DITHER_ENABLE), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, rankine, NV30_3D_SHADE_MODEL, 1); + BEGIN_NV04(chan, NV30_3D(SHADE_MODEL), 1); OUT_RING (chan, 0x1d01 /*GL_SMOOTH*/); - BEGIN_RING(chan, rankine, NV30_3D_POLYGON_OFFSET_FACTOR,2); + BEGIN_NV04(chan, NV30_3D(POLYGON_OFFSET_FACTOR),2); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); - BEGIN_RING(chan, rankine, NV30_3D_POLYGON_MODE_FRONT, 2); + BEGIN_NV04(chan, NV30_3D(POLYGON_MODE_FRONT), 2); OUT_RING (chan, 0x1b02 /*GL_FILL*/); OUT_RING (chan, 0x1b02 /*GL_FILL*/); /* - Disable texture units * - Set fragprog to MOVR result.color, fragment.color */ for (i=0;i<4;i++) { - BEGIN_RING(chan, rankine, NV30_3D_TEX_ENABLE(i), 1); + BEGIN_NV04(chan, NV30_3D(TEX_ENABLE(i)), 1); OUT_RING (chan, 0); } /* Polygon stipple */ - BEGIN_RING(chan, rankine, NV30_3D_POLYGON_STIPPLE_PATTERN(0), 0x20); + BEGIN_NV04(chan, NV30_3D(POLYGON_STIPPLE_PATTERN(0)), 0x20); for (i=0;i<0x20;i++) OUT_RING (chan, 0xFFFFFFFF); - BEGIN_RING(chan, rankine, NV30_3D_DEPTH_RANGE_NEAR, 2); + BEGIN_NV04(chan, NV30_3D(DEPTH_RANGE_NEAR), 2); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 1.0); @@ -830,34 +824,34 @@ NVAccelInitNV30TCL(ScrnInfoPtr pScrn) * it's not needed between nouveau restarts - which suggests that * the 3D context (wherever it's stored?) survives somehow. */ - //BEGIN_RING(chan, rankine, 0x1d60,1); + //BEGIN_NV04(chan, SUBC_3D(0x1d60),1); //OUT_RING (chan, 0x03008000); int w=4096; int h=4096; int pitch=4096*4; - BEGIN_RING(chan, rankine, NV30_3D_RT_HORIZ, 5); + BEGIN_NV04(chan, NV30_3D(RT_HORIZ), 5); OUT_RING (chan, w<<16); OUT_RING (chan, h<<16); OUT_RING (chan, 0x148); /* format */ OUT_RING (chan, pitch << 16 | pitch); OUT_RING (chan, 0x0); - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_TX_ORIGIN, 1); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_TX_ORIGIN), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, rankine, 0x0a00, 2); + BEGIN_NV04(chan, SUBC_3D(0x0a00), 2); OUT_RING (chan, (w<<16) | 0); OUT_RING (chan, (h<<16) | 0); - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_CLIP_HORIZ(0), 2); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_CLIP_HORIZ(0)), 2); OUT_RING (chan, (w-1)<<16); OUT_RING (chan, (h-1)<<16); - BEGIN_RING(chan, rankine, NV30_3D_SCISSOR_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(SCISSOR_HORIZ), 2); OUT_RING (chan, w<<16); OUT_RING (chan, h<<16); - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_HORIZ), 2); OUT_RING (chan, w<<16); OUT_RING (chan, h<<16); - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_TRANSLATE_X, 8); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_TRANSLATE_X), 8); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); @@ -867,7 +861,7 @@ NVAccelInitNV30TCL(ScrnInfoPtr pScrn) OUT_RINGf (chan, 1.0); OUT_RINGf (chan, 0.0); - BEGIN_RING(chan, rankine, NV30_3D_MODELVIEW_MATRIX(0), 16); + BEGIN_NV04(chan, NV30_3D(MODELVIEW_MATRIX(0)), 16); OUT_RINGf (chan, 1.0); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); @@ -885,7 +879,7 @@ NVAccelInitNV30TCL(ScrnInfoPtr pScrn) OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 1.0); - BEGIN_RING(chan, rankine, NV30_3D_PROJECTION_MATRIX(0), 16); + BEGIN_NV04(chan, NV30_3D(PROJECTION_MATRIX(0)), 16); OUT_RINGf (chan, 1.0); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); @@ -903,7 +897,7 @@ NVAccelInitNV30TCL(ScrnInfoPtr pScrn) OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 1.0); - BEGIN_RING(chan, rankine, NV30_3D_SCISSOR_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(SCISSOR_HORIZ), 2); OUT_RING (chan, 4096<<16); OUT_RING (chan, 4096<<16); diff --git a/src/nv30_shaders.c b/src/nv30_shaders.c index e3cbc3c..e3d4dfb 100644 --- a/src/nv30_shaders.c +++ b/src/nv30_shaders.c @@ -22,7 +22,6 @@ #include "nv30_shaders.h" -#include "nv04_pushbuf.h" #include "hwdefs/nv30-40_3d.xml.h" @@ -51,15 +50,14 @@ void NV30_UploadFragProg(NVPtr pNv, nv_shader_t *shader, int *hw_offset) void NV40_UploadVtxProg(NVPtr pNv, nv_shader_t *shader, int *hw_id) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; int i; shader->hw_id = *hw_id; - BEGIN_RING(chan, curie, NV30_3D_VP_UPLOAD_FROM_ID, 1); + BEGIN_NV04(chan, NV30_3D(VP_UPLOAD_FROM_ID), 1); OUT_RING (chan, (shader->hw_id)); for (i=0; isize; i+=4) { - BEGIN_RING(chan, curie, NV30_3D_VP_UPLOAD_INST(0), 4); + BEGIN_NV04(chan, NV30_3D(VP_UPLOAD_INST(0)), 4); OUT_RING (chan, shader->data[i + 0]); OUT_RING (chan, shader->data[i + 1]); OUT_RING (chan, shader->data[i + 2]); @@ -73,20 +71,19 @@ NV30_LoadFragProg(ScrnInfoPtr pScrn, nv_shader_t *shader) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rankine = pNv->Nv3D; - BEGIN_RING(chan, rankine, NV30_3D_FP_ACTIVE_PROGRAM, 1); + BEGIN_NV04(chan, NV30_3D(FP_ACTIVE_PROGRAM), 1); if (OUT_RELOC(chan, pNv->shader_mem, shader->hw_id, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, NV30_3D_FP_ACTIVE_PROGRAM_DMA0, NV30_3D_FP_ACTIVE_PROGRAM_DMA1)) return FALSE; - BEGIN_RING(chan, rankine, NV30_3D_FP_REG_CONTROL, 1); + BEGIN_NV04(chan, NV30_3D(FP_REG_CONTROL), 1); OUT_RING (chan, (1 << 16)| 0xf); - BEGIN_RING(chan, rankine, NV30_3D_MULTISAMPLE_CONTROL, 1); + BEGIN_NV04(chan, NV30_3D(MULTISAMPLE_CONTROL), 1); OUT_RING (chan, 0xffff0000); - BEGIN_RING(chan, rankine, NV30_3D_FP_CONTROL,1); + BEGIN_NV04(chan, NV30_3D(FP_CONTROL),1); OUT_RING (chan, (shader->card_priv.NV30FP.num_regs-1)/2); return TRUE; @@ -97,11 +94,10 @@ NV40_LoadVtxProg(ScrnInfoPtr pScrn, nv_shader_t *shader) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; - BEGIN_RING(chan, curie, NV30_3D_VP_START_FROM_ID, 1); + BEGIN_NV04(chan, NV30_3D(VP_START_FROM_ID), 1); OUT_RING (chan, (shader->hw_id)); - BEGIN_RING(chan, curie, NV40_3D_VP_ATTRIB_EN, 2); + BEGIN_NV04(chan, NV40_3D(VP_ATTRIB_EN), 2); OUT_RING (chan, shader->card_priv.NV30VP.vp_in_reg); OUT_RING (chan, shader->card_priv.NV30VP.vp_out_reg); } @@ -111,16 +107,15 @@ NV40_LoadFragProg(ScrnInfoPtr pScrn, nv_shader_t *shader) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; - BEGIN_RING(chan, curie, NV30_3D_FP_ACTIVE_PROGRAM, 1); + BEGIN_NV04(chan, NV30_3D(FP_ACTIVE_PROGRAM), 1); if (OUT_RELOC(chan, pNv->shader_mem, shader->hw_id, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, NV30_3D_FP_ACTIVE_PROGRAM_DMA0, NV30_3D_FP_ACTIVE_PROGRAM_DMA1)) return FALSE; - BEGIN_RING(chan, curie, NV30_3D_FP_CONTROL, 1); + BEGIN_NV04(chan, NV30_3D(FP_CONTROL), 1); OUT_RING (chan, shader->card_priv.NV30FP.num_regs << NV40_3D_FP_CONTROL_TEMP_COUNT__SHIFT); diff --git a/src/nv30_xv_tex.c b/src/nv30_xv_tex.c index 06a7ddd..7ade33c 100644 --- a/src/nv30_xv_tex.c +++ b/src/nv30_xv_tex.c @@ -37,7 +37,6 @@ #include "nv_dma.h" #include "nv30_shaders.h" -#include "nv04_pushbuf.h" #include "hwdefs/nv30-40_3d.xml.h" @@ -135,7 +134,6 @@ NV30VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rankine = pNv->Nv3D; uint32_t tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; uint32_t card_fmt = 0; uint32_t card_swz = 0; @@ -159,7 +157,7 @@ NV30VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset, break; } - BEGIN_RING(chan, rankine, NV30_3D_TEX_OFFSET(unit), 8); + BEGIN_NV04(chan, NV30_3D(TEX_OFFSET(unit)), 8); if (OUT_RELOCl(chan, src, offset, tex_reloc)) return FALSE; @@ -239,10 +237,10 @@ NV30StopTexturedVideo(ScrnInfoPtr pScrn, pointer data, Bool Exit) } #define VERTEX_OUT(sx,sy,dx,dy) do { \ - BEGIN_RING(chan, rankine, NV30_3D_VTX_ATTR_2F_X(8), 4); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2F_X(8)), 4); \ OUT_RINGf (chan, (sx)); OUT_RINGf (chan, (sy)); \ OUT_RINGf (chan, (sx)/2.0); OUT_RINGf (chan, (sy)/2.0); \ - BEGIN_RING(chan, rankine, NV30_3D_VTX_ATTR_2I(0), 1); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2I(0)), 1); \ OUT_RING (chan, ((dy)<<16)|(dx)); \ } while(0) @@ -259,7 +257,6 @@ NV30PutTextureImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rankine = pNv->Nv3D; struct nouveau_bo *bo = nouveau_pixmap_bo(ppix); Bool bicubic = pPriv->bicubic; float X1, X2, Y1, Y2; @@ -285,11 +282,11 @@ NV30PutTextureImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, return BadImplementation; /* Disable blending */ - BEGIN_RING(chan, rankine, NV30_3D_BLEND_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(BLEND_FUNC_ENABLE), 1); OUT_RING (chan, 0); /* Setup surface */ - BEGIN_RING(chan, rankine, NV30_3D_RT_FORMAT, 3); + BEGIN_NV04(chan, NV30_3D(RT_FORMAT), 3); OUT_RING (chan, NV30_3D_RT_FORMAT_TYPE_LINEAR | NV30_3D_RT_FORMAT_ZETA_Z24S8 | dst_format); @@ -306,19 +303,19 @@ NV30PutTextureImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, int w = ppix->drawable.x + ppix->drawable.width; int h = ppix->drawable.y + ppix->drawable.height; - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_HORIZ), 2); OUT_RING (chan, (w<<16)|x); OUT_RING (chan, (h<<16)|y); - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_CLIP_HORIZ(0), 2); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_CLIP_HORIZ(0)), 2); OUT_RING (chan, (w-1+x)<<16); OUT_RING (chan, (h-1+y)<<16); - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_TX_ORIGIN, 1); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_TX_ORIGIN), 1); OUT_RING (chan, (y<<16)|x); } NV30_LoadFilterTable(pScrn); - BEGIN_RING(chan, rankine, NV30_3D_TEX_UNITS_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(TEX_UNITS_ENABLE), 1); OUT_RING (chan, NV30_3D_TEX_UNITS_ENABLE_TX0 | NV30_3D_TEX_UNITS_ENABLE_TX1); @@ -337,7 +334,7 @@ NV30PutTextureImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, return BadImplementation; } - BEGIN_RING(chan, rankine, NV30_3D_TEX_ENABLE(3), 1); + BEGIN_NV04(chan, NV30_3D(TEX_ENABLE(3)), 1); OUT_RING (chan, 0x0); if (drw_w / 2 < src_w || drw_h / 2 < src_h) @@ -362,7 +359,7 @@ NV30PutTextureImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, X2 = (float)(x2>>16)+(float)(x2&0xFFFF)/(float)0x10000; Y2 = (float)(y2>>16)+(float)(y2&0xFFFF)/(float)0x10000; - BEGIN_RING(chan, rankine, NV30_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV30_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, NV30_3D_VERTEX_BEGIN_END_TRIANGLES); while(nbox--) { @@ -375,7 +372,7 @@ NV30PutTextureImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, int sy1=pbox->y1; int sy2=pbox->y2; - BEGIN_RING(chan, rankine, NV30_3D_SCISSOR_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(SCISSOR_HORIZ), 2); OUT_RING (chan, (sx2 << 16) | 0); OUT_RING (chan, (sy2 << 16) | 0); @@ -386,17 +383,17 @@ NV30PutTextureImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset, pbox++; } - BEGIN_RING(chan, rankine, NV30_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV30_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, NV30_3D_VERTEX_BEGIN_END_STOP); if (pNv->dev->chipset == 0x30) { - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_HORIZ), 2); OUT_RING (chan, 4096 << 16); OUT_RING (chan, 4096 << 16); - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_CLIP_HORIZ(0), 2); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_CLIP_HORIZ(0)), 2); OUT_RING (chan, 4095 << 16); OUT_RING (chan, 4095 << 16); - BEGIN_RING(chan, rankine, NV30_3D_VIEWPORT_TX_ORIGIN, 1); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_TX_ORIGIN), 1); OUT_RING (chan, 0); } diff --git a/src/nv40_exa.c b/src/nv40_exa.c index ac98ed1..344c375 100644 --- a/src/nv40_exa.c +++ b/src/nv40_exa.c @@ -22,7 +22,6 @@ #include "nv_include.h" #include "nv30_shaders.h" -#include "nv04_pushbuf.h" #include "hwdefs/nv_object.xml.h" #include "hwdefs/nv30-40_3d.xml.h" @@ -192,7 +191,6 @@ NV40_SetupBlend(ScrnInfoPtr pScrn, nv_pict_op_t *blend, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; uint32_t sblend, dblend; sblend = blend->src_card_op; @@ -223,10 +221,10 @@ NV40_SetupBlend(ScrnInfoPtr pScrn, nv_pict_op_t *blend, } if (sblend == SF(ONE) && dblend == DF(ZERO)) { - BEGIN_RING(chan, curie, NV30_3D_BLEND_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(BLEND_FUNC_ENABLE), 1); OUT_RING (chan, 0); } else { - BEGIN_RING(chan, curie, NV30_3D_BLEND_FUNC_ENABLE, 5); + BEGIN_NV04(chan, NV30_3D(BLEND_FUNC_ENABLE), 5); OUT_RING (chan, 1); OUT_RING (chan, sblend); OUT_RING (chan, dblend); @@ -241,7 +239,6 @@ NV40EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; struct nouveau_bo *bo = nouveau_pixmap_bo(pPix); unsigned tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; nv_pict_texture_format_t *fmt; @@ -251,7 +248,7 @@ NV40EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit) if (!fmt) return FALSE; - BEGIN_RING(chan, curie, NV30_3D_TEX_OFFSET(unit), 8); + BEGIN_NV04(chan, NV30_3D(TEX_OFFSET(unit)), 8); if (OUT_RELOCl(chan, bo, 0, tex_reloc) || OUT_RELOCd(chan, bo, fmt->card_fmt | NV40_3D_TEX_FORMAT_LINEAR | NV30_3D_TEX_FORMAT_DIMS_2D | 0x8000 | @@ -296,7 +293,7 @@ NV40EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit) } OUT_RING (chan, (pPix->drawable.width << 16) | pPix->drawable.height); OUT_RING (chan, 0); /* border ARGB */ - BEGIN_RING(chan, curie, NV40_3D_TEX_SIZE1(unit), 1); + BEGIN_NV04(chan, NV40_3D(TEX_SIZE1(unit)), 1); OUT_RING (chan, (1 << NV40_3D_TEX_SIZE1_DEPTH__SHIFT) | (uint32_t)exaGetPixmapPitch(pPix)); @@ -311,7 +308,6 @@ NV40_SetupSurface(ScrnInfoPtr pScrn, PixmapPtr pPix, PictFormatShort format) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; struct nouveau_bo *bo = nouveau_pixmap_bo(pPix); nv_pict_surface_format_t *fmt; @@ -321,7 +317,7 @@ NV40_SetupSurface(ScrnInfoPtr pScrn, PixmapPtr pPix, PictFormatShort format) return FALSE; } - BEGIN_RING(chan, curie, NV30_3D_RT_FORMAT, 3); + BEGIN_NV04(chan, NV30_3D(RT_FORMAT), 3); OUT_RING (chan, NV30_3D_RT_FORMAT_TYPE_LINEAR | NV30_3D_RT_FORMAT_ZETA_Z24S8 | fmt->card_fmt); @@ -421,7 +417,6 @@ NV40EXAPrepareComposite(int op, PicturePtr psPict, ScrnInfoPtr pScrn = xf86Screens[psPix->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; nv_pict_op_t *blend; int fpid = NV40EXA_FPID_PASS_COL0; NV40EXA_STATE; @@ -474,9 +469,9 @@ NV40EXAPrepareComposite(int op, PicturePtr psPict, /* Appears to be some kind of cache flush, needed here at least * sometimes.. funky text rendering otherwise :) */ - BEGIN_RING(chan, curie, NV40_3D_TEX_CACHE_CTL, 1); + BEGIN_NV04(chan, NV40_3D(TEX_CACHE_CTL), 1); OUT_RING (chan, 2); - BEGIN_RING(chan, curie, NV40_3D_TEX_CACHE_CTL, 1); + BEGIN_NV04(chan, NV40_3D(TEX_CACHE_CTL), 1); OUT_RING (chan, 1); pNv->alu = op; @@ -512,16 +507,16 @@ NV40EXATransformCoord(PictTransformPtr t, int x, int y, float sx, float sy, } #define CV_OUTm(sx,sy,mx,my,dx,dy) do { \ - BEGIN_RING(chan, curie, NV30_3D_VTX_ATTR_2F_X(8), 4); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2F_X(8)), 4); \ OUT_RINGf (chan, (sx)); OUT_RINGf (chan, (sy)); \ OUT_RINGf (chan, (mx)); OUT_RINGf (chan, (my)); \ - BEGIN_RING(chan, curie, NV30_3D_VTX_ATTR_2I(0), 1); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2I(0)), 1); \ OUT_RING (chan, ((dy)<<16)|(dx)); \ } while(0) #define CV_OUT(sx,sy,dx,dy) do { \ - BEGIN_RING(chan, curie, NV30_3D_VTX_ATTR_2F_X(8), 2); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2F_X(8)), 2); \ OUT_RINGf (chan, (sx)); OUT_RINGf (chan, (sy)); \ - BEGIN_RING(chan, curie, NV30_3D_VTX_ATTR_2I(0), 1); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2I(0)), 1); \ OUT_RING (chan, ((dy)<<16)|(dx)); \ } while(0) @@ -534,7 +529,6 @@ NV40EXAComposite(PixmapPtr pdPix, int srcX , int srcY, ScrnInfoPtr pScrn = xf86Screens[pdPix->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; float sX0, sX1, sX2, sY0, sY1, sY2; float mX0, mX1, mX2, mY0, mY1, mY2; NV40EXA_STATE; @@ -546,10 +540,10 @@ NV40EXAComposite(PixmapPtr pdPix, int srcX , int srcY, * image, but just a part. */ /* Handling the cliprects is done for us already. */ - BEGIN_RING(chan, curie, NV30_3D_SCISSOR_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(SCISSOR_HORIZ), 2); OUT_RING (chan, (width << 16) | dstX); OUT_RING (chan, (height << 16) | dstY); - BEGIN_RING(chan, curie, NV30_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV30_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, NV30_3D_VERTEX_BEGIN_END_TRIANGLES); NV40EXATransformCoord(state->unit[0].transform, srcX, srcY - height, @@ -586,7 +580,7 @@ NV40EXAComposite(PixmapPtr pdPix, int srcX , int srcY, CV_OUT(sX2, sY2, dstX + 2*width, dstY + height); } - BEGIN_RING(chan, curie, NV30_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV30_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, NV30_3D_VERTEX_BEGIN_END_STOP); } @@ -607,7 +601,6 @@ NVAccelInitNV40TCL(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie; uint32_t class = 0, chipset; int next_hw_id = 0, next_hw_offset = 0, i; @@ -635,7 +628,6 @@ NVAccelInitNV40TCL(ScrnInfoPtr pScrn) if (nouveau_grobj_alloc(pNv->chan, Nv3D, class, &pNv->Nv3D)) return FALSE; } - curie = pNv->Nv3D; if (!pNv->shader_mem) { if (nouveau_bo_new(pNv->dev, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | @@ -648,43 +640,45 @@ NVAccelInitNV40TCL(ScrnInfoPtr pScrn) } } - BEGIN_RING(chan, curie, NV30_3D_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(3D, OBJECT), 1); + OUT_RING (chan, pNv->Nv3D->handle); + BEGIN_NV04(chan, NV30_3D(DMA_NOTIFY), 1); OUT_RING (chan, pNv->notify0->handle); - BEGIN_RING(chan, curie, NV30_3D_DMA_TEXTURE0, 2); + BEGIN_NV04(chan, NV30_3D(DMA_TEXTURE0), 2); OUT_RING (chan, pNv->chan->vram->handle); OUT_RING (chan, pNv->chan->gart->handle); - BEGIN_RING(chan, curie, NV30_3D_DMA_COLOR0, 2); + BEGIN_NV04(chan, NV30_3D(DMA_COLOR0), 2); OUT_RING (chan, pNv->chan->vram->handle); OUT_RING (chan, pNv->chan->vram->handle); /* voodoo */ - BEGIN_RING(chan, curie, 0x1ea4, 3); + BEGIN_NV04(chan, SUBC_3D(0x1ea4), 3); OUT_RING (chan, 0x00000010); OUT_RING (chan, 0x01000100); OUT_RING (chan, 0xff800006); - BEGIN_RING(chan, curie, 0x1fc4, 1); + BEGIN_NV04(chan, SUBC_3D(0x1fc4), 1); OUT_RING (chan, 0x06144321); - BEGIN_RING(chan, curie, 0x1fc8, 2); + BEGIN_NV04(chan, SUBC_3D(0x1fc8), 2); OUT_RING (chan, 0xedcba987); OUT_RING (chan, 0x00000021); - BEGIN_RING(chan, curie, 0x1fd0, 1); + BEGIN_NV04(chan, SUBC_3D(0x1fd0), 1); OUT_RING (chan, 0x00171615); - BEGIN_RING(chan, curie, 0x1fd4, 1); + BEGIN_NV04(chan, SUBC_3D(0x1fd4), 1); OUT_RING (chan, 0x001b1a19); - BEGIN_RING(chan, curie, 0x1ef8, 1); + BEGIN_NV04(chan, SUBC_3D(0x1ef8), 1); OUT_RING (chan, 0x0020ffff); - BEGIN_RING(chan, curie, 0x1d64, 1); + BEGIN_NV04(chan, SUBC_3D(0x1d64), 1); OUT_RING (chan, 0x00d30000); - BEGIN_RING(chan, curie, 0x1e94, 1); + BEGIN_NV04(chan, SUBC_3D(0x1e94), 1); OUT_RING (chan, 0x00000001); /* This removes the the stair shaped tearing that i get. */ /* Verified on one G70 card that it doesn't cause regressions for people without the problem. */ /* The blob sets this up by default for NV43. */ - BEGIN_RING(chan, curie, 0x1450, 1); + BEGIN_NV04(chan, SUBC_3D(0x1450), 1); OUT_RING (chan, 0x0000000F); - BEGIN_RING(chan, curie, NV30_3D_VIEWPORT_TRANSLATE_X, 8); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_TRANSLATE_X), 8); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); @@ -696,58 +690,58 @@ NVAccelInitNV40TCL(ScrnInfoPtr pScrn) /* default 3D state */ /*XXX: replace with the same state that the DRI emits on startup */ - BEGIN_RING(chan, curie, NV30_3D_STENCIL_ENABLE(0), 1); + BEGIN_NV04(chan, NV30_3D(STENCIL_ENABLE(0)), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, curie, NV30_3D_STENCIL_ENABLE(1), 1); + BEGIN_NV04(chan, NV30_3D(STENCIL_ENABLE(1)), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, curie, NV30_3D_ALPHA_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(ALPHA_FUNC_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, curie, NV30_3D_DEPTH_WRITE_ENABLE, 2); + BEGIN_NV04(chan, NV30_3D(DEPTH_WRITE_ENABLE), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, curie, NV30_3D_COLOR_MASK, 1); + BEGIN_NV04(chan, NV30_3D(COLOR_MASK), 1); OUT_RING (chan, 0x01010101); /* TR,TR,TR,TR */ - BEGIN_RING(chan, curie, NV30_3D_CULL_FACE_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(CULL_FACE_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, curie, NV30_3D_BLEND_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(BLEND_FUNC_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, curie, NV30_3D_COLOR_LOGIC_OP_ENABLE, 2); + BEGIN_NV04(chan, NV30_3D(COLOR_LOGIC_OP_ENABLE), 2); OUT_RING (chan, 0); OUT_RING (chan, NV30_3D_COLOR_LOGIC_OP_OP_COPY); - BEGIN_RING(chan, curie, NV30_3D_DITHER_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(DITHER_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, curie, NV30_3D_SHADE_MODEL, 1); + BEGIN_NV04(chan, NV30_3D(SHADE_MODEL), 1); OUT_RING (chan, NV30_3D_SHADE_MODEL_SMOOTH); - BEGIN_RING(chan, curie, NV30_3D_POLYGON_OFFSET_FACTOR,2); + BEGIN_NV04(chan, NV30_3D(POLYGON_OFFSET_FACTOR),2); OUT_RINGf (chan, 0.0); OUT_RINGf (chan, 0.0); - BEGIN_RING(chan, curie, NV30_3D_POLYGON_MODE_FRONT, 2); + BEGIN_NV04(chan, NV30_3D(POLYGON_MODE_FRONT), 2); OUT_RING (chan, NV30_3D_POLYGON_MODE_FRONT_FILL); OUT_RING (chan, NV30_3D_POLYGON_MODE_BACK_FILL); - BEGIN_RING(chan, curie, NV30_3D_POLYGON_STIPPLE_PATTERN(0), 0x20); + BEGIN_NV04(chan, NV30_3D(POLYGON_STIPPLE_PATTERN(0)), 0x20); for (i=0;i<0x20;i++) OUT_RING (chan, 0xFFFFFFFF); for (i=0;i<16;i++) { - BEGIN_RING(chan, curie, NV30_3D_TEX_ENABLE(i), 1); + BEGIN_NV04(chan, NV30_3D(TEX_ENABLE(i)), 1); OUT_RING (chan, 0); } - BEGIN_RING(chan, curie, 0x1d78, 1); + BEGIN_NV04(chan, SUBC_3D(0x1d78), 1); OUT_RING (chan, 0x110); - BEGIN_RING(chan, curie, NV30_3D_RT_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(RT_ENABLE), 1); OUT_RING (chan, NV30_3D_RT_ENABLE_COLOR0); - BEGIN_RING(chan, curie, NV30_3D_RT_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(RT_HORIZ), 2); OUT_RING (chan, (4096 << 16)); OUT_RING (chan, (4096 << 16)); - BEGIN_RING(chan, curie, NV30_3D_SCISSOR_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(SCISSOR_HORIZ), 2); OUT_RING (chan, (4096 << 16)); OUT_RING (chan, (4096 << 16)); - BEGIN_RING(chan, curie, NV30_3D_VIEWPORT_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_HORIZ), 2); OUT_RING (chan, (4096 << 16)); OUT_RING (chan, (4096 << 16)); - BEGIN_RING(chan, curie, NV30_3D_VIEWPORT_CLIP_HORIZ(0), 2); + BEGIN_NV04(chan, NV30_3D(VIEWPORT_CLIP_HORIZ(0)), 2); OUT_RING (chan, (4095 << 16)); OUT_RING (chan, (4095 << 16)); diff --git a/src/nv40_xv_tex.c b/src/nv40_xv_tex.c index 37c9821..e74cd2a 100644 --- a/src/nv40_xv_tex.c +++ b/src/nv40_xv_tex.c @@ -37,7 +37,6 @@ #include "nv_dma.h" #include "nv30_shaders.h" -#include "nv04_pushbuf.h" #include "hwdefs/nv30-40_3d.xml.h" @@ -137,7 +136,6 @@ NV40VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; uint32_t tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; uint32_t card_fmt = 0; uint32_t card_swz = 0; @@ -161,7 +159,7 @@ NV40VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset, break; } - BEGIN_RING(chan, curie, NV30_3D_TEX_OFFSET(unit), 8); + BEGIN_NV04(chan, NV30_3D(TEX_OFFSET(unit)), 8); if (OUT_RELOCl(chan, src, offset, tex_reloc)) return FALSE; if (unit==0) { @@ -207,7 +205,7 @@ NV40VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset, OUT_RING (chan, (width << 16) | height); OUT_RING (chan, 0); /* border ARGB */ - BEGIN_RING(chan, curie, NV40_3D_TEX_SIZE1(unit), 1); + BEGIN_NV04(chan, NV40_3D(TEX_SIZE1(unit)), 1); OUT_RING (chan, (1 << NV40_3D_TEX_SIZE1_DEPTH__SHIFT) | (uint16_t) src_pitch); @@ -243,10 +241,10 @@ NV40StopTexturedVideo(ScrnInfoPtr pScrn, pointer data, Bool Exit) } #define VERTEX_OUT(sx,sy,dx,dy) do { \ - BEGIN_RING(chan, curie, NV30_3D_VTX_ATTR_2F_X(8), 4); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2F_X(8)), 4); \ OUT_RINGf (chan, (sx)); OUT_RINGf (chan, (sy)); \ OUT_RINGf (chan, (sx)/2.0); OUT_RINGf (chan, (sy)/2.0); \ - BEGIN_RING(chan, curie, NV30_3D_VTX_ATTR_2I(0), 1); \ + BEGIN_NV04(chan, NV30_3D(VTX_ATTR_2I(0)), 1); \ OUT_RING (chan, ((dy)<<16)|(dx)); \ } while(0) @@ -263,7 +261,6 @@ NV40PutTextureImage(ScrnInfoPtr pScrn, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *curie = pNv->Nv3D; struct nouveau_bo *bo = nouveau_pixmap_bo(ppix); Bool bicubic = pPriv->bicubic; float X1, X2, Y1, Y2; @@ -289,11 +286,11 @@ NV40PutTextureImage(ScrnInfoPtr pScrn, return BadImplementation; /* Disable blending */ - BEGIN_RING(chan, curie, NV30_3D_BLEND_FUNC_ENABLE, 1); + BEGIN_NV04(chan, NV30_3D(BLEND_FUNC_ENABLE), 1); OUT_RING (chan, 0); /* Setup surface */ - BEGIN_RING(chan, curie, NV30_3D_RT_FORMAT, 3); + BEGIN_NV04(chan, NV30_3D(RT_FORMAT), 3); OUT_RING (chan, NV30_3D_RT_FORMAT_TYPE_LINEAR | NV30_3D_RT_FORMAT_ZETA_Z24S8 | dst_format); OUT_RING (chan, exaGetPixmapPitch(ppix)); @@ -334,9 +331,9 @@ NV40PutTextureImage(ScrnInfoPtr pScrn, /* Appears to be some kind of cache flush, needed here at least * sometimes.. funky text rendering otherwise :) */ - BEGIN_RING(chan, curie, NV40_3D_TEX_CACHE_CTL, 1); + BEGIN_NV04(chan, NV40_3D(TEX_CACHE_CTL), 1); OUT_RING (chan, 2); - BEGIN_RING(chan, curie, NV40_3D_TEX_CACHE_CTL, 1); + BEGIN_NV04(chan, NV40_3D(TEX_CACHE_CTL), 1); OUT_RING (chan, 1); /* Just before rendering we wait for vblank in the non-composited case. */ @@ -351,7 +348,7 @@ NV40PutTextureImage(ScrnInfoPtr pScrn, X2 = (float)(x2>>16)+(float)(x2&0xFFFF)/(float)0x10000; Y2 = (float)(y2>>16)+(float)(y2&0xFFFF)/(float)0x10000; - BEGIN_RING(chan, curie, NV30_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV30_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, NV30_3D_VERTEX_BEGIN_END_TRIANGLES); while(nbox--) { @@ -364,7 +361,7 @@ NV40PutTextureImage(ScrnInfoPtr pScrn, int sy1=pbox->y1; int sy2=pbox->y2; - BEGIN_RING(chan, curie, NV30_3D_SCISSOR_HORIZ, 2); + BEGIN_NV04(chan, NV30_3D(SCISSOR_HORIZ), 2); OUT_RING (chan, (sx2 << 16) | 0); OUT_RING (chan, (sy2 << 16) | 0); @@ -375,7 +372,7 @@ NV40PutTextureImage(ScrnInfoPtr pScrn, pbox++; } - BEGIN_RING(chan, curie, NV30_3D_VERTEX_BEGIN_END, 1); + BEGIN_NV04(chan, NV30_3D(VERTEX_BEGIN_END), 1); OUT_RING (chan, NV30_3D_VERTEX_BEGIN_END_STOP); FIRE_RING (chan); diff --git a/src/nv50_accel.c b/src/nv50_accel.c index fbb2dd8..8765f44 100644 --- a/src/nv50_accel.c +++ b/src/nv50_accel.c @@ -33,7 +33,6 @@ NV50SyncToVBlank(PixmapPtr ppix, BoxPtr box) ScrnInfoPtr pScrn = xf86Screens[ppix->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *nvsw = pNv->NvSW; int crtcs; if (!nouveau_exa_pixmap_is_onscreen(ppix)) @@ -45,15 +44,15 @@ NV50SyncToVBlank(PixmapPtr ppix, BoxPtr box) if (!crtcs) return; - BEGIN_RING(chan, nvsw, 0x0060, 2); + BEGIN_NV04(chan, SUBC_NVSW(0x0060), 2); OUT_RING (chan, pNv->vblank_sem->handle); OUT_RING (chan, 0); - BEGIN_RING(chan, nvsw, 0x006c, 1); + BEGIN_NV04(chan, SUBC_NVSW(0x006c), 1); OUT_RING (chan, 0x22222222); - BEGIN_RING(chan, nvsw, 0x0404, 2); + BEGIN_NV04(chan, SUBC_NVSW(0x0404), 2); OUT_RING (chan, 0x11111111); OUT_RING (chan, ffs(crtcs) - 1); - BEGIN_RING(chan, nvsw, 0x0068, 1); + BEGIN_NV04(chan, SUBC_NVSW(0x0068), 1); OUT_RING (chan, 0x11111111); } @@ -62,7 +61,6 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *tesla, *nvsw; unsigned class; int i; @@ -117,42 +115,44 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) return FALSE; } } - tesla = pNv->Nv3D; - nvsw = pNv->NvSW; if (MARK_RING(chan, 512, 32)) return FALSE; - BEGIN_RING(chan, nvsw, 0x018c, 1); + BEGIN_NV04(chan, NV01_SUBC(NVSW, OBJECT), 1); + OUT_RING (chan, pNv->NvSW->handle); + BEGIN_NV04(chan, SUBC_NVSW(0x018c), 1); OUT_RING (chan, pNv->vblank_sem->handle); - BEGIN_RING(chan, nvsw, 0x0400, 1); + BEGIN_NV04(chan, SUBC_NVSW(0x0400), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, NV50_3D_COND_MODE, 1); + BEGIN_NV04(chan, NV01_SUBC(3D, OBJECT), 1); + OUT_RING (chan, pNv->Nv3D->handle); + BEGIN_NV04(chan, NV50_3D(COND_MODE), 1); OUT_RING (chan, NV50_3D_COND_MODE_ALWAYS); - BEGIN_RING(chan, tesla, NV50_3D_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV50_3D(DMA_NOTIFY), 1); OUT_RING (chan, chan->nullobj->handle); - BEGIN_RING(chan, tesla, NV50_3D_DMA_ZETA, 11); + BEGIN_NV04(chan, NV50_3D(DMA_ZETA), 11); for (i = 0; i < 11; i++) OUT_RING (chan, pNv->chan->vram->handle); - BEGIN_RING(chan, tesla, NV50_3D_DMA_COLOR(0), NV50_3D_DMA_COLOR__LEN); + BEGIN_NV04(chan, NV50_3D(DMA_COLOR(0)), NV50_3D_DMA_COLOR__LEN); for (i = 0; i < NV50_3D_DMA_COLOR__LEN; i++) OUT_RING (chan, pNv->chan->vram->handle); - BEGIN_RING(chan, tesla, NV50_3D_RT_CONTROL, 1); + BEGIN_NV04(chan, NV50_3D(RT_CONTROL), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50_3D_VIEWPORT_TRANSFORM_EN, 1); + BEGIN_NV04(chan, NV50_3D(VIEWPORT_TRANSFORM_EN), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, 0x0f90, 1); + BEGIN_NV04(chan, SUBC_3D(0x0f90), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50_3D_LINKED_TSC, 1); + BEGIN_NV04(chan, NV50_3D(LINKED_TSC), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50_3D_TEX_LIMITS(2), 1); + BEGIN_NV04(chan, NV50_3D(TEX_LIMITS(2)), 1); OUT_RING (chan, 0x54); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, PVP_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, pNv->tesla_scratch, PVP_OFFSET, @@ -161,9 +161,9 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) return FALSE; } OUT_RING (chan, 0x00004000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, 0); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), (3*2*2)); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), (3*2*2)); OUT_RING (chan, 0x10000001); OUT_RING (chan, 0x0423c788); OUT_RING (chan, 0x10000205); @@ -178,23 +178,23 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) OUT_RING (chan, 0x0423c789); /* fetch only VTX_ATTR[0,8,9].xy */ - BEGIN_RING(chan, tesla, NV50_3D_VP_ATTR_EN(0), 2); + BEGIN_NV04(chan, NV50_3D(VP_ATTR_EN(0)), 2); OUT_RING (chan, 0x00000003); OUT_RING (chan, 0x00000033); - BEGIN_RING(chan, tesla, NV50_3D_VP_REG_ALLOC_RESULT, 1); + BEGIN_NV04(chan, NV50_3D(VP_REG_ALLOC_RESULT), 1); OUT_RING (chan, 6); - if (tesla->grclass != 0x8597) { - BEGIN_RING(chan, tesla, NV50_3D_VP_RESULT_MAP_SIZE, 2); + if (pNv->Nv3D->grclass != 0x8597) { + BEGIN_NV04(chan, NV50_3D(VP_RESULT_MAP_SIZE), 2); OUT_RING (chan, 8); OUT_RING (chan, 0); /* NV50_3D_VP_REG_ALLOC_TEMP */ } else { - BEGIN_RING(chan, tesla, NV50_3D_VP_RESULT_MAP_SIZE, 1); + BEGIN_NV04(chan, NV50_3D(VP_RESULT_MAP_SIZE), 1); OUT_RING (chan, 8); } - BEGIN_RING(chan, tesla, NV50_3D_VP_START_ID, 1); + BEGIN_NV04(chan, NV50_3D(VP_START_ID), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_S, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, pNv->tesla_scratch, @@ -203,16 +203,16 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) return FALSE; } OUT_RING (chan, (0 << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, 0); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 6); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 6); OUT_RING (chan, 0x80000000); OUT_RING (chan, 0x90000004); OUT_RING (chan, 0x82010200); OUT_RING (chan, 0x82020204); OUT_RING (chan, 0xf6400001); OUT_RING (chan, 0x0000c785); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_C, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, pNv->tesla_scratch, @@ -221,9 +221,9 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) return FALSE; } OUT_RING (chan, (0 << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, 0); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 16); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 16); OUT_RING (chan, 0x80000000); OUT_RING (chan, 0x90000004); OUT_RING (chan, 0x82030210); @@ -240,7 +240,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00000780); OUT_RING (chan, 0xc004060d); OUT_RING (chan, 0x00000781); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_CCA, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, pNv->tesla_scratch, @@ -249,9 +249,9 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) return FALSE; } OUT_RING (chan, (0 << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, 0); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 16); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 16); OUT_RING (chan, 0x80000000); OUT_RING (chan, 0x90000004); OUT_RING (chan, 0x82030210); @@ -268,7 +268,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00000780); OUT_RING (chan, 0xc007060d); OUT_RING (chan, 0x00000781); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_CCASA, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_CCASA, @@ -277,9 +277,9 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) return FALSE; } OUT_RING (chan, (0 << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, 0); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 16); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 16); OUT_RING (chan, 0x80000000); OUT_RING (chan, 0x90000004); OUT_RING (chan, 0x82030200); @@ -296,7 +296,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00000780); OUT_RING (chan, 0xc004060d); OUT_RING (chan, 0x00000781); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_S_A8, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_S_A8, @@ -305,9 +305,9 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) return FALSE; } OUT_RING (chan, (0 << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, 0); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 10); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 10); OUT_RING (chan, 0x80000000); OUT_RING (chan, 0x90000004); OUT_RING (chan, 0x82010200); @@ -318,7 +318,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) OUT_RING (chan, 0x10008008); OUT_RING (chan, 0x1000000d); OUT_RING (chan, 0x0403c781); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_C_A8, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_C_A8, @@ -327,9 +327,9 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) return FALSE; } OUT_RING (chan, (0 << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, 0); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 16); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 16); OUT_RING (chan, 0x80000000); OUT_RING (chan, 0x90000004); OUT_RING (chan, 0x82030208); @@ -346,7 +346,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) OUT_RING (chan, 0x10008604); OUT_RING (chan, 0x10000609); OUT_RING (chan, 0x0403c781); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_NV12, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, pNv->tesla_scratch, PFP_OFFSET + PFP_NV12, @@ -355,9 +355,9 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) return FALSE; } OUT_RING (chan, (0 << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, 0); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 24); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 24); OUT_RING (chan, 0x80000008); OUT_RING (chan, 0x90000408); OUT_RING (chan, 0x82010400); @@ -384,33 +384,33 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00010781); /* HPOS.xy = ($o0, $o1), HPOS.zw = (0.0, 1.0), then map $o2 - $o5 */ - BEGIN_RING(chan, tesla, NV50_3D_VP_RESULT_MAP(0), 2); + BEGIN_NV04(chan, NV50_3D(VP_RESULT_MAP(0)), 2); OUT_RING (chan, 0x41400100); OUT_RING (chan, 0x05040302); - BEGIN_RING(chan, tesla, NV50_3D_POINT_SPRITE_ENABLE, 1); + BEGIN_NV04(chan, NV50_3D(POINT_SPRITE_ENABLE), 1); OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, tesla, NV50_3D_FP_INTERPOLANT_CTRL, 2); + BEGIN_NV04(chan, NV50_3D(FP_INTERPOLANT_CTRL), 2); OUT_RING (chan, 0x08040404); OUT_RING (chan, 0x00000008); /* NV50_3D_FP_REG_ALLOC_TEMP */ - BEGIN_RING(chan, tesla, NV50_3D_SCISSOR_ENABLE(0), 1); + BEGIN_NV04(chan, NV50_3D(SCISSOR_ENABLE(0)), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50_3D_VIEWPORT_HORIZ(0), 2); + BEGIN_NV04(chan, NV50_3D(VIEWPORT_HORIZ(0)), 2); OUT_RING (chan, 8192 << NV50_3D_VIEWPORT_HORIZ_W__SHIFT); OUT_RING (chan, 8192 << NV50_3D_VIEWPORT_VERT_H__SHIFT); /* NV50_3D_SCISSOR_VERT_T_SHIFT is wrong, because it was deducted with * origin lying at the bottom left. This will be changed to _MIN_ and _MAX_ * later, because it is origin dependent. */ - BEGIN_RING(chan, tesla, NV50_3D_SCISSOR_HORIZ(0), 2); + BEGIN_NV04(chan, NV50_3D(SCISSOR_HORIZ(0)), 2); OUT_RING (chan, 8192 << NV50_3D_SCISSOR_HORIZ_MAX__SHIFT); OUT_RING (chan, 8192 << NV50_3D_SCISSOR_VERT_MAX__SHIFT); - BEGIN_RING(chan, tesla, NV50_3D_SCREEN_SCISSOR_HORIZ, 2); + BEGIN_NV04(chan, NV50_3D(SCREEN_SCISSOR_HORIZ), 2); OUT_RING (chan, 8192 << NV50_3D_SCREEN_SCISSOR_HORIZ_W__SHIFT); OUT_RING (chan, 8192 << NV50_3D_SCREEN_SCISSOR_VERT_H__SHIFT); - BEGIN_RING(chan, tesla, NV50_3D_SET_PROGRAM_CB, 1); + BEGIN_NV04(chan, NV50_3D(SET_PROGRAM_CB), 1); OUT_RING (chan, 0x00000031 | (CB_PFP << 12)); return TRUE; diff --git a/src/nv50_accel.h b/src/nv50_accel.h index 01a99b8..07a4ee1 100644 --- a/src/nv50_accel.h +++ b/src/nv50_accel.h @@ -1,7 +1,6 @@ #ifndef __NV50_ACCEL_H__ #define __NV50_ACCEL_H__ -#include "nv04_pushbuf.h" #include "hwdefs/nv50_2d.xml.h" #include "hwdefs/nv50_3d.xml.h" @@ -35,12 +34,11 @@ static __inline__ void VTX1s(NVPtr pNv, float sx, float sy, unsigned dx, unsigned dy) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *tesla = pNv->Nv3D; - BEGIN_RING(chan, tesla, NV50_3D_VTX_ATTR_2F_X(8), 2); + BEGIN_NV04(chan, NV50_3D(VTX_ATTR_2F_X(8)), 2); OUT_RINGf (chan, sx); OUT_RINGf (chan, sy); - BEGIN_RING(chan, tesla, NV50_3D_VTX_ATTR_2I(0), 1); + BEGIN_NV04(chan, NV50_3D(VTX_ATTR_2I(0)), 1); OUT_RING (chan, (dy << 16) | dx); } @@ -49,14 +47,13 @@ VTX2s(NVPtr pNv, float s1x, float s1y, float s2x, float s2y, unsigned dx, unsigned dy) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *tesla = pNv->Nv3D; - BEGIN_RING(chan, tesla, NV50_3D_VTX_ATTR_2F_X(8), 4); + BEGIN_NV04(chan, NV50_3D(VTX_ATTR_2F_X(8)), 4); OUT_RINGf (chan, s1x); OUT_RINGf (chan, s1y); OUT_RINGf (chan, s2x); OUT_RINGf (chan, s2y); - BEGIN_RING(chan, tesla, NV50_3D_VTX_ATTR_2I(0), 1); + BEGIN_NV04(chan, NV50_3D(VTX_ATTR_2I(0)), 1); OUT_RING (chan, (dy << 16) | dx); } diff --git a/src/nv50_exa.c b/src/nv50_exa.c index a2f9b34..6529e74 100644 --- a/src/nv50_exa.c +++ b/src/nv50_exa.c @@ -24,7 +24,6 @@ #include "nv_include.h" #include "nv_rop.h" -#include "nv04_pushbuf.h" #include "nv50_accel.h" struct nv50_exa_state { @@ -42,8 +41,6 @@ static struct nv50_exa_state exa_state; ScrnInfoPtr pScrn = xf86Screens[(p)->drawable.pScreen->myNum]; \ NVPtr pNv = NVPTR(pScrn); \ struct nouveau_channel *chan = pNv->chan; (void)chan; \ - struct nouveau_grobj *eng2d = pNv->Nv2D; (void)eng2d; \ - struct nouveau_grobj *tesla = pNv->Nv3D; (void)tesla; \ struct nv50_exa_state *state = &exa_state; (void)state #define BF(f) NV50_BLEND_FACTOR_##f @@ -97,7 +94,7 @@ static void NV50EXASetClip(PixmapPtr ppix, int x, int y, int w, int h) { NV50EXA_LOCALS(ppix); - BEGIN_RING(chan, eng2d, NV50_2D_CLIP_X, 4); + BEGIN_NV04(chan, NV50_2D(CLIP_X), 4); OUT_RING (chan, x); OUT_RING (chan, y); OUT_RING (chan, w); @@ -119,13 +116,13 @@ NV50EXAAcquireSurface2D(PixmapPtr ppix, int is_src) bo_flags |= is_src ? NOUVEAU_BO_RD : NOUVEAU_BO_WR; if (!nv50_style_tiled_pixmap(ppix)) { - BEGIN_RING(chan, eng2d, mthd, 2); + BEGIN_NV04(chan, SUBC_2D(mthd), 2); OUT_RING (chan, fmt); OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, mthd + 0x14, 1); + BEGIN_NV04(chan, SUBC_2D(mthd + 0x14), 1); OUT_RING (chan, (uint32_t)exaGetPixmapPitch(ppix)); } else { - BEGIN_RING(chan, eng2d, mthd, 5); + BEGIN_NV04(chan, SUBC_2D(mthd), 5); OUT_RING (chan, fmt); OUT_RING (chan, 0); OUT_RING (chan, bo->tile_mode << 4); @@ -133,7 +130,7 @@ NV50EXAAcquireSurface2D(PixmapPtr ppix, int is_src) OUT_RING (chan, 0); } - BEGIN_RING(chan, eng2d, mthd + 0x18, 4); + BEGIN_NV04(chan, SUBC_2D(mthd + 0x18), 4); OUT_RING (chan, ppix->drawable.width); OUT_RING (chan, ppix->drawable.height); if (OUT_RELOCh(chan, bo, 0, bo_flags) || @@ -151,7 +148,7 @@ NV50EXASetPattern(PixmapPtr pdpix, int col0, int col1, int pat0, int pat1) { NV50EXA_LOCALS(pdpix); - BEGIN_RING(chan, eng2d, NV50_2D_PATTERN_COLOR(0), 4); + BEGIN_NV04(chan, NV50_2D(PATTERN_COLOR(0)), 4); OUT_RING (chan, col0); OUT_RING (chan, col1); OUT_RING (chan, pat0); @@ -169,7 +166,7 @@ NV50EXASetROP(PixmapPtr pdpix, int alu, Pixel planemask) else rop = NVROP[alu].copy; - BEGIN_RING(chan, eng2d, NV50_2D_OPERATION, 1); + BEGIN_NV04(chan, NV50_2D(OPERATION), 1); if (alu == GXcopy && EXA_PM_IS_SOLID(&pdpix->drawable, planemask)) { OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); return; @@ -177,7 +174,7 @@ NV50EXASetROP(PixmapPtr pdpix, int alu, Pixel planemask) OUT_RING (chan, NV50_2D_OPERATION_ROP); } - BEGIN_RING(chan, eng2d, NV50_2D_PATTERN_COLOR_FORMAT, 2); + BEGIN_NV04(chan, NV50_2D(PATTERN_COLOR_FORMAT), 2); switch (pdpix->drawable.bitsPerPixel) { case 8: OUT_RING (chan, 3); break; case 15: OUT_RING (chan, 1); break; @@ -204,7 +201,7 @@ NV50EXASetROP(PixmapPtr pdpix, int alu, Pixel planemask) } if (pNv->currentRop != alu) { - BEGIN_RING(chan, eng2d, NV50_2D_ROP, 1); + BEGIN_NV04(chan, NV50_2D(ROP), 1); OUT_RING (chan, rop); pNv->currentRop = alu; } @@ -239,7 +236,7 @@ NV50EXAPrepareSolid(PixmapPtr pdpix, int alu, Pixel planemask, Pixel fg) NV50EXASetROP(pdpix, alu, planemask); - BEGIN_RING(chan, eng2d, NV50_2D_DRAW_SHAPE, 3); + BEGIN_NV04(chan, NV50_2D(DRAW_SHAPE), 3); OUT_RING (chan, NV50_2D_DRAW_SHAPE_RECTANGLES); OUT_RING (chan, fmt); OUT_RING (chan, fg); @@ -258,7 +255,7 @@ NV50EXASolid(PixmapPtr pdpix, int x1, int y1, int x2, int y2) NV50EXA_LOCALS(pdpix); WAIT_RING (chan, 5); - BEGIN_RING(chan, eng2d, NV50_2D_DRAW_POINT32_X(0), 4); + BEGIN_NV04(chan, NV50_2D(DRAW_POINT32_X(0)), 4); OUT_RING (chan, x1); OUT_RING (chan, y1); OUT_RING (chan, x2); @@ -323,11 +320,11 @@ NV50EXACopy(PixmapPtr pdpix, int srcX , int srcY, NV50EXA_LOCALS(pdpix); WAIT_RING (chan, 17); - BEGIN_RING(chan, eng2d, 0x0110, 1); + BEGIN_NV04(chan, SUBC_2D(0x0110), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, 0x088c, 1); + BEGIN_NV04(chan, SUBC_2D(0x088c), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, NV50_2D_BLIT_DST_X, 12); + BEGIN_NV04(chan, NV50_2D(BLIT_DST_X), 12); OUT_RING (chan, dstX); OUT_RING (chan, dstY); OUT_RING (chan, width); @@ -389,12 +386,12 @@ NV50EXAUploadSIFC(const char *src, int src_pitch, /* If the pitch isn't aligned to a dword, then you can get corruption at the end of a line. */ NV50EXASetClip(pdpix, x, y, w, h); - BEGIN_RING(chan, eng2d, NV50_2D_OPERATION, 1); + BEGIN_NV04(chan, NV50_2D(OPERATION), 1); OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); - BEGIN_RING(chan, eng2d, NV50_2D_SIFC_BITMAP_ENABLE, 2); + BEGIN_NV04(chan, NV50_2D(SIFC_BITMAP_ENABLE), 2); OUT_RING (chan, 0); OUT_RING (chan, sifc_fmt); - BEGIN_RING(chan, eng2d, NV50_2D_SIFC_WIDTH, 10); + BEGIN_NV04(chan, NV50_2D(SIFC_WIDTH), 10); OUT_RING (chan, (line_dwords * 4) / cpp); OUT_RING (chan, h); OUT_RING (chan, 0); @@ -417,7 +414,7 @@ NV50EXAUploadSIFC(const char *src, int src_pitch, int size = count > 1792 ? 1792 : count; WAIT_RING (chan, size + 1); - BEGIN_RING_NI(chan, eng2d, NV50_2D_SIFC_DATA, size); + BEGIN_NI04(chan, NV50_2D(SIFC_DATA), size); OUT_RINGp (chan, p, size); p += size * 4; @@ -496,17 +493,17 @@ NV50EXARenderTarget(PixmapPtr ppix, PicturePtr ppict) NOUVEAU_FALLBACK("invalid picture format\n"); } - BEGIN_RING(chan, tesla, NV50_3D_RT_ADDRESS_HIGH(0), 5); + BEGIN_NV04(chan, NV50_3D(RT_ADDRESS_HIGH(0)), 5); if (OUT_RELOCh(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) return FALSE; OUT_RING (chan, format); OUT_RING (chan, bo->tile_mode << 4); OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, tesla, NV50_3D_RT_HORIZ(0), 2); + BEGIN_NV04(chan, NV50_3D(RT_HORIZ(0)), 2); OUT_RING (chan, ppix->drawable.width); OUT_RING (chan, ppix->drawable.height); - BEGIN_RING(chan, tesla, NV50_3D_RT_ARRAY_MODE, 1); + BEGIN_NV04(chan, NV50_3D(RT_ARRAY_MODE), 1); OUT_RING (chan, 0x00000001); return TRUE; @@ -588,19 +585,19 @@ NV50EXATexture(PixmapPtr ppix, PicturePtr ppict, unsigned unit) if (!nv50_style_tiled_pixmap(ppix)) NOUVEAU_FALLBACK("pixmap is scanout buffer\n"); - BEGIN_RING(chan, tesla, NV50_3D_TIC_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(TIC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags)) return FALSE; OUT_RING (chan, 0x00000800); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags)) return FALSE; OUT_RING (chan, (CB_TIC << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, CB_TIC | ((unit * 8) << NV50_3D_CB_ADDR_ID__SHIFT)); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 8); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 8); switch (ppict->format) { case PICT_a8r8g8b8: @@ -682,19 +679,19 @@ NV50EXATexture(PixmapPtr ppix, PicturePtr ppict, unsigned unit) OUT_RING (chan, 0x03000000); OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, tesla, NV50_3D_TSC_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(TSC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags)) return FALSE; OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags)) return FALSE; OUT_RING (chan, (CB_TSC << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, CB_TSC | ((unit * 8) << NV50_3D_CB_ADDR_ID__SHIFT)); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 8); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 8); if (ppict->repeat) { switch (ppict->repeatType) { case RepeatPad: @@ -776,18 +773,18 @@ NV50EXABlend(PixmapPtr ppix, PicturePtr ppict, int op, int component_alpha) } if (sblend == BF(ONE) && dblend == BF(ZERO)) { - BEGIN_RING(chan, tesla, NV50_3D_BLEND_ENABLE(0), 1); + BEGIN_NV04(chan, NV50_3D(BLEND_ENABLE(0)), 1); OUT_RING (chan, 0); } else { - BEGIN_RING(chan, tesla, NV50_3D_BLEND_ENABLE(0), 1); + BEGIN_NV04(chan, NV50_3D(BLEND_ENABLE(0)), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50_3D_BLEND_EQUATION_RGB, 5); + BEGIN_NV04(chan, NV50_3D(BLEND_EQUATION_RGB), 5); OUT_RING (chan, NV50_3D_BLEND_EQUATION_RGB_FUNC_ADD); OUT_RING (chan, sblend); OUT_RING (chan, dblend); OUT_RING (chan, NV50_3D_BLEND_EQUATION_ALPHA_FUNC_ADD); OUT_RING (chan, sblend); - BEGIN_RING(chan, tesla, NV50_3D_BLEND_FUNC_DST_ALPHA, 1); + BEGIN_NV04(chan, NV50_3D(BLEND_FUNC_DST_ALPHA), 1); OUT_RING (chan, dblend); } } @@ -840,7 +837,7 @@ NV50EXAPrepareComposite(int op, if (MARK_RING (chan, 144, 4 + 2 + 2 * 10)) NOUVEAU_FALLBACK("ring space\n"); - BEGIN_RING(chan, eng2d, 0x0110, 1); + BEGIN_NV04(chan, SUBC_2D(0x0110), 1); OUT_RING (chan, 0); if (!NV50EXARenderTarget(pdpix, pdpict)) { @@ -851,14 +848,14 @@ NV50EXAPrepareComposite(int op, NV50EXABlend(pdpix, pdpict, op, pmpict && pmpict->componentAlpha && PICT_FORMAT_RGB(pmpict->format)); - BEGIN_RING(chan, tesla, NV50_3D_VP_ADDRESS_HIGH, 2); + BEGIN_NV04(chan, NV50_3D(VP_ADDRESS_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, PVP_OFFSET, shd_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, PVP_OFFSET, shd_flags)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, tesla, NV50_3D_FP_ADDRESS_HIGH, 2); + BEGIN_NV04(chan, NV50_3D(FP_ADDRESS_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET, shd_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, PFP_OFFSET, shd_flags)) { MARK_UNDO(chan); @@ -877,7 +874,7 @@ NV50EXAPrepareComposite(int op, } state->have_mask = TRUE; - BEGIN_RING(chan, tesla, NV50_3D_FP_START_ID, 1); + BEGIN_NV04(chan, NV50_3D(FP_START_ID), 1); if (pdpict->format == PICT_a8) { OUT_RING (chan, PFP_C_A8); } else { @@ -894,19 +891,19 @@ NV50EXAPrepareComposite(int op, } else { state->have_mask = FALSE; - BEGIN_RING(chan, tesla, NV50_3D_FP_START_ID, 1); + BEGIN_NV04(chan, NV50_3D(FP_START_ID), 1); if (pdpict->format == PICT_a8) OUT_RING (chan, PFP_S_A8); else OUT_RING (chan, PFP_S); } - BEGIN_RING(chan, tesla, 0x1334, 1); + BEGIN_NV04(chan, SUBC_3D(0x1334), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, NV50_3D_BIND_TIC(2), 1); + BEGIN_NV04(chan, NV50_3D(BIND_TIC(2)), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50_3D_BIND_TIC(2), 1); + BEGIN_NV04(chan, NV50_3D(BIND_TIC(2)), 1); OUT_RING (chan, 0x203); pNv->alu = op; @@ -949,10 +946,10 @@ NV50EXAComposite(PixmapPtr pdpix, int sx, int sy, int mx, int my, float sX0, sX1, sX2, sY0, sY1, sY2; WAIT_RING (chan, 28); - BEGIN_RING(chan, tesla, NV50_3D_SCISSOR_HORIZ(0), 2); + BEGIN_NV04(chan, NV50_3D(SCISSOR_HORIZ(0)), 2); OUT_RING (chan, (dx + w) << 16 | dx); OUT_RING (chan, (dy + h) << 16 | dy); - BEGIN_RING(chan, tesla, NV50_3D_VERTEX_BEGIN_GL, 1); + BEGIN_NV04(chan, NV50_3D(VERTEX_BEGIN_GL), 1); OUT_RING (chan, NV50_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES); NV50EXATransform(state->unit[0].transform, sx, sy + (h * 2), @@ -987,7 +984,7 @@ NV50EXAComposite(PixmapPtr pdpix, int sx, int sy, int mx, int my, VTX1s(pNv, sX2, sY2, dx + (w * 2), dy); } - BEGIN_RING(chan, tesla, NV50_3D_VERTEX_END_GL, 1); + BEGIN_NV04(chan, NV50_3D(VERTEX_END_GL), 1); OUT_RING (chan, 0); } @@ -1010,7 +1007,7 @@ NV50EXARectM2MF(NVPtr pNv, int w, int h, int cpp, unsigned src_off = 0, dst_off = 0; if (src->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK) { - BEGIN_RING(chan, m2mf, NV50_M2MF_LINEAR_IN, 6); + BEGIN_NV04(chan, NV50_M2MF(LINEAR_IN), 6); OUT_RING (chan, 0); OUT_RING (chan, src->tile_mode << 4); OUT_RING (chan, src_pitch); @@ -1018,14 +1015,14 @@ NV50EXARectM2MF(NVPtr pNv, int w, int h, int cpp, OUT_RING (chan, 1); OUT_RING (chan, 0); } else { - BEGIN_RING(chan, m2mf, NV50_M2MF_LINEAR_IN, 1); + BEGIN_NV04(chan, NV50_M2MF(LINEAR_IN), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NV03_M2MF_PITCH_IN, 1); + BEGIN_NV04(chan, NV03_M2MF(PITCH_IN), 1); OUT_RING (chan, src_pitch); } if (dst->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK) { - BEGIN_RING(chan, m2mf, NV50_M2MF_LINEAR_OUT, 6); + BEGIN_NV04(chan, NV50_M2MF(LINEAR_OUT), 6); OUT_RING (chan, 0); OUT_RING (chan, dst->tile_mode << 4); OUT_RING (chan, dst_pitch); @@ -1033,9 +1030,9 @@ NV50EXARectM2MF(NVPtr pNv, int w, int h, int cpp, OUT_RING (chan, 1); OUT_RING (chan, 0); } else { - BEGIN_RING(chan, m2mf, NV50_M2MF_LINEAR_OUT, 1); + BEGIN_NV04(chan, NV50_M2MF(LINEAR_OUT), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NV03_M2MF_PITCH_OUT, 1); + BEGIN_NV04(chan, NV03_M2MF(PITCH_OUT), 1); OUT_RING (chan, dst_pitch); } @@ -1048,34 +1045,34 @@ NV50EXARectM2MF(NVPtr pNv, int w, int h, int cpp, return FALSE; if (src->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK) { - BEGIN_RING(chan, m2mf, NV50_M2MF_TILING_POSITION_IN, 1); + BEGIN_NV04(chan, NV50_M2MF(TILING_POSITION_IN), 1); OUT_RING (chan, (src_y << 16) | (src_x * cpp)); } else { src_off = src_y * src_pitch + src_x * cpp; } if (dst->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK) { - BEGIN_RING(chan, m2mf, NV50_M2MF_TILING_POSITION_OUT, 1); + BEGIN_NV04(chan, NV50_M2MF(TILING_POSITION_OUT), 1); OUT_RING (chan, (dst_y << 16) | (dst_x * cpp)); } else { dst_off = dst_y * dst_pitch + dst_x * cpp; } - BEGIN_RING(chan, m2mf, NV50_M2MF_OFFSET_IN_HIGH, 2); + BEGIN_NV04(chan, NV50_M2MF(OFFSET_IN_HIGH), 2); if (OUT_RELOCh(chan, src, src_off, src_dom | NOUVEAU_BO_RD) || OUT_RELOCh(chan, dst, dst_off, dst_dom | NOUVEAU_BO_WR)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NV03_M2MF_OFFSET_IN, 2); + BEGIN_NV04(chan, NV03_M2MF(OFFSET_IN), 2); if (OUT_RELOCl(chan, src, src_off, src_dom | NOUVEAU_BO_RD) || OUT_RELOCl(chan, dst, dst_off, dst_dom | NOUVEAU_BO_WR)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NV03_M2MF_LINE_LENGTH_IN, 4); + BEGIN_NV04(chan, NV03_M2MF(LINE_LENGTH_IN), 4); OUT_RING (chan, w * cpp); OUT_RING (chan, line_count); OUT_RING (chan, 0x00000101); diff --git a/src/nv50_xv.c b/src/nv50_xv.c index 3650d1c..a6ca941 100644 --- a/src/nv50_xv.c +++ b/src/nv50_xv.c @@ -65,7 +65,6 @@ nv50_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, ScrnInfoPtr pScrn = xf86Screens[ppix->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *tesla = pNv->Nv3D; struct nouveau_bo *bo = nouveau_pixmap_bo(ppix); const unsigned shd_flags = NOUVEAU_BO_RD | NOUVEAU_BO_VRAM; const unsigned tcb_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; @@ -74,7 +73,7 @@ nv50_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, if (MARK_RING(chan, 256, 18)) return FALSE; - BEGIN_RING(chan, tesla, NV50_3D_RT_ADDRESS_HIGH(0), 5); + BEGIN_NV04(chan, NV50_3D(RT_ADDRESS_HIGH(0)), 5); if (OUT_RELOCh(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) { MARK_UNDO(chan); @@ -88,32 +87,32 @@ nv50_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, } OUT_RING (chan, bo->tile_mode << 4); OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, NV50_3D_RT_HORIZ(0), 2); + BEGIN_NV04(chan, NV50_3D(RT_HORIZ(0)), 2); OUT_RING (chan, ppix->drawable.width); OUT_RING (chan, ppix->drawable.height); - BEGIN_RING(chan, tesla, NV50_3D_RT_ARRAY_MODE, 1); + BEGIN_NV04(chan, NV50_3D(RT_ARRAY_MODE), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50_3D_BLEND_ENABLE(0), 1); + BEGIN_NV04(chan, NV50_3D(BLEND_ENABLE(0)), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, NV50_3D_TIC_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(TIC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags)) { MARK_UNDO(chan); return FALSE; } OUT_RING (chan, 0x00000800); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags)) { MARK_UNDO(chan); return FALSE; } OUT_RING (chan, (CB_TIC << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, CB_TIC); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 16); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 16); if (id == FOURCC_YV12 || id == FOURCC_I420) { OUT_RING (chan, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | @@ -198,23 +197,23 @@ nv50_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, OUT_RING (chan, 0x00000000); } - BEGIN_RING(chan, tesla, NV50_3D_TSC_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(TSC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags)) { MARK_UNDO(chan); return FALSE; } OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags)) { MARK_UNDO(chan); return FALSE; } OUT_RING (chan, (CB_TSC << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, CB_TSC); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 16); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 16); OUT_RING (chan, NV50TSC_1_0_WRAPS_CLAMP_TO_EDGE | NV50TSC_1_0_WRAPT_CLAMP_TO_EDGE | NV50TSC_1_0_WRAPR_CLAMP_TO_EDGE); @@ -240,27 +239,27 @@ nv50_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, tesla, NV50_3D_VP_ADDRESS_HIGH, 2); + BEGIN_NV04(chan, NV50_3D(VP_ADDRESS_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, PVP_OFFSET, shd_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, PVP_OFFSET, shd_flags)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, tesla, NV50_3D_FP_ADDRESS_HIGH, 2); + BEGIN_NV04(chan, NV50_3D(FP_ADDRESS_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_OFFSET, shd_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, PFP_OFFSET, shd_flags)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, tesla, NV50_3D_FP_START_ID, 1); + BEGIN_NV04(chan, NV50_3D(FP_START_ID), 1); OUT_RING (chan, PFP_NV12); - BEGIN_RING(chan, tesla, 0x1334, 1); + BEGIN_NV04(chan, SUBC_3D(0x1334), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, NV50_3D_BIND_TIC(2), 1); + BEGIN_NV04(chan, NV50_3D(BIND_TIC(2)), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50_3D_BIND_TIC(2), 1); + BEGIN_NV04(chan, NV50_3D(BIND_TIC(2)), 1); OUT_RING (chan, 0x203); return TRUE; @@ -279,7 +278,6 @@ nv50_xv_image_put(ScrnInfoPtr pScrn, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *tesla = pNv->Nv3D; float X1, X2, Y1, Y2; BoxPtr pbox; int nbox; @@ -326,16 +324,16 @@ nv50_xv_image_put(ScrnInfoPtr pScrn, * origin lying at the bottom left. This will be changed to _MIN_ and _MAX_ * later, because it is origin dependent. */ - BEGIN_RING(chan, tesla, NV50_3D_SCISSOR_HORIZ(0), 2); + BEGIN_NV04(chan, NV50_3D(SCISSOR_HORIZ(0)), 2); OUT_RING (chan, sx2 << NV50_3D_SCISSOR_HORIZ_MAX__SHIFT | sx1); OUT_RING (chan, sy2 << NV50_3D_SCISSOR_VERT_MAX__SHIFT | sy1 ); - BEGIN_RING(chan, tesla, NV50_3D_VERTEX_BEGIN_GL, 1); + BEGIN_NV04(chan, NV50_3D(VERTEX_BEGIN_GL), 1); OUT_RING (chan, NV50_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES); VTX2s(pNv, tx1, ty1, tx1, ty1, sx1, sy1); VTX2s(pNv, tx2+(tx2-tx1), ty1, tx2+(tx2-tx1), ty1, sx2+(sx2-sx1), sy1); VTX2s(pNv, tx1, ty2+(ty2-ty1), tx1, ty2+(ty2-ty1), sx1, sy2+(sy2-sy1)); - BEGIN_RING(chan, tesla, NV50_3D_VERTEX_END_GL, 1); + BEGIN_NV04(chan, NV50_3D(VERTEX_END_GL), 1); OUT_RING (chan, 0); pbox++; @@ -374,7 +372,6 @@ nv50_xv_csc_update(ScrnInfoPtr pScrn, NVPortPrivPtr pPriv) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *tesla = pNv->Nv3D; const float Loff = -0.0627; const float Coff = -0.502; float yco, off[3], uco[3], vco[3]; @@ -406,7 +403,7 @@ nv50_xv_csc_update(ScrnInfoPtr pScrn, NVPortPrivPtr pPriv) if (MARK_RING(chan, 64, 2)) return; - BEGIN_RING(chan, tesla, NV50_3D_CB_DEF_ADDRESS_HIGH, 3); + BEGIN_NV04(chan, NV50_3D(CB_DEF_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, PFP_DATA, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, pNv->tesla_scratch, PFP_DATA, @@ -415,9 +412,9 @@ nv50_xv_csc_update(ScrnInfoPtr pScrn, NVPortPrivPtr pPriv) return; } OUT_RING (chan, (CB_PFP << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x4000); - BEGIN_RING(chan, tesla, NV50_3D_CB_ADDR, 1); + BEGIN_NV04(chan, NV50_3D(CB_ADDR), 1); OUT_RING (chan, CB_PFP); - BEGIN_RING_NI(chan, tesla, NV50_3D_CB_DATA(0), 10); + BEGIN_NI04(chan, NV50_3D(CB_DATA(0)), 10); OUT_RINGf (chan, yco); OUT_RINGf (chan, off[0]); OUT_RINGf (chan, off[1]); diff --git a/src/nv_accel_common.c b/src/nv_accel_common.c index f583b1e..3219dbe 100644 --- a/src/nv_accel_common.c +++ b/src/nv_accel_common.c @@ -21,7 +21,6 @@ */ #include "nv_include.h" -#include "nv04_pushbuf.h" #include "hwdefs/nv_object.xml.h" #include "hwdefs/nv_m2mf.xml.h" @@ -133,7 +132,6 @@ NV11SyncToVBlank(PixmapPtr ppix, BoxPtr box) ScrnInfoPtr pScrn = xf86Screens[ppix->drawable.pScreen->myNum]; NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *blit = pNv->NvImageBlit; int crtcs; if (!nouveau_exa_pixmap_is_onscreen(ppix)) @@ -145,13 +143,13 @@ NV11SyncToVBlank(PixmapPtr ppix, BoxPtr box) if (!crtcs) return; - BEGIN_RING(chan, blit, 0x0000012C, 1); + BEGIN_NV04(chan, SUBC_BLIT(0x0000012C), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, blit, 0x00000134, 1); + BEGIN_NV04(chan, SUBC_BLIT(0x00000134), 1); OUT_RING (chan, ffs(crtcs) - 1); - BEGIN_RING(chan, blit, 0x00000100, 1); + BEGIN_NV04(chan, SUBC_BLIT(0x00000100), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, blit, 0x00000130, 1); + BEGIN_NV04(chan, SUBC_BLIT(0x00000130), 1); OUT_RING (chan, 0); } @@ -175,7 +173,6 @@ NVAccelInitContextSurfaces(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *surf2d; uint32_t class; class = (pNv->Architecture >= NV_ARCH_10) ? NV10_SURFACE_2D_CLASS : @@ -186,12 +183,12 @@ NVAccelInitContextSurfaces(ScrnInfoPtr pScrn) &pNv->NvContextSurfaces)) return FALSE; } - surf2d = pNv->NvContextSurfaces; - BEGIN_RING(chan, surf2d, NV04_SURFACE_2D_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(SF2D, OBJECT), 1); + OUT_RING (chan, pNv->NvContextSurfaces->handle); + BEGIN_NV04(chan, NV04_SF2D(DMA_NOTIFY), 1); OUT_RING (chan, chan->nullobj->handle); - BEGIN_RING(chan, surf2d, - NV04_SURFACE_2D_DMA_IMAGE_SOURCE, 2); + BEGIN_NV04(chan, NV04_SF2D(DMA_IMAGE_SOURCE), 2); OUT_RING (chan, pNv->chan->vram->handle); OUT_RING (chan, pNv->chan->vram->handle); @@ -204,16 +201,16 @@ NVAccelInitContextBeta1(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *beta1; if (!pNv->NvContextBeta1) { if (nouveau_grobj_alloc(chan, NvContextBeta1, 0x12, &pNv->NvContextBeta1)) return FALSE; } - beta1 = pNv->NvContextBeta1; - BEGIN_RING(chan, beta1, 0x300, 1); /*alpha factor*/ + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvContextBeta1->handle); + BEGIN_NV04(chan, NV01_BETA(BETA_1D31), 1); /*alpha factor*/ OUT_RING (chan, 0xff << 23); return TRUE; @@ -225,16 +222,16 @@ NVAccelInitContextBeta4(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *beta4; if (!pNv->NvContextBeta4) { if (nouveau_grobj_alloc(chan, NvContextBeta4, 0x72, &pNv->NvContextBeta4)) return FALSE; } - beta4 = pNv->NvContextBeta4; - BEGIN_RING(chan, beta4, 0x300, 1); /*RGBA factor*/ + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvContextBeta4->handle); + BEGIN_NV04(chan, NV04_BETA4(BETA_FACTOR), 1); /*RGBA factor*/ OUT_RING (chan, 0xffff0000); return TRUE; } @@ -303,7 +300,6 @@ NVAccelInitImagePattern(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *patt; if (!pNv->NvImagePattern) { if (nouveau_grobj_alloc(chan, NvImagePattern, @@ -311,11 +307,12 @@ NVAccelInitImagePattern(ScrnInfoPtr pScrn) &pNv->NvImagePattern)) return FALSE; } - patt = pNv->NvImagePattern; - BEGIN_RING(chan, patt, NV01_PATTERN_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvImagePattern->handle); + BEGIN_NV04(chan, NV01_PATT(DMA_NOTIFY), 1); OUT_RING (chan, chan->nullobj->handle); - BEGIN_RING(chan, patt, NV01_PATTERN_MONOCHROME_FORMAT, 3); + BEGIN_NV04(chan, NV01_PATT(MONOCHROME_FORMAT), 3); #if X_BYTE_ORDER == X_BIG_ENDIAN OUT_RING (chan, NV01_PATTERN_MONOCHROME_FORMAT_LE); #else @@ -332,16 +329,16 @@ NVAccelInitRasterOp(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rop; if (!pNv->NvRop) { if (nouveau_grobj_alloc(chan, NvRop, NV03_ROP_CLASS, &pNv->NvRop)) return FALSE; } - rop = pNv->NvRop; - BEGIN_RING(chan, rop, NV01_ROP_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvRop->handle); + BEGIN_NV04(chan, NV01_ROP(DMA_NOTIFY), 1); OUT_RING (chan, chan->nullobj->handle); pNv->currentRop = ~0; @@ -353,28 +350,28 @@ NVAccelInitRectangle(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *rect; if (!pNv->NvRectangle) { if (nouveau_grobj_alloc(chan, NvRectangle, NV04_GDI_CLASS, &pNv->NvRectangle)) return FALSE; } - rect = pNv->NvRectangle; - BEGIN_RING(chan, rect, NV04_GDI_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(RECT, OBJECT), 1); + OUT_RING (chan, pNv->NvRectangle->handle); + BEGIN_NV04(chan, NV04_RECT(DMA_NOTIFY), 1); OUT_RING (chan, pNv->notify0->handle); - BEGIN_RING(chan, rect, NV04_GDI_DMA_FONTS, 1); + BEGIN_NV04(chan, NV04_RECT(DMA_FONTS), 1); OUT_RING (chan, chan->nullobj->handle); - BEGIN_RING(chan, rect, NV04_GDI_SURFACE, 1); + BEGIN_NV04(chan, NV04_RECT(SURFACE), 1); OUT_RING (chan, pNv->NvContextSurfaces->handle); - BEGIN_RING(chan, rect, NV04_GDI_ROP, 1); + BEGIN_NV04(chan, NV04_RECT(ROP), 1); OUT_RING (chan, pNv->NvRop->handle); - BEGIN_RING(chan, rect, NV04_GDI_PATTERN, 1); + BEGIN_NV04(chan, NV04_RECT(PATTERN), 1); OUT_RING (chan, pNv->NvImagePattern->handle); - BEGIN_RING(chan, rect, NV04_GDI_OPERATION, 1); + BEGIN_NV04(chan, NV04_RECT(OPERATION), 1); OUT_RING (chan, NV04_GDI_OPERATION_ROP_AND); - BEGIN_RING(chan, rect, NV04_GDI_MONOCHROME_FORMAT, 1); + BEGIN_NV04(chan, NV04_RECT(MONOCHROME_FORMAT), 1); /* XXX why putting 1 like renouveau dump, swap the text */ #if 1 || X_BYTE_ORDER == X_BIG_ENDIAN OUT_RING (chan, NV04_GDI_MONOCHROME_FORMAT_LE); @@ -390,7 +387,6 @@ NVAccelInitImageBlit(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *blit; uint32_t class; class = (pNv->dev->chipset >= 0x11) ? NV15_BLIT_CLASS : NV04_BLIT_CLASS; @@ -400,22 +396,23 @@ NVAccelInitImageBlit(ScrnInfoPtr pScrn) &pNv->NvImageBlit)) return FALSE; } - blit = pNv->NvImageBlit; - BEGIN_RING(chan, blit, NV01_BLIT_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(BLIT, OBJECT), 1); + OUT_RING (chan, pNv->NvImageBlit->handle); + BEGIN_NV04(chan, NV01_BLIT(DMA_NOTIFY), 1); OUT_RING (chan, pNv->notify0->handle); - BEGIN_RING(chan, blit, NV01_BLIT_COLOR_KEY, 1); + BEGIN_NV04(chan, NV01_BLIT(COLOR_KEY), 1); OUT_RING (chan, chan->nullobj->handle); - BEGIN_RING(chan, blit, NV04_BLIT_SURFACES, 1); + BEGIN_NV04(chan, NV04_BLIT(SURFACES), 1); OUT_RING (chan, pNv->NvContextSurfaces->handle); - BEGIN_RING(chan, blit, NV01_BLIT_CLIP, 3); + BEGIN_NV04(chan, NV01_BLIT(CLIP), 3); OUT_RING (chan, chan->nullobj->handle); OUT_RING (chan, pNv->NvImagePattern->handle); OUT_RING (chan, pNv->NvRop->handle); - BEGIN_RING(chan, blit, NV01_BLIT_OPERATION, 1); + BEGIN_NV04(chan, NV01_BLIT(OPERATION), 1); OUT_RING (chan, NV01_BLIT_OPERATION_ROP_AND); - if (blit->grclass == NV15_BLIT_CLASS) { - BEGIN_RING(chan, blit, NV15_BLIT_FLIP_SET_READ, 3); + if (pNv->NvImageBlit->grclass == NV15_BLIT_CLASS) { + BEGIN_NV04(chan, NV15_BLIT(FLIP_SET_READ), 3); OUT_RING (chan, 0); OUT_RING (chan, 1); OUT_RING (chan, 2); @@ -429,7 +426,6 @@ NVAccelInitScaledImage(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *sifm; uint32_t class; switch (pNv->Architecture) { @@ -452,9 +448,10 @@ NVAccelInitScaledImage(ScrnInfoPtr pScrn) &pNv->NvScaledImage)) return FALSE; } - sifm = pNv->NvScaledImage; - BEGIN_RING(chan, sifm, NV03_SIFM_DMA_NOTIFY, 7); + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvScaledImage->handle); + BEGIN_NV04(chan, NV03_SIFM(DMA_NOTIFY), 7); OUT_RING (chan, pNv->notify0->handle); OUT_RING (chan, pNv->chan->vram->handle); OUT_RING (chan, chan->nullobj->handle); @@ -463,10 +460,10 @@ NVAccelInitScaledImage(ScrnInfoPtr pScrn) OUT_RING (chan, pNv->NvContextBeta4->handle); OUT_RING (chan, pNv->NvContextSurfaces->handle); if (pNv->Architecture>=NV_ARCH_10) { - BEGIN_RING(chan, sifm, NV05_SIFM_COLOR_CONVERSION, 1); + BEGIN_NV04(chan, NV05_SIFM(COLOR_CONVERSION), 1); OUT_RING (chan, NV05_SIFM_COLOR_CONVERSION_DITHER); } - BEGIN_RING(chan, sifm, NV03_SIFM_OPERATION, 1); + BEGIN_NV04(chan, NV03_SIFM(OPERATION), 1); OUT_RING (chan, NV03_SIFM_OPERATION_SRCCOPY); return TRUE; @@ -477,7 +474,6 @@ NVAccelInitClipRectangle(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *clip; if (!pNv->NvClipRectangle) { if (nouveau_grobj_alloc(pNv->chan, NvClipRectangle, @@ -485,9 +481,10 @@ NVAccelInitClipRectangle(ScrnInfoPtr pScrn) &pNv->NvClipRectangle)) return FALSE; } - clip = pNv->NvClipRectangle; - BEGIN_RING(chan, clip, NV01_CLIP_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(MISC, OBJECT), 1); + OUT_RING (chan, pNv->NvClipRectangle->handle); + BEGIN_NV04(chan, NV01_CLIP(DMA_NOTIFY), 1); OUT_RING (chan, chan->nullobj->handle); return TRUE; @@ -499,7 +496,6 @@ NVAccelInitMemFormat(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *m2mf; uint32_t class; if (pNv->Architecture < NV_ARCH_50) @@ -512,11 +508,12 @@ NVAccelInitMemFormat(ScrnInfoPtr pScrn) &pNv->NvMemFormat)) return FALSE; } - m2mf = pNv->NvMemFormat; - BEGIN_RING(chan, m2mf, NV03_M2MF_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(M2MF, OBJECT), 1); + OUT_RING (chan, pNv->NvMemFormat->handle); + BEGIN_NV04(chan, NV03_M2MF(DMA_NOTIFY), 1); OUT_RING (chan, pNv->notify0->handle); - BEGIN_RING(chan, m2mf, NV03_M2MF_DMA_BUFFER_IN, 2); + BEGIN_NV04(chan, NV03_M2MF(DMA_BUFFER_IN), 2); OUT_RING (chan, chan->vram->handle); OUT_RING (chan, chan->vram->handle); @@ -528,7 +525,6 @@ NVAccelInitImageFromCpu(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *ifc; uint32_t class; switch (pNv->Architecture) { @@ -549,25 +545,26 @@ NVAccelInitImageFromCpu(ScrnInfoPtr pScrn) &pNv->NvImageFromCpu)) return FALSE; } - ifc = pNv->NvImageFromCpu; - BEGIN_RING(chan, ifc, NV01_IFC_DMA_NOTIFY, 1); + BEGIN_NV04(chan, NV01_SUBC(IFC, OBJECT), 1); + OUT_RING (chan, pNv->NvImageFromCpu->handle); + BEGIN_NV04(chan, NV01_IFC(DMA_NOTIFY), 1); OUT_RING (chan, pNv->notify0->handle); - BEGIN_RING(chan, ifc, NV01_IFC_CLIP, 1); + BEGIN_NV04(chan, NV01_IFC(CLIP), 1); OUT_RING (chan, chan->nullobj->handle); - BEGIN_RING(chan, ifc, NV01_IFC_PATTERN, 1); + BEGIN_NV04(chan, NV01_IFC(PATTERN), 1); OUT_RING (chan, chan->nullobj->handle); - BEGIN_RING(chan, ifc, NV01_IFC_ROP, 1); + BEGIN_NV04(chan, NV01_IFC(ROP), 1); OUT_RING (chan, chan->nullobj->handle); if (pNv->Architecture >= NV_ARCH_10) { - BEGIN_RING(chan, ifc, NV01_IFC_BETA, 1); + BEGIN_NV04(chan, NV01_IFC(BETA), 1); OUT_RING (chan, chan->nullobj->handle); - BEGIN_RING(chan, ifc, NV04_IFC_BETA4, 1); + BEGIN_NV04(chan, NV04_IFC(BETA4), 1); OUT_RING (chan, chan->nullobj->handle); } - BEGIN_RING(chan, ifc, NV04_IFC_SURFACE, 1); + BEGIN_NV04(chan, NV04_IFC(SURFACE), 1); OUT_RING (chan, pNv->NvContextSurfaces->handle); - BEGIN_RING(chan, ifc, NV01_IFC_OPERATION, 1); + BEGIN_NV04(chan, NV01_IFC(OPERATION), 1); OUT_RING (chan, NV01_IFC_OPERATION_SRCCOPY); return TRUE; @@ -578,15 +575,15 @@ NVAccelInit2D_NV50(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *eng2d; if (!pNv->Nv2D) { if (nouveau_grobj_alloc(chan, Nv2D, NV50_2D_CLASS, &pNv->Nv2D)) return FALSE; } - eng2d = pNv->Nv2D; - BEGIN_RING(chan, eng2d, NV50_2D_DMA_NOTIFY, 3); + BEGIN_NV04(chan, NV01_SUBC(2D, OBJECT), 1); + OUT_RING (chan, pNv->Nv2D->handle); + BEGIN_NV04(chan, NV50_2D(DMA_NOTIFY), 3); OUT_RING (chan, pNv->notify0->handle); OUT_RING (chan, pNv->chan->vram->handle); OUT_RING (chan, pNv->chan->vram->handle); @@ -594,13 +591,13 @@ NVAccelInit2D_NV50(ScrnInfoPtr pScrn) /* Magics from nv, no clue what they do, but at least some * of them are needed to avoid crashes. */ - BEGIN_RING(chan, eng2d, 0x260, 1); + BEGIN_NV04(chan, SUBC_2D(0x0260), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, NV50_2D_CLIP_ENABLE, 1); + BEGIN_NV04(chan, NV50_2D(CLIP_ENABLE), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, NV50_2D_COLOR_KEY_ENABLE, 1); + BEGIN_NV04(chan, NV50_2D(COLOR_KEY_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, 0x58c, 1); + BEGIN_NV04(chan, SUBC_2D(0x058c), 1); OUT_RING (chan, 0x111); pNv->currentRop = 0xfffffffa; diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c index 88fc234..3f4d25f 100644 --- a/src/nvc0_accel.c +++ b/src/nvc0_accel.c @@ -36,6 +36,8 @@ NVAccelInitM2MF_NVC0(ScrnInfoPtr pScrn) if (ret) return FALSE; + BEGIN_NVC0(chan, NV01_SUBC(M2MF, OBJECT), 1); + OUT_RING (chan, pNv->NvMemFormat->handle); return TRUE; } @@ -50,28 +52,31 @@ NVAccelInit2D_NVC0(ScrnInfoPtr pScrn) if (ret) return FALSE; - BEGIN_RING(chan, pNv->Nv2D, NV50_2D_CLIP_ENABLE, 1); + BEGIN_NVC0(chan, NV01_SUBC(2D, OBJECT), 1); + OUT_RING (chan, pNv->Nv2D->handle); + + BEGIN_NVC0(chan, NV50_2D(CLIP_ENABLE), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, pNv->Nv2D, NV50_2D_COLOR_KEY_ENABLE, 1); + BEGIN_NVC0(chan, NV50_2D(COLOR_KEY_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, pNv->Nv2D, 0x0884, 1); + BEGIN_NVC0(chan, SUBC_2D(0x0884), 1); OUT_RING (chan, 0x3f); - BEGIN_RING(chan, pNv->Nv2D, 0x0888, 1); + BEGIN_NVC0(chan, SUBC_2D(0x0888), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, pNv->Nv2D, NV50_2D_ROP, 1); + BEGIN_NVC0(chan, NV50_2D(ROP), 1); OUT_RING (chan, 0x55); - BEGIN_RING(chan, pNv->Nv2D, NV50_2D_OPERATION, 1); + BEGIN_NVC0(chan, NV50_2D(OPERATION), 1); OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); - BEGIN_RING(chan, pNv->Nv2D, NV50_2D_BLIT_DU_DX_FRACT, 4); + BEGIN_NVC0(chan, NV50_2D(BLIT_DU_DX_FRACT), 4); OUT_RING (chan, 0); OUT_RING (chan, 1); OUT_RING (chan, 0); OUT_RING (chan, 1); - BEGIN_RING(chan, pNv->Nv2D, NV50_2D_DRAW_SHAPE, 2); + BEGIN_NVC0(chan, NV50_2D(DRAW_SHAPE), 2); OUT_RING (chan, 4); OUT_RING (chan, NV50_SURFACE_FORMAT_B5G6R5_UNORM); - BEGIN_RING(chan, pNv->Nv2D, NV50_2D_PATTERN_COLOR_FORMAT, 2); + BEGIN_NVC0(chan, NV50_2D(PATTERN_COLOR_FORMAT), 2); OUT_RING (chan, 2); OUT_RING (chan, 1); FIRE_RING (chan); @@ -85,7 +90,6 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *fermi, *m2mf; struct nouveau_bo *bo; int ret, i; @@ -103,104 +107,104 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) } } bo = pNv->tesla_scratch; - m2mf = pNv->NvMemFormat; - fermi = pNv->Nv3D; if (MARK_RING(chan, 512, 32)) return FALSE; - BEGIN_RING(chan, m2mf, NVC0_M2MF_QUERY_ADDRESS_HIGH, 3); + BEGIN_NVC0(chan, NVC0_M2MF(QUERY_ADDRESS_HIGH), 3); OUT_RELOCh(chan, bo, NTFY_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); OUT_RELOCl(chan, bo, NTFY_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_GRAPH_NOTIFY_ADDRESS_HIGH, 3); + BEGIN_NVC0(chan, NV01_SUBC(3D, OBJECT), 1); + OUT_RING (chan, pNv->Nv3D->handle); + BEGIN_NVC0(chan, SUBC_3D(NVC0_GRAPH_NOTIFY_ADDRESS_HIGH), 3); OUT_RELOCh(chan, bo, NTFY_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); OUT_RELOCl(chan, bo, NTFY_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_CSAA_ENABLE, 1); + BEGIN_NVC0(chan, NVC0_3D(CSAA_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_MULTISAMPLE_ENABLE, 1); + BEGIN_NVC0(chan, NVC0_3D(MULTISAMPLE_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_MULTISAMPLE_MODE, 1); + BEGIN_NVC0(chan, NVC0_3D(MULTISAMPLE_MODE), 1); OUT_RING (chan, NVC0_3D_MULTISAMPLE_MODE_MS1); - BEGIN_RING(chan, fermi, NVC0_3D_COND_MODE, 1); + BEGIN_NVC0(chan, NVC0_3D(COND_MODE), 1); OUT_RING (chan, NVC0_3D_COND_MODE_ALWAYS); - BEGIN_RING(chan, fermi, NVC0_3D_RT_CONTROL, 1); + BEGIN_NVC0(chan, NVC0_3D(RT_CONTROL), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, fermi, NVC0_3D_ZETA_ENABLE, 1); + BEGIN_NVC0(chan, NVC0_3D(ZETA_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_CLIP_RECTS_EN, 2); + BEGIN_NVC0(chan, NVC0_3D(CLIP_RECTS_EN), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_CLIPID_ENABLE, 1); + BEGIN_NVC0(chan, NVC0_3D(CLIPID_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_VERTEX_TWO_SIDE_ENABLE, 1); + BEGIN_NVC0(chan, NVC0_3D(VERTEX_TWO_SIDE_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, 0x0fac, 1); + BEGIN_NVC0(chan, SUBC_3D(0x0fac), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_COLOR_MASK(0), 8); + BEGIN_NVC0(chan, NVC0_3D(COLOR_MASK(0)), 8); OUT_RING (chan, 0x1111); for (i = 1; i < 8; ++i) OUT_RING(chan, 0); FIRE_RING (chan); - BEGIN_RING(chan, fermi, NVC0_3D_SCREEN_SCISSOR_HORIZ, 2); + BEGIN_NVC0(chan, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2); OUT_RING (chan, (8192 << 16) | 0); OUT_RING (chan, (8192 << 16) | 0); - BEGIN_RING(chan, fermi, NVC0_3D_SCREEN_Y_CONTROL, 1); + BEGIN_NVC0(chan, NVC0_3D(SCREEN_Y_CONTROL), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_WINDOW_OFFSET_X, 2); + BEGIN_NVC0(chan, NVC0_3D(WINDOW_OFFSET_X), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, 0x1590, 1); + BEGIN_NVC0(chan, SUBC_3D(0x1590), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_LINKED_TSC, 1); + BEGIN_NVC0(chan, NVC0_3D(LINKED_TSC), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, fermi, NVC0_3D_VIEWPORT_TRANSFORM_EN, 1); + BEGIN_NVC0(chan, NVC0_3D(VIEWPORT_TRANSFORM_EN), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_VIEW_VOLUME_CLIP_CTRL, 1); + BEGIN_NVC0(chan, NVC0_3D(VIEW_VOLUME_CLIP_CTRL), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_DEPTH_RANGE_NEAR(0), 2); + BEGIN_NVC0(chan, NVC0_3D(DEPTH_RANGE_NEAR(0)), 2); OUT_RINGf (chan, 0.0f); OUT_RINGf (chan, 1.0f); - BEGIN_RING(chan, fermi, NVC0_3D_TEX_LIMITS(4), 1); + BEGIN_NVC0(chan, NVC0_3D(TEX_LIMITS(4)), 1); OUT_RING (chan, 0x54); - BEGIN_RING(chan, fermi, NVC0_3D_BLEND_ENABLE(0), 8); + BEGIN_NVC0(chan, NVC0_3D(BLEND_ENABLE(0)), 8); OUT_RING (chan, 1); for (i = 1; i < 8; ++i) OUT_RING(chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_BLEND_INDEPENDENT, 1); + BEGIN_NVC0(chan, NVC0_3D(BLEND_INDEPENDENT), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, 0x17bc, 3); + BEGIN_NVC0(chan, SUBC_3D(0x17bc), 3); OUT_RELOCh(chan, bo, MISC_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); OUT_RELOCl(chan, bo, MISC_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); OUT_RING (chan, 1); FIRE_RING (chan); - BEGIN_RING(chan, fermi, NVC0_3D_CODE_ADDRESS_HIGH, 2); + BEGIN_NVC0(chan, NVC0_3D(CODE_ADDRESS_HIGH), 2); OUT_RELOCh(chan, bo, CODE_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); OUT_RELOCl(chan, bo, CODE_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, bo, PVP_PASS, NOUVEAU_BO(VRAM, VRAM, WR)) || OUT_RELOCl(chan, bo, PVP_PASS, NOUVEAU_BO(VRAM, VRAM, WR))) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 7 * 8 + 20 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 7 * 2 + 20); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 7 * 2 + 20); OUT_RING (chan, 0x00020461); OUT_RING (chan, 0); OUT_RING (chan, 0); @@ -236,29 +240,29 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00001de7); OUT_RING (chan, 0x80000000); /* exit */ - BEGIN_RING(chan, fermi, NVC0_3D_SP_SELECT(1), 2); + BEGIN_NVC0(chan, NVC0_3D(SP_SELECT(1)), 2); OUT_RING (chan, 0x11); OUT_RING (chan, PVP_PASS); - BEGIN_RING(chan, fermi, NVC0_3D_SP_GPR_ALLOC(1), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_GPR_ALLOC(1)), 1); OUT_RING (chan, 8); - BEGIN_RING(chan, fermi, 0x163c, 1); + BEGIN_NVC0(chan, SUBC_3D(0x163c), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, 0x2600, 1); + BEGIN_NVC0(chan, SUBC_3D(0x2600), 1); OUT_RING (chan, 1); FIRE_RING (chan); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, bo, PFP_S, NOUVEAU_BO(VRAM, VRAM, WR)) || OUT_RELOCl(chan, bo, PFP_S, NOUVEAU_BO(VRAM, VRAM, WR))) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 6 * 8 + 20 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 6 * 2 + 20); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 6 * 2 + 20); OUT_RING (chan, 0x00021462); OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); @@ -292,18 +296,18 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00001de7); OUT_RING (chan, 0x80000000); /* exit */ - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, bo, PFP_C, NOUVEAU_BO(VRAM, VRAM, WR)) || OUT_RELOCl(chan, bo, PFP_C, NOUVEAU_BO(VRAM, VRAM, WR))) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 13 * 8 + 20 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 13 * 2 + 20); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 13 * 2 + 20); OUT_RING (chan, 0x00021462); OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); @@ -351,18 +355,18 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00001de7); OUT_RING (chan, 0x80000000); /* exit */ - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, bo, PFP_CCA, NOUVEAU_BO(VRAM, VRAM, WR)) || OUT_RELOCl(chan, bo, PFP_CCA, NOUVEAU_BO(VRAM, VRAM, WR))) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 13 * 8 + 20 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 13 * 2 + 20); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 13 * 2 + 20); OUT_RING (chan, 0x00021462); /* 0x0000c000 = USES_KIL, MULTI_COLORS */ OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); @@ -410,18 +414,18 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00001de7); OUT_RING (chan, 0x80000000); /* exit */ - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, bo, PFP_CCASA, NOUVEAU_BO(VRAM, VRAM, WR)) || OUT_RELOCl(chan, bo, PFP_CCASA, NOUVEAU_BO(VRAM, VRAM, WR))) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 13 * 8 + 20 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 13 * 2 + 20); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 13 * 2 + 20); OUT_RING (chan, 0x00021462); OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); @@ -469,18 +473,18 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00001de7); OUT_RING (chan, 0x80000000); /* exit */ - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, bo, PFP_S_A8, NOUVEAU_BO(VRAM, VRAM, WR)) || OUT_RELOCl(chan, bo, PFP_S_A8, NOUVEAU_BO(VRAM, VRAM, WR))) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 9 * 8 + 20 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 9 * 2 + 20); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 9 * 2 + 20); OUT_RING (chan, 0x00021462); OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); @@ -520,18 +524,18 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00001de7); OUT_RING (chan, 0x80000000); /* exit */ - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, bo, PFP_C_A8, NOUVEAU_BO(VRAM, VRAM, WR)) || OUT_RELOCl(chan, bo, PFP_C_A8, NOUVEAU_BO(VRAM, VRAM, WR))) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 13 * 8 + 20 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 13 * 2 + 20); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 13 * 2 + 20); OUT_RING (chan, 0x00021462); OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); @@ -580,18 +584,18 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) OUT_RING (chan, 0x80000000); /* exit */ FIRE_RING (chan); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, bo, PFP_NV12, NOUVEAU_BO(VRAM, VRAM, WR)) || OUT_RELOCl(chan, bo, PFP_NV12, NOUVEAU_BO(VRAM, VRAM, WR))) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 19 * 8 + 20 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 19 * 2 + 20); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 19 * 2 + 20); OUT_RING (chan, 0x00021462); OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); @@ -651,65 +655,65 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) OUT_RING (chan, 0x00001de7); OUT_RING (chan, 0x80000000); - BEGIN_RING(chan, fermi, 0x021c, 1); /* CODE_FLUSH ? */ + BEGIN_NVC0(chan, SUBC_3D(0x021c), 1); /* CODE_FLUSH ? */ OUT_RING (chan, 0x1111); FIRE_RING (chan); - BEGIN_RING(chan, fermi, NVC0_3D_SP_SELECT(5), 2); + BEGIN_NVC0(chan, NVC0_3D(SP_SELECT(5)), 2); OUT_RING (chan, 0x51); OUT_RING (chan, PFP_S); - BEGIN_RING(chan, fermi, NVC0_3D_SP_GPR_ALLOC(5), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_GPR_ALLOC(5)), 1); OUT_RING (chan, 8); - BEGIN_RING(chan, fermi, NVC0_3D_CB_SIZE, 3); + BEGIN_NVC0(chan, NVC0_3D(CB_SIZE), 3); OUT_RING (chan, 256); if (OUT_RELOCh(chan, bo, CB_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, bo, CB_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, fermi, NVC0_3D_CB_BIND(4), 1); + BEGIN_NVC0(chan, NVC0_3D(CB_BIND(4)), 1); OUT_RING (chan, 0x01); - BEGIN_RING(chan, fermi, NVC0_3D_EARLY_FRAGMENT_TESTS, 1); + BEGIN_NVC0(chan, NVC0_3D(EARLY_FRAGMENT_TESTS), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, 0x0360, 2); + BEGIN_NVC0(chan, SUBC_3D(0x0360), 2); OUT_RING (chan, 0x20164010); OUT_RING (chan, 0x20); - BEGIN_RING(chan, fermi, 0x196c, 1); + BEGIN_NVC0(chan, SUBC_3D(0x196c), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, 0x1664, 1); + BEGIN_NVC0(chan, SUBC_3D(0x1664), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_FRAG_COLOR_CLAMP_EN, 1); + BEGIN_NVC0(chan, NVC0_3D(FRAG_COLOR_CLAMP_EN), 1); OUT_RING (chan, 0x11111111); - BEGIN_RING(chan, fermi, NVC0_3D_DEPTH_TEST_ENABLE, 1); + BEGIN_NVC0(chan, NVC0_3D(DEPTH_TEST_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_RASTERIZE_ENABLE, 1); + BEGIN_NVC0(chan, NVC0_3D(RASTERIZE_ENABLE), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, fermi, NVC0_3D_SP_SELECT(4), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_SELECT(4)), 1); OUT_RING (chan, 0x40); - BEGIN_RING(chan, fermi, NVC0_3D_LAYER, 1); + BEGIN_NVC0(chan, NVC0_3D(LAYER), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_SP_SELECT(3), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_SELECT(3)), 1); OUT_RING (chan, 0x30); - BEGIN_RING(chan, fermi, NVC0_3D_SP_SELECT(2), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_SELECT(2)), 1); OUT_RING (chan, 0x20); - BEGIN_RING(chan, fermi, NVC0_3D_SP_SELECT(0), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_SELECT(0)), 1); OUT_RING (chan, 0x00); - BEGIN_RING(chan, fermi, 0x1604, 1); + BEGIN_NVC0(chan, SUBC_3D(0x1604), 1); OUT_RING (chan, 4); - BEGIN_RING(chan, fermi, NVC0_3D_POINT_SPRITE_ENABLE, 1); + BEGIN_NVC0(chan, NVC0_3D(POINT_SPRITE_ENABLE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_SCISSOR_ENABLE(0), 1); + BEGIN_NVC0(chan, NVC0_3D(SCISSOR_ENABLE(0)), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, fermi, NVC0_3D_VIEWPORT_HORIZ(0), 2); + BEGIN_NVC0(chan, NVC0_3D(VIEWPORT_HORIZ(0)), 2); OUT_RING (chan, (8192 << 16) | 0); OUT_RING (chan, (8192 << 16) | 0); - BEGIN_RING(chan, fermi, NVC0_3D_SCISSOR_HORIZ(0), 2); + BEGIN_NVC0(chan, NVC0_3D(SCISSOR_HORIZ(0)), 2); OUT_RING (chan, (8192 << 16) | 0); OUT_RING (chan, (8192 << 16) | 0); FIRE_RING (chan); diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h index 004007a..316a9da 100644 --- a/src/nvc0_accel.h +++ b/src/nvc0_accel.h @@ -1,7 +1,6 @@ #ifndef __NVC0_ACCEL_H__ #define __NVC0_ACCEL_H__ -#include "nvc0_pushbuf.h" #include "hwdefs/nv_object.xml.h" #include "hwdefs/nv50_2d.xml.h" #include "hwdefs/nvc0_3d.xml.h" @@ -42,18 +41,17 @@ static __inline__ void VTX1s(NVPtr pNv, float sx, float sy, unsigned dx, unsigned dy) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *fermi = pNv->Nv3D; - BEGIN_RING(chan, fermi, NVC0_3D_VTX_ATTR_DEFINE, 3); + BEGIN_NVC0(chan, NVC0_3D(VTX_ATTR_DEFINE), 3); OUT_RING (chan, VTX_ATTR(1, 2, FLOAT, 4)); OUT_RINGf (chan, sx); OUT_RINGf (chan, sy); #if 1 - BEGIN_RING(chan, fermi, NVC0_3D_VTX_ATTR_DEFINE, 2); + BEGIN_NVC0(chan, NVC0_3D(VTX_ATTR_DEFINE), 2); OUT_RING (chan, VTX_ATTR(0, 2, USCALED, 2)); OUT_RING (chan, (dy << 16) | dx); #else - BEGIN_RING(chan, fermi, NVC0_3D_VTX_ATTR_DEFINE, 3); + BEGIN_NVC0(chan, NVC0_3D(VTX_ATTR_DEFINE), 3); OUT_RING (chan, VTX_ATTR(0, 2, FLOAT, 4)); OUT_RINGf (chan, (float)dx); OUT_RINGf (chan, (float)dy); @@ -65,22 +63,21 @@ VTX2s(NVPtr pNv, float s1x, float s1y, float s2x, float s2y, unsigned dx, unsigned dy) { struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *fermi = pNv->Nv3D; - BEGIN_RING(chan, fermi, NVC0_3D_VTX_ATTR_DEFINE, 3); + BEGIN_NVC0(chan, NVC0_3D(VTX_ATTR_DEFINE), 3); OUT_RING (chan, VTX_ATTR(1, 2, FLOAT, 4)); OUT_RINGf (chan, s1x); OUT_RINGf (chan, s1y); - BEGIN_RING(chan, fermi, NVC0_3D_VTX_ATTR_DEFINE, 3); + BEGIN_NVC0(chan, NVC0_3D(VTX_ATTR_DEFINE), 3); OUT_RING (chan, VTX_ATTR(2, 2, FLOAT, 4)); OUT_RINGf (chan, s2x); OUT_RINGf (chan, s2y); #if 1 - BEGIN_RING(chan, fermi, NVC0_3D_VTX_ATTR_DEFINE, 2); + BEGIN_NVC0(chan, NVC0_3D(VTX_ATTR_DEFINE), 2); OUT_RING (chan, VTX_ATTR(0, 2, USCALED, 2)); OUT_RING (chan, (dy << 16) | dx); #else - BEGIN_RING(chan, fermi, NVC0_3D_VTX_ATTR_DEFINE, 3); + BEGIN_NVC0(chan, NVC0_3D(VTX_ATTR_DEFINE), 3); OUT_RING (chan, VTX_ATTR(0, 2, FLOAT, 4)); OUT_RINGf (chan, (float)dx); OUT_RINGf (chan, (float)dy); diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c index c553e68..ea01771 100644 --- a/src/nvc0_exa.c +++ b/src/nvc0_exa.c @@ -43,9 +43,6 @@ static struct nvc0_exa_state exa_state; ScrnInfoPtr pScrn = xf86Screens[(p)->drawable.pScreen->myNum]; \ NVPtr pNv = NVPTR(pScrn); \ struct nouveau_channel *chan = pNv->chan; (void)chan; \ - struct nouveau_grobj *m2mf = pNv->NvMemFormat; (void)m2mf; \ - struct nouveau_grobj *eng2d = pNv->Nv2D; (void)eng2d; \ - struct nouveau_grobj *fermi = pNv->Nv3D; (void)fermi; \ struct nvc0_exa_state *state = &exa_state; (void)state #define BF(f) NV50_BLEND_FACTOR_##f @@ -99,7 +96,7 @@ static void NVC0EXASetClip(PixmapPtr ppix, int x, int y, int w, int h) { NVC0EXA_LOCALS(ppix); - BEGIN_RING(chan, eng2d, NV50_2D_CLIP_X, 4); + BEGIN_NVC0(chan, NV50_2D(CLIP_X), 4); OUT_RING (chan, x); OUT_RING (chan, y); OUT_RING (chan, w); @@ -121,13 +118,13 @@ NVC0EXAAcquireSurface2D(PixmapPtr ppix, int is_src) bo_flags |= is_src ? NOUVEAU_BO_RD : NOUVEAU_BO_WR; if (!nv50_style_tiled_pixmap(ppix)) { - BEGIN_RING(chan, eng2d, mthd, 2); + BEGIN_NVC0(chan, SUBC_2D(mthd), 2); OUT_RING (chan, fmt); OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, mthd + 0x14, 1); + BEGIN_NVC0(chan, SUBC_2D(mthd + 0x14), 1); OUT_RING (chan, (uint32_t)exaGetPixmapPitch(ppix)); } else { - BEGIN_RING(chan, eng2d, mthd, 5); + BEGIN_NVC0(chan, SUBC_2D(mthd), 5); OUT_RING (chan, fmt); OUT_RING (chan, 0); OUT_RING (chan, bo->tile_mode); @@ -135,7 +132,7 @@ NVC0EXAAcquireSurface2D(PixmapPtr ppix, int is_src) OUT_RING (chan, 0); } - BEGIN_RING(chan, eng2d, mthd + 0x18, 4); + BEGIN_NVC0(chan, SUBC_2D(mthd + 0x18), 4); OUT_RING (chan, ppix->drawable.width); OUT_RING (chan, ppix->drawable.height); if (OUT_RELOCh(chan, bo, 0, bo_flags) || @@ -153,7 +150,7 @@ NVC0EXASetPattern(PixmapPtr pdpix, int col0, int col1, int pat0, int pat1) { NVC0EXA_LOCALS(pdpix); - BEGIN_RING(chan, eng2d, NV50_2D_PATTERN_COLOR(0), 4); + BEGIN_NVC0(chan, NV50_2D(PATTERN_COLOR(0)), 4); OUT_RING (chan, col0); OUT_RING (chan, col1); OUT_RING (chan, pat0); @@ -171,7 +168,7 @@ NVC0EXASetROP(PixmapPtr pdpix, int alu, Pixel planemask) else rop = NVROP[alu].copy; - BEGIN_RING(chan, eng2d, NV50_2D_OPERATION, 1); + BEGIN_NVC0(chan, NV50_2D(OPERATION), 1); if (alu == GXcopy && EXA_PM_IS_SOLID(&pdpix->drawable, planemask)) { OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); return; @@ -179,7 +176,7 @@ NVC0EXASetROP(PixmapPtr pdpix, int alu, Pixel planemask) OUT_RING (chan, NV50_2D_OPERATION_ROP); } - BEGIN_RING(chan, eng2d, NV50_2D_PATTERN_COLOR_FORMAT, 2); + BEGIN_NVC0(chan, NV50_2D(PATTERN_COLOR_FORMAT), 2); switch (pdpix->drawable.bitsPerPixel) { case 8: OUT_RING (chan, 3); break; case 15: OUT_RING (chan, 1); break; @@ -206,7 +203,7 @@ NVC0EXASetROP(PixmapPtr pdpix, int alu, Pixel planemask) } if (pNv->currentRop != alu) { - BEGIN_RING(chan, eng2d, NV50_2D_ROP, 1); + BEGIN_NVC0(chan, NV50_2D(ROP), 1); OUT_RING (chan, rop); pNv->currentRop = alu; } @@ -241,7 +238,7 @@ NVC0EXAPrepareSolid(PixmapPtr pdpix, int alu, Pixel planemask, Pixel fg) NVC0EXASetROP(pdpix, alu, planemask); - BEGIN_RING(chan, eng2d, NV50_2D_DRAW_SHAPE, 3); + BEGIN_NVC0(chan, NV50_2D(DRAW_SHAPE), 3); OUT_RING (chan, NV50_2D_DRAW_SHAPE_RECTANGLES); OUT_RING (chan, fmt); OUT_RING (chan, fg); @@ -260,7 +257,7 @@ NVC0EXASolid(PixmapPtr pdpix, int x1, int y1, int x2, int y2) NVC0EXA_LOCALS(pdpix); WAIT_RING (chan, 5); - BEGIN_RING(chan, eng2d, NV50_2D_DRAW_POINT32_X(0), 4); + BEGIN_NVC0(chan, NV50_2D(DRAW_POINT32_X(0)), 4); OUT_RING (chan, x1); OUT_RING (chan, y1); OUT_RING (chan, x2); @@ -325,11 +322,11 @@ NVC0EXACopy(PixmapPtr pdpix, int srcX , int srcY, NVC0EXA_LOCALS(pdpix); WAIT_RING (chan, 17); - BEGIN_RING(chan, eng2d, NV50_GRAPH_SERIALIZE, 1); + BEGIN_NVC0(chan, SUBC_2D(NV50_GRAPH_SERIALIZE), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, 0x088c, 1); + BEGIN_NVC0(chan, SUBC_2D(0x088c), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, NV50_2D_BLIT_DST_X, 12); + BEGIN_NVC0(chan, NV50_2D(BLIT_DST_X), 12); OUT_RING (chan, dstX); OUT_RING (chan, dstY); OUT_RING (chan, width); @@ -393,12 +390,12 @@ NVC0EXAUploadSIFC(const char *src, int src_pitch, */ NVC0EXASetClip(pdpix, x, y, w, h); - BEGIN_RING(chan, eng2d, NV50_2D_OPERATION, 1); + BEGIN_NVC0(chan, NV50_2D(OPERATION), 1); OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); - BEGIN_RING(chan, eng2d, NV50_2D_SIFC_BITMAP_ENABLE, 2); + BEGIN_NVC0(chan, NV50_2D(SIFC_BITMAP_ENABLE), 2); OUT_RING (chan, 0); OUT_RING (chan, sifc_fmt); - BEGIN_RING(chan, eng2d, NV50_2D_SIFC_WIDTH, 10); + BEGIN_NVC0(chan, NV50_2D(SIFC_WIDTH), 10); OUT_RING (chan, (line_dwords * 4) / cpp); OUT_RING (chan, h); OUT_RING (chan, 0); /* SIFC_DX,Y_DU,V_FRACT,INT */ @@ -421,7 +418,7 @@ NVC0EXAUploadSIFC(const char *src, int src_pitch, int size = count > 1792 ? 1792 : count; WAIT_RING (chan, size + 1); - BEGIN_RING_NI(chan, eng2d, NV50_2D_SIFC_DATA, size); + BEGIN_NIC0(chan, NV50_2D(SIFC_DATA), size); OUT_RINGp (chan, ptr, size); ptr += size * 4; @@ -498,7 +495,7 @@ NVC0EXARenderTarget(PixmapPtr ppix, PicturePtr ppict) NOUVEAU_FALLBACK("invalid picture format\n"); } - BEGIN_RING(chan, fermi, NVC0_3D_RT_ADDRESS_HIGH(0), 8); + BEGIN_NVC0(chan, NVC0_3D(RT_ADDRESS_HIGH(0)), 8); if (OUT_RELOCh(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) return FALSE; @@ -591,24 +588,24 @@ NVC0EXATexture(PixmapPtr ppix, PicturePtr ppict, unsigned unit) if (!nv50_style_tiled_pixmap(ppix)) NOUVEAU_FALLBACK("pixmap is scanout buffer\n"); - BEGIN_RING(chan, fermi, NVC0_3D_TIC_ADDRESS_HIGH, 3); + BEGIN_NVC0(chan, NVC0_3D(TIC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags)) return FALSE; OUT_RING (chan, 15); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET + unit * 32, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET + unit * 32, tcb_flags)) return FALSE; - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 8 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 8); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 8); switch (ppict->format) { case PICT_a8r8g8b8: @@ -690,24 +687,24 @@ NVC0EXATexture(PixmapPtr ppix, PicturePtr ppict, unsigned unit) OUT_RING (chan, 0x03000000); OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, fermi, NVC0_3D_TSC_ADDRESS_HIGH, 3); + BEGIN_NVC0(chan, NVC0_3D(TSC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags)) return FALSE; OUT_RING (chan, 0); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET + unit * 32, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET + unit * 32, tcb_flags)) return FALSE; - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 8 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 8); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 8); if (ppict->repeat) { switch (ppict->repeatType) { @@ -794,18 +791,18 @@ NVC0EXABlend(PixmapPtr ppix, PicturePtr ppict, int op, int component_alpha) } if (sblend == BF(ONE) && dblend == BF(ZERO)) { - BEGIN_RING(chan, fermi, NVC0_3D_BLEND_ENABLE(0), 1); + BEGIN_NVC0(chan, NVC0_3D(BLEND_ENABLE(0)), 1); OUT_RING (chan, 0); } else { - BEGIN_RING(chan, fermi, NVC0_3D_BLEND_ENABLE(0), 1); + BEGIN_NVC0(chan, NVC0_3D(BLEND_ENABLE(0)), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, fermi, NVC0_3D_BLEND_EQUATION_RGB, 5); + BEGIN_NVC0(chan, NVC0_3D(BLEND_EQUATION_RGB), 5); OUT_RING (chan, NVC0_3D_BLEND_EQUATION_RGB_FUNC_ADD); OUT_RING (chan, sblend); OUT_RING (chan, dblend); OUT_RING (chan, NVC0_3D_BLEND_EQUATION_ALPHA_FUNC_ADD); OUT_RING (chan, sblend); - BEGIN_RING(chan, fermi, NVC0_3D_BLEND_FUNC_DST_ALPHA, 1); + BEGIN_NVC0(chan, NVC0_3D(BLEND_FUNC_DST_ALPHA), 1); OUT_RING (chan, dblend); } } @@ -864,7 +861,7 @@ NVC0EXAPrepareComposite(int op, NOUVEAU_FALLBACK("comp-alpha"); */ - BEGIN_RING(chan, eng2d, NV50_GRAPH_SERIALIZE, 1); + BEGIN_NVC0(chan, SUBC_2D(NV50_GRAPH_SERIALIZE), 1); OUT_RING (chan, 0); if (!NVC0EXARenderTarget(pdpix, pdpict)) { @@ -875,7 +872,7 @@ NVC0EXAPrepareComposite(int op, NVC0EXABlend(pdpix, pdpict, op, pmpict && pmpict->componentAlpha && PICT_FORMAT_RGB(pmpict->format)); - BEGIN_RING(chan, fermi, NVC0_3D_CODE_ADDRESS_HIGH, 2); + BEGIN_NVC0(chan, NVC0_3D(CODE_ADDRESS_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, CODE_OFFSET, shd_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, CODE_OFFSET, shd_flags)) { MARK_UNDO(chan); @@ -886,7 +883,7 @@ NVC0EXAPrepareComposite(int op, MARK_UNDO(chan); NOUVEAU_FALLBACK("src picture invalid\n"); } - BEGIN_RING(chan, fermi, NVC0_3D_BIND_TIC(4), 1); + BEGIN_NVC0(chan, NVC0_3D(BIND_TIC(4)), 1); OUT_RING (chan, (0 << 9) | (0 << 1) | NVC0_3D_BIND_TIC_ACTIVE); if (pmpict) { @@ -896,10 +893,10 @@ NVC0EXAPrepareComposite(int op, } state->have_mask = TRUE; - BEGIN_RING(chan, fermi, NVC0_3D_BIND_TIC(4), 1); + BEGIN_NVC0(chan, NVC0_3D(BIND_TIC(4)), 1); OUT_RING (chan, (1 << 9) | (1 << 1) | NVC0_3D_BIND_TIC_ACTIVE); - BEGIN_RING(chan, fermi, NVC0_3D_SP_START_ID(5), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_START_ID(5)), 1); if (pdpict->format == PICT_a8) { OUT_RING (chan, PFP_C_A8); } else { @@ -916,21 +913,21 @@ NVC0EXAPrepareComposite(int op, } else { state->have_mask = FALSE; - BEGIN_RING(chan, fermi, NVC0_3D_BIND_TIC(4), 1); + BEGIN_NVC0(chan, NVC0_3D(BIND_TIC(4)), 1); OUT_RING (chan, (1 << 1) | 0); - BEGIN_RING(chan, fermi, NVC0_3D_SP_START_ID(5), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_START_ID(5)), 1); if (pdpict->format == PICT_a8) OUT_RING (chan, PFP_S_A8); else OUT_RING (chan, PFP_S); } - BEGIN_RING(chan, fermi, NVC0_3D_TSC_FLUSH, 1); + BEGIN_NVC0(chan, NVC0_3D(TSC_FLUSH), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_TIC_FLUSH, 1); + BEGIN_NVC0(chan, NVC0_3D(TIC_FLUSH), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_TEX_CACHE_CTL, 1); + BEGIN_NVC0(chan, NVC0_3D(TEX_CACHE_CTL), 1); OUT_RING (chan, 0); pNv->alu = op; @@ -975,10 +972,10 @@ NVC0EXAComposite(PixmapPtr pdpix, float sX0, sX1, sX2, sY0, sY1, sY2; WAIT_RING (chan, 64); - BEGIN_RING(chan, fermi, NVC0_3D_SCISSOR_HORIZ(0), 2); + BEGIN_NVC0(chan, NVC0_3D(SCISSOR_HORIZ(0)), 2); OUT_RING (chan, ((dx + w) << 16) | dx); OUT_RING (chan, ((dy + h) << 16) | dy); - BEGIN_RING(chan, fermi, NVC0_3D_VERTEX_BEGIN_GL, 1); + BEGIN_NVC0(chan, NVC0_3D(VERTEX_BEGIN_GL), 1); OUT_RING (chan, NVC0_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES); NVC0EXATransform(state->unit[0].transform, sx, sy + (h * 2), @@ -1013,7 +1010,7 @@ NVC0EXAComposite(PixmapPtr pdpix, VTX1s(pNv, sX2, sY2, dx + (w * 2), dy); } - BEGIN_RING(chan, fermi, NVC0_3D_VERTEX_END_GL, 1); + BEGIN_NVC0(chan, NVC0_3D(VERTEX_END_GL), 1); OUT_RING (chan, 0); } @@ -1037,28 +1034,28 @@ NVC0EXARectM2MF(NVPtr pNv, int w, int h, int cpp, unsigned exec = 0; if (src->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK) { - BEGIN_RING(chan, m2mf, NVC0_M2MF_TILING_MODE_IN, 5); + BEGIN_NVC0(chan, NVC0_M2MF(TILING_MODE_IN), 5); OUT_RING (chan, src->tile_mode); OUT_RING (chan, src_pitch); OUT_RING (chan, src_h); OUT_RING (chan, 1); OUT_RING (chan, 0); } else { - BEGIN_RING(chan, m2mf, NVC0_M2MF_PITCH_IN, 1); + BEGIN_NVC0(chan, NVC0_M2MF(PITCH_IN), 1); OUT_RING (chan, src_pitch); exec |= NVC0_M2MF_EXEC_LINEAR_IN; } if (dst->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK) { - BEGIN_RING(chan, m2mf, NVC0_M2MF_TILING_MODE_OUT, 5); + BEGIN_NVC0(chan, NVC0_M2MF(TILING_MODE_OUT), 5); OUT_RING (chan, dst->tile_mode); OUT_RING (chan, dst_pitch); OUT_RING (chan, dst_h); OUT_RING (chan, 1); OUT_RING (chan, 0); } else { - BEGIN_RING(chan, m2mf, NVC0_M2MF_PITCH_OUT, 1); + BEGIN_NVC0(chan, NVC0_M2MF(PITCH_OUT), 1); OUT_RING (chan, dst_pitch); exec |= NVC0_M2MF_EXEC_LINEAR_OUT; @@ -1073,7 +1070,7 @@ NVC0EXARectM2MF(NVPtr pNv, int w, int h, int cpp, return FALSE; if (src->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK) { - BEGIN_RING(chan, m2mf, NVC0_M2MF_TILING_POSITION_IN_X, 2); + BEGIN_NVC0(chan, NVC0_M2MF(TILING_POSITION_IN_X), 2); OUT_RING (chan, src_x * cpp); OUT_RING (chan, src_y); } else { @@ -1081,31 +1078,31 @@ NVC0EXARectM2MF(NVPtr pNv, int w, int h, int cpp, } if (dst->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK) { - BEGIN_RING(chan, m2mf, NVC0_M2MF_TILING_POSITION_OUT_X, 2); + BEGIN_NVC0(chan, NVC0_M2MF(TILING_POSITION_OUT_X), 2); OUT_RING (chan, dst_x * cpp); OUT_RING (chan, dst_y); } else { dst_off = dst_y * dst_pitch + dst_x * cpp; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, dst, dst_off, dst_dom | NOUVEAU_BO_WR) || OUT_RELOCl(chan, dst, dst_off, dst_dom | NOUVEAU_BO_WR)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_IN_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_IN_HIGH), 2); if (OUT_RELOCh(chan, src, src_off, src_dom | NOUVEAU_BO_RD) || OUT_RELOCl(chan, src, src_off, src_dom | NOUVEAU_BO_RD)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, w * cpp); OUT_RING (chan, line_count); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, NVC0_M2MF_EXEC_QUERY_SHORT | exec); src_y += line_count; diff --git a/src/nvc0_xv.c b/src/nvc0_xv.c index ee8babb..a2a4c9e 100644 --- a/src/nvc0_xv.c +++ b/src/nvc0_xv.c @@ -43,48 +43,48 @@ nvc0_xv_m2mf(struct nouveau_grobj *m2mf, { struct nouveau_channel *chan = m2mf->channel; - BEGIN_RING(chan, m2mf, NVC0_M2MF_TILING_MODE_OUT, 5); + BEGIN_NVC0(chan, NVC0_M2MF(TILING_MODE_OUT), 5); OUT_RING (chan, dst->tile_mode); OUT_RING (chan, dst_pitch); OUT_RING (chan, nlines); OUT_RING (chan, 1); OUT_RING (chan, 0); - BEGIN_RING(chan, m2mf, NVC0_M2MF_TILING_POSITION_OUT_X, 2); + BEGIN_NVC0(chan, NVC0_M2MF(TILING_POSITION_OUT_X), 2); OUT_RING (chan, 0); OUT_RING (chan, 0); if (uv_offset) { - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_IN_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_IN_HIGH), 2); OUT_RELOCh(chan, src, line_len * nlines, NOUVEAU_BO_GART | NOUVEAU_BO_RD); OUT_RELOCl(chan, src, line_len * nlines, NOUVEAU_BO_GART | NOUVEAU_BO_RD); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); OUT_RELOCh(chan, dst, uv_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); OUT_RELOCl(chan, dst, uv_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, m2mf, NVC0_M2MF_PITCH_IN, 4); + BEGIN_NVC0(chan, NVC0_M2MF(PITCH_IN), 4); OUT_RING (chan, line_len); OUT_RING (chan, dst_pitch); OUT_RING (chan, line_len); OUT_RING (chan, nlines >> 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x00100010); } - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_IN_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_IN_HIGH), 2); OUT_RELOCh(chan, src, 0, NOUVEAU_BO_GART | NOUVEAU_BO_RD); OUT_RELOCl(chan, src, 0, NOUVEAU_BO_GART | NOUVEAU_BO_RD); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); OUT_RELOCh(chan, dst, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); OUT_RELOCl(chan, dst, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - BEGIN_RING(chan, m2mf, NVC0_M2MF_PITCH_IN, 4); + BEGIN_NVC0(chan, NVC0_M2MF(PITCH_IN), 4); OUT_RING (chan, line_len); OUT_RING (chan, dst_pitch); OUT_RING (chan, line_len); OUT_RING (chan, nlines); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x00100010); } @@ -115,8 +115,6 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; struct nouveau_bo *bo = nouveau_pixmap_bo(ppix); - struct nouveau_grobj *m2mf = pNv->NvMemFormat; - struct nouveau_grobj *fermi = pNv->Nv3D; const unsigned shd_flags = NOUVEAU_BO_RD | NOUVEAU_BO_VRAM; const unsigned tcb_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; uint32_t mode = 0xd0005000 | (src->tile_mode << 18); @@ -124,7 +122,7 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, if (MARK_RING(chan, 256, 18)) return FALSE; - BEGIN_RING(chan, fermi, NVC0_3D_RT_ADDRESS_HIGH(0), 8); + BEGIN_NVC0(chan, NVC0_3D(RT_ADDRESS_HIGH(0)), 8); if (OUT_RELOCh(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) { MARK_UNDO(chan); @@ -142,10 +140,10 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, OUT_RING (chan, 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_BLEND_ENABLE(0), 1); + BEGIN_NVC0(chan, NVC0_3D(BLEND_ENABLE(0)), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_TIC_ADDRESS_HIGH, 3); + BEGIN_NVC0(chan, NVC0_3D(TIC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags)) { MARK_UNDO(chan); @@ -153,18 +151,18 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, } OUT_RING (chan, 15); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TIC_OFFSET, tcb_flags)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 16 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x00100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 16); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 16); if (id == FOURCC_YV12 || id == FOURCC_I420) { OUT_RING (chan, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | @@ -249,7 +247,7 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, OUT_RING (chan, 0x00000000); } - BEGIN_RING(chan, fermi, NVC0_3D_TSC_ADDRESS_HIGH, 3); + BEGIN_NVC0(chan, NVC0_3D(TSC_ADDRESS_HIGH), 3); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags)) { MARK_UNDO(chan); @@ -257,18 +255,18 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, } OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, m2mf, NVC0_M2MF_OFFSET_OUT_HIGH, 2); + BEGIN_NVC0(chan, NVC0_M2MF(OFFSET_OUT_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, TSC_OFFSET, tcb_flags)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, m2mf, NVC0_M2MF_LINE_LENGTH_IN, 2); + BEGIN_NVC0(chan, NVC0_M2MF(LINE_LENGTH_IN), 2); OUT_RING (chan, 16 * 4); OUT_RING (chan, 1); - BEGIN_RING(chan, m2mf, NVC0_M2MF_EXEC, 1); + BEGIN_NVC0(chan, NVC0_M2MF(EXEC), 1); OUT_RING (chan, 0x00100111); - BEGIN_RING_NI(chan, m2mf, NVC0_M2MF_DATA, 16); + BEGIN_NIC0(chan, NVC0_M2MF(DATA), 16); OUT_RING (chan, NV50TSC_1_0_WRAPS_CLAMP_TO_EDGE | NV50TSC_1_0_WRAPT_CLAMP_TO_EDGE | NV50TSC_1_0_WRAPR_CLAMP_TO_EDGE); @@ -294,26 +292,26 @@ nvc0_xv_state_emit(PixmapPtr ppix, int id, struct nouveau_bo *src, OUT_RING (chan, 0x00000000); OUT_RING (chan, 0x00000000); - BEGIN_RING(chan, fermi, NVC0_3D_CODE_ADDRESS_HIGH, 2); + BEGIN_NVC0(chan, NVC0_3D(CODE_ADDRESS_HIGH), 2); if (OUT_RELOCh(chan, pNv->tesla_scratch, CODE_OFFSET, shd_flags) || OUT_RELOCl(chan, pNv->tesla_scratch, CODE_OFFSET, shd_flags)) { MARK_UNDO(chan); return FALSE; } - BEGIN_RING(chan, fermi, NVC0_3D_SP_START_ID(5), 1); + BEGIN_NVC0(chan, NVC0_3D(SP_START_ID(5)), 1); OUT_RING (chan, PFP_NV12); - BEGIN_RING(chan, fermi, NVC0_3D_TSC_FLUSH, 1); + BEGIN_NVC0(chan, NVC0_3D(TSC_FLUSH), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_TIC_FLUSH, 1); + BEGIN_NVC0(chan, NVC0_3D(TIC_FLUSH), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_TEX_CACHE_CTL, 1); + BEGIN_NVC0(chan, NVC0_3D(TEX_CACHE_CTL), 1); OUT_RING (chan, 0); - BEGIN_RING(chan, fermi, NVC0_3D_BIND_TIC(4), 1); + BEGIN_NVC0(chan, NVC0_3D(BIND_TIC(4)), 1); OUT_RING (chan, 1); - BEGIN_RING(chan, fermi, NVC0_3D_BIND_TIC(4), 1); + BEGIN_NVC0(chan, NVC0_3D(BIND_TIC(4)), 1); OUT_RING (chan, 0x203); return TRUE; @@ -332,7 +330,6 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, { NVPtr pNv = NVPTR(pScrn); struct nouveau_channel *chan = pNv->chan; - struct nouveau_grobj *fermi = pNv->Nv3D; float X1, X2, Y1, Y2; BoxPtr pbox; int nbox; @@ -375,16 +372,16 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, return BadAlloc; } - BEGIN_RING(chan, fermi, NVC0_3D_SCISSOR_HORIZ(0), 2); + BEGIN_NVC0(chan, NVC0_3D(SCISSOR_HORIZ(0)), 2); OUT_RING (chan, sx2 << NVC0_3D_SCISSOR_HORIZ_MAX__SHIFT | sx1); OUT_RING (chan, sy2 << NVC0_3D_SCISSOR_VERT_MAX__SHIFT | sy1 ); - BEGIN_RING(chan, fermi, NVC0_3D_VERTEX_BEGIN_GL, 1); + BEGIN_NVC0(chan, NVC0_3D(VERTEX_BEGIN_GL), 1); OUT_RING (chan, NVC0_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES); VTX2s(pNv, tx1, ty1, tx1, ty1, sx1, sy1); VTX2s(pNv, tx2+(tx2-tx1), ty1, tx2+(tx2-tx1), ty1, sx2+(sx2-sx1), sy1); VTX2s(pNv, tx1, ty2+(ty2-ty1), tx1, ty2+(ty2-ty1), sx1, sy2+(sy2-sy1)); - BEGIN_RING(chan, fermi, NVC0_3D_VERTEX_END_GL, 1); + BEGIN_NVC0(chan, NVC0_3D(VERTEX_END_GL), 1); OUT_RING (chan, 0); pbox++; @@ -399,19 +396,18 @@ nvc0_xv_csc_update(NVPtr pNv, float yco, float *off, float *uco, float *vco) { struct nouveau_channel *chan = pNv->chan; struct nouveau_bo *bo = pNv->tesla_scratch; - struct nouveau_grobj *fermi = pNv->Nv3D; if (MARK_RING(chan, 64, 2)) return; - BEGIN_RING(chan, fermi, NVC0_3D_CB_SIZE, 3); + BEGIN_NVC0(chan, NVC0_3D(CB_SIZE), 3); OUT_RING (chan, 256); if (OUT_RELOCh(chan, bo, CB_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR) || OUT_RELOCl(chan, bo, CB_OFFSET, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR)) { MARK_UNDO(chan); return; } - BEGIN_RING(chan, fermi, NVC0_3D_CB_POS, 11); + BEGIN_NVC0(chan, NVC0_3D(CB_POS), 11); OUT_RING (chan, 0); OUT_RINGf (chan, yco); OUT_RINGf (chan, off[0]); -- cgit v1.2.1