1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
|
/* $XdotOrg: driver/xf86-video-nv/src/nv_driver.c,v 1.21 2006/01/24 16:45:29 aplattner Exp $ */
/* $XConsortium: nv_driver.c /main/3 1996/10/28 05:13:37 kaleb $ */
/*
* Copyright 1996-1997 David J. McKay
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
/* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
<jpaana@s2.org> */
/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.144 2006/06/16 00:19:32 mvojkovi Exp $ */
#include "nv_include.h"
#include "xf86int10.h"
#include "xf86drm.h"
/*const OptionInfoRec * RivaAvailableOptions(int chipid, int busid);
Bool RivaGetScrnInfoRec(PciChipsets *chips, int chip);*/
/*
* Forward definitions for the functions that make up the driver.
*/
/* Mandatory functions */
static const OptionInfoRec * NVAvailableOptions(int chipid, int busid);
static void NVIdentify(int flags);
static Bool NVProbe(DriverPtr drv, int flags);
static Bool NVPreInit(ScrnInfoPtr pScrn, int flags);
static Bool NVScreenInit(int Index, ScreenPtr pScreen, int argc,
char **argv);
static Bool NVEnterVT(int scrnIndex, int flags);
static void NVLeaveVT(int scrnIndex, int flags);
static Bool NVCloseScreen(int scrnIndex, ScreenPtr pScreen);
static Bool NVSaveScreen(ScreenPtr pScreen, int mode);
/* Optional functions */
static void NVFreeScreen(int scrnIndex, int flags);
static ModeStatus NVValidMode(int scrnIndex, DisplayModePtr mode,
Bool verbose, int flags);
#ifdef RANDR
static Bool NVDriverFunc(ScrnInfoPtr pScrnInfo, xorgDriverFuncOp op,
pointer data);
#endif
/* Internally used functions */
static Bool NVMapMem(ScrnInfoPtr pScrn);
static Bool NVUnmapMem(ScrnInfoPtr pScrn);
static void NVSave(ScrnInfoPtr pScrn);
static void NVRestore(ScrnInfoPtr pScrn);
static Bool NVModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
/*
* This contains the functions needed by the server after loading the
* driver module. It must be supplied, and gets added the driver list by
* the Module Setup funtion in the dynamic case. In the static case a
* reference to this is compiled in, and this requires that the name of
* this DriverRec be an upper-case version of the driver name.
*/
_X_EXPORT DriverRec NV = {
NV_VERSION,
NV_DRIVER_NAME,
NVIdentify,
NVProbe,
NVAvailableOptions,
NULL,
0
};
struct NvFamily
{
char *name;
char *chipset;
};
static struct NvFamily NVKnownFamilies[] =
{
{ "RIVA 128", "NV03" },
{ "RIVA TNT", "NV04" },
{ "RIVA TNT2", "NV05" },
{ "GeForce 256", "NV10" },
{ "GeForce 2", "NV11, NV15" },
{ "GeForce 4MX", "NV17, NV18" },
{ "GeForce 3", "NV20" },
{ "GeForce 4Ti", "NV25, NV28" },
{ "GeForce FX", "NV3x" },
{ "GeForce 6", "NV4x" },
{ "GeForce 7", "G7x" },
{ NULL, NULL}
};
/* Known cards as of 2006/06/16 */
static SymTabRec NVKnownChipsets[] =
{
{ 0x12D20018, "RIVA 128" },
{ 0x12D20019, "RIVA 128ZX" },
{ 0x10DE0020, "RIVA TNT" },
{ 0x10DE0028, "RIVA TNT2" },
{ 0x10DE002A, "Unknown TNT2" },
{ 0x10DE002C, "Vanta" },
{ 0x10DE0029, "RIVA TNT2 Ultra" },
{ 0x10DE002D, "RIVA TNT2 Model 64" },
{ 0x10DE00A0, "Aladdin TNT2" },
{ 0x10DE0100, "GeForce 256" },
{ 0x10DE0101, "GeForce DDR" },
{ 0x10DE0103, "Quadro" },
{ 0x10DE0110, "GeForce2 MX/MX 400" },
{ 0x10DE0111, "GeForce2 MX 100/200" },
{ 0x10DE0112, "GeForce2 Go" },
{ 0x10DE0113, "Quadro2 MXR/EX/Go" },
{ 0x10DE01A0, "GeForce2 Integrated GPU" },
{ 0x10DE0150, "GeForce2 GTS" },
{ 0x10DE0151, "GeForce2 Ti" },
{ 0x10DE0152, "GeForce2 Ultra" },
{ 0x10DE0153, "Quadro2 Pro" },
{ 0x10DE0170, "GeForce4 MX 460" },
{ 0x10DE0171, "GeForce4 MX 440" },
{ 0x10DE0172, "GeForce4 MX 420" },
{ 0x10DE0173, "GeForce4 MX 440-SE" },
{ 0x10DE0174, "GeForce4 440 Go" },
{ 0x10DE0175, "GeForce4 420 Go" },
{ 0x10DE0176, "GeForce4 420 Go 32M" },
{ 0x10DE0177, "GeForce4 460 Go" },
{ 0x10DE0178, "Quadro4 550 XGL" },
#if defined(__powerpc__)
{ 0x10DE0179, "GeForce4 MX (Mac)" },
#else
{ 0x10DE0179, "GeForce4 440 Go 64M" },
#endif
{ 0x10DE017A, "Quadro NVS" },
{ 0x10DE017C, "Quadro4 500 GoGL" },
{ 0x10DE017D, "GeForce4 410 Go 16M" },
{ 0x10DE0181, "GeForce4 MX 440 with AGP8X" },
{ 0x10DE0182, "GeForce4 MX 440SE with AGP8X" },
{ 0x10DE0183, "GeForce4 MX 420 with AGP8X" },
{ 0x10DE0185, "GeForce4 MX 4000" },
{ 0x10DE0186, "GeForce4 448 Go" },
{ 0x10DE0187, "GeForce4 488 Go" },
{ 0x10DE0188, "Quadro4 580 XGL" },
#if defined(__powerpc__)
{ 0x10DE0189, "GeForce4 MX with AGP8X (Mac)" },
#endif
{ 0x10DE018A, "Quadro4 NVS 280 SD" },
{ 0x10DE018B, "Quadro4 380 XGL" },
{ 0x10DE018C, "Quadro NVS 50 PCI" },
{ 0x10DE018D, "GeForce4 448 Go" },
{ 0x10DE01F0, "GeForce4 MX Integrated GPU" },
{ 0x10DE0200, "GeForce3" },
{ 0x10DE0201, "GeForce3 Ti 200" },
{ 0x10DE0202, "GeForce3 Ti 500" },
{ 0x10DE0203, "Quadro DCC" },
{ 0x10DE0250, "GeForce4 Ti 4600" },
{ 0x10DE0251, "GeForce4 Ti 4400" },
{ 0x10DE0253, "GeForce4 Ti 4200" },
{ 0x10DE0258, "Quadro4 900 XGL" },
{ 0x10DE0259, "Quadro4 750 XGL" },
{ 0x10DE025B, "Quadro4 700 XGL" },
{ 0x10DE0280, "GeForce4 Ti 4800" },
{ 0x10DE0281, "GeForce4 Ti 4200 with AGP8X" },
{ 0x10DE0282, "GeForce4 Ti 4800 SE" },
{ 0x10DE0286, "GeForce4 4200 Go" },
{ 0x10DE028C, "Quadro4 700 GoGL" },
{ 0x10DE0288, "Quadro4 980 XGL" },
{ 0x10DE0289, "Quadro4 780 XGL" },
{ 0x10DE0301, "GeForce FX 5800 Ultra" },
{ 0x10DE0302, "GeForce FX 5800" },
{ 0x10DE0308, "Quadro FX 2000" },
{ 0x10DE0309, "Quadro FX 1000" },
{ 0x10DE0311, "GeForce FX 5600 Ultra" },
{ 0x10DE0312, "GeForce FX 5600" },
{ 0x10DE0314, "GeForce FX 5600XT" },
{ 0x10DE031A, "GeForce FX Go5600" },
{ 0x10DE031B, "GeForce FX Go5650" },
{ 0x10DE031C, "Quadro FX Go700" },
{ 0x10DE0320, "GeForce FX 5200" },
{ 0x10DE0321, "GeForce FX 5200 Ultra" },
{ 0x10DE0322, "GeForce FX 5200" },
{ 0x10DE0323, "GeForce FX 5200LE" },
{ 0x10DE0324, "GeForce FX Go5200" },
{ 0x10DE0325, "GeForce FX Go5250" },
{ 0x10DE0326, "GeForce FX 5500" },
{ 0x10DE0327, "GeForce FX 5100" },
{ 0x10DE0328, "GeForce FX Go5200 32M/64M" },
#if defined(__powerpc__)
{ 0x10DE0329, "GeForce FX 5200 (Mac)" },
#endif
{ 0x10DE032A, "Quadro NVS 55/280 PCI" },
{ 0x10DE032B, "Quadro FX 500/600 PCI" },
{ 0x10DE032C, "GeForce FX Go53xx Series" },
{ 0x10DE032D, "GeForce FX Go5100" },
{ 0x10DE0330, "GeForce FX 5900 Ultra" },
{ 0x10DE0331, "GeForce FX 5900" },
{ 0x10DE0332, "GeForce FX 5900XT" },
{ 0x10DE0333, "GeForce FX 5950 Ultra" },
{ 0x10DE0334, "GeForce FX 5900ZT" },
{ 0x10DE0338, "Quadro FX 3000" },
{ 0x10DE033F, "Quadro FX 700" },
{ 0x10DE0341, "GeForce FX 5700 Ultra" },
{ 0x10DE0342, "GeForce FX 5700" },
{ 0x10DE0343, "GeForce FX 5700LE" },
{ 0x10DE0344, "GeForce FX 5700VE" },
{ 0x10DE0347, "GeForce FX Go5700" },
{ 0x10DE0348, "GeForce FX Go5700" },
{ 0x10DE034C, "Quadro FX Go1000" },
{ 0x10DE034E, "Quadro FX 1100" },
{ 0x10DE0040, "GeForce 6800 Ultra" },
{ 0x10DE0041, "GeForce 6800" },
{ 0x10DE0042, "GeForce 6800 LE" },
{ 0x10DE0043, "GeForce 6800 XE" },
{ 0x10DE0044, "GeForce 6800 XT" },
{ 0x10DE0045, "GeForce 6800 GT" },
{ 0x10DE0046, "GeForce 6800 GT" },
{ 0x10DE0047, "GeForce 6800 GS" },
{ 0x10DE0048, "GeForce 6800 XT" },
{ 0x10DE004E, "Quadro FX 4000" },
{ 0x10DE00C0, "GeForce 6800 GS" },
{ 0x10DE00C1, "GeForce 6800" },
{ 0x10DE00C2, "GeForce 6800 LE" },
{ 0x10DE00C3, "GeForce 6800 XT" },
{ 0x10DE00C8, "GeForce Go 6800" },
{ 0x10DE00C9, "GeForce Go 6800 Ultra" },
{ 0x10DE00CC, "Quadro FX Go1400" },
{ 0x10DE00CD, "Quadro FX 3450/4000 SDI" },
{ 0x10DE00CE, "Quadro FX 1400" },
{ 0x10DE0140, "GeForce 6600 GT" },
{ 0x10DE0141, "GeForce 6600" },
{ 0x10DE0142, "GeForce 6600 LE" },
{ 0x10DE0143, "GeForce 6600 VE" },
{ 0x10DE0144, "GeForce Go 6600" },
{ 0x10DE0145, "GeForce 6610 XL" },
{ 0x10DE0146, "GeForce Go 6600 TE/6200 TE" },
{ 0x10DE0147, "GeForce 6700 XL" },
{ 0x10DE0148, "GeForce Go 6600" },
{ 0x10DE0149, "GeForce Go 6600 GT" },
{ 0x10DE014C, "Quadro FX 550" },
{ 0x10DE014D, "Quadro FX 550" },
{ 0x10DE014E, "Quadro FX 540" },
{ 0x10DE014F, "GeForce 6200" },
{ 0x10DE0160, "GeForce 6500" },
{ 0x10DE0161, "GeForce 6200 TurboCache(TM)" },
{ 0x10DE0162, "GeForce 6200SE TurboCache(TM)" },
{ 0x10DE0163, "GeForce 6200 LE" },
{ 0x10DE0164, "GeForce Go 6200" },
{ 0x10DE0165, "Quadro NVS 285" },
{ 0x10DE0166, "GeForce Go 6400" },
{ 0x10DE0167, "GeForce Go 6200" },
{ 0x10DE0168, "GeForce Go 6400" },
{ 0x10DE0169, "GeForce 6250" },
{ 0x10DE0211, "GeForce 6800" },
{ 0x10DE0212, "GeForce 6800 LE" },
{ 0x10DE0215, "GeForce 6800 GT" },
{ 0x10DE0218, "GeForce 6800 XT" },
{ 0x10DE0221, "GeForce 6200" },
{ 0x10DE0222, "GeForce 6200 A-LE" },
{ 0x10DE0090, "GeForce 7800 GTX" },
{ 0x10DE0091, "GeForce 7800 GTX" },
{ 0x10DE0092, "GeForce 7800 GT" },
{ 0x10DE0093, "GeForce 7800 GS" },
{ 0x10DE0095, "GeForce 7800 SLI" },
{ 0x10DE0098, "GeForce Go 7800" },
{ 0x10DE0099, "GeForce Go 7800 GTX" },
{ 0x10DE009D, "Quadro FX 4500" },
{ 0x10DE01D1, "GeForce 7300 LE" },
{ 0x10DE01D3, "GeForce 7300 SE" },
{ 0x10DE01D6, "GeForce Go 7200" },
{ 0x10DE01D7, "GeForce Go 7300" },
{ 0x10DE01D8, "GeForce Go 7400" },
{ 0x10DE01D9, "GeForce Go 7400 GS" },
{ 0x10DE01DA, "Quadro NVS 110M" },
{ 0x10DE01DB, "Quadro NVS 120M" },
{ 0x10DE01DC, "Quadro FX 350M" },
{ 0x10DE01DD, "GeForce 7500 LE" },
{ 0x10DE01DE, "Quadro FX 350" },
{ 0x10DE01DF, "GeForce 7300 GS" },
{ 0x10DE0391, "GeForce 7600 GT" },
{ 0x10DE0392, "GeForce 7600 GS" },
{ 0x10DE0393, "GeForce 7300 GT" },
{ 0x10DE0394, "GeForce 7600 LE" },
{ 0x10DE0395, "GeForce 7300 GT" },
{ 0x10DE0397, "GeForce Go 7700" },
{ 0x10DE0398, "GeForce Go 7600" },
{ 0x10DE0399, "GeForce Go 7600 GT"},
{ 0x10DE039A, "Quadro NVS 300M" },
{ 0x10DE039B, "GeForce Go 7900 SE" },
{ 0x10DE039C, "Quadro FX 550M" },
{ 0x10DE039E, "Quadro FX 560" },
{ 0x10DE0290, "GeForce 7900 GTX" },
{ 0x10DE0291, "GeForce 7900 GT" },
{ 0x10DE0292, "GeForce 7900 GS" },
{ 0x10DE0298, "GeForce Go 7900 GS" },
{ 0x10DE0299, "GeForce Go 7900 GTX" },
{ 0x10DE029A, "Quadro FX 2500M" },
{ 0x10DE029B, "Quadro FX 1500M" },
{ 0x10DE029C, "Quadro FX 5500" },
{ 0x10DE029D, "Quadro FX 3500" },
{ 0x10DE029E, "Quadro FX 1500" },
{ 0x10DE029F, "Quadro FX 4500 X2" },
{ 0x10DE0240, "GeForce 6150" },
{ 0x10DE0241, "GeForce 6150 LE" },
{ 0x10DE0242, "GeForce 6100" },
{ 0x10DE0244, "GeForce Go 6150" },
{ 0x10DE0247, "GeForce Go 6100" },
{-1, NULL}
};
/*
* List of symbols from other modules that this module references. This
* list is used to tell the loader that it is OK for symbols here to be
* unresolved providing that it hasn't been told that they haven't been
* told that they are essential via a call to xf86LoaderReqSymbols() or
* xf86LoaderReqSymLists(). The purpose is this is to avoid warnings about
* unresolved symbols that are not required.
*/
static const char *vgahwSymbols[] = {
"vgaHWUnmapMem",
"vgaHWDPMSSet",
"vgaHWFreeHWRec",
"vgaHWGetHWRec",
"vgaHWGetIndex",
"vgaHWInit",
"vgaHWMapMem",
"vgaHWProtect",
"vgaHWRestore",
"vgaHWSave",
"vgaHWSaveScreen",
NULL
};
static const char *fbSymbols[] = {
"fbPictureInit",
"fbScreenInit",
NULL
};
static const char *xaaSymbols[] = {
"XAACopyROP",
"XAACreateInfoRec",
"XAADestroyInfoRec",
"XAAFallbackOps",
"XAAInit",
"XAAPatternROP",
NULL
};
static const char *exaSymbols[] = {
"exaDriverInit",
"exaOffscreenInit",
NULL
};
static const char *ramdacSymbols[] = {
"xf86CreateCursorInfoRec",
"xf86DestroyCursorInfoRec",
"xf86InitCursor",
NULL
};
static const char *ddcSymbols[] = {
"xf86PrintEDID",
"xf86DoEDID_DDC2",
"xf86SetDDCproperties",
NULL
};
static const char *vbeSymbols[] = {
"VBEInit",
"vbeFree",
"vbeDoEDID",
NULL
};
static const char *i2cSymbols[] = {
"xf86CreateI2CBusRec",
"xf86I2CBusInit",
NULL
};
static const char *shadowSymbols[] = {
"ShadowFBInit",
NULL
};
static const char *int10Symbols[] = {
"xf86FreeInt10",
"xf86InitInt10",
NULL
};
static const char *rivaSymbols[] = {
"RivaGetScrnInfoRec",
"RivaAvailableOptions",
NULL
};
const char *drmSymbols[] = {
"drmOpen",
"drmAddBufs",
"drmAddMap",
"drmAgpAcquire",
"drmAgpVersionMajor",
"drmAgpVersionMinor",
"drmAgpAlloc",
"drmAgpBind",
"drmAgpEnable",
"drmAgpFree",
"drmAgpRelease",
"drmAgpUnbind",
"drmAuthMagic",
"drmCommandNone",
"drmCommandWrite",
"drmCommandWriteRead",
"drmCreateContext",
"drmCtlInstHandler",
"drmCtlUninstHandler",
"drmDestroyContext",
"drmFreeVersion",
"drmGetInterruptFromBusID",
"drmGetLibVersion",
"drmGetVersion",
NULL
};
const char *driSymbols[] = {
"DRICloseScreen",
"DRICreateInfoRec",
"DRIDestroyInfoRec",
"DRIFinishScreenInit",
"DRIGetSAREAPrivate",
"DRILock",
"DRIQueryVersion",
"DRIScreenInit",
"DRIUnlock",
"GlxSetVisualConfigs",
"DRICreatePCIBusID",
NULL
};
static MODULESETUPPROTO(nouveauSetup);
static XF86ModuleVersionInfo nouveauVersRec =
{
"nouveau",
MODULEVENDORSTRING,
MODINFOSTRING1,
MODINFOSTRING2,
XORG_VERSION_CURRENT,
NV_MAJOR_VERSION, NV_MINOR_VERSION, NV_PATCHLEVEL,
ABI_CLASS_VIDEODRV, /* This is a video driver */
ABI_VIDEODRV_VERSION,
MOD_CLASS_VIDEODRV,
{0,0,0,0}
};
_X_EXPORT XF86ModuleData nouveauModuleData = { &nouveauVersRec, nouveauSetup, NULL };
/*
* This is intentionally screen-independent. It indicates the binding
* choice made in the first PreInit.
*/
static int pix24bpp = 0;
static Bool
NVGetRec(ScrnInfoPtr pScrn)
{
/*
* Allocate an NVRec, and hook it into pScrn->driverPrivate.
* pScrn->driverPrivate is initialised to NULL, so we can check if
* the allocation has already been done.
*/
if (pScrn->driverPrivate != NULL)
return TRUE;
pScrn->driverPrivate = xnfcalloc(sizeof(NVRec), 1);
/* Initialise it */
return TRUE;
}
static void
NVFreeRec(ScrnInfoPtr pScrn)
{
if (pScrn->driverPrivate == NULL)
return;
xfree(pScrn->driverPrivate);
pScrn->driverPrivate = NULL;
}
static Bool
NvCreateScreenResources (ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
NVPtr pNv = NVPTR(pScrn);
pScreen->CreateScreenResources = pNv->CreateScreenResources;
if (!(*pScreen->CreateScreenResources)(pScreen))
return FALSE;
if (!xf86RandR12CreateScreenResources (pScreen))
return FALSE;
return TRUE;
}
static pointer
nouveauSetup(pointer module, pointer opts, int *errmaj, int *errmin)
{
static Bool setupDone = FALSE;
/* This module should be loaded only once, but check to be sure. */
if (!setupDone) {
setupDone = TRUE;
xf86AddDriver(&NV, module, 0);
/*
* Modules that this driver always requires may be loaded here
* by calling LoadSubModule().
*/
/*
* Tell the loader about symbols from other modules that this module
* might refer to.
*/
LoaderRefSymLists(vgahwSymbols, xaaSymbols, exaSymbols, fbSymbols,
#ifdef XF86DRI
drmSymbols,
#endif
ramdacSymbols, shadowSymbols, rivaSymbols,
i2cSymbols, ddcSymbols, vbeSymbols,
int10Symbols, NULL);
/*
* The return value must be non-NULL on success even though there
* is no TearDownProc.
*/
return (pointer)1;
} else {
if (errmaj) *errmaj = LDR_ONCEONLY;
return NULL;
}
}
static const OptionInfoRec *
NVAvailableOptions(int chipid, int busid)
{
/* if(chipid == 0x12D20018) {
if (!xf86LoadOneModule("riva128", NULL)) {
return NULL;
} else
return RivaAvailableOptions(chipid, busid);
}*/
return NVOptions;
}
/* Mandatory */
static void
NVIdentify(int flags)
{
struct NvFamily *family;
size_t maxLen=0;
xf86DrvMsg(0, X_INFO, NV_NAME " driver " NV_DRIVER_DATE "\n");
xf86DrvMsg(0, X_INFO, NV_NAME " driver for NVIDIA chipset families :\n");
/* maximum length for alignment */
family = NVKnownFamilies;
while(family->name && family->chipset)
{
maxLen = max(maxLen, strlen(family->name));
family++;
}
/* display */
family = NVKnownFamilies;
while(family->name && family->chipset)
{
size_t len = strlen(family->name);
xf86ErrorF("\t%s", family->name);
while(len<maxLen+1)
{
xf86ErrorF(" ");
len++;
}
xf86ErrorF("(%s)\n", family->chipset);
family++;
}
}
static Bool
NVGetScrnInfoRec(PciChipsets *chips, int chip)
{
ScrnInfoPtr pScrn;
pScrn = xf86ConfigPciEntity(NULL, 0, chip,
chips, NULL, NULL, NULL,
NULL, NULL);
if(!pScrn) return FALSE;
pScrn->driverVersion = NV_VERSION;
pScrn->driverName = NV_DRIVER_NAME;
pScrn->name = NV_NAME;
pScrn->Probe = NVProbe;
pScrn->PreInit = NVPreInit;
pScrn->ScreenInit = NVScreenInit;
pScrn->SwitchMode = NVSwitchMode;
pScrn->AdjustFrame = NVAdjustFrame;
pScrn->EnterVT = NVEnterVT;
pScrn->LeaveVT = NVLeaveVT;
pScrn->FreeScreen = NVFreeScreen;
pScrn->ValidMode = NVValidMode;
return TRUE;
}
#define MAX_CHIPS MAXSCREENS
static CARD32
NVGetPCIXpressChip (pciVideoPtr pVideo)
{
volatile CARD32 *regs;
CARD32 pciid, pcicmd;
PCITAG Tag = ((pciConfigPtr)(pVideo->thisCard))->tag;
pcicmd = pciReadLong(Tag, PCI_CMD_STAT_REG);
pciWriteLong(Tag, PCI_CMD_STAT_REG, pcicmd | PCI_CMD_MEM_ENABLE);
regs = xf86MapPciMem(-1, VIDMEM_MMIO, Tag, pVideo->memBase[0], 0x2000);
pciid = regs[0x1800/4];
xf86UnMapVidMem(-1, (pointer)regs, 0x2000);
pciWriteLong(Tag, PCI_CMD_STAT_REG, pcicmd);
if((pciid & 0x0000ffff) == 0x000010DE)
pciid = 0x10DE0000 | (pciid >> 16);
else
if((pciid & 0xffff0000) == 0xDE100000) /* wrong endian */
pciid = 0x10DE0000 | ((pciid << 8) & 0x0000ff00) |
((pciid >> 8) & 0x000000ff);
return pciid;
}
/* Mandatory */
static Bool
NVProbe(DriverPtr drv, int flags)
{
int i;
GDevPtr *devSections;
int *usedChips;
SymTabRec NVChipsets[MAX_CHIPS + 1];
PciChipsets NVPciChipsets[MAX_CHIPS + 1];
pciVideoPtr *ppPci;
int numDevSections;
int numUsed;
Bool foundScreen = FALSE;
if ((numDevSections = xf86MatchDevice(NV_DRIVER_NAME, &devSections)) <= 0)
return FALSE; /* no matching device section */
if (!(ppPci = xf86GetPciVideoInfo()))
return FALSE; /* no PCI cards found */
numUsed = 0;
/* Create the NVChipsets and NVPciChipsets from found devices */
while (*ppPci && (numUsed < MAX_CHIPS)) {
if(((*ppPci)->vendor == PCI_VENDOR_NVIDIA_SGS) ||
((*ppPci)->vendor == PCI_VENDOR_NVIDIA))
{
SymTabRec *nvchips = NVKnownChipsets;
int pciid = ((*ppPci)->vendor << 16) | (*ppPci)->chipType;
int token = pciid;
if(((token & 0xfff0) == CHIPSET_MISC_BRIDGED) ||
((token & 0xfff0) == CHIPSET_G73_BRIDGED))
{
token = NVGetPCIXpressChip(*ppPci);
}
while(nvchips->name) {
if(token == nvchips->token)
break;
nvchips++;
}
if(nvchips->name) { /* found one */
NVChipsets[numUsed].token = pciid;
NVChipsets[numUsed].name = nvchips->name;
NVPciChipsets[numUsed].numChipset = pciid;
NVPciChipsets[numUsed].PCIid = pciid;
NVPciChipsets[numUsed].resList = RES_SHARED_VGA;
numUsed++;
} else if ((*ppPci)->vendor == PCI_VENDOR_NVIDIA) {
/* look for a compatible devices which may be newer than
the NVKnownChipsets list above. */
switch(token & 0xfff0) {
case CHIPSET_NV17:
case CHIPSET_NV18:
case CHIPSET_NV25:
case CHIPSET_NV28:
case CHIPSET_NV30:
case CHIPSET_NV31:
case CHIPSET_NV34:
case CHIPSET_NV35:
case CHIPSET_NV36:
case CHIPSET_NV40:
case CHIPSET_NV41:
case 0x0120:
case CHIPSET_NV43:
case CHIPSET_NV44:
case 0x0130:
case CHIPSET_G72:
case CHIPSET_G70:
case CHIPSET_NV45:
case CHIPSET_NV44A:
case 0x0230:
case CHIPSET_G71:
case CHIPSET_G73:
case CHIPSET_C512:
NVChipsets[numUsed].token = pciid;
NVChipsets[numUsed].name = "Unknown NVIDIA chip";
NVPciChipsets[numUsed].numChipset = pciid;
NVPciChipsets[numUsed].PCIid = pciid;
NVPciChipsets[numUsed].resList = RES_SHARED_VGA;
numUsed++;
break;
default: break; /* we don't recognize it */
}
}
}
ppPci++;
}
/* terminate the list */
NVChipsets[numUsed].token = -1;
NVChipsets[numUsed].name = NULL;
NVPciChipsets[numUsed].numChipset = -1;
NVPciChipsets[numUsed].PCIid = -1;
NVPciChipsets[numUsed].resList = RES_UNDEFINED;
numUsed = xf86MatchPciInstances(NV_NAME, 0, NVChipsets, NVPciChipsets,
devSections, numDevSections, drv,
&usedChips);
if (numUsed <= 0)
return FALSE;
if (flags & PROBE_DETECT)
foundScreen = TRUE;
else for (i = 0; i < numUsed; i++) {
pciVideoPtr pPci;
pPci = xf86GetPciInfoForEntity(usedChips[i]);
if(NVGetScrnInfoRec(NVPciChipsets, usedChips[i]))
foundScreen = TRUE;
}
xfree(devSections);
xfree(usedChips);
return foundScreen;
}
/* Usually mandatory */
Bool
NVSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
NVPtr pNv = NVPTR(pScrn);
Bool ret = TRUE;
NVFBLayout *pLayout = &pNv->CurrentLayout;
if (pLayout->mode != mode) {
if (!NVSetMode(pScrn, mode, RR_Rotate_0))
ret = FALSE;
}
pLayout->mode = mode;
return ret;
}
/*
* This function is used to initialize the Start Address - the first
* displayed location in the video memory.
*/
/* Usually mandatory */
void
NVAdjustFrame(int scrnIndex, int x, int y, int flags)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
int startAddr;
NVPtr pNv = NVPTR(pScrn);
NVFBLayout *pLayout = &pNv->CurrentLayout;
xf86CrtcPtr crtc = config->output[config->compat_output]->crtc;
if (crtc && crtc->enabled) {
NVCrtcSetBase(crtc, x, y);
}
}
void
NVResetCrtcConfig(ScrnInfoPtr pScrn, int set)
{
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
NVPtr pNv = NVPTR(pScrn);
int i;
CARD32 val = 0;
for (i = 0; i < config->num_crtc; i++) {
xf86CrtcPtr crtc = config->crtc[i];
NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
if (set) {
NVCrtcRegPtr regp;
regp = &pNv->ModeReg.crtc_reg[nv_crtc->crtc];
val = regp->head;
}
nvWriteCRTC(pNv, nv_crtc->crtc, NV_CRTC_FSEL, val);
}
}
/*
* This is called when VT switching back to the X server. Its job is
* to reinitialise the video mode.
*
* We may wish to unmap video/MMIO memory too.
*/
/* Mandatory */
static Bool
NVEnterVT(int scrnIndex, int flags)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
NVPtr pNv = NVPTR(pScrn);
int i;
/* Save the current state */
if (pNv->SaveGeneration != serverGeneration) {
pNv->SaveGeneration = serverGeneration;
NVSave(pScrn);
}
NVInitTimer(pScrn);
NVInitSurface(pScrn, &pNv->SavedReg);
NVInitGraphContext(pScrn);
pScrn->vtSema = TRUE;
NVResetCrtcConfig(pScrn, 0);
if (!xf86SetDesiredModes(pScrn));
return FALSE;
NVResetCrtcConfig(pScrn, 1);
pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
if(pNv->overlayAdaptor)
NVResetVideo(pScrn);
return TRUE;
}
/*
* This is called when VT switching away from the X server. Its job is
* to restore the previous (text) mode.
*
* We may wish to remap video/MMIO memory too.
*/
/* Mandatory */
static void
NVLeaveVT(int scrnIndex, int flags)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
NVPtr pNv = NVPTR(pScrn);
NVSync(pScrn);
NVRestore(pScrn);
}
static void
NVBlockHandler (
int i,
pointer blockData,
pointer pTimeout,
pointer pReadmask
)
{
ScreenPtr pScreen = screenInfo.screens[i];
ScrnInfoPtr pScrnInfo = xf86Screens[i];
NVPtr pNv = NVPTR(pScrnInfo);
if (pNv->DMAKickoffCallback)
(*pNv->DMAKickoffCallback)(pNv);
pScreen->BlockHandler = pNv->BlockHandler;
(*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
pScreen->BlockHandler = NVBlockHandler;
if (pNv->VideoTimerCallback)
(*pNv->VideoTimerCallback)(pScrnInfo, currentTime.milliseconds);
}
/*
* This is called at the end of each server generation. It restores the
* original (text) mode. It should also unmap the video memory, and free
* any per-generation data allocated by the driver. It should finish
* by unwrapping and calling the saved CloseScreen function.
*/
/* Mandatory */
static Bool
NVCloseScreen(int scrnIndex, ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
NVPtr pNv = NVPTR(pScrn);
if (pScrn->vtSema) {
pScrn->vtSema = FALSE;
NVSync(pScrn);
NVRestore(pScrn);
}
NVUnmapMem(pScrn);
vgaHWUnmapMem(pScrn);
if (pNv->AccelInfoRec)
XAADestroyInfoRec(pNv->AccelInfoRec);
if (pNv->CursorInfoRec)
xf86DestroyCursorInfoRec(pNv->CursorInfoRec);
if (pNv->ShadowPtr)
xfree(pNv->ShadowPtr);
if (pNv->overlayAdaptor)
xfree(pNv->overlayAdaptor);
if (pNv->blitAdaptor)
xfree(pNv->blitAdaptor);
pScreen->CloseScreen = pNv->CloseScreen;
pScreen->BlockHandler = pNv->BlockHandler;
return (*pScreen->CloseScreen)(scrnIndex, pScreen);
}
/* Free up any persistent data structures */
/* Optional */
static void
NVFreeScreen(int scrnIndex, int flags)
{
/*
* This only gets called when a screen is being deleted. It does not
* get called routinely at the end of a server generation.
*/
if (xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
vgaHWFreeHWRec(xf86Screens[scrnIndex]);
NVFreeRec(xf86Screens[scrnIndex]);
}
/* Checks if a mode is suitable for the selected chipset. */
/* Optional */
static ModeStatus
NVValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
{
NVPtr pNv = NVPTR(xf86Screens[scrnIndex]);
if(pNv->fpWidth && pNv->fpHeight)
if((pNv->fpWidth < mode->HDisplay) || (pNv->fpHeight < mode->VDisplay))
return (MODE_PANEL);
return (MODE_OK);
}
static void
nvProbeDDC(ScrnInfoPtr pScrn, int index)
{
vbeInfoPtr pVbe;
if (xf86LoadSubModule(pScrn, "vbe")) {
pVbe = VBEInit(NULL,index);
ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
vbeFree(pVbe);
}
}
Bool NVI2CInit(ScrnInfoPtr pScrn)
{
char *mod = "i2c";
if (xf86LoadSubModule(pScrn, mod)) {
xf86LoaderReqSymLists(i2cSymbols,NULL);
mod = "ddc";
if(xf86LoadSubModule(pScrn, mod)) {
xf86LoaderReqSymLists(ddcSymbols, NULL);
return TRUE;
}
}
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Couldn't load %s module. DDC probing can't be done\n", mod);
return FALSE;
}
static Bool NVPreInitDRI(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
if (!NVDRIGetVersion(pScrn))
return FALSE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[dri] Found DRI library version %d.%d.%d and kernel"
" module version %d.%d.%d\n",
pNv->pLibDRMVersion->version_major,
pNv->pLibDRMVersion->version_minor,
pNv->pLibDRMVersion->version_patchlevel,
pNv->pKernelDRMVersion->version_major,
pNv->pKernelDRMVersion->version_minor,
pNv->pKernelDRMVersion->version_patchlevel);
return TRUE;
}
static Bool
nv_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
{
scrn->virtualX = width;
scrn->virtualY = height;
return TRUE;
}
static const xf86CrtcConfigFuncsRec nv_xf86crtc_config_funcs = {
nv_xf86crtc_resize
};
/* Mandatory */
Bool
NVPreInit(ScrnInfoPtr pScrn, int flags)
{
xf86CrtcConfigPtr xf86_config;
NVPtr pNv;
MessageType from;
int i, max_width, max_height;
ClockRangePtr clockRanges;
const char *s;
int num_crtc;
if (flags & PROBE_DETECT) {
EntityInfoPtr pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
if (!pEnt)
return FALSE;
i = pEnt->index;
xfree(pEnt);
nvProbeDDC(pScrn, i);
return TRUE;
}
/*
* Note: This function is only called once at server startup, and
* not at the start of each server generation. This means that
* only things that are persistent across server generations can
* be initialised here. xf86Screens[] is (pScrn is a pointer to one
* of these). Privates allocated using xf86AllocateScrnInfoPrivateIndex()
* are too, and should be used for data that must persist across
* server generations.
*
* Per-generation data should be allocated with
* AllocateScreenPrivateIndex() from the ScreenInit() function.
*/
/* Check the number of entities, and fail if it isn't one. */
if (pScrn->numEntities != 1)
return FALSE;
/* Allocate the NVRec driverPrivate */
if (!NVGetRec(pScrn)) {
return FALSE;
}
pNv = NVPTR(pScrn);
/* Get the entity, and make sure it is PCI. */
pNv->pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
if (pNv->pEnt->location.type != BUS_PCI)
return FALSE;
/* Find the PCI info for this screen */
pNv->PciInfo = xf86GetPciInfoForEntity(pNv->pEnt->index);
pNv->PciTag = pciTag(pNv->PciInfo->bus, pNv->PciInfo->device,
pNv->PciInfo->func);
pNv->Primary = xf86IsPrimaryPci(pNv->PciInfo);
/* Initialize the card through int10 interface if needed */
if (xf86LoadSubModule(pScrn, "int10")) {
xf86LoaderReqSymLists(int10Symbols, NULL);
#if !defined(__alpha__) && !defined(__powerpc__)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Initializing int10\n");
pNv->pInt = xf86InitInt10(pNv->pEnt->index);
#endif
}
xf86SetOperatingState(resVgaIo, pNv->pEnt->index, ResUnusedOpr);
xf86SetOperatingState(resVgaMem, pNv->pEnt->index, ResDisableOpr);
/* Set pScrn->monitor */
pScrn->monitor = pScrn->confScreen->monitor;
/*
* Set the Chipset and ChipRev, allowing config file entries to
* override.
*/
if (pNv->pEnt->device->chipset && *pNv->pEnt->device->chipset) {
pScrn->chipset = pNv->pEnt->device->chipset;
pNv->Chipset = xf86StringToToken(NVKnownChipsets, pScrn->chipset);
from = X_CONFIG;
} else if (pNv->pEnt->device->chipID >= 0) {
pNv->Chipset = pNv->pEnt->device->chipID;
pScrn->chipset = (char *)xf86TokenToString(NVKnownChipsets,
pNv->Chipset);
from = X_CONFIG;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
pNv->Chipset);
} else {
from = X_PROBED;
pNv->Chipset = (pNv->PciInfo->vendor << 16) | pNv->PciInfo->chipType;
if(((pNv->Chipset & 0xfff0) == CHIPSET_MISC_BRIDGED) ||
((pNv->Chipset & 0xfff0) == CHIPSET_G73_BRIDGED))
{
pNv->Chipset = NVGetPCIXpressChip(pNv->PciInfo);
}
pScrn->chipset = (char *)xf86TokenToString(NVKnownChipsets,
pNv->Chipset);
if(!pScrn->chipset)
pScrn->chipset = "Unknown NVIDIA chipset";
}
if (pNv->pEnt->device->chipRev >= 0) {
pNv->ChipRev = pNv->pEnt->device->chipRev;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
pNv->ChipRev);
} else {
pNv->ChipRev = pNv->PciInfo->chipRev;
}
/*
* This shouldn't happen because such problems should be caught in
* NVProbe(), but check it just in case.
*/
if (pScrn->chipset == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"ChipID 0x%04X is not recognised\n", pNv->Chipset);
xf86FreeInt10(pNv->pInt);
return FALSE;
}
if (pNv->Chipset < 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Chipset \"%s\" is not recognised\n", pScrn->chipset);
xf86FreeInt10(pNv->pInt);
return FALSE;
}
xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset);
/*
* The first thing we should figure out is the depth, bpp, etc.
*/
if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) {
xf86FreeInt10(pNv->pInt);
return FALSE;
} else {
/* Check that the returned depth is one we support */
switch (pScrn->depth) {
case 8:
case 15:
case 16:
case 24:
/* OK */
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Given depth (%d) is not supported by this driver\n",
pScrn->depth);
xf86FreeInt10(pNv->pInt);
return FALSE;
}
}
xf86PrintDepthBpp(pScrn);
/* Get the depth24 pixmap format */
if (pScrn->depth == 24 && pix24bpp == 0)
pix24bpp = xf86GetBppFromDepth(pScrn, 24);
/*
* This must happen after pScrn->display has been set because
* xf86SetWeight references it.
*/
if (pScrn->depth > 8) {
/* The defaults are OK for us */
rgb zeros = {0, 0, 0};
if (!xf86SetWeight(pScrn, zeros, zeros)) {
xf86FreeInt10(pNv->pInt);
return FALSE;
}
}
if (!xf86SetDefaultVisual(pScrn, -1)) {
xf86FreeInt10(pNv->pInt);
return FALSE;
} else {
/* We don't currently support DirectColor at > 8bpp */
if (pScrn->depth > 8 && (pScrn->defaultVisual != TrueColor)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual"
" (%s) is not supported at depth %d\n",
xf86GetVisualName(pScrn->defaultVisual), pScrn->depth);
xf86FreeInt10(pNv->pInt);
return FALSE;
}
}
/* The vgahw module should be loaded here when needed */
if (!xf86LoadSubModule(pScrn, "vgahw")) {
xf86FreeInt10(pNv->pInt);
return FALSE;
}
xf86LoaderReqSymLists(vgahwSymbols, NULL);
/*
* Allocate a vgaHWRec
*/
if (!vgaHWGetHWRec(pScrn)) {
xf86FreeInt10(pNv->pInt);
return FALSE;
}
/* We use a programmable clock */
pScrn->progClock = TRUE;
/* Collect all of the relevant option flags (fill in pScrn->options) */
xf86CollectOptions(pScrn, NULL);
/* Process the options */
if (!(pNv->Options = xalloc(sizeof(NVOptions))))
return FALSE;
memcpy(pNv->Options, NVOptions, sizeof(NVOptions));
xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pNv->Options);
/* Set the bits per RGB for 8bpp mode */
if (pScrn->depth == 8)
pScrn->rgbBits = 8;
from = X_DEFAULT;
pNv->HWCursor = TRUE;
/*
* The preferred method is to use the "hw cursor" option as a tri-state
* option, with the default set above.
*/
if (xf86GetOptValBool(pNv->Options, OPTION_HW_CURSOR, &pNv->HWCursor)) {
from = X_CONFIG;
}
/* For compatibility, accept this too (as an override) */
if (xf86ReturnOptValBool(pNv->Options, OPTION_SW_CURSOR, FALSE)) {
from = X_CONFIG;
pNv->HWCursor = FALSE;
}
xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n",
pNv->HWCursor ? "HW" : "SW");
pNv->FpScale = TRUE;
if (xf86GetOptValBool(pNv->Options, OPTION_FP_SCALE, &pNv->FpScale)) {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Flat panel scaling %s\n",
pNv->FpScale ? "on" : "off");
}
if (xf86ReturnOptValBool(pNv->Options, OPTION_NOACCEL, FALSE)) {
pNv->NoAccel = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n");
}
if (xf86ReturnOptValBool(pNv->Options, OPTION_SHADOW_FB, FALSE)) {
pNv->ShadowFB = TRUE;
pNv->NoAccel = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Using \"Shadow Framebuffer\" - acceleration disabled\n");
}
if (!pNv->NoAccel) {
from = X_DEFAULT;
pNv->useEXA = TRUE;
if((s = (char *)xf86GetOptValString(pNv->Options, OPTION_ACCELMETHOD))) {
if(!xf86NameCmp(s,"XAA")) {
from = X_CONFIG;
pNv->useEXA = FALSE;
} else if(!xf86NameCmp(s,"EXA")) {
from = X_CONFIG;
pNv->useEXA = TRUE;
}
}
xf86DrvMsg(pScrn->scrnIndex, from, "Using %s acceleration method\n", pNv->useEXA ? "EXA" : "XAA");
} else {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n");
}
pNv->Rotate = 0;
pNv->RandRRotation = FALSE;
if ((s = xf86GetOptValString(pNv->Options, OPTION_ROTATE))) {
if(!xf86NameCmp(s, "CW")) {
pNv->ShadowFB = TRUE;
pNv->NoAccel = TRUE;
pNv->HWCursor = FALSE;
pNv->Rotate = 1;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Rotating screen clockwise - acceleration disabled\n");
} else
if(!xf86NameCmp(s, "CCW")) {
pNv->ShadowFB = TRUE;
pNv->NoAccel = TRUE;
pNv->HWCursor = FALSE;
pNv->Rotate = -1;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Rotating screen counter clockwise - acceleration disabled\n");
} else
if(!xf86NameCmp(s, "RandR")) {
#ifdef RANDR
pNv->ShadowFB = TRUE;
pNv->NoAccel = TRUE;
pNv->HWCursor = FALSE;
pNv->RandRRotation = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Using RandR rotation - acceleration disabled\n");
#else
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"This driver was not compiled with support for the Resize and "
"Rotate extension. Cannot honor 'Option \"Rotate\" "
"\"RandR\"'.\n");
#endif
} else {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"\"%s\" is not a valid value for Option \"Rotate\"\n", s);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Valid options are \"CW\", \"CCW\", and \"RandR\"\n");
}
}
if(xf86GetOptValInteger(pNv->Options, OPTION_VIDEO_KEY, &(pNv->videoKey))) {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "video key set to 0x%x\n",
pNv->videoKey);
} else {
pNv->videoKey = (1 << pScrn->offset.red) |
(1 << pScrn->offset.green) |
(((pScrn->mask.blue >> pScrn->offset.blue) - 1) << pScrn->offset.blue);
}
if (xf86GetOptValBool(pNv->Options, OPTION_FLAT_PANEL, &(pNv->FlatPanel))) {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "forcing %s usage\n",
pNv->FlatPanel ? "DFP" : "CRTC");
} else {
pNv->FlatPanel = -1; /* autodetect later */
}
pNv->FPDither = FALSE;
if (xf86GetOptValBool(pNv->Options, OPTION_FP_DITHER, &(pNv->FPDither)))
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "enabling flat panel dither\n");
if (xf86GetOptValInteger(pNv->Options, OPTION_CRTC_NUMBER,
&pNv->CRTCnumber))
{
if((pNv->CRTCnumber < 0) || (pNv->CRTCnumber > 1)) {
pNv->CRTCnumber = -1;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Invalid CRTC number. Must be 0 or 1\n");
}
} else {
pNv->CRTCnumber = -1; /* autodetect later */
}
if (xf86GetOptValInteger(pNv->Options, OPTION_FP_TWEAK,
&pNv->PanelTweak))
{
pNv->usePanelTweak = TRUE;
} else {
pNv->usePanelTweak = FALSE;
}
if (pNv->pEnt->device->MemBase != 0) {
/* Require that the config file value matches one of the PCI values. */
if (!xf86CheckPciMemBase(pNv->PciInfo, pNv->pEnt->device->MemBase)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"MemBase 0x%08lX doesn't match any PCI base register.\n",
pNv->pEnt->device->MemBase);
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
pNv->VRAMPhysical = pNv->pEnt->device->MemBase;
from = X_CONFIG;
} else {
if (pNv->PciInfo->memBase[1] != 0) {
pNv->VRAMPhysical = pNv->PciInfo->memBase[1] & 0xff800000;
from = X_PROBED;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"No valid FB address in PCI config space\n");
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
}
xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
(unsigned long)pNv->VRAMPhysical);
if (pNv->pEnt->device->IOBase != 0) {
/* Require that the config file value matches one of the PCI values. */
if (!xf86CheckPciMemBase(pNv->PciInfo, pNv->pEnt->device->IOBase)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"IOBase 0x%08lX doesn't match any PCI base register.\n",
pNv->pEnt->device->IOBase);
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
pNv->IOAddress = pNv->pEnt->device->IOBase;
from = X_CONFIG;
} else {
if (pNv->PciInfo->memBase[0] != 0) {
pNv->IOAddress = pNv->PciInfo->memBase[0] & 0xffffc000;
from = X_PROBED;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"No valid MMIO address in PCI config space\n");
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
}
xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n",
(unsigned long)pNv->IOAddress);
if (xf86RegisterResources(pNv->pEnt->index, NULL, ResExclusive)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"xf86RegisterResources() found resource conflicts\n");
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
switch (pNv->Chipset & 0x0ff0) {
case CHIPSET_NV03: /* Riva128 */
pNv->Architecture = NV_ARCH_03;
break;
case CHIPSET_NV04: /* TNT/TNT2 */
pNv->Architecture = NV_ARCH_04;
break;
case CHIPSET_NV10: /* GeForce 256 */
case CHIPSET_NV11: /* GeForce2 MX */
case CHIPSET_NV15: /* GeForce2 */
case CHIPSET_NV17: /* GeForce4 MX */
case CHIPSET_NV18: /* GeForce4 MX (8x AGP) */
case CHIPSET_NFORCE: /* nForce */
case CHIPSET_NFORCE2:/* nForce2 */
pNv->Architecture = NV_ARCH_10;
break;
case CHIPSET_NV20: /* GeForce3 */
case CHIPSET_NV25: /* GeForce4 Ti */
case CHIPSET_NV28: /* GeForce4 Ti (8x AGP) */
pNv->Architecture = NV_ARCH_20;
break;
case CHIPSET_NV30: /* GeForceFX 5800 */
case CHIPSET_NV31: /* GeForceFX 5600 */
case CHIPSET_NV34: /* GeForceFX 5200 */
case CHIPSET_NV35: /* GeForceFX 5900 */
case CHIPSET_NV36: /* GeForceFX 5700 */
pNv->Architecture = NV_ARCH_30;
break;
case CHIPSET_NV40: /* GeForce 6800 */
case CHIPSET_NV41: /* GeForce 6800 */
case 0x0120: /* GeForce 6800 */
case CHIPSET_NV43: /* GeForce 6600 */
case CHIPSET_NV44: /* GeForce 6200 */
case CHIPSET_G72: /* GeForce 7200, 7300, 7400 */
case CHIPSET_G70: /* GeForce 7800 */
case CHIPSET_NV45: /* GeForce 6800 */
case CHIPSET_NV44A: /* GeForce 6200 */
case CHIPSET_G71: /* GeForce 7900 */
case CHIPSET_G73: /* GeForce 7600 */
case CHIPSET_C51: /* GeForce 6100 */
case CHIPSET_C512: /* Geforce 6100 (nForce 4xx) */
pNv->Architecture = NV_ARCH_40;
break;
default: /* Unknown, probably >=NV40 */
pNv->Architecture = NV_ARCH_40;
break;
}
pNv->alphaCursor = (pNv->Architecture >= NV_ARCH_10) &&
((pNv->Chipset & 0x0ff0) != CHIPSET_NV10);
/* Allocate an xf86CrtcConfig */
xf86CrtcConfigInit (pScrn, &nv_xf86crtc_config_funcs);
xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
max_width = 16384;
xf86CrtcSetSizeRange (pScrn, 320, 200, max_width, 2048);
if (NVPreInitDRI(pScrn) == FALSE) {
xf86FreeInt10(pNv->pInt);
return FALSE;
}
NVCommonSetup(pScrn);
NVI2CInit(pScrn);
num_crtc = pNv->twoHeads ? 2 : 1;
for (i = 0; i < num_crtc; i++) {
nv_crtc_init(pScrn, i);
}
NvSetupOutputs(pScrn);
/* Do an initial detection of the outputs while none are configured on yet.
* This will give us some likely legitimate response for later if both
* pipes are already allocated and we're asked to do a detect.
*/
for (i = 0; i < xf86_config->num_output; i++) {
xf86OutputPtr output = xf86_config->output[i];
output->status = (*output->funcs->detect) (output);
}
if (!xf86InitialConfiguration (pScrn, FALSE)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes.\n");
return FALSE;
}
pScrn->videoRam = pNv->RamAmountKBytes;
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "VideoRAM: %d kBytes\n",
pScrn->videoRam);
pNv->VRAMPhysicalSize = pScrn->videoRam * 1024;
/*
* If the driver can do gamma correction, it should call xf86SetGamma()
* here.
*/
{
Gamma zeros = {0.0, 0.0, 0.0};
if (!xf86SetGamma(pScrn, zeros)) {
xf86FreeInt10(pNv->pInt);
return FALSE;
}
}
/*
* Setup the ClockRanges, which describe what clock ranges are available,
* and what sort of modes they can be used for.
*/
clockRanges = xnfcalloc(sizeof(ClockRange), 1);
clockRanges->next = NULL;
clockRanges->minClock = pNv->MinVClockFreqKHz;
clockRanges->maxClock = pNv->MaxVClockFreqKHz;
clockRanges->clockIndex = -1; /* programmable */
clockRanges->doubleScanAllowed = TRUE;
if((pNv->Architecture == NV_ARCH_20) ||
((pNv->Architecture == NV_ARCH_10) &&
((pNv->Chipset & 0x0ff0) != CHIPSET_NV10) &&
((pNv->Chipset & 0x0ff0) != CHIPSET_NV15)))
{
/* HW is broken */
clockRanges->interlaceAllowed = FALSE;
} else {
clockRanges->interlaceAllowed = TRUE;
}
if(pNv->FlatPanel == 1) {
clockRanges->interlaceAllowed = FALSE;
clockRanges->doubleScanAllowed = FALSE;
}
if(pNv->Architecture < NV_ARCH_10) {
max_width = (pScrn->bitsPerPixel > 16) ? 2032 : 2048;
max_height = 2048;
} else {
max_width = (pScrn->bitsPerPixel > 16) ? 4080 : 4096;
max_height = 4096;
}
/*
* xf86ValidateModes will check that the mode HTotal and VTotal values
* don't exceed the chipset's limit if pScrn->maxHValue and
* pScrn->maxVValue are set. Since our NVValidMode() already takes
* care of this, we don't worry about setting them here.
*/
i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
pScrn->display->modes, clockRanges,
NULL, 256, max_width,
512, 128, max_height,
pScrn->display->virtualX,
pScrn->display->virtualY,
pNv->VRAMPhysicalSize / 2,
LOOKUP_BEST_REFRESH);
if (i == -1) {
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
/* Prune the modes marked as invalid */
xf86PruneDriverModes(pScrn);
if (i == 0 || pScrn->modes == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n");
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
/*
* Set the CRTC parameters for all of the modes based on the type
* of mode, and the chipset's interlace requirements.
*
* Calling this is required if the mode->Crtc* values are used by the
* driver and if the driver doesn't provide code to set them. They
* are not pre-initialised at all.
*/
xf86SetCrtcForModes(pScrn, 0);
/* Set the current mode to the first in the list */
pScrn->currentMode = pScrn->modes;
/* Print the list of modes being used */
xf86PrintModes(pScrn);
/* Set display resolution */
xf86SetDpi(pScrn, 0, 0);
/*
* XXX This should be taken into account in some way in the mode valdation
* section.
*/
if (xf86LoadSubModule(pScrn, "fb") == NULL) {
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(fbSymbols, NULL);
/* Load XAA if needed */
if (!pNv->NoAccel) {
if (!xf86LoadSubModule(pScrn, pNv->useEXA ? "exa" : "xaa")) {
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(xaaSymbols, NULL);
}
/* Load ramdac if needed */
if (pNv->HWCursor) {
if (!xf86LoadSubModule(pScrn, "ramdac")) {
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(ramdacSymbols, NULL);
}
/* Load shadowfb if needed */
if (pNv->ShadowFB) {
if (!xf86LoadSubModule(pScrn, "shadowfb")) {
xf86FreeInt10(pNv->pInt);
NVFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(shadowSymbols, NULL);
}
pNv->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel;
pNv->CurrentLayout.depth = pScrn->depth;
pNv->CurrentLayout.displayWidth = pScrn->displayWidth;
pNv->CurrentLayout.weight.red = pScrn->weight.red;
pNv->CurrentLayout.weight.green = pScrn->weight.green;
pNv->CurrentLayout.weight.blue = pScrn->weight.blue;
pNv->CurrentLayout.mode = pScrn->currentMode;
if (!xf86RandR12PreInit (pScrn))
{
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "RandR initialization failure\n");
PreInitCleanup(pScrn);
return FALSE;
}
if (pScrn->modes == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No modes.\n");
PreInitCleanup(pScrn);
return FALSE;
}
pScrn->currentMode = pScrn->modes;
xf86FreeInt10(pNv->pInt);
pNv->pInt = NULL;
return TRUE;
}
/*
* Map the framebuffer and MMIO memory.
*/
static Bool
NVMapMem(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
pNv->FB = NVAllocateMemory(pNv, NOUVEAU_MEM_FB, pNv->VRAMPhysicalSize/2);
if (!pNv->FB) {
ErrorF("Failed to allocate memory for framebuffer!\n");
return FALSE;
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Allocated %dMiB VRAM for framebuffer + offscreen pixmaps at %08X\n",
pNv->FB->size >> 20, pNv->FB->offset
);
/*XXX: have to get these after we've allocated something, otherwise
* they're uninitialised in the DRM!
*/
pNv->VRAMSize = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_FB_SIZE);
pNv->VRAMPhysical = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_FB_PHYSICAL);
pNv->AGPSize = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_AGP_SIZE);
pNv->AGPPhysical = NVDRMGetParam(pNv, NOUVEAU_GETPARAM_AGP_PHYSICAL);
if (pNv->AGPSize) {
int gart_scratch_size;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "AGP: %dMiB available\n",
(unsigned int)pNv->AGPSize >> 20);
if (pNv->AGPSize > (16*1024*1024))
gart_scratch_size = 16*1024*1024;
else
gart_scratch_size = pNv->AGPSize;
pNv->AGPScratch = NVAllocateMemory(pNv, NOUVEAU_MEM_AGP,
gart_scratch_size);
if (!pNv->AGPScratch)
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Unable to allocate AGP memory\n");
else
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"AGP: mapped %dMiB at %p\n",
(unsigned int)pNv->AGPScratch->size>>20,
pNv->AGPScratch->map);
}
pNv->Cursor = NVAllocateMemory(pNv, NOUVEAU_MEM_FB, 64*1024);
if (!pNv->Cursor) {
ErrorF("Failed to allocate memory for hardware cursor\n");
return FALSE;
}
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Allocated %dKiB VRAM for cursor\n",
pNv->Cursor->size >> 10
);
pNv->ScratchBuffer = NVAllocateMemory(pNv, NOUVEAU_MEM_FB,
pNv->Architecture <NV_ARCH_10 ? 8192 : 16384);
if (!pNv->ScratchBuffer) {
ErrorF("Failed to allocate memory for scratch buffer\n");
return FALSE;
}
return TRUE;
}
/*
* Unmap the framebuffer and MMIO memory.
*/
static Bool
NVUnmapMem(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
NVFreeMemory(pNv, pNv->FB);
NVFreeMemory(pNv, pNv->ScratchBuffer);
NVFreeMemory(pNv, pNv->Cursor);
return TRUE;
}
/*
* Initialise a new mode.
*/
/*
* Restore the initial (text) mode.
*/
static void
NVRestore(ScrnInfoPtr pScrn)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
vgaRegPtr vgaReg = &hwp->SavedReg;
NVPtr pNv = NVPTR(pScrn);
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
NVRegPtr nvReg = &pNv->SavedReg;
int i;
int vgaflags = VGA_SR_CMAP | VGA_SR_MODE;
NVCrtcLockUnlock(xf86_config->crtc[0], 0);
NVCrtcLockUnlock(xf86_config->crtc[1], 0);
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86_config->crtc[i]->funcs->restore(xf86_config->crtc[i]);
}
for (i = 0; i< xf86_config->num_output; i++) {
xf86_config->output[i]->funcs->restore(xf86_config->output[i]);
}
#ifndef __powerpc__
vgaflags |= VGA_SR_FONTS;
#endif
vgaHWRestore(pScrn, vgaReg, vgaflags);
vgaHWLock(hwp);
NVCrtcLockUnlock(xf86_config->crtc[0], 1);
NVCrtcLockUnlock(xf86_config->crtc[1], 1);
}
#define DEPTH_SHIFT(val, w) ((val << (8 - w)) | (val >> ((w << 1) - 8)))
#define MAKE_INDEX(in, w) (DEPTH_SHIFT(in, w) * 3)
static void
NVLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
LOCO * colors, VisualPtr pVisual)
{
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int c;
NVPtr pNv = NVPTR(pScrn);
int i, index;
for (c = 0; c < xf86_config->num_crtc; c++){
xf86CrtcPtr crtc = xf86_config->crtc[c];
NVCrtcPrivatePtr nv_crtc = crtc->driver_private;
NVCrtcRegPtr regp;
regp = &pNv->ModeReg.crtc_reg[nv_crtc->crtc];
if (crtc->enabled == 0)
continue;
switch(pNv->CurrentLayout.depth) {
case 15:
for(i = 0; i < numColors; i++) {
index = indices[i];
regp->DAC[MAKE_INDEX(index, 5) + 0] = colors[index].red;
regp->DAC[MAKE_INDEX(index, 5) + 1] = colors[index].green;
regp->DAC[MAKE_INDEX(index, 5) + 2] = colors[index].blue;
}
break;
case 16:
for(i = 0; i < numColors; i++) {
index = indices[i];
regp->DAC[MAKE_INDEX(index, 6) + 1] = colors[index].green;
if(index < 32) {
regp->DAC[MAKE_INDEX(index, 5) + 0] = colors[index].red;
regp->DAC[MAKE_INDEX(index, 5) + 2] = colors[index].blue;
}
}
break;
default:
for(i = 0; i < numColors; i++) {
index = indices[i];
regp->DAC[index*3] = colors[index].red;
regp->DAC[(index*3)+1] = colors[index].green;
regp->DAC[(index*3)+2] = colors[index].blue;
}
break;
}
NVCrtcLoadPalette(crtc);
}
}
/* Mandatory */
/* This gets called at the start of each server generation */
static Bool
NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
{
ScrnInfoPtr pScrn;
vgaHWPtr hwp;
NVPtr pNv;
int ret;
VisualPtr visual;
unsigned char *FBStart;
int width, height, displayWidth, offscreenHeight, shadowHeight;
BoxRec AvailFBArea;
/*
* First get the ScrnInfoRec
*/
pScrn = xf86Screens[pScreen->myNum];
hwp = VGAHWPTR(pScrn);
pNv = NVPTR(pScrn);
/* Map the VGA memory when the primary video */
if (pNv->Primary) {
hwp->MapSize = 0x10000;
if (!vgaHWMapMem(pScrn))
return FALSE;
}
/* First init DRI/DRM */
if (!NVDRIScreenInit(pScrn))
return FALSE;
/* Allocate and map memory areas we need */
if (!NVMapMem(pScrn))
return FALSE;
/* Init DRM - Alloc FIFO */
if (!NVInitDma(pScrn))
return FALSE;
/* setup graphics objects */
if (!NVAccelCommonInit(pScrn))
return FALSE;
pScrn->memPhysBase = pNv->VRAMPhysical;
pScrn->fbOffset = 0;
if (!NVEnterVT(scrnIndex, 0))
return FALSE;
/* Darken the screen for aesthetic reasons and set the viewport */
// NVSaveScreen(pScreen, SCREEN_SAVER_ON);
// pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
/*
* The next step is to setup the screen's visuals, and initialise the
* framebuffer code. In cases where the framebuffer's default
* choices for things like visual layouts and bits per RGB are OK,
* this may be as simple as calling the framebuffer's ScreenInit()
* function. If not, the visuals will need to be setup before calling
* a fb ScreenInit() function and fixed up after.
*
* For most PC hardware at depths >= 8, the defaults that fb uses
* are not appropriate. In this driver, we fixup the visuals after.
*/
/*
* Reset the visual list.
*/
miClearVisualTypes();
/* Setup the visuals we support. */
if (!miSetVisualTypes(pScrn->depth,
miGetDefaultVisualMask(pScrn->depth), 8,
pScrn->defaultVisual))
return FALSE;
if (!miSetPixmapDepths ()) return FALSE;
/*
* Call the framebuffer layer's ScreenInit function, and fill in other
* pScreen fields.
*/
width = pScrn->virtualX;
height = pScrn->virtualY;
displayWidth = pScrn->displayWidth;
if(pNv->Rotate) {
height = pScrn->virtualX;
width = pScrn->virtualY;
}
/* If RandR rotation is enabled, leave enough space in the
* framebuffer for us to rotate the screen dimensions without
* changing the pitch.
*/
if(pNv->RandRRotation)
shadowHeight = max(width, height);
else
shadowHeight = height;
if(pNv->ShadowFB) {
pNv->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width);
pNv->ShadowPtr = xalloc(pNv->ShadowPitch * shadowHeight);
displayWidth = pNv->ShadowPitch / (pScrn->bitsPerPixel >> 3);
FBStart = pNv->ShadowPtr;
} else {
pNv->ShadowPtr = NULL;
FBStart = pNv->FB->map;
}
switch (pScrn->bitsPerPixel) {
case 8:
case 16:
case 32:
ret = fbScreenInit(pScreen, FBStart, width, height,
pScrn->xDpi, pScrn->yDpi,
displayWidth, pScrn->bitsPerPixel);
break;
default:
xf86DrvMsg(scrnIndex, X_ERROR,
"Internal error: invalid bpp (%d) in NVScreenInit\n",
pScrn->bitsPerPixel);
ret = FALSE;
break;
}
if (!ret)
return FALSE;
if (pScrn->bitsPerPixel > 8) {
/* Fixup RGB ordering */
visual = pScreen->visuals + pScreen->numVisuals;
while (--visual >= pScreen->visuals) {
if ((visual->class | DynamicClass) == DirectColor) {
visual->offsetRed = pScrn->offset.red;
visual->offsetGreen = pScrn->offset.green;
visual->offsetBlue = pScrn->offset.blue;
visual->redMask = pScrn->mask.red;
visual->greenMask = pScrn->mask.green;
visual->blueMask = pScrn->mask.blue;
}
}
}
fbPictureInit (pScreen, 0, 0);
xf86SetBlackWhitePixels(pScreen);
offscreenHeight = pNv->FB->size /
(pScrn->displayWidth * pScrn->bitsPerPixel >> 3);
if(offscreenHeight > 32767)
offscreenHeight = 32767;
if (!pNv->useEXA) {
AvailFBArea.x1 = 0;
AvailFBArea.y1 = 0;
AvailFBArea.x2 = pScrn->displayWidth;
AvailFBArea.y2 = offscreenHeight;
xf86InitFBManager(pScreen, &AvailFBArea);
}
if (!pNv->NoAccel) {
if (pNv->useEXA)
NVExaInit(pScreen);
else /* XAA */
NVXaaInit(pScreen);
}
NVResetGraphics(pScrn);
miInitializeBackingStore(pScreen);
xf86SetBackingStore(pScreen);
xf86SetSilkenMouse(pScreen);
/* Finish DRI init */
NVDRIFinishScreenInit(pScrn);
/* Initialize software cursor.
Must precede creation of the default colormap */
miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
/* Initialize HW cursor layer.
Must follow software cursor initialization*/
if (pNv->HWCursor) {
if(!NVCursorInit(pScreen))
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Hardware cursor initialization failed\n");
}
/* Initialise default colourmap */
if (!miCreateDefColormap(pScreen))
return FALSE;
/* Initialize colormap layer.
Must follow initialization of the default colormap */
if(!xf86HandleColormaps(pScreen, 256, 8, NVLoadPalette,
NULL, CMAP_RELOAD_ON_MODE_SWITCH | CMAP_PALETTED_TRUECOLOR))
return FALSE;
xf86DPMSInit(pScreen, xf86DPMSSet, 0);
xf86DisableRandR(); /* Disable built-in RandR extension */
xf86RandR12Init (pScreen);
xf86RandR12SetRotations (pScreen, RR_Rotate_0); /* only 0 degrees for I965G */
pNv->PointerMoved = pScrn->PointerMoved;
pScrn->PointerMoved = NVPointerMoved;
pNv->CreateScreenResources = pScreen->CreateScreenResources;
pScreen->CreateScreenResources = NvCreateScreenResources;
if(pNv->ShadowFB) {
RefreshAreaFuncPtr refreshArea = NVRefreshArea;
if(pNv->Rotate || pNv->RandRRotation) {
pNv->PointerMoved = pScrn->PointerMoved;
if(pNv->Rotate)
pScrn->PointerMoved = NVPointerMoved;
switch(pScrn->bitsPerPixel) {
case 8: refreshArea = NVRefreshArea8; break;
case 16: refreshArea = NVRefreshArea16; break;
case 32: refreshArea = NVRefreshArea32; break;
}
if(!pNv->RandRRotation) {
xf86DisableRandR();
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Driver rotation enabled, RandR disabled\n");
}
}
ShadowFBInit(pScreen, refreshArea);
}
pScrn->memPhysBase = pNv->VRAMPhysical;
pScrn->fbOffset = 0;
if(pNv->Rotate == 0 && !pNv->RandRRotation)
NVInitVideo(pScreen);
pScreen->SaveScreen = NVSaveScreen;
/* Wrap the current CloseScreen function */
pNv->CloseScreen = pScreen->CloseScreen;
pScreen->CloseScreen = NVCloseScreen;
pNv->BlockHandler = pScreen->BlockHandler;
pScreen->BlockHandler = NVBlockHandler;
#if 0 //def RANDR
/* Install our DriverFunc. We have to do it this way instead of using the
* HaveDriverFuncs argument to xf86AddDriver, because InitOutput clobbers
* pScrn->DriverFunc */
pScrn->DriverFunc = NVDriverFunc;
#endif
/* Report any unused options (only for the first generation) */
if (serverGeneration == 1) {
xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
}
return TRUE;
}
static Bool
NVSaveScreen(ScreenPtr pScreen, int mode)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
NVPtr pNv = NVPTR(pScrn);
int i;
Bool on = xf86IsUnblank(mode);
if (pScrn->vtSema) {
for (i = 0; i < xf86_config->num_crtc; i++) {
if (xf86_config->crtc[i]->enabled) {
NVCrtcBlankScreen(xf86_config->crtc[i], on);
}
}
}
return TRUE;
}
static void
NVSave(ScrnInfoPtr pScrn)
{
NVPtr pNv = NVPTR(pScrn);
NVRegPtr nvReg = &pNv->SavedReg;
vgaHWPtr pVga = VGAHWPTR(pScrn);
vgaRegPtr vgaReg = &pVga->SavedReg;
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
int i;
int vgaflags = VGA_SR_CMAP | VGA_SR_MODE;
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86_config->crtc[i]->funcs->save(xf86_config->crtc[i]);
}
for (i = 0; i< xf86_config->num_output; i++) {
xf86_config->output[i]->funcs->save(xf86_config->output[i]);
}
vgaHWUnlock(pVga);
#ifndef __powerpc__
vgaflags |= VGA_SR_FONTS;
#endif
vgaHWSave(pScrn, vgaReg, vgaflags);
}
#ifdef RANDR
static Bool
NVRandRGetInfo(ScrnInfoPtr pScrn, Rotation *rotations)
{
NVPtr pNv = NVPTR(pScrn);
if(pNv->RandRRotation)
*rotations = RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_270;
else
*rotations = RR_Rotate_0;
return TRUE;
}
static Bool
NVRandRSetConfig(ScrnInfoPtr pScrn, xorgRRConfig *config)
{
NVPtr pNv = NVPTR(pScrn);
switch(config->rotation) {
case RR_Rotate_0:
pNv->Rotate = 0;
pScrn->PointerMoved = pNv->PointerMoved;
break;
case RR_Rotate_90:
pNv->Rotate = -1;
pScrn->PointerMoved = NVPointerMoved;
break;
case RR_Rotate_270:
pNv->Rotate = 1;
pScrn->PointerMoved = NVPointerMoved;
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Unexpected rotation in NVRandRSetConfig!\n");
pNv->Rotate = 0;
pScrn->PointerMoved = pNv->PointerMoved;
return FALSE;
}
return TRUE;
}
static Bool
NVDriverFunc(ScrnInfoPtr pScrn, xorgDriverFuncOp op, pointer data)
{
switch(op) {
case RR_GET_INFO:
return NVRandRGetInfo(pScrn, (Rotation*)data);
case RR_SET_CONFIG:
return NVRandRSetConfig(pScrn, (xorgRRConfig*)data);
default:
return FALSE;
}
return FALSE;
}
#endif
|