diff options
61 files changed, 1418 insertions, 7723 deletions
diff --git a/configure.ac b/configure.ac index fae439cb9..2d0097ec5 100644 --- a/configure.ac +++ b/configure.ac @@ -1306,6 +1306,10 @@ dnl has it in libc), or if libdl is needed to get it. AC_CHECK_FUNC([dlopen], [], AC_CHECK_LIB([dl], [dlopen], XORG_LIBS="$XORG_LIBS -ldl")) + PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.8.0]) + XSERVER_LIBS="$XSERVER_LIBS $PCIACCESS_LIBS" + XORG_CFLAGS="$XORG_CFLAGS $PCIACCESS_CFLAGS" + case $host_os in darwin*) XORG_OS="Darwin" @@ -1561,7 +1565,6 @@ return 0;} AC_SUBST([XORG_OS]) AC_SUBST([XORG_OS_SUBDIR]) - dnl only used in hw/xfree86/scanpci, TTBOMK AC_PATH_PROG(PERL, perl, no) dnl unlikely as this may be ... if test "x$PERL" = xno; then @@ -2075,7 +2078,6 @@ hw/xfree86/os-support/usl/Makefile hw/xfree86/parser/Makefile hw/xfree86/rac/Makefile hw/xfree86/ramdac/Makefile -hw/xfree86/scanpci/Makefile hw/xfree86/shadowfb/Makefile hw/xfree86/vbe/Makefile hw/xfree86/vgahw/Makefile @@ -2090,8 +2092,6 @@ hw/xfree86/utils/cvt/Makefile hw/xfree86/utils/gtf/Makefile hw/xfree86/utils/ioport/Makefile hw/xfree86/utils/kbd_mode/Makefile -hw/xfree86/utils/pcitweak/Makefile -hw/xfree86/utils/scanpci/Makefile hw/xfree86/utils/xorgcfg/Makefile hw/xfree86/utils/xorgconfig/Makefile hw/dmx/config/Makefile diff --git a/hw/xfree86/Makefile.am b/hw/xfree86/Makefile.am index ca7dda109..3ba6adc16 100644 --- a/hw/xfree86/Makefile.am +++ b/hw/xfree86/Makefile.am @@ -20,12 +20,12 @@ DOC_SUBDIR = doc SUBDIRS = common ddc dummylib i2c x86emu int10 fbdevhw os-support parser rac \ ramdac shadowfb vbe vgahw xaa $(MFB_SUBDIR) $(CFB_SUBDIR) \ - loader scanpci dixmods exa modes \ + loader dixmods exa modes \ $(DRI_SUBDIR) $(XF86UTILS_SUBDIR) $(DOC_SUBDIR) DIST_SUBDIRS = common ddc dummylib i2c x86emu int10 fbdevhw os-support \ parser rac ramdac shadowfb vbe vgahw xaa xf1bpp xf4bpp \ - xf8_16bpp xf8_32bpp loader scanpci dixmods dri exa modes \ + xf8_16bpp xf8_32bpp loader dixmods dri exa modes \ utils doc bin_PROGRAMS = Xorg diff --git a/hw/xfree86/common/Makefile.am b/hw/xfree86/common/Makefile.am index d15e99a51..db726fea1 100644 --- a/hw/xfree86/common/Makefile.am +++ b/hw/xfree86/common/Makefile.am @@ -44,7 +44,7 @@ libinit_a_SOURCES = xf86Build.h xf86Init.c INCLUDES = $(XORG_INCS) -I$(srcdir)/../ddc -I$(srcdir)/../i2c \ -I$(srcdir)/../loader -I$(srcdir)/../rac -I$(srcdir)/../parser \ - -I$(srcdir)/../scanpci -I$(srcdir)/../vbe -I$(srcdir)/../int10 \ + -I$(srcdir)/../vbe -I$(srcdir)/../int10 \ -I$(srcdir)/../vgahw -I$(srcdir)/../dixmods/extmod sdk_HEADERS = compiler.h fourcc.h xf86.h xf86Module.h xf86Opt.h \ diff --git a/hw/xfree86/common/xf86.h b/hw/xfree86/common/xf86.h index f2cf78cf8..69d619e6f 100644 --- a/hw/xfree86/common/xf86.h +++ b/hw/xfree86/common/xf86.h @@ -42,6 +42,8 @@ #include <dix-config.h> #endif +#include <pciaccess.h> + #include "xf86str.h" #include "xf86Opt.h" #include <X11/Xfuncproto.h> @@ -90,16 +92,13 @@ extern Bool xf86inSuspend; /* xf86Bus.c */ -Bool xf86CheckPciSlot(int bus, int device, int func); -int xf86ClaimPciSlot(int bus, int device, int func, DriverPtr drvp, +Bool xf86CheckPciSlot( const struct pci_device * ); +int xf86ClaimPciSlot( struct pci_device *, DriverPtr drvp, int chipset, GDevPtr dev, Bool active); Bool xf86ParsePciBusString(const char *busID, int *bus, int *device, int *func); Bool xf86ComparePciBusString(const char *busID, int bus, int device, int func); void xf86FormatPciBusNumber(int busnum, char *buffer); -pciVideoPtr *xf86GetPciVideoInfo(void); -pciConfigPtr *xf86GetPciConfigInfo(void); -void xf86SetPciVideo(pciVideoPtr, resType); void xf86PrintResList(int verb, resPtr list); resPtr xf86AddRangesToList(resPtr list, resRange *pRange, int entityIndex); int xf86ClaimIsaSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active); @@ -110,7 +109,7 @@ int xf86ClaimFbSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active); int xf86ClaimNoSlot(DriverPtr drvp, int chipset, GDevPtr dev, Bool active); void xf86EnableAccess(ScrnInfoPtr pScrn); void xf86SetCurrentAccess(Bool Enable, ScrnInfoPtr pScrn); -Bool xf86IsPrimaryPci(pciVideoPtr pPci); +Bool xf86IsPrimaryPci(struct pci_device * pPci); Bool xf86IsPrimaryIsa(void); /* new RAC */ resPtr xf86AddResToList(resPtr rlist, resRange *Range, int entityIndex); @@ -126,19 +125,16 @@ int xf86GetNumEntityInstances(int entityIndex); GDevPtr xf86GetDevFromEntity(int entityIndex, int instance); void xf86RemoveEntityFromScreen(ScrnInfoPtr pScrn, int entityIndex); EntityInfoPtr xf86GetEntityInfo(int entityIndex); -pciVideoPtr xf86GetPciInfoForEntity(int entityIndex); -int xf86GetPciEntity(int bus, int dev, int func); +struct pci_device * xf86GetPciInfoForEntity(int entityIndex); Bool xf86SetEntityFuncs(int entityIndex, EntityProc init, EntityProc enter, EntityProc leave, pointer); void xf86DeallocateResourcesForEntity(int entityIndex, unsigned long type); resPtr xf86RegisterResources(int entityIndex, resList list, unsigned long Access); -Bool xf86CheckPciMemBase(pciVideoPtr pPci, memType base); +Bool xf86CheckPciMemBase(struct pci_device * pPci, memType base); void xf86SetAccessFuncs(EntityInfoPtr pEnt, xf86SetAccessFuncPtr funcs, xf86SetAccessFuncPtr oldFuncs); Bool xf86IsEntityPrimary(int entityIndex); -Bool xf86FixPciResource(int entityIndex, int prt, memType alignment, - unsigned long type); resPtr xf86ReallocatePciResources(int entityIndex, resPtr pRes); resPtr xf86SetOperatingState(resList list, int entityIndex, int mask); void xf86EnterServerState(xf86State state); @@ -149,14 +145,9 @@ resRange xf86GetSparse(unsigned long type, memType fixed_bits, memType decode_mask, memType address_mask, resPtr avoid); memType xf86ChkConflict(resRange *rgp, int entityIndex); -Bool xf86IsPciDevPresent(int bus, int dev, int func); ScrnInfoPtr xf86FindScreenForEntity(int entityIndex); Bool xf86NoSharedResources(int screenIndex, resType res); resPtr xf86FindIntersectOfLists(resPtr l1, resPtr l2); -pciVideoPtr xf86FindPciDeviceVendor(CARD16 vendorID, CARD16 deviceID, - char n, pciVideoPtr pvp_exclude); -pciVideoPtr xf86FindPciClass(CARD8 intf, CARD8 subClass, CARD16 class, - char n, pciVideoPtr pvp_exclude); void xf86RegisterStateChangeNotificationCallback(xf86StateChangeNotificationCallbackFunc func, pointer arg); Bool xf86DeregisterStateChangeNotificationCallback(xf86StateChangeNotificationCallbackFunc func); @@ -175,8 +166,8 @@ DevUnion *xf86GetEntityPrivate(int entityIndex, int privIndex); /* xf86Configure.c */ GDevPtr xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int chipset); -GDevPtr xf86AddDeviceToConfigure(const char *driver, pciVideoPtr pVideo, - int chipset); +GDevPtr xf86AddDeviceToConfigure( const char *driver, + struct pci_device * pVideo, int chipset ); /* xf86Cursor.c */ diff --git a/hw/xfree86/common/xf86AutoConfig.c b/hw/xfree86/common/xf86AutoConfig.c index 3b04f5732..4bdf1ceb8 100644 --- a/hw/xfree86/common/xf86AutoConfig.c +++ b/hw/xfree86/common/xf86AutoConfig.c @@ -155,7 +155,7 @@ AppendToConfig(const char *s) } static const char * -videoPtrToDriverName(pciVideoPtr info) +videoPtrToDriverName(struct pci_device *dev) { /* * things not handled yet: @@ -163,7 +163,7 @@ videoPtrToDriverName(pciVideoPtr info) * xgi */ - switch (info->vendor) + switch (dev->vendor_id) { case 0x1142: return "apm"; case 0xedd8: return "ark"; @@ -172,7 +172,7 @@ videoPtrToDriverName(pciVideoPtr info) case 0x102c: return "chips"; case 0x1013: return "cirrus"; case 0x8086: - if ((info->chipType == 0x00d1) || (info->chipType == 0x7800)) + if ((dev->device_id == 0x00d1) || (dev->device_id == 0x7800)) return "i740"; else return "i810"; case 0x102b: return "mga"; @@ -181,7 +181,7 @@ videoPtrToDriverName(pciVideoPtr info) case 0x10de: case 0x12d2: return "nv"; case 0x1163: return "rendition"; case 0x5333: - switch (info->chipType) + switch (dev->device_id) { case 0x88d0: case 0x88d1: case 0x88f0: case 0x8811: case 0x8812: case 0x8814: case 0x8901: @@ -195,7 +195,7 @@ videoPtrToDriverName(pciVideoPtr info) case 0x1039: return "sis"; case 0x126f: return "siliconmotion"; case 0x121a: - if (info->chipType < 0x0003) + if (dev->device_id < 0x0003) return "voodoo"; else return "tdfx"; @@ -214,22 +214,23 @@ xf86AutoConfig(void) { const char **p; char buf[1024]; - pciVideoPtr *pciptr, info = NULL; - char *driver = NULL; + struct pci_device_iterator *iter; + struct pci_device * info = NULL; + const char *driver = NULL; ConfigStatus ret; /* Find the primary device, and get some information about it. */ - if (xf86PciVideoInfo) { - for (pciptr = xf86PciVideoInfo; (info = *pciptr); pciptr++) { - if (xf86IsPrimaryPci(info)) { - break; - } - } - if (!info) { - ErrorF("Primary device is not PCI\n"); + iter = pci_slot_match_iterator_create(NULL); + while ((info = pci_device_next(iter)) != NULL) { + if (xf86IsPrimaryPci(info)) { + break; } - } else { - ErrorF("xf86PciVideoInfo is not set\n"); + } + + pci_iterator_destroy(iter); + + if (!info) { + ErrorF("Primary device is not PCI\n"); } if (info) diff --git a/hw/xfree86/common/xf86Bus.c b/hw/xfree86/common/xf86Bus.c index cd309a5a9..537ddf7a4 100644 --- a/hw/xfree86/common/xf86Bus.c +++ b/hw/xfree86/common/xf86Bus.c @@ -52,6 +52,7 @@ #include "xf86_OSproc.h" #include "xf86RAC.h" +#include "Pci.h" /* Entity data */ EntityPtr *xf86Entities = NULL; /* Bus slots claimed by drivers */ @@ -253,9 +254,7 @@ xf86IsEntityPrimary(int entityIndex) switch (pEnt->busType) { case BUS_PCI: - return (pEnt->pciBusId.bus == primaryBus.id.pci.bus && - pEnt->pciBusId.device == primaryBus.id.pci.device && - pEnt->pciBusId.func == primaryBus.id.pci.func); + return (pEnt->bus.id.pci == primaryBus.id.pci); case BUS_ISA: return TRUE; case BUS_SBUS: @@ -1361,7 +1360,9 @@ xf86AddRangesToList(resPtr list, resRange *pRange, int entityIndex) void xf86ResourceBrokerInit(void) { +#if 0 resPtr resPci; +#endif osRes = NULL; @@ -1376,8 +1377,12 @@ xf86ResourceBrokerInit(void) xf86PrintResList(3, osRes); /* Bus dep initialization */ +#if 0 resPci = ResourceBrokerInitPci(&osRes); Acc = xf86JoinResLists(xf86DupResList(osRes), resPci); +#else + Acc = xf86DupResList( osRes ); +#endif xf86MsgVerb(X_INFO, 3, "All system resource ranges:\n"); xf86PrintResList(3, Acc); @@ -1765,7 +1770,7 @@ xf86GetResourcesImplicitly(int entityIndex) case BUS_SBUS: return NULL; case BUS_PCI: - return GetImplicitPciResources(entityIndex); + return NULL; case BUS_last: return NULL; } @@ -1856,31 +1861,34 @@ xf86RegisterResources(int entityIndex, resList list, unsigned long access) } static void -busTypeSpecific(EntityPtr pEnt, xf86State state, xf86AccessPtr *acc_mem, +busTypeSpecific(EntityPtr pEnt, xf86AccessPtr *acc_mem, xf86AccessPtr *acc_io, xf86AccessPtr *acc_mem_io) { - pciAccPtr *ppaccp; - switch (pEnt->bus.type) { case BUS_ISA: case BUS_SBUS: - *acc_mem = *acc_io = *acc_mem_io = &AccessNULL; - break; + *acc_mem = *acc_io = *acc_mem_io = &AccessNULL; break; - case BUS_PCI: - ppaccp = xf86PciAccInfo; - while (*ppaccp) { - if ((*ppaccp)->busnum == pEnt->pciBusId.bus - && (*ppaccp)->devnum == pEnt->pciBusId.device - && (*ppaccp)->funcnum == pEnt->pciBusId.func) { - *acc_io = &(*ppaccp)->ioAccess; - *acc_mem = &(*ppaccp)->memAccess; - *acc_mem_io = &(*ppaccp)->io_memAccess; - break; - } - ppaccp++; + case BUS_PCI: { + struct pci_device *const dev = pEnt->bus.id.pci; + + if ((dev != NULL) && ((void *)dev->user_data != NULL)) { + pciAccPtr const paccp = (pciAccPtr) dev->user_data; + + *acc_io = & paccp->ioAccess; + *acc_mem = & paccp->memAccess; + *acc_mem_io = & paccp->io_memAccess; + } + else { + /* FIXME: This is an error path. We should probably have an + * FIXME: assertion here or something. + */ + *acc_io = NULL; + *acc_mem = NULL; + *acc_mem_io = NULL; } break; + } default: *acc_mem = *acc_io = *acc_mem_io = NULL; break; @@ -1896,7 +1904,7 @@ setAccess(EntityPtr pEnt, xf86State state) xf86AccessPtr org_mem = NULL, org_io = NULL, org_mem_io = NULL; int prop; - busTypeSpecific(pEnt,state,&acc_mem,&acc_io,&acc_mem_io); + busTypeSpecific(pEnt, &acc_mem, &acc_io, &acc_mem_io); /* The replacement function needs to handle _all_ shared resources */ /* unless they are handeled locally and disabled otherwise */ @@ -2449,15 +2457,6 @@ xf86PostProbe(void) #endif } xf86FreeResList(acc); -#if !(defined(__alpha__) && defined(linux)) && \ - !(defined(__ia64__) && defined(linux)) && \ - !(defined(__sparc64__) && defined(__OpenBSD__)) - /* - * No need to validate on Alpha Linux or OpenBSD/sparc64, - * trust the kernel. - */ - ValidatePci(); -#endif xf86MsgVerb(X_INFO, 3, "resource ranges after probing:\n"); xf86PrintResList(3, Acc); @@ -2976,14 +2975,16 @@ xf86FindPrimaryDevice() CheckGenericGA(); if (primaryBus.type != BUS_NONE) { char *bus; - char *loc = xnfcalloc(1,9); - if (loc == NULL) return; + char loc[16]; switch (primaryBus.type) { case BUS_PCI: bus = "PCI"; - sprintf(loc," %2.2x:%2.2x:%1.1x",primaryBus.id.pci.bus, - primaryBus.id.pci.device,primaryBus.id.pci.func); + snprintf(loc, sizeof(loc), " %2.2x@%2.2x:%2.2x:%1.1x", + primaryBus.id.pci->bus, + primaryBus.id.pci->domain, + primaryBus.id.pci->dev, + primaryBus.id.pci->func); break; case BUS_ISA: bus = "ISA"; @@ -2991,17 +2992,15 @@ xf86FindPrimaryDevice() break; case BUS_SBUS: bus = "SBUS"; - sprintf(loc," %2.2x",primaryBus.id.sbus.fbNum); + snprintf(loc, sizeof(loc), " %2.2x", primaryBus.id.sbus.fbNum); break; default: bus = ""; loc[0] = '\0'; } - + xf86MsgVerb(X_INFO, 2, "Primary Device is: %s%s\n",bus,loc); - xfree(loc); } - } #if !defined(__sparc) && !defined(__sparc__) && !defined(__powerpc__) && !defined(__mips__) && !defined(__arm__) diff --git a/hw/xfree86/common/xf86Bus.h b/hw/xfree86/common/xf86Bus.h index 8d7195994..5ea5cc8e1 100644 --- a/hw/xfree86/common/xf86Bus.h +++ b/hw/xfree86/common/xf86Bus.h @@ -91,7 +91,6 @@ typedef struct { #define NEED_SHARED (NEED_MEM_SHARED | NEED_IO_SHARED) #define busType bus.type -#define pciBusId bus.id.pci #define isaBusId bus.id.isa #define sbusBusId bus.id.sbus @@ -114,7 +113,7 @@ typedef struct x_BusAccRec { struct { int bus; int primary_bus; - PCITAG acc; + struct pci_device * dev; pciBridgesSave save; } pci; } busdep; diff --git a/hw/xfree86/common/xf86Config.c b/hw/xfree86/common/xf86Config.c index 8bf051c4f..71e008069 100644 --- a/hw/xfree86/common/xf86Config.c +++ b/hw/xfree86/common/xf86Config.c @@ -60,6 +60,7 @@ #include "configProcs.h" #include "globals.h" #include "extension.h" +#include "Pci.h" #ifdef XINPUT #include "xf86Xinput.h" @@ -2541,8 +2542,9 @@ xf86HandleConfigFile(Bool autoconfig) xf86Msg(X_WARNING, "Bus types other than PCI not yet isolable.\n" "\tIgnoring IsolateDevice option.\n"); } else if (sscanf(scanptr, "PCI:%d:%d:%d", &bus, &device, &func) == 3) { - xf86IsolateDevice.bus = bus; - xf86IsolateDevice.device = device; + xf86IsolateDevice.domain = PCI_DOM_FROM_BUS(bus); + xf86IsolateDevice.bus = PCI_BUS_NO_DOMAIN(bus); + xf86IsolateDevice.dev = device; xf86IsolateDevice.func = func; xf86Msg(X_INFO, "Isolating PCI bus \"%d:%d:%d\"\n", bus, device, func); diff --git a/hw/xfree86/common/xf86Configure.c b/hw/xfree86/common/xf86Configure.c index 19f040b03..4c980a291 100644 --- a/hw/xfree86/common/xf86Configure.c +++ b/hw/xfree86/common/xf86Configure.c @@ -35,13 +35,14 @@ #include <fcntl.h> #include <X11/X.h> #include <X11/Xmd.h> +#include <pciaccess.h> +#include "Pci.h" #include "os.h" #include "loaderProcs.h" #include "xf86.h" #include "xf86Config.h" #include "xf86_OSlib.h" #include "xf86Priv.h" -#include "xf86PciData.h" #define IN_XSERVER #include "xf86Parser.h" #include "xf86tokens.h" @@ -56,7 +57,7 @@ typedef struct _DevToConfig { GDevRec GDev; - pciVideoPtr pVideo; + struct pci_device * pVideo; #if (defined(__sparc__) || defined(__sparc)) && !defined(__OpenBSD__) sbusDevicePtr sVideo; #endif @@ -101,7 +102,7 @@ GDevPtr xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int chipset) { int i, j; - pciVideoPtr pVideo = NULL; + struct pci_device * pVideo = NULL; Bool isPrimary = FALSE; if (xf86DoProbe || !xf86DoConfigure || !xf86DoConfigurePass1) @@ -110,11 +111,12 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int /* Check for duplicates */ switch (bus) { case BUS_PCI: - pVideo = (pciVideoPtr) busData; + pVideo = (struct pci_device *) busData; for (i = 0; i < nDevToConfig; i++) if (DevToConfig[i].pVideo && + (DevToConfig[i].pVideo->domain == pVideo->domain) && (DevToConfig[i].pVideo->bus == pVideo->bus) && - (DevToConfig[i].pVideo->device == pVideo->device) && + (DevToConfig[i].pVideo->dev == pVideo->dev) && (DevToConfig[i].pVideo->func == pVideo->func)) return NULL; isPrimary = xf86IsPrimaryPci(pVideo); @@ -173,9 +175,9 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int char busnum[8]; NewDevice.pVideo = pVideo; - xf86FindPciNamesByDevice(pVideo->vendor, pVideo->chipType, - NOVENDOR, NOSUBSYS, - &VendorName, &CardName, NULL, NULL); + + VendorName = pci_device_get_vendor_name( pVideo ); + CardName = pci_device_get_device_name( pVideo ); if (!VendorName) { VendorName = xnfalloc(15); @@ -197,13 +199,13 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int NewDevice.GDev.busID = xnfalloc(16); xf86FormatPciBusNumber(pVideo->bus, busnum); sprintf(NewDevice.GDev.busID, "PCI:%s:%d:%d", - busnum, pVideo->device, pVideo->func); + busnum, pVideo->dev, pVideo->func); - NewDevice.GDev.chipID = pVideo->chipType; - NewDevice.GDev.chipRev = pVideo->chipRev; + NewDevice.GDev.chipID = pVideo->device_id; + NewDevice.GDev.chipRev = pVideo->revision; if (chipset < 0) - chipset = (pVideo->vendor << 16) | pVideo->chipType; + chipset = (pVideo->vendor_id << 16) | pVideo->device_id; } break; case BUS_ISA: @@ -249,7 +251,8 @@ xf86AddBusDeviceToConfigure(const char *driver, BusType bus, void *busData, int * Backwards compatibility */ _X_EXPORT GDevPtr -xf86AddDeviceToConfigure(const char *driver, pciVideoPtr pVideo, int chipset) +xf86AddDeviceToConfigure(const char *driver, struct pci_device * pVideo, + int chipset) { return xf86AddBusDeviceToConfigure(driver, pVideo ? BUS_PCI : BUS_ISA, pVideo, chipset); @@ -759,22 +762,20 @@ DoConfigure() /* Call all of the probe functions, reporting the results. */ for (CurrentDriver = 0; CurrentDriver < xf86NumDrivers; CurrentDriver++) { xorgHWFlags flags; - + Bool found_screen; + DriverRec * const drv = xf86DriverList[CurrentDriver]; + if (!xorgHWAccess) { - if (!xf86DriverList[CurrentDriver]->driverFunc - || !xf86DriverList[CurrentDriver]->driverFunc(NULL, - GET_REQUIRED_HW_INTERFACES, - &flags) + if (!drv->driverFunc + || !drv->driverFunc( NULL, GET_REQUIRED_HW_INTERFACES, &flags ) || NEED_IO_ENABLED(flags)) continue; } - if (xf86DriverList[CurrentDriver]->Probe == NULL) continue; - - if ((*xf86DriverList[CurrentDriver]->Probe)( - xf86DriverList[CurrentDriver], PROBE_DETECT) && - xf86DriverList[CurrentDriver]->Identify) - (*xf86DriverList[CurrentDriver]->Identify)(0); + found_screen = xf86CallDriverProbe( drv, TRUE ); + if ( found_screen && drv->Identify ) { + (*drv->Identify)(0); + } } if (nDevToConfig <= 0) { @@ -860,7 +861,7 @@ DoConfigure() oldNumScreens = xf86NumScreens; - (*xf86DriverList[i]->Probe)(xf86DriverList[i], 0); + xf86CallDriverProbe( xf86DriverList[i], FALSE ); /* reorder */ k = screennum > 0 ? screennum : 1; @@ -888,7 +889,6 @@ DoConfigure() } } } - xf86SetPciVideo(NULL,NONE); } xfree(driverProbed); } diff --git a/hw/xfree86/common/xf86DoProbe.c b/hw/xfree86/common/xf86DoProbe.c index fc0a9f4eb..bba6ab7e8 100644 --- a/hw/xfree86/common/xf86DoProbe.c +++ b/hw/xfree86/common/xf86DoProbe.c @@ -92,9 +92,7 @@ DoProbe() xf86MsgVerb(X_INFO, 3, "Probing in driver %s\n", drv->driverName); - if (drv->Probe == NULL) continue; - - probeResult = (*drv->Probe)( drv, PROBE_DETECT ); + probeResult = xf86CallDriverProbe( drv, TRUE ); if (!probeResult) { xf86ErrorF("Probe in driver `%s' returns FALSE\n", drv->driverName); diff --git a/hw/xfree86/common/xf86DoScanPci.c b/hw/xfree86/common/xf86DoScanPci.c index 0c6668a49..51892f041 100644 --- a/hw/xfree86/common/xf86DoScanPci.c +++ b/hw/xfree86/common/xf86DoScanPci.c @@ -38,20 +38,76 @@ #include <stdlib.h> #include <X11/X.h> #include <X11/Xmd.h> +#include <pciaccess.h> #include "os.h" -#include "loaderProcs.h" #include "xf86.h" #include "xf86Priv.h" #include "xf86Pci.h" -#include "xf86ScanPci.h" +#include "Pci.h" +#include "xf86_OSproc.h" + +static void ScanPciDisplayPCICardInfo(void); + +void +ScanPciDisplayPCICardInfo(void) +{ + struct pci_id_match match; + struct pci_device_iterator *iter; + const struct pci_device *dev; + + xf86EnableIO(); + + if (! xf86scanpci()) { + xf86MsgVerb(X_NONE, 0, "No PCI info available\n"); + return; + } + xf86MsgVerb(X_NONE, 0, + "Probing for PCI devices (Bus:Device:Function)\n\n"); + + iter = pci_id_match_iterator_create(NULL); + while ((dev = pci_device_next(iter)) != NULL) { + const char *svendorname = NULL, *subsysname = NULL; + const char *vendorname = NULL, *devicename = NULL; + + + xf86MsgVerb(X_NONE, 0, "(%d:%d:%d) ", + PCI_MAKE_BUS(dev->domain, dev->bus), dev->dev, dev->func); + + /* + * Lookup as much as we can about the device. + */ + match.vendor_id = dev->vendor_id; + match.device_id = dev->device_id; + match.subvendor_id = (dev->subvendor_id != 0) + ? dev->subvendor_id : PCI_MATCH_ANY; + match.subdevice_id = (dev->subdevice_id != 0) + ? dev->subdevice_id : PCI_MATCH_ANY; + match.device_class = 0; + match.device_class_mask = 0; + + pci_get_strings(& match, & vendorname, & devicename, + & svendorname, & subsysname); + + if ((dev->subvendor_id != 0) || (dev->subdevice_id != 0)) { + xf86MsgVerb(X_NONE, 0, "%s %s (0x%04x / 0x%04x) using ", + (svendorname == NULL) ? "unknown vendor" : svendorname, + (subsysname == NULL) ? "unknown card" : subsysname, + dev->subvendor_id, dev->subdevice_id); + } + + xf86MsgVerb(X_NONE, 0, "%s %s (0x%04x / 0x%04x)\n", + (vendorname == NULL) ? "unknown vendor" : vendorname, + (devicename == NULL) ? "unknown chip" : devicename, + dev->vendor_id, dev->device_id); + } + + pci_iterator_destroy(iter); +} void DoScanPci(int argc, char **argv, int i) { - int j,skip,globalVerbose,scanpciVerbose; - ScanPciSetupProcPtr PciSetup; - ScanPciDisplayCardInfoProcPtr DisplayPCICardInfo; - int errmaj, errmin; + int j,skip,globalVerbose; /* * first we need to finish setup of the OS so that we can call other @@ -81,32 +137,7 @@ void DoScanPci(int argc, char **argv, int i) if (xf86Verbose > globalVerbose) xf86SetVerbosity(globalVerbose); - /* - * Setting scanpciVerbose to 0 will ensure that the output will go to - * stderr for all reasonable default stderr verbosity levels. - */ - scanpciVerbose = 0; - - /* - * now get the loader set up and load the scanpci module - */ - /* Initialise the loader */ - LoaderInit(); - /* Tell the loader the default module search path */ - LoaderSetPath(xf86ModulePath); - - if (!LoadModule("scanpci", NULL, NULL, NULL, NULL, NULL, - &errmaj, &errmin)) { - LoaderErrorMsg(NULL, "scanpci", errmaj, errmin); - exit(1); - } - PciSetup = (ScanPciSetupProcPtr)LoaderSymbol("ScanPciSetupPciIds"); - DisplayPCICardInfo = - (ScanPciDisplayCardInfoProcPtr)LoaderSymbol("ScanPciDisplayPCICardInfo"); - - if (!(*PciSetup)()) - FatalError("ScanPciSetupPciIds() failed\n"); - (*DisplayPCICardInfo)(scanpciVerbose); + ScanPciDisplayPCICardInfo(); /* * That's it; we really should clean things up, but a simple diff --git a/hw/xfree86/common/xf86Globals.c b/hw/xfree86/common/xf86Globals.c index b41fe6e5f..7dc45b75d 100644 --- a/hw/xfree86/common/xf86Globals.c +++ b/hw/xfree86/common/xf86Globals.c @@ -203,4 +203,7 @@ Bool xf86MiscModInDevAllowNonLocal = FALSE; RootWinPropPtr *xf86RegisteredPropertiesTable = NULL; _X_EXPORT Bool xf86inSuspend = FALSE; Bool xorgHWAccess = FALSE; -PciBusId xf86IsolateDevice; + +struct pci_slot_match xf86IsolateDevice = { + PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, 0 +}; diff --git a/hw/xfree86/common/xf86Helper.c b/hw/xfree86/common/xf86Helper.c index 4636af4e2..63970dce8 100644 --- a/hw/xfree86/common/xf86Helper.c +++ b/hw/xfree86/common/xf86Helper.c @@ -39,6 +39,9 @@ #include <xorg-config.h> #endif +#include <pciaccess.h> +#include "Pci.h" + #include <X11/X.h> #include "os.h" #include "servermd.h" @@ -1595,7 +1598,7 @@ xf86MatchDevice(const char *drivername, GDevPtr **sectlist) } struct Inst { - pciVideoPtr pci; + struct pci_device * pci; GDevPtr dev; Bool foundHW; /* PCIid in list of supported chipsets */ Bool claimed; /* BusID matches with a device section */ @@ -1643,7 +1646,8 @@ xf86MatchPciInstances(const char *driverName, int vendorID, int **foundEntities) { int i,j; - pciVideoPtr pPci, *ppPci; + struct pci_device * pPci; + struct pci_device_iterator *iter; struct Inst *instances = NULL; int numClaimedInstances = 0; int allocatedInstances = 0; @@ -1654,8 +1658,6 @@ xf86MatchPciInstances(const char *driverName, int vendorID, *foundEntities = NULL; - if (!xf86PciVideoInfo) - return 0; /* Each PCI device will contribute at least one entry. Each device * section can contribute at most one entry. The sum of the two is @@ -1665,21 +1667,22 @@ xf86MatchPciInstances(const char *driverName, int vendorID, */ if ( !xf86DoProbe && !(xf86DoConfigure && xf86DoConfigurePass1) ) { unsigned max_entries = numDevs; - for (ppPci = xf86PciVideoInfo ; *ppPci != NULL ; ppPci++) { + + iter = pci_slot_match_iterator_create(NULL); + while ((pPci = pci_device_next(iter)) != NULL) { max_entries++; } - instances = xnfalloc( max_entries * sizeof(struct Inst) ); + pci_iterator_destroy(iter); + instances = xnfalloc(max_entries * sizeof(struct Inst)); } - for (ppPci = xf86PciVideoInfo; *ppPci != NULL; ppPci++) { - unsigned device_class = ((*ppPci)->class << 16) - | ((*ppPci)->subclass << 8) | ((*ppPci)->interface); + iter = pci_slot_match_iterator_create(NULL); + while ((pPci = pci_device_next(iter)) != NULL) { + unsigned device_class = pPci->device_class; Bool foundVendor = FALSE; - pPci = *ppPci; - /* Convert the pre-PCI 2.0 device class for a VGA adapter to the * 2.0 version of the same class. */ @@ -1704,19 +1707,21 @@ xf86MatchPciInstances(const char *driverName, int vendorID, const unsigned device_id = (id->PCIid & 0x0000FFFF); const unsigned match_class = 0x00030000 | id->PCIid; - if ( (vendor_id == pPci->vendor) - || ((vendorID == PCI_VENDOR_GENERIC) && (match_class == device_class)) ) { - if ( !foundVendor && (instances != NULL) ) { + if ((vendor_id == pPci->vendor_id) + || ((vendorID == PCI_VENDOR_GENERIC) && (match_class == device_class))) { + if (!foundVendor && (instances != NULL)) { ++allocatedInstances; - instances[allocatedInstances - 1].pci = *ppPci; + instances[allocatedInstances - 1].pci = pPci; instances[allocatedInstances - 1].dev = NULL; instances[allocatedInstances - 1].claimed = FALSE; instances[allocatedInstances - 1].foundHW = FALSE; instances[allocatedInstances - 1].screen = 0; - foundVendor = TRUE; } - if ( (device_id == pPci->chipType) - || ((vendorID == PCI_VENDOR_GENERIC) + + foundVendor = TRUE; + + if ( (device_id == pPci->device_id) + || ((vendorID == PCI_VENDOR_GENERIC) && (match_class == device_class)) ) { if ( instances != NULL ) { instances[allocatedInstances - 1].foundHW = TRUE; @@ -1725,11 +1730,10 @@ xf86MatchPciInstances(const char *driverName, int vendorID, if ( xf86DoConfigure && xf86DoConfigurePass1 ) { - if ( xf86CheckPciSlot(pPci->bus, pPci->device, - pPci->func) ) { - GDevPtr pGDev = - xf86AddDeviceToConfigure( drvp->driverName, - pPci, -1 ); + if (xf86CheckPciSlot(pPci)) { + GDevPtr pGDev = + xf86AddDeviceToConfigure(drvp->driverName, + pPci, -1); if (pGDev) { /* After configure pass 1, chipID and chipRev * are treated as over-rides, so clobber them @@ -1752,6 +1756,8 @@ xf86MatchPciInstances(const char *driverName, int vendorID, } } + pci_iterator_destroy(iter); + /* In "probe only" or "configure" mode (signaled by instances being NULL), * our work is done. Return the number of detected devices. @@ -1789,8 +1795,9 @@ xf86MatchPciInstances(const char *driverName, int vendorID, && *devList[j]->busID) { for (i = 0; i < allocatedInstances; i++) { pPci = instances[i].pci; - if (xf86ComparePciBusString(devList[j]->busID, pPci->bus, - pPci->device, + if (xf86ComparePciBusString(devList[j]->busID, + PCI_MAKE_BUS( pPci->domain, pPci->bus ), + pPci->dev, pPci->func)) { allocatedInstances++; instances[allocatedInstances - 1] = instances[i]; @@ -1810,9 +1817,10 @@ xf86MatchPciInstances(const char *driverName, int vendorID, pPci = instances[i].pci; for (j = 0; j < numDevs; j++) { if (devList[j]->busID && *devList[j]->busID) { - if (xf86ComparePciBusString(devList[j]->busID, pPci->bus, - pPci->device, - pPci->func) && + if (xf86ComparePciBusString(devList[j]->busID, + PCI_MAKE_BUS( pPci->domain, pPci->bus ), + pPci->dev, + pPci->func) && devList[j]->screen == instances[i].screen) { if (devBus) @@ -1843,10 +1851,11 @@ xf86MatchPciInstances(const char *driverName, int vendorID, } if (devBus) dev = devBus; /* busID preferred */ if (!dev) { - if (xf86CheckPciSlot(pPci->bus, pPci->device, pPci->func)) { + if ( xf86CheckPciSlot( pPci ) ) { xf86MsgVerb(X_WARNING, 0, "%s: No matching Device section " - "for instance (BusID PCI:%i:%i:%i) found\n", - driverName, pPci->bus, pPci->device, pPci->func); + "for instance (BusID PCI:%u@%u:%u:%u) found\n", + driverName, pPci->domain, pPci->bus, pPci->dev, + pPci->func); } } else { numClaimedInstances++; @@ -1957,31 +1966,27 @@ xf86MatchPciInstances(const char *driverName, int vendorID, * XXX Need to make sure that two different drivers don't claim * the same screen > 0 instance. */ - if (instances[i].screen == 0 && - !xf86CheckPciSlot(pPci->bus, pPci->device, pPci->func)) + if (instances[i].screen == 0 && !xf86CheckPciSlot( pPci )) continue; #ifdef DEBUG ErrorF("%s: card at %d:%d:%d is claimed by a Device section\n", - driverName, pPci->bus, pPci->device, pPci->func); + driverName, pPci->bus, pPci->dev, pPci->func); #endif /* Allocate an entry in the lists to be returned */ numFound++; retEntities = xnfrealloc(retEntities, numFound * sizeof(int)); - retEntities[numFound - 1] - = xf86ClaimPciSlot(pPci->bus, pPci->device, - pPci->func,drvp, instances[i].chip, - instances[i].dev,instances[i].dev->active ? - TRUE : FALSE); + retEntities[numFound - 1] = xf86ClaimPciSlot( pPci, drvp, + instances[i].chip, + instances[i].dev, + instances[i].dev->active); if (retEntities[numFound - 1] == -1 && instances[i].screen > 0) { for (j = 0; j < xf86NumEntities; j++) { EntityPtr pEnt = xf86Entities[j]; - if (pEnt->busType != BUS_PCI) + if (pEnt->bus.type != BUS_PCI) continue; - if (pEnt->pciBusId.bus == pPci->bus && - pEnt->pciBusId.device == pPci->device && - pEnt->pciBusId.func == pPci->func) { + if (pEnt->bus.id.pci == pPci) { retEntities[numFound - 1] = j; xf86AddDevToEntity(j, instances[i].dev); break; diff --git a/hw/xfree86/common/xf86Init.c b/hw/xfree86/common/xf86Init.c index bf7dac6da..aa460325b 100644 --- a/hw/xfree86/common/xf86Init.c +++ b/hw/xfree86/common/xf86Init.c @@ -92,6 +92,9 @@ #include "dpmsproc.h" #endif +#include <pciaccess.h> +#include "Pci.h" +#include "xf86Bus.h" /* forward declarations */ @@ -101,15 +104,14 @@ static void xf86PrintDefaultModulePath(void); static void xf86PrintDefaultLibraryPath(void); static void xf86RunVtInit(void); +static Bool probe_devices_from_device_sections(DriverPtr drvp); +static Bool add_matching_devices_to_configure_list(DriverPtr drvp); +static Bool check_for_matching_devices(DriverPtr drvp); + #ifdef XF86PM void (*xf86OSPMClose)(void) = NULL; #endif -static char *baseModules[] = { - "pcidata", - NULL -}; - /* Common pixmap formats */ static PixmapFormatRec formats[MAXFORMATS] = { @@ -243,6 +245,233 @@ PostConfigInit(void) OsInitColors(); } + +#define END_OF_MATCHES(m) \ + (((m).vendor_id == 0) && ((m).device_id == 0) && ((m).subvendor_id == 0)) + +Bool +probe_devices_from_device_sections(DriverPtr drvp) +{ + int i, j; + struct pci_device * pPci; + Bool foundScreen = FALSE; + const struct pci_id_match * const devices = drvp->supported_devices; + GDevPtr *devList; + const unsigned numDevs = xf86MatchDevice(drvp->driverName, & devList); + + + for ( i = 0 ; i < numDevs ; i++ ) { + struct pci_device_iterator *iter; + unsigned device_id; + + + /* Find the pciVideoRec associated with this device section. + */ + iter = pci_id_match_iterator_create(NULL); + while ((pPci = pci_device_next(iter)) != NULL) { + if (devList[i]->busID && *devList[i]->busID) { + if (xf86ComparePciBusString(devList[i]->busID, + ((pPci->domain << 8) + | pPci->bus), + pPci->dev, + pPci->func)) { + break; + } + } + else if (xf86IsPrimaryPci(pPci)) { + break; + } + } + + pci_iterator_destroy(iter); + + if (pPci == NULL) { + continue; + } + + device_id = (devList[i]->chipID > 0) + ? devList[i]->chipID : pPci->device_id; + + + /* Once the pciVideoRec is found, determine if the device is supported + * by the driver. If it is, probe it! + */ + for ( j = 0 ; ! END_OF_MATCHES( devices[j] ) ; j++ ) { + if ( PCI_ID_COMPARE( devices[j].vendor_id, pPci->vendor_id ) + && PCI_ID_COMPARE( devices[j].device_id, device_id ) + && ((devices[j].device_class_mask & pPci->device_class) + == devices[j].device_class) ) { + int entry; + + /* Allow the same entity to be used more than once for + * devices with multiple screens per entity. This assumes + * implicitly that there will be a screen == 0 instance. + * + * FIXME Need to make sure that two different drivers don't + * FIXME claim the same screen > 0 instance. + */ + if ( (devList[i]->screen == 0) && !xf86CheckPciSlot( pPci ) ) + continue; + +#ifdef DEBUG + ErrorF("%s: card at %d:%d:%d is claimed by a Device section\n", + drvp->driverName, pPci->bus, pPci->device, pPci->func); +#endif + + /* Allocate an entry in the lists to be returned */ + entry = xf86ClaimPciSlot(pPci, drvp, device_id, + devList[i], devList[i]->active); + + if ((entry == -1) && (devList[i]->screen > 0)) { + unsigned k; + + for ( k = 0; k < xf86NumEntities; k++ ) { + EntityPtr pEnt = xf86Entities[k]; + if (pEnt->busType != BUS_PCI) + continue; + + if (pEnt->bus.id.pci == pPci) { + entry = k; + xf86AddDevToEntity(k, devList[i]); + break; + } + } + } + + if (entry != -1) { + if ((*drvp->PciProbe)(drvp, entry, pPci, + devices[j].match_data)) { + foundScreen = TRUE; + } + } + + break; + } + } + } + + + return foundScreen; +} + + +Bool +add_matching_devices_to_configure_list(DriverPtr drvp) +{ + const struct pci_id_match * const devices = drvp->supported_devices; + int j; + struct pci_device *pPci; + struct pci_device_iterator *iter; + int numFound = 0; + + + iter = pci_id_match_iterator_create(NULL); + while ((pPci = pci_device_next(iter)) != NULL) { + /* Determine if this device is supported by the driver. If it is, + * add it to the list of devices to configure. + */ + for (j = 0 ; ! END_OF_MATCHES(devices[j]) ; j++) { + if ( PCI_ID_COMPARE( devices[j].vendor_id, pPci->vendor_id ) + && PCI_ID_COMPARE( devices[j].device_id, pPci->device_id ) + && ((devices[j].device_class_mask & pPci->device_class) + == devices[j].device_class) ) { + if (xf86CheckPciSlot(pPci)) { + GDevPtr pGDev = + xf86AddDeviceToConfigure(drvp->driverName, pPci, -1); + if (pGDev != NULL) { + /* After configure pass 1, chipID and chipRev are + * treated as over-rides, so clobber them here. + */ + pGDev->chipID = -1; + pGDev->chipRev = -1; + } + + numFound++; + } + + break; + } + } + } + + pci_iterator_destroy(iter); + + + return (numFound != 0); +} + + +Bool +check_for_matching_devices(DriverPtr drvp) +{ + const struct pci_id_match * const devices = drvp->supported_devices; + int j; + + + for (j = 0; ! END_OF_MATCHES(devices[j]); j++) { + struct pci_device_iterator *iter; + struct pci_device *dev; + + iter = pci_id_match_iterator_create(& devices[j]); + dev = pci_device_next(iter); + pci_iterator_destroy(iter); + + if (dev != NULL) { + return TRUE; + } + } + + + return FALSE; +} + + +/** + * Call the driver's correct probe function. + * + * If the driver implements the \c DriverRec::PciProbe entry-point and an + * appropriate PCI device (with matching Device section in the xorg.conf file) + * is found, it is called. If \c DriverRec::PciProbe or no devices can be + * successfully probed with it (e.g., only non-PCI devices are available), + * the driver's \c DriverRec::Probe function is called. + * + * \param drv Driver to probe + * + * \return + * If a device can be successfully probed by the driver, \c TRUE is + * returned. Otherwise, \c FALSE is returned. + */ +Bool +xf86CallDriverProbe( DriverPtr drv, Bool detect_only ) +{ + Bool foundScreen = FALSE; + + if ( drv->PciProbe != NULL ) { + if ( xf86DoProbe ) { + assert( detect_only ); + foundScreen = check_for_matching_devices( drv ); + } + else if ( xf86DoConfigure && xf86DoConfigurePass1 ) { + assert( detect_only ); + foundScreen = add_matching_devices_to_configure_list( drv ); + } + else { + assert( ! detect_only ); + foundScreen = probe_devices_from_device_sections( drv ); + } + } + + if ( ! foundScreen && (drv->Probe != NULL) ) { + xf86Msg( X_WARNING, "Falling back to old probe method for %s\n", + drv->driverName ); + foundScreen = (*drv->Probe)( drv, (detect_only) ? PROBE_DETECT + : PROBE_DEFAULT ); + } + + return foundScreen; +} + + void InitOutput(ScreenInfo *pScreenInfo, int argc, char **argv) { @@ -313,10 +542,6 @@ InitOutput(ScreenInfo *pScreenInfo, int argc, char **argv) LoaderSetOptions(LDR_OPT_ABI_MISMATCH_NONFATAL); } - /* Force load mandatory base modules */ - if (!xf86LoadModules(baseModules, NULL)) - FatalError("Unable to load required base modules, Exiting...\n"); - xf86OpenConsole(); /* Do a general bus probe. This will be a PCI probe for x86 platforms */ @@ -433,16 +658,8 @@ InitOutput(ScreenInfo *pScreenInfo, int argc, char **argv) || NEED_IO_ENABLED(flags)) continue; } - - if (xf86DriverList[i]->Probe != NULL) - xf86DriverList[i]->Probe(xf86DriverList[i], PROBE_DEFAULT); - else { - xf86MsgVerb(X_WARNING, 0, - "Driver `%s' has no Probe function (ignoring)\n", - xf86DriverList[i]->driverName - ? xf86DriverList[i]->driverName : "noname"); - } - xf86SetPciVideo(NULL,NONE); + + xf86CallDriverProbe( xf86DriverList[i], FALSE ); } /* @@ -1501,8 +1718,9 @@ ddxProcessArgument(int argc, char **argv, int i) FatalError("Bus types other than PCI not yet isolable\n"); } if (sscanf(argv[i], "PCI:%d:%d:%d", &bus, &device, &func) == 3) { - xf86IsolateDevice.bus = bus; - xf86IsolateDevice.device = device; + xf86IsolateDevice.domain = PCI_DOM_FROM_BUS(bus); + xf86IsolateDevice.bus = PCI_BUS_NO_DOMAIN(bus); + xf86IsolateDevice.dev = device; xf86IsolateDevice.func = func; return 2; } else { diff --git a/hw/xfree86/common/xf86Priv.h b/hw/xfree86/common/xf86Priv.h index b6fbd3a41..3da102f5d 100644 --- a/hw/xfree86/common/xf86Priv.h +++ b/hw/xfree86/common/xf86Priv.h @@ -36,6 +36,8 @@ #ifndef _XF86PRIV_H #define _XF86PRIV_H +#include <pciaccess.h> + #include "xf86Privstr.h" #include "propertyst.h" @@ -76,7 +78,7 @@ extern Bool xf86BestRefresh; extern Gamma xf86Gamma; extern char *xf86ServerName; extern Bool xf86ShowUnresolved; -extern PciBusId xf86IsolateDevice; +extern struct pci_slot_match xf86IsolateDevice; /* Other parameters */ @@ -101,7 +103,6 @@ extern int xf86NumDrivers; extern Bool xf86Resetting; extern Bool xf86Initialising; extern int xf86NumScreens; -extern pciVideoPtr *xf86PciVideoInfo; extern xf86CurrentAccessRec xf86CurrentAccess; extern const char *xf86VisualNames[]; extern int xf86Verbose; /* verbosity level */ @@ -148,9 +149,6 @@ void xf86ClearEntityListForScreen(int scrnIndex); void xf86AddDevToEntity(int entityIndex, GDevPtr dev); extern void xf86PostPreInit(void); extern void xf86PostScreenInit(void); -extern memType getValidBIOSBase(PCITAG tag, int num); -extern memType getEmptyPciRange(PCITAG tag, int base_reg); -extern int pciTestMultiDeviceCard(int bus, int dev, int func, PCITAG** pTag); /* xf86Config.c */ @@ -187,6 +185,7 @@ void xf86CloseLog(void); Bool xf86LoadModules(char **list, pointer *optlist); int xf86SetVerbosity(int verb); int xf86SetLogVerbosity(int verb); +Bool xf86CallDriverProbe( struct _DriverRec * drv, Bool detect_only ); /* xf86Lock.c */ diff --git a/hw/xfree86/common/xf86pciBus.c b/hw/xfree86/common/xf86pciBus.c index 096b78997..13e13e980 100644 --- a/hw/xfree86/common/xf86pciBus.c +++ b/hw/xfree86/common/xf86pciBus.c @@ -36,6 +36,7 @@ #include <stdlib.h> #include <unistd.h> #include <X11/X.h> +#include <pciaccess.h> #include "os.h" #include "Pci.h" #include "xf86.h" @@ -43,8 +44,6 @@ #include "xf86Resources.h" /* Bus-specific headers */ -#include "xf86PciData.h" - #include "xf86Bus.h" #define XF86_OS_PRIVS @@ -55,96 +54,48 @@ /* Bus-specific globals */ Bool pciSlotClaimed = FALSE; -pciConfigPtr *xf86PciInfo = NULL; /* Full PCI probe info */ -pciVideoPtr *xf86PciVideoInfo = NULL; /* PCI probe for video hw */ -pciAccPtr * xf86PciAccInfo = NULL; /* PCI access related */ - -/* pcidata globals */ -ScanPciSetupProcPtr xf86SetupPciIds = NULL; -ScanPciCloseProcPtr xf86ClosePciIds = NULL; -ScanPciFindByDeviceProcPtr xf86FindPciNamesByDevice = NULL; -ScanPciFindBySubsysProcPtr xf86FindPciNamesBySubsys = NULL; - -static resPtr pciAvoidRes = NULL; +static struct pci_device ** xf86PciVideoInfo = NULL; /* PCI probe for video hw */ -/* PCI buses */ -static PciBusPtr xf86PciBus = NULL; -/* Bus-specific probe/sorting functions */ /* PCI classes that get included in xf86PciVideoInfo */ -#define PCIINFOCLASSES(b,s) \ - (((b) == PCI_CLASS_PREHISTORIC) || \ - ((b) == PCI_CLASS_DISPLAY) || \ - ((b) == PCI_CLASS_MULTIMEDIA && (s) == PCI_SUBCLASS_MULTIMEDIA_VIDEO) || \ - ((b) == PCI_CLASS_PROCESSOR && (s) == PCI_SUBCLASS_PROCESSOR_COPROC)) +#define PCIINFOCLASSES(c) \ + ( (((c) & 0x00ff0000) == (PCI_CLASS_PREHISTORIC << 16)) \ + || (((c) & 0x00ff0000) == (PCI_CLASS_DISPLAY << 16)) \ + || ((((c) & 0x00ffff00) \ + == ((PCI_CLASS_MULTIMEDIA << 16) | (PCI_SUBCLASS_MULTIMEDIA_VIDEO << 8)))) \ + || ((((c) & 0x00ffff00) \ + == ((PCI_CLASS_PROCESSOR << 16) | (PCI_SUBCLASS_PROCESSOR_COPROC << 8)))) ) /* * PCI classes that have messages printed always. The others are only * have a message printed when the vendor/dev IDs are recognised. */ -#define PCIALWAYSPRINTCLASSES(b,s) \ - (((b) == PCI_CLASS_PREHISTORIC && (s) == PCI_SUBCLASS_PREHISTORIC_VGA) || \ - ((b) == PCI_CLASS_DISPLAY) || \ - ((b) == PCI_CLASS_MULTIMEDIA && (s) == PCI_SUBCLASS_MULTIMEDIA_VIDEO)) - +#define PCIALWAYSPRINTCLASSES(c) \ + ( (((c) & 0x00ffff00) \ + == ((PCI_CLASS_PREHISTORIC << 16) | (PCI_SUBCLASS_PREHISTORIC_VGA << 8))) \ + || (((c) & 0x00ff0000) == (PCI_CLASS_DISPLAY << 16)) \ + || ((((c) & 0x00ffff00) \ + == ((PCI_CLASS_MULTIMEDIA << 16) | (PCI_SUBCLASS_MULTIMEDIA_VIDEO << 8)))) ) + +#define IS_VGA(c) \ + (((c) & 0x00ffff00) \ + == ((PCI_CLASS_DISPLAY << 16) | (PCI_SUBCLASS_DISPLAY_VGA << 8))) + /* * PCI classes for which potentially destructive checking of the map sizes * may be done. Any classes where this may be unsafe should be omitted * from this list. */ -#define PCINONSYSTEMCLASSES(b,s) PCIALWAYSPRINTCLASSES(b,s) +#define PCINONSYSTEMCLASSES(c) PCIALWAYSPRINTCLASSES(c) /* * PCI classes that use RAC */ -#define PCISHAREDIOCLASSES(b,s) \ - (((b) == PCI_CLASS_PREHISTORIC && (s) == PCI_SUBCLASS_PREHISTORIC_VGA) || \ - ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_VGA)) - -#define PCI_MEM32_LENGTH_MAX 0xFFFFFFFF - -#define B2M(tag,base) pciBusAddrToHostAddr(tag,PCI_MEM,base) -#define B2I(tag,base) pciBusAddrToHostAddr(tag,PCI_IO,base) -#define B2H(tag,base,type) (((type & ResPhysMask) == ResMem) ? \ - B2M(tag, base) : B2I(tag, base)) -#define M2B(tag,base) pciHostAddrToBusAddr(tag,PCI_MEM,base) -#define I2B(tag,base) pciHostAddrToBusAddr(tag,PCI_IO,base) -#define H2B(tag,base,type) (((type & ResPhysMask) == ResMem) ? \ - M2B(tag, base) : I2B(tag, base)) -#define TAG(pvp) (pciTag(pvp->bus,pvp->device,pvp->func)) -#define SIZE(size) ((1 << size) - 1) -#define PCI_SIZE(type,tag,size) (((type & ResPhysMask) == ResMem) \ - ? pciBusAddrToHostAddr(tag,PCI_MEM_SIZE,size) \ - : pciBusAddrToHostAddr(tag,PCI_IO_SIZE,size)) -#define PCI_M_RANGE(range,tag,begin,end,type) \ - { \ - RANGE(range, B2M(tag, begin), B2M(tag, end), \ - RANGE_TYPE(type, xf86GetPciDomain(tag))); \ - } -#define PCI_I_RANGE(range,tag,begin,end,type) \ - { \ - RANGE(range, B2I(tag, begin), B2I(tag, end), \ - RANGE_TYPE(type, xf86GetPciDomain(tag))); \ - } -#define PCI_X_RANGE(range,tag,begin,end,type) \ -{ if ((type & ResPhysMask) == ResMem) PCI_M_RANGE(range,tag,begin,end,type); \ - else PCI_I_RANGE(range,tag,begin,end,type); } -#define P_M_RANGE(range,tag,begin,size,type) \ - PCI_M_RANGE(range,tag,begin,(begin + SIZE(size)),type) -#define P_I_RANGE(range,tag,begin,size,type) \ - PCI_I_RANGE(range,tag,begin,(begin + SIZE(size)),type) -#define P_X_RANGE(range,tag,begin,size,type) \ -{ if ((type & ResPhysMask) == ResMem) P_M_RANGE(range,tag,begin,size,type); \ - else P_I_RANGE(range,tag,begin,size,type); } -#define PV_M_RANGE(range,pvp,i,type) \ - P_M_RANGE(range,TAG(pvp),pvp->memBase[i],pvp->size[i],type) -#define PV_B_RANGE(range,pvp,type) \ - P_M_RANGE(range,TAG(pvp),pvp->biosBase,pvp->biosSize,type) -#define PV_I_RANGE(range,pvp,i,type) \ - P_I_RANGE(range,TAG(pvp),pvp->ioBase[i],pvp->size[i],type) - -static void pciConvertListToHost(int bus, int dev, int func, resPtr list); -static PciBusPtr xf86GetPciBridgeInfo(void); +#define PCISHAREDIOCLASSES(c) \ + ( (((c) & 0x00ffff00) \ + == ((PCI_CLASS_PREHISTORIC << 16) | (PCI_SUBCLASS_PREHISTORIC_VGA << 8))) \ + || IS_VGA(c) ) + _X_EXPORT void xf86FormatPciBusNumber(int busnum, char *buffer) @@ -156,212 +107,49 @@ xf86FormatPciBusNumber(int busnum, char *buffer) sprintf(buffer, "%d@%d", busnum & 0x00ff, busnum >> 8); } -static Bool -IsBaseUnassigned(CARD32 base) -{ - CARD32 mask; - - if (base & PCI_MAP_IO) - mask = ~PCI_MAP_IO_ATTR_MASK; - else - mask = ~PCI_MAP_MEMORY_ATTR_MASK; - - base &= mask; - return (!base || (base == mask)); -} - -static Bool -IsBaseUnassigned64(CARD32 base0, CARD32 base1) -{ - base0 &= ~PCI_MAP_MEMORY_ATTR_MASK; - base1 &= 0xffffffff; - - return ((!base0 && !base1) - || ((base0 == ~PCI_MAP_MEMORY_ATTR_MASK) - && (base1 == 0xffffffff))); -} - static void FindPCIVideoInfo(void) { - pciConfigPtr pcrp, *pcrpp; - int i = 0, j, k; + int i = 0, k; int num = 0; - pciVideoPtr info; - int DoIsolateDeviceCheck = 0; + struct pci_device *info; + struct pci_device_iterator *iter; - if (xf86IsolateDevice.bus || xf86IsolateDevice.device || xf86IsolateDevice.func) - DoIsolateDeviceCheck = 1; - pcrpp = xf86PciInfo = xf86scanpci(0); - - if (pcrpp == NULL) { + if (!xf86scanpci()) { xf86PciVideoInfo = NULL; return; } - xf86PciBus = xf86GetPciBridgeInfo(); - while ((pcrp = pcrpp[i])) { - const int baseclass = pcrp->pci_base_class; - const int subclass = pcrp->pci_sub_class; - - if ( PCIINFOCLASSES(baseclass, subclass) && - (!DoIsolateDeviceCheck || - (xf86IsolateDevice.bus == pcrp->busnum && - xf86IsolateDevice.device == pcrp->devnum && - xf86IsolateDevice.func == pcrp->funcnum)) ) { + iter = pci_slot_match_iterator_create(& xf86IsolateDevice); + while ((info = pci_device_next(iter)) != NULL) { + if (PCIINFOCLASSES(info->device_class)) { num++; xf86PciVideoInfo = xnfrealloc(xf86PciVideoInfo, - sizeof(pciVideoPtr) * (num + 1)); + (sizeof(struct pci_device *) + * (num + 1))); xf86PciVideoInfo[num] = NULL; - info = xf86PciVideoInfo[num - 1] = xnfalloc(sizeof(pciVideoRec)); - info->validSize = FALSE; - info->vendor = pcrp->pci_vendor; - info->chipType = pcrp->pci_device; - info->chipRev = pcrp->pci_rev_id; - info->subsysVendor = pcrp->pci_subsys_vendor; - info->subsysCard = pcrp->pci_subsys_card; - info->bus = pcrp->busnum; - info->device = pcrp->devnum; - info->func = pcrp->funcnum; - info->class = baseclass; - info->subclass = pcrp->pci_sub_class; - info->interface = pcrp->pci_prog_if; - info->biosBase = PCIGETROM(pcrp->pci_baserom); - info->biosSize = pciGetBaseSize(pcrp->tag, 6, TRUE, NULL); - info->thisCard = pcrp; - info->validate = FALSE; -#ifdef INCLUDE_XF86_NO_DOMAIN - if ((PCISHAREDIOCLASSES(baseclass, subclass)) - && (pcrp->pci_command & PCI_CMD_IO_ENABLE) && - (pcrp->pci_prog_if == 0)) { - - /* - * Attempt to ensure that VGA is actually routed to this - * adapter on entry. This needs to be fixed when we finally - * grok host bridges (and multiple bus trees). - */ - j = info->bus; - while (TRUE) { - PciBusPtr pBus = xf86PciBus; - while (pBus && j != pBus->secondary) - pBus = pBus->next; - if (!pBus || !(pBus->brcontrol & PCI_PCI_BRIDGE_VGA_EN)) - break; - if (j == pBus->primary) { - if (primaryBus.type == BUS_NONE) { - /* assumption: primary adapter is always VGA */ - primaryBus.type = BUS_PCI; - primaryBus.id.pci.bus = pcrp->busnum; - primaryBus.id.pci.device = pcrp->devnum; - primaryBus.id.pci.func = pcrp->funcnum; - } else if (primaryBus.type < BUS_last) { - xf86Msg(X_NOTICE, - "More than one primary device found\n"); - primaryBus.type ^= (BusType)(-1); - } - break; - } - j = pBus->primary; - } - } -#endif - - for (j = 0; j < 6; j++) { - info->memBase[j] = 0; - info->ioBase[j] = 0; - if (PCINONSYSTEMCLASSES(baseclass, subclass)) { - info->size[j] = - pciGetBaseSize(pcrp->tag, j, TRUE, &info->validSize); - pcrp->minBasesize = info->validSize; - } else { - info->size[j] = pcrp->basesize[j]; - info->validSize = pcrp->minBasesize; - } - info->type[j] = 0; - } + xf86PciVideoInfo[num - 1] = info; - if (PCINONSYSTEMCLASSES(baseclass, subclass)) { - /* - * Check of a PCI base is unassigned. If so - * attempt to fix it. Validation will determine - * if the value was correct later on. - */ - CARD32 *base = &pcrp->pci_base0; - - for (j = 0; j < 6; j++) { - if (!PCI_MAP_IS64BITMEM(base[j])) { - if (info->size[j] && IsBaseUnassigned(base[j])) - base[j] = pciCheckForBrokenBase(pcrp->tag, j); - } else { - if (j == 5) /* bail out */ - break; - if (info->size[j] - && IsBaseUnassigned64(base[j],base[j+1])) { - base[j] = pciCheckForBrokenBase(pcrp->tag, j); - j++; - base[j] = pciCheckForBrokenBase(pcrp->tag, j); - } - } - } - } - - /* - * 64-bit base addresses are checked for and avoided on 32-bit - * platforms. - */ - for (j = 0; j < 6; ++j) { - CARD32 bar = (&pcrp->pci_base0)[j]; - - if (bar != 0) { - if (bar & PCI_MAP_IO) { - info->ioBase[j] = (memType)PCIGETIO(bar); - info->type[j] = bar & PCI_MAP_IO_ATTR_MASK; - } else { - info->type[j] = bar & PCI_MAP_MEMORY_ATTR_MASK; - info->memBase[j] = (memType)PCIGETMEMORY(bar); - if (PCI_MAP_IS64BITMEM(bar)) { - if (j == 5) { - xf86MsgVerb(X_WARNING, 0, - "****BAR5 specified as 64-bit wide, " - "which is not possible. " - "Ignoring BAR5.****\n"); - info->memBase[j] = 0; - } else { - CARD32 bar_hi = PCIGETMEMORY64HIGH((&pcrp->pci_base0)[j]); -#if defined(LONG64) || defined(WORD64) - /* 64 bit architecture */ - info->memBase[j] |= - (memType)bar_hi << 32; -#else - if (bar_hi != 0) - info->memBase[j] = 0; -#endif - ++j; /* Step over the next BAR */ - } - } - } - } - } + pci_device_probe(info); + info->user_data = 0; } - i++; } + /* If we haven't found a primary device try a different heuristic */ if (primaryBus.type == BUS_NONE && num) { - for (i = 0; i < num; i++) { + for (i = 0; i < num; i++) { + uint16_t command; + info = xf86PciVideoInfo[i]; - pcrp = info->thisCard; - - if ((pcrp->pci_command & PCI_CMD_MEM_ENABLE) && - (num == 1 || - ((info->class == PCI_CLASS_DISPLAY) && - (info->subclass == PCI_SUBCLASS_DISPLAY_VGA)))) { + pci_device_cfg_read_u16(info, & command, 4); + + if ((command & PCI_CMD_MEM_ENABLE) + && ((num == 1) || IS_VGA(info->device_class))) { if (primaryBus.type == BUS_NONE) { primaryBus.type = BUS_PCI; - primaryBus.id.pci.bus = pcrp->busnum; - primaryBus.id.pci.device = pcrp->devnum; - primaryBus.id.pci.func = pcrp->funcnum; + primaryBus.id.pci = info; } else { xf86Msg(X_NOTICE, "More than one possible primary device found\n"); @@ -375,141 +163,71 @@ FindPCIVideoInfo(void) for (k = 0; k < num; k++) { const char *vendorname = NULL, *chipname = NULL; const char *prim = " "; - char busnum[8]; Bool memdone = FALSE, iodone = FALSE; - i = 0; + info = xf86PciVideoInfo[k]; - xf86FormatPciBusNumber(info->bus, busnum); - xf86FindPciNamesByDevice(info->vendor, info->chipType, - NOVENDOR, NOSUBSYS, - &vendorname, &chipname, NULL, NULL); + + vendorname = pci_device_get_vendor_name( info ); + chipname = pci_device_get_device_name( info ); + if ((!vendorname || !chipname) && - !PCIALWAYSPRINTCLASSES(info->class, info->subclass)) + !PCIALWAYSPRINTCLASSES(info->device_class)) continue; + if (xf86IsPrimaryPci(info)) prim = "*"; - xf86Msg(X_PROBED, "PCI:%s(%s:%d:%d) ", prim, busnum, info->device, - info->func); + xf86Msg( X_PROBED, "PCI:%s(%u@%u:%u:%u) ", prim, info->domain, + info->bus, info->dev, info->func ); + if (vendorname) xf86ErrorF("%s ", vendorname); else - xf86ErrorF("unknown vendor (0x%04x) ", info->vendor); + xf86ErrorF("unknown vendor (0x%04x) ", info->vendor_id); + if (chipname) xf86ErrorF("%s ", chipname); else - xf86ErrorF("unknown chipset (0x%04x) ", info->chipType); - xf86ErrorF("rev %d", info->chipRev); + xf86ErrorF("unknown chipset (0x%04x) ", info->device_id); + + xf86ErrorF("rev %d", info->revision); + for (i = 0; i < 6; i++) { - if (info->memBase[i] && - (info->memBase[i] < (memType)(-1 << info->size[i]))) { + struct pci_mem_region * r = & info->regions[i]; + + if ( r->size && ! r->is_IO ) { if (!memdone) { xf86ErrorF(", Mem @ "); memdone = TRUE; } else xf86ErrorF(", "); - xf86ErrorF("0x%08lx/%d", info->memBase[i], info->size[i]); + xf86ErrorF("0x%08lx/%ld", r->base_addr, r->size); } } + for (i = 0; i < 6; i++) { - if (info->ioBase[i] && - (info->ioBase[i] < (memType)(-1 << info->size[i]))) { + struct pci_mem_region * r = & info->regions[i]; + + if ( r->size && r->is_IO ) { if (!iodone) { xf86ErrorF(", I/O @ "); iodone = TRUE; } else xf86ErrorF(", "); - xf86ErrorF("0x%04lx/%d", info->ioBase[i], info->size[i]); + xf86ErrorF("0x%08lx/%ld", r->base_addr, r->size); } } - if (info->biosBase && - (info->biosBase < (memType)(-1 << info->biosSize))) - xf86ErrorF(", BIOS @ 0x%08lx/%d", info->biosBase, info->biosSize); - xf86ErrorF("\n"); - } -} -/* - * fixPciSizeInfo() -- fix pci size info by testing it destructively - * (if not already done), fix pciVideoInfo and entry in the resource - * list. - */ -/* - * Note: once we have OS support to read the sizes GetBaseSize() will - * have to be wrapped by the OS layer. fixPciSizeInfo() should also - * be wrapped by the OS layer to do nothing if the size is always - * returned correctly by GetBaseSize(). It should however set validate - * in pciVideoRec if validation is required. ValidatePci() also needs - * to be wrapped by the OS layer. This may do nothing if the OS has - * already taken care of validation. fixPciResource() may be moved to - * OS layer with minimal changes. Once the wrapping layer is in place - * the common level and drivers should not reference these functions - * directly but thru the OS layer. - */ - -static void -fixPciSizeInfo(int entityIndex) -{ - pciVideoPtr pvp; - resPtr pAcc; - PCITAG tag; - int j; - - if (! (pvp = xf86GetPciInfoForEntity(entityIndex))) return; - if (pvp->validSize) return; - - tag = pciTag(pvp->bus,pvp->device,pvp->func); - - for (j = 0; j < 6; j++) { - pAcc = Acc; - if (pvp->memBase[j]) - while (pAcc) { - if (((pAcc->res_type & (ResPhysMask | ResBlock)) - == (ResMem | ResBlock)) - && (pAcc->block_begin == B2M(TAG(pvp),pvp->memBase[j])) - && (pAcc->block_end == B2M(TAG(pvp),pvp->memBase[j] - + SIZE(pvp->size[j])))) break; - pAcc = pAcc->next; - } - else if (pvp->ioBase[j]) - while (pAcc) { - if (((pAcc->res_type & (ResPhysMask | ResBlock)) == - (ResIo | ResBlock)) - && (pAcc->block_begin == B2I(TAG(pvp),pvp->ioBase[j])) - && (pAcc->block_end == B2I(TAG(pvp),pvp->ioBase[j] - + SIZE(pvp->size[j])))) break; - pAcc = pAcc->next; - } - else continue; - pvp->size[j] = pciGetBaseSize(tag, j, TRUE, &pvp->validSize); - if (pAcc) { - pAcc->block_end = pvp->memBase[j] ? - B2M(TAG(pvp),pvp->memBase[j] + SIZE(pvp->size[j])) - : B2I(TAG(pvp),pvp->ioBase[j] + SIZE(pvp->size[j])); - pAcc->res_type &= ~ResEstimated; - pAcc->res_type |= ResBios; - } - } - if (pvp->biosBase) { - pAcc = Acc; - while (pAcc) { - if (((pAcc->res_type & (ResPhysMask | ResBlock)) == - (ResMem | ResBlock)) - && (pAcc->block_begin == B2M(TAG(pvp),pvp->biosBase)) - && (pAcc->block_end == B2M(TAG(pvp),pvp->biosBase - + SIZE(pvp->biosSize)))) break; - pAcc = pAcc->next; - } - pvp->biosSize = pciGetBaseSize(tag, 6, TRUE, &pvp->validSize); - if (pAcc) { - pAcc->block_end = B2M(TAG(pvp),pvp->biosBase+SIZE(pvp->biosSize)); - pAcc->res_type &= ~ResEstimated; - pAcc->res_type |= ResBios; + if ( info->rom_size ) { + xf86ErrorF(", BIOS @ 0x\?\?\?\?\?\?\?\?/%ld", info->rom_size); } + + xf86ErrorF("\n"); } } + /* * IO enable/disable related routines for PCI */ @@ -518,21 +236,25 @@ fixPciSizeInfo(int entityIndex) static void pciIoAccessEnable(void* arg) { +#if 0 #ifdef DEBUG ErrorF("pciIoAccessEnable: 0x%05lx\n", *(PCITAG *)arg); #endif pArg->ctrl |= SETBITS | PCI_CMD_MASTER_ENABLE; - pciWriteLong(pArg->tag, PCI_CMD_STAT_REG, pArg->ctrl); + pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG); +#endif } static void pciIoAccessDisable(void* arg) { +#if 0 #ifdef DEBUG ErrorF("pciIoAccessDisable: 0x%05lx\n", *(PCITAG *)arg); #endif pArg->ctrl &= ~SETBITS; - pciWriteLong(pArg->tag, PCI_CMD_STAT_REG, pArg->ctrl); + pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG); +#endif } #undef SETBITS @@ -540,21 +262,25 @@ pciIoAccessDisable(void* arg) static void pciIo_MemAccessEnable(void* arg) { +#if 0 #ifdef DEBUG ErrorF("pciIo_MemAccessEnable: 0x%05lx\n", *(PCITAG *)arg); #endif pArg->ctrl |= SETBITS | PCI_CMD_MASTER_ENABLE; - pciWriteLong(pArg->tag, PCI_CMD_STAT_REG, pArg->ctrl); + pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG); +#endif } static void pciIo_MemAccessDisable(void* arg) { +#if 0 #ifdef DEBUG ErrorF("pciIo_MemAccessDisable: 0x%05lx\n", *(PCITAG *)arg); #endif pArg->ctrl &= ~SETBITS; - pciWriteLong(pArg->tag, PCI_CMD_STAT_REG, pArg->ctrl); + pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG); +#endif } #undef SETBITS @@ -562,21 +288,25 @@ pciIo_MemAccessDisable(void* arg) static void pciMemAccessEnable(void* arg) { +#if 0 #ifdef DEBUG ErrorF("pciMemAccessEnable: 0x%05lx\n", *(PCITAG *)arg); #endif pArg->ctrl |= SETBITS | PCI_CMD_MASTER_ENABLE; - pciWriteLong(pArg->tag, PCI_CMD_STAT_REG, pArg->ctrl); + pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG); +#endif } static void pciMemAccessDisable(void* arg) { +#if 0 #ifdef DEBUG ErrorF("pciMemAccessDisable: 0x%05lx\n", *(PCITAG *)arg); #endif pArg->ctrl &= ~SETBITS; - pciWriteLong(pArg->tag, PCI_CMD_STAT_REG, pArg->ctrl); + pci_device_cfg_write_u32(pArg->dev, pArg->ctrl, PCI_CMD_STAT_REG); +#endif } #undef SETBITS #undef pArg @@ -587,69 +317,46 @@ pciMemAccessDisable(void* arg) static void pciBusAccessEnable(BusAccPtr ptr) { - PCITAG tag = ptr->busdep.pci.acc; - CARD16 ctrl; +#if 0 + struct pci_device * const dev = ptr->busdep.pci.dev; + uint16_t ctrl; #ifdef DEBUG ErrorF("pciBusAccessEnable: bus=%d\n", ptr->busdep.pci.bus); #endif - ctrl = pciReadWord(tag, PCI_PCI_BRIDGE_CONTROL_REG); + pci_device_cfg_read_u16( dev, & ctrl, PCI_PCI_BRIDGE_CONTROL_REG ); if ((ctrl & MASKBITS) != PCI_PCI_BRIDGE_VGA_EN) { ctrl = (ctrl | PCI_PCI_BRIDGE_VGA_EN) & ~(PCI_PCI_BRIDGE_MASTER_ABORT_EN | PCI_PCI_BRIDGE_SECONDARY_RESET); - pciWriteWord(tag, PCI_PCI_BRIDGE_CONTROL_REG, ctrl); + pci_device_cfg_write_u16(dev, ctrl, PCI_PCI_BRIDGE_CONTROL_REG); } +#endif } /* move to OS layer */ static void pciBusAccessDisable(BusAccPtr ptr) { - PCITAG tag = ptr->busdep.pci.acc; - CARD16 ctrl; +#if 0 + struct pci_device * const dev = ptr->busdep.pci.dev; + uint16_t ctrl; #ifdef DEBUG ErrorF("pciBusAccessDisable: bus=%d\n", ptr->busdep.pci.bus); #endif - ctrl = pciReadWord(tag, PCI_PCI_BRIDGE_CONTROL_REG); + pci_device_cfg_read_u16( dev, & ctrl, PCI_PCI_BRIDGE_CONTROL_REG ); if (ctrl & MASKBITS) { ctrl &= ~(MASKBITS | PCI_PCI_BRIDGE_SECONDARY_RESET); - pciWriteWord(tag, PCI_PCI_BRIDGE_CONTROL_REG, ctrl); + pci_device_cfg_write_u16(dev, ctrl, PCI_PCI_BRIDGE_CONTROL_REG); } -} -#undef MASKBITS - -/* move to OS layer */ -static void -pciDrvBusAccessEnable(BusAccPtr ptr) -{ - int bus = ptr->busdep.pci.bus; - -#ifdef DEBUG - ErrorF("pciDrvBusAccessEnable: bus=%d\n", bus); -#endif - (*pciBusInfo[bus]->funcs->pciControlBridge)(bus, - PCI_PCI_BRIDGE_VGA_EN, - PCI_PCI_BRIDGE_VGA_EN); -} - -/* move to OS layer */ -static void -pciDrvBusAccessDisable(BusAccPtr ptr) -{ - int bus = ptr->busdep.pci.bus; - -#ifdef DEBUG - ErrorF("pciDrvBusAccessDisable: bus=%d\n", bus); #endif - (*pciBusInfo[bus]->funcs->pciControlBridge)(bus, - PCI_PCI_BRIDGE_VGA_EN, 0); } - +#undef MASKBITS static void pciSetBusAccess(BusAccPtr ptr) { +#if 0 #ifdef DEBUG ErrorF("pciSetBusAccess: route VGA to bus %d\n", ptr->busdep.pci.bus); #endif @@ -672,1010 +379,89 @@ pciSetBusAccess(BusAccPtr ptr) } ptr = ptr->primary; } +#endif } /* move to OS layer */ static void -savePciState(PCITAG tag, pciSavePtr ptr) +savePciState( struct pci_device * dev, pciSavePtr ptr ) { +#if 0 int i; - - ptr->command = pciReadLong(tag, PCI_CMD_STAT_REG); - for (i=0; i < 6; i++) - ptr->base[i] = pciReadLong(tag, PCI_CMD_BASE_REG + i*4); - ptr->biosBase = pciReadLong(tag, PCI_CMD_BIOS_REG); -} -/* move to OS layer */ -static void -restorePciState(PCITAG tag, pciSavePtr ptr) -{ - int i; - - /* disable card before setting anything */ - pciSetBitsLong(tag, PCI_CMD_STAT_REG, - PCI_CMD_MEM_ENABLE | PCI_CMD_IO_ENABLE , 0); - pciWriteLong(tag,PCI_CMD_BIOS_REG, ptr->biosBase); - for (i=0; i<6; i++) - pciWriteLong(tag, PCI_CMD_BASE_REG + i*4, ptr->base[i]); - pciWriteLong(tag, PCI_CMD_STAT_REG, ptr->command); -} + pci_device_cfg_read_u32( dev, & ptr->command, PCI_CMD_STAT_REG ); -/* move to OS layer */ -static void -savePciBusState(BusAccPtr ptr) -{ - PCITAG tag = ptr->busdep.pci.acc; - - ptr->busdep.pci.save.control = - pciReadWord(tag, PCI_PCI_BRIDGE_CONTROL_REG) & - ~PCI_PCI_BRIDGE_SECONDARY_RESET; - /* Allow master aborts to complete normally on non-root buses */ - if (ptr->busdep.pci.save.control & PCI_PCI_BRIDGE_MASTER_ABORT_EN) - pciWriteWord(tag, PCI_PCI_BRIDGE_CONTROL_REG, - ptr->busdep.pci.save.control & ~PCI_PCI_BRIDGE_MASTER_ABORT_EN); -} - -/* move to OS layer */ -#define MASKBITS (PCI_PCI_BRIDGE_VGA_EN | PCI_PCI_BRIDGE_MASTER_ABORT_EN) -static void -restorePciBusState(BusAccPtr ptr) -{ - PCITAG tag = ptr->busdep.pci.acc; - CARD16 ctrl; - - /* Only restore the bits we've changed (and don't cause resets) */ - ctrl = pciReadWord(tag, PCI_PCI_BRIDGE_CONTROL_REG); - if ((ctrl ^ ptr->busdep.pci.save.control) & MASKBITS) { - ctrl &= ~(MASKBITS | PCI_PCI_BRIDGE_SECONDARY_RESET); - ctrl |= ptr->busdep.pci.save.control & MASKBITS; - pciWriteWord(tag, PCI_PCI_BRIDGE_CONTROL_REG, ctrl); + for ( i = 0; i < 6; i++ ) { + pci_device_cfg_read_u32( dev, & ptr->base[i], + PCI_CMD_BASE_REG + (i * 4) ); } -} -#undef MASKBITS -/* move to OS layer */ -static void -savePciDrvBusState(BusAccPtr ptr) -{ - int bus = ptr->busdep.pci.bus; - - ptr->busdep.pci.save.control = - (*pciBusInfo[bus]->funcs->pciControlBridge)(bus, 0, 0); - /* Allow master aborts to complete normally on this bus */ - (*pciBusInfo[bus]->funcs->pciControlBridge)(bus, - PCI_PCI_BRIDGE_MASTER_ABORT_EN, - 0); + pci_device_cfg_read_u32( dev, & ptr->biosBase, PCI_CMD_BIOS_REG ); +#endif } /* move to OS layer */ static void -restorePciDrvBusState(BusAccPtr ptr) -{ - int bus = ptr->busdep.pci.bus; - - (*pciBusInfo[bus]->funcs->pciControlBridge)(bus, (CARD16)(-1), - ptr->busdep.pci.save.control); -} - - -static void -disablePciBios(PCITAG tag) -{ - pciSetBitsLong(tag, PCI_CMD_BIOS_REG, PCI_CMD_BIOS_ENABLE, 0); -} - -/* ????? */ -static void -correctPciSize(memType base, memType oldsize, memType newsize, - unsigned long type) +restorePciState( struct pci_device * dev, pciSavePtr ptr) { - pciConfigPtr pcrp, *pcrpp; - pciVideoPtr pvp, *pvpp; - CARD32 *basep; +#if 0 int i; - int old_bits = 0, new_bits = 0; - - if (oldsize + 1) while (oldsize & 1) { - old_bits ++; - oldsize >>= 1; - } - if (newsize + 1) while (newsize & 1) { - new_bits ++; - newsize >>= 1; - } - for (pcrpp = xf86PciInfo, pcrp = *pcrpp; pcrp; pcrp = *++(pcrpp)) { - - /* Only process devices with type 0 headers */ - if ((pcrp->pci_header_type & 0x7f) != 0) - continue; - - basep = &pcrp->pci_base0; - for (i = 0; i < 6; i++) { - if (basep[i] && (pcrp->basesize[i] == old_bits)) { - if ((((type & ResPhysMask) == ResIo) && - PCI_MAP_IS_IO(basep[i]) && - B2I(pcrp->tag,PCIGETIO(basep[i]) == base)) || - (((type & ResPhysMask) == ResMem) && - PCI_MAP_IS_MEM(basep[i]) && - (((!PCI_MAP_IS64BITMEM(basep[i])) && - (B2M(pcrp->tag,PCIGETMEMORY(basep[i])) == base)) -#if defined(LONG64) || defined(WORD64) - || - (B2M(pcrp->tag,PCIGETMEMORY64(basep[i])) == base) -#else - || - (!basep[i+1] - && (B2M(pcrp->tag,PCIGETMEMORY(basep[i])) == base)) -#endif - ))) { - pcrp->basesize[i] = new_bits; - break; /* to next device */ - } - } - if (PCI_MAP_IS64BITMEM(basep[i])) i++; - } - } - - if (xf86PciVideoInfo) { - for (pvpp = xf86PciVideoInfo, pvp = *pvpp; pvp; pvp = *(++pvpp)) { - - for (i = 0; i < 6; i++) { - if (pvp->size[i] == old_bits) { - if ((((type & ResPhysMask) == ResIo) && pvp->ioBase[i] - && (B2I(TAG(pvp),pvp->ioBase[i]) == base)) || - (((type & ResPhysMask) == ResMem) && pvp->memBase[i] - && (B2M(TAG(pvp),pvp->memBase[i]) == base))) { - pvp->size[i] = new_bits; - break; /* to next device */ - } - } - } - } - } -} - -/* ????? */ -static void -removeOverlapsWithBridges(int busIndex, resPtr target) -{ - PciBusPtr pbp; - resPtr tmp,bridgeRes = NULL; - resRange range; + /* disable card before setting anything */ + pci_device_cfg_write_bits(dev, PCI_CMD_MEM_ENABLE | PCI_CMD_IO_ENABLE, 0, + PCI_CMD_STAT_REG); - if (!target) - return; - - if (!ResCanOverlap(&target->val)) - return; + pci_device_cfg_write_u32(dev, ptr->biosBase, PCI_CMD_BIOS_REG); - range = target->val; - - for (pbp=xf86PciBus; pbp; pbp = pbp->next) { - if (pbp->primary == busIndex) { - tmp = xf86DupResList(pbp->preferred_io); - bridgeRes = xf86JoinResLists(tmp,bridgeRes); - tmp = xf86DupResList(pbp->preferred_mem); - bridgeRes = xf86JoinResLists(tmp,bridgeRes); - tmp = xf86DupResList(pbp->preferred_pmem); - bridgeRes = xf86JoinResLists(tmp,bridgeRes); - } + for ( i = 0; i < 6; i++ ) { + pci_device_cfg_write_u32(dev, ptr->base[i], + PCI_CMD_BASE_REG + (i * 4)); } - - RemoveOverlaps(target, bridgeRes, TRUE, TRUE); - if (range.rEnd > target->block_end) { - correctPciSize(range.rBegin, range.rEnd - range.rBegin, - target->block_end - target->block_begin, - target->res_type); - xf86MsgVerb(X_INFO, 3, - "PCI %s resource overlap reduced 0x%08lx from 0x%08lx to 0x%08lx\n", - ((target->res_type & ResPhysMask) == ResMem) ? "Memory" : "I/O", - range.rBegin, range.rEnd, target->block_end); - } - xf86FreeResList(bridgeRes); -} - -/* ????? */ -static void -xf86GetPciRes(resPtr *activeRes, resPtr *inactiveRes) -{ - pciConfigPtr pcrp, *pcrpp; - pciVideoPtr pvp, *pvpp; - CARD32 *basep; - int i; - resPtr pRes, tmp; - resRange range; - long resMisc; - - if (activeRes) - *activeRes = NULL; - if (inactiveRes) - *inactiveRes = NULL; - - if (!activeRes || !inactiveRes || !xf86PciInfo) - return; - - if (xf86PciVideoInfo) - for (pvpp = xf86PciVideoInfo, pvp = *pvpp; pvp; pvp = *(++pvpp)) { - resPtr *res; - - if (PCINONSYSTEMCLASSES(pvp->class, pvp->subclass)) - resMisc = ResBios; - else - resMisc = 0; - - if (((pciConfigPtr)pvp->thisCard)->pci_command - & (PCI_CMD_IO_ENABLE | PCI_CMD_MEM_ENABLE)) - res = activeRes; - else - res = inactiveRes; - - if (!pvp->validSize) - resMisc |= ResEstimated; - - for (i = 0; i < 6; i++) { - if (pvp->ioBase[i] && - (pvp->ioBase[i] < (memType)(-1 << pvp->size[i]))) { - PV_I_RANGE(range,pvp,i,ResExcIoBlock | resMisc); - tmp = xf86AddResToList(NULL, &range, -1); - removeOverlapsWithBridges(pvp->bus,tmp); - *res = xf86JoinResLists(tmp,*res); - } else if (pvp->memBase[i] && - (pvp->memBase[i] < (memType)(-1 << pvp->size[i]))) { - PV_M_RANGE(range, pvp,i, ResExcMemBlock | resMisc); - tmp = xf86AddResToList(NULL, &range, -1); - removeOverlapsWithBridges(pvp->bus,tmp); - *res = xf86JoinResLists(tmp,*res); - } - } - /* FIXME!!!: Don't use BIOS resources for overlap - * checking but reserve them! - */ - if (pvp->biosBase && - (pvp->biosBase < (memType)(-1 << pvp->biosSize))) { - PV_B_RANGE(range, pvp, ResExcMemBlock | resMisc); - tmp = xf86AddResToList(NULL, &range, -1); - removeOverlapsWithBridges(pvp->bus,tmp); - *res = xf86JoinResLists(tmp,*res); - } - } - for (pcrpp = xf86PciInfo, pcrp = *pcrpp; pcrp; pcrp = *++(pcrpp)) { - resPtr *res; - const CARD8 baseclass = pcrp->pci_base_class; - const CARD8 subclass = pcrp->pci_sub_class; - - - if (PCIINFOCLASSES(baseclass, subclass)) - continue; - - /* Only process devices with type 0 headers */ - if ((pcrp->pci_header_type & 0x7f) != 0) - continue; - - if (!pcrp->minBasesize) - resMisc = ResEstimated; - else - resMisc = 0; - - /* - * Allow resources allocated to host bridges to overlap. Perhaps, this - * needs to be specific to AGP-capable chipsets. AGP "memory" - * sometimes gets allocated within the range routed to the AGP bus. - */ - if ((baseclass == PCI_CLASS_BRIDGE) && - (subclass == PCI_SUBCLASS_BRIDGE_HOST)) - resMisc |= ResOverlap; - - basep = &pcrp->pci_base0; - for (i = 0; i < 6; i++) { - if (basep[i]) { - if (PCI_MAP_IS_IO(basep[i])) { - if (pcrp->pci_command & PCI_CMD_IO_ENABLE) - res = activeRes; - else - res = inactiveRes; - P_I_RANGE(range, pcrp->tag, PCIGETIO(basep[i]), - pcrp->basesize[i], ResExcIoBlock | resMisc) - } else if (!PCI_MAP_IS64BITMEM(basep[i])) { - if (pcrp->pci_command & PCI_CMD_MEM_ENABLE) - res = activeRes; - else - res = inactiveRes; - P_M_RANGE(range, pcrp->tag, PCIGETMEMORY(basep[i]), - pcrp->basesize[i], ResExcMemBlock | resMisc) - } else { - i++; -#if defined(LONG64) || defined(WORD64) - P_M_RANGE(range,pcrp->tag,PCIGETMEMORY64(basep[i - 1]), - pcrp->basesize[i - 1], ResExcMemBlock | resMisc) -#else - if (basep[i]) - continue; - P_M_RANGE(range, pcrp->tag, PCIGETMEMORY(basep[i - 1]), - pcrp->basesize[i - 1], ResExcMemBlock | resMisc) + pci_device_cfg_write_u32(dev, ptr->command, PCI_CMD_STAT_REG); #endif - if (pcrp->pci_command & PCI_CMD_MEM_ENABLE) - res = activeRes; - else - res = inactiveRes; - } - if (range.rBegin) { /* catch cases where PCI base is unset */ - tmp = xf86AddResToList(NULL, &range, -1); - removeOverlapsWithBridges(pcrp->busnum,tmp); - *res = xf86JoinResLists(tmp,*res); - } - } - } - - /* Ignore disabled non-video ROMs */ - if ((pcrp->pci_command & PCI_CMD_MEM_ENABLE) && - (pcrp->pci_baserom & PCI_MAP_ROM_DECODE_ENABLE)) { - P_M_RANGE(range,pcrp->tag,PCIGETROM(pcrp->pci_baserom), - pcrp->basesize[6], ResExcMemBlock | resMisc); - if (range.rBegin) { - tmp = xf86AddResToList(NULL, &range, -1); - removeOverlapsWithBridges(pcrp->busnum, tmp); - *activeRes = xf86JoinResLists(tmp, *activeRes); - } - } - } - - if (*activeRes) { - xf86MsgVerb(X_INFO, 3, "Active PCI resource ranges:\n"); - xf86PrintResList(3, *activeRes); - } - if (*inactiveRes) { - xf86MsgVerb(X_INFO, 3, "Inactive PCI resource ranges:\n"); - xf86PrintResList(3, *inactiveRes); - } - - /* - * Adjust ranges based on the assumption that there are no real - * overlaps in the PCI base allocations. This assumption should be - * reasonable in most cases. It may be possible to refine the - * approximated PCI base sizes by considering bus mapping information - * from PCI-PCI bridges. - */ - - if (*activeRes) { - /* Check for overlaps */ - for (pRes = *activeRes; pRes; pRes = pRes->next) { - if (ResCanOverlap(&pRes->val)) { - range = pRes->val; - - RemoveOverlaps(pRes, *activeRes, TRUE, TRUE); - RemoveOverlaps(pRes, *inactiveRes, TRUE, - (xf86Info.estimateSizesAggressively > 0)); - - if (range.rEnd > pRes->block_end) { - correctPciSize(range.rBegin, range.rEnd - range.rBegin, - pRes->block_end - pRes->block_begin, - pRes->res_type); - xf86MsgVerb(X_INFO, 3, - "PCI %s resource overlap reduced 0x%08lx" - " from 0x%08lx to 0x%08lx\n", - ((pRes->res_type & ResPhysMask) == ResMem) ? - "Memory" : "I/O", - range.rBegin, range.rEnd, pRes->block_end); - } - } - } - xf86MsgVerb(X_INFO, 3, - "Active PCI resource ranges after removing overlaps:\n"); - xf86PrintResList(3, *activeRes); - } - - if (*inactiveRes) { - /* Check for overlaps */ - for (pRes = *inactiveRes; pRes; pRes = pRes->next) { - if (ResCanOverlap(&pRes->val)) { - range = pRes->val; - - RemoveOverlaps(pRes, *activeRes, TRUE, - (xf86Info.estimateSizesAggressively > 1)); - RemoveOverlaps(pRes, *inactiveRes, TRUE, - (xf86Info.estimateSizesAggressively > 1)); - - if (range.rEnd > pRes->block_end) { - correctPciSize(range.rBegin, range.rEnd - range.rBegin, - pRes->block_end - pRes->block_begin, - pRes->res_type); - xf86MsgVerb(X_INFO, 3, - "PCI %s resource overlap reduced 0x%08lx" - " from 0x%08lx to 0x%08lx\n", - ((pRes->res_type & ResPhysMask) == ResMem) ? - "Memory" : "I/O", - range.rBegin, range.rEnd, pRes->block_end); - } - - } - } - xf86MsgVerb(X_INFO, 3, - "Inactive PCI resource ranges after removing overlaps:\n"); - xf86PrintResList(3, *inactiveRes); - } -} - -resPtr -ResourceBrokerInitPci(resPtr *osRes) -{ - resPtr activeRes, inactiveRes; - resPtr tmp; - - /* Get bus-specific system resources (PCI) */ - xf86GetPciRes(&activeRes, &inactiveRes); - - /* - * Adjust OS-reported resource ranges based on the assumption that there - * are no overlaps with the PCI base allocations. This should be a good - * assumption because writes to PCI address space won't be routed directly - * to host memory. - */ - - for (tmp = *osRes; tmp; tmp = tmp->next) - RemoveOverlaps(tmp, activeRes, FALSE, TRUE); - - xf86MsgVerb(X_INFO, 3, "OS-reported resource ranges after removing" - " overlaps with PCI:\n"); - xf86PrintResList(3, *osRes); - - pciAvoidRes = xf86AddRangesToList(pciAvoidRes,PciAvoid,-1); - for (tmp = pciAvoidRes; tmp; tmp = tmp->next) - RemoveOverlaps(tmp, activeRes, FALSE, TRUE); - tmp = xf86DupResList(*osRes); - pciAvoidRes = xf86JoinResLists(pciAvoidRes,tmp); - - return (xf86JoinResLists(activeRes,inactiveRes)); } - -/* - * PCI Resource modification - */ -static Bool -fixPciResource(int prt, memType alignment, pciVideoPtr pvp, unsigned long type) +/* move to OS layer */ +static void +savePciBusState(BusAccPtr ptr) { - int res_n; - memType *p_base; - int *p_size; - unsigned char p_type; - resPtr AccTmp = NULL; - resPtr orgAcc = NULL; - resPtr *pAcc = &AccTmp; - resPtr avoid = NULL; - resRange range; - resPtr resSize = NULL; - resPtr w_tmp, w = NULL, w_2nd = NULL; - PCITAG tag; - PciBusPtr pbp = xf86PciBus; - pciConfigPtr pcp; - resPtr tmp; - - if (!pvp) return FALSE; - tag = pciTag(pvp->bus,pvp->device,pvp->func); - pcp = pvp->thisCard; - - type &= ResAccMask; - if (!type) type = ResShared; - if (prt < 6) { - if (pvp->memBase[prt]) { - type |= ResMem; - res_n = prt; - p_base = &(pvp->memBase[res_n]); - p_size = &(pvp->size[res_n]); - p_type = pvp->type[res_n]; - if (!PCI_MAP_IS64BITMEM(pvp->type[res_n])) { - PCI_M_RANGE(range,tag,0,0xffffffff,ResExcMemBlock); - resSize = xf86AddResToList(resSize,&range,-1); - } - } else if (pvp->ioBase[prt]){ - type |= ResIo; - res_n = prt; - p_base = &(pvp->ioBase[res_n]); - p_size = &(pvp->size[res_n]); - p_type = pvp->type[res_n]; - PCI_I_RANGE(range, tag, 0, 0xffffffff, ResExcIoBlock); - resSize = xf86AddResToList(resSize, &range, -1); - } else return FALSE; - } else if (prt == 6) { - type |= ResMem; - res_n = 0xff; /* special flag for bios rom */ - p_base = &(pvp->biosBase); - p_size = &(pvp->biosSize); - /* XXX This should also include the PCI_MAP_MEMORY_TYPE_MASK part */ - p_type = 0; - PCI_M_RANGE(range,tag,0,0xffffffff,ResExcMemBlock); - resSize = xf86AddResToList(resSize,&range,-1); - } else return FALSE; - - if (! *p_base) return FALSE; - - type |= (range.type & ResDomain) | ResBlock; - - /* setup avoid: PciAvoid is bus range: convert later */ - avoid = xf86DupResList(pciAvoidRes); - - while (pbp) { - if (pbp->secondary == pvp->bus) { - if ((type & ResPhysMask) == ResMem) { - if (((p_type & PCI_MAP_MEMORY_CACHABLE) -#if 0 /*EE*/ - || (res_n == 0xff)/* bios should also be prefetchable */ -#endif - )) { - if (pbp->preferred_pmem) - w = xf86FindIntersectOfLists(pbp->preferred_pmem, - ResRange); - else if (pbp->pmem) - w = xf86FindIntersectOfLists(pbp->pmem,ResRange); - - if (pbp->preferred_mem) - w_2nd = xf86FindIntersectOfLists(pbp->preferred_mem, - ResRange); - else if (pbp->mem) - w_2nd = xf86FindIntersectOfLists(pbp->mem, - ResRange); - } else { - if (pbp->preferred_mem) - w = xf86FindIntersectOfLists(pbp->preferred_mem, - ResRange); - else if (pbp->mem) - w = xf86FindIntersectOfLists(pbp->mem,ResRange); - } - } else { - if (pbp->preferred_io) - w = xf86FindIntersectOfLists(pbp->preferred_io,ResRange); - if (pbp->io) - w = xf86FindIntersectOfLists(pbp->io,ResRange); - } - } else if (pbp->primary == pvp->bus) { - if ((type & ResPhysMask) == ResMem) { - tmp = xf86DupResList(pbp->preferred_pmem); - avoid = xf86JoinResLists(avoid, tmp); - tmp = xf86DupResList(pbp->preferred_mem); - avoid = xf86JoinResLists(avoid, tmp); - } else { - tmp = xf86DupResList(pbp->preferred_io); - avoid = xf86JoinResLists(avoid, tmp); - } - } - pbp = pbp->next; - } - - /* convert bus based entries in avoid list to host base */ - pciConvertListToHost(pvp->bus,pvp->device,pvp->func, avoid); - - if (!w) - w = xf86DupResList(ResRange); - xf86MsgVerb(X_INFO, 3, "window:\n"); - xf86PrintResList(3, w); - xf86MsgVerb(X_INFO, 3, "resSize:\n"); - xf86PrintResList(3, resSize); - - if (resSize) { - w_tmp = w; - w = xf86FindIntersectOfLists(w,resSize); - xf86FreeResList(w_tmp); - if (w_2nd) { - w_tmp = w_2nd; - w_2nd = xf86FindIntersectOfLists(w_2nd,resSize); - xf86FreeResList(w_tmp); - } - xf86FreeResList(resSize); - } - xf86MsgVerb(X_INFO, 3, "window fixed:\n"); - xf86PrintResList(3, w); +#if 0 + struct pci_device * const dev = ptr->busdep.pci.dev; + uint16_t temp; - if (!alignment) - alignment = (1 << (*p_size)) - 1; - - /* Access list holds bios resources -- remove this one */ -#ifdef NOTYET - AccTmp = xf86DupResList(Acc); - while ((*pAcc)) { - if ((((*pAcc)->res_type & (type & ~ResAccMask)) - == (type & ~ResAccMask)) - && ((*pAcc)->block_begin == (B2H(tag,(*p_base),type))) - && ((*pAcc)->block_end == (B2H(tag, - (*p_base)+SIZE(*p_size),type)))) { - resPtr acc_tmp = (*pAcc)->next; - xfree((*pAcc)); - (*pAcc) = acc_tmp; - break; - } else - pAcc = &((*pAcc)->next); - } - /* check if we really need to fix anything */ - P_X_RANGE(range,tag,(*p_base),(*p_base) + SIZE((*p_size)),type); - if (!ChkConflict(&range,avoid,SETUP) - && !ChkConflict(&range,AccTmp,SETUP) - && ((B2H(tag,(*p_base),type) & PCI_SIZE(type,tag,alignment) - == range->block_begin) - && ((xf86IsSubsetOf(range,w) - || (w_2nd && xf86IsSubsetOf(range,w_2n))))) { -#ifdef DEBUG - ErrorF("nothing to fix\n"); -#endif - xf86FreeResList(AccTmp); - xf86FreeResList(w); - xf86FreeResList(w_2nd); - xf86FreeResList(avoid); - return TRUE; - } -#ifdef DEBUG - ErrorF("removing old resource\n"); -#endif - orgAcc = Acc; - Acc = AccTmp; -#else - orgAcc = xf86DupResList(Acc); - pAcc = &Acc; - while (*pAcc) { - if ((((*pAcc)->res_type & (ResTypeMask|ResExtMask)) == - (type & ~ResAccMask)) - && ((*pAcc)->block_begin == B2H(tag,(*p_base),type)) - && ((*pAcc)->block_end == B2H(tag,(*p_base) + SIZE(*p_size), - type))) { -#ifdef DEBUG - ErrorF("removing old resource\n"); -#endif - tmp = *pAcc; - *pAcc = (*pAcc)->next; - tmp->next = NULL; - xf86FreeResList(tmp); - break; - } else - pAcc = &((*pAcc)->next); - } -#endif - -#ifdef DEBUG - ErrorF("base: 0x%lx alignment: 0x%lx host alignment: 0x%lx size[bit]: 0x%x\n", - (*p_base),alignment,PCI_SIZE(type,tag,alignment),(*p_size)); - xf86MsgVerb(X_INFO, 3, "window:\n"); - xf86PrintResList(3, w); - if (w_2nd) - xf86MsgVerb(X_INFO, 3, "2nd window:\n"); - xf86PrintResList(3, w_2nd); - xf86ErrorFVerb(3,"avoid:\n"); - xf86PrintResList(3,avoid); -#endif - w_tmp = w; - while (w) { - if ((type & ResTypeMask) == (w->res_type & ResTypeMask)) { -#ifdef DEBUG - ErrorF("block_begin: 0x%lx block_end: 0x%lx\n",w->block_begin, - w->block_end); -#endif - range = xf86GetBlock(type,PCI_SIZE(type,tag,alignment + 1), - w->block_begin, w->block_end, - PCI_SIZE(type,tag,alignment),avoid); - if (range.type != ResEnd) - break; - } - w = w->next; - } - xf86FreeResList(w_tmp); - /* if unsuccessful and memory prefetchable try non-prefetchable */ - if (range.type == ResEnd && w_2nd) { - w_tmp = w_2nd; - while (w_2nd) { - if ((type & ResTypeMask) == (w_2nd->res_type & ResTypeMask)) { -#ifdef DEBUG - ErrorF("block_begin: 0x%lx block_end: 0x%lx\n",w_2nd->block_begin, - w_2nd->block_end); -#endif - range = xf86GetBlock(type,PCI_SIZE(type,tag,alignment + 1), - w_2nd->block_begin, w_2nd->block_end, - PCI_SIZE(type,tag,alignment),avoid); - if (range.type != ResEnd) - break; - } - w_2nd = w_2nd->next; - } - xf86FreeResList(w_tmp); - } - xf86FreeResList(avoid); + pci_device_cfg_read_u16( dev, & temp, PCI_PCI_BRIDGE_CONTROL_REG ); + ptr->busdep.pci.save.control = temp & ~PCI_PCI_BRIDGE_SECONDARY_RESET; - if (range.type == ResEnd) { - xf86MsgVerb(X_ERROR,3,"Cannot find a replacement memory range\n"); - xf86FreeResList(Acc); - Acc = orgAcc; - return FALSE; + /* Allow master aborts to complete normally on non-root buses */ + if ( ptr->busdep.pci.save.control & PCI_PCI_BRIDGE_MASTER_ABORT_EN ) { + temp = ptr->busdep.pci.save.control & ~PCI_PCI_BRIDGE_MASTER_ABORT_EN; + pci_device_cfg_read_u16( dev, & temp, PCI_PCI_BRIDGE_CONTROL_REG ); } - xf86FreeResList(orgAcc); -#ifdef DEBUG - ErrorF("begin: 0x%lx, end: 0x%lx\n",range.a,range.b); #endif - - (*p_size) = 0; - while (alignment >> (*p_size)) - (*p_size)++; - (*p_base) = H2B(tag,range.rBegin,type); -#ifdef DEBUG - ErrorF("New PCI res %i base: 0x%lx, size: 0x%lx, type %s\n", - res_n,(*p_base),(1L << (*p_size)), - ((type & ResPhysMask) == ResMem) ? "Mem" : "Io"); -#endif - if (res_n != 0xff) { - if ((type & ResPhysMask) == ResMem) - pvp->memBase[prt] = range.rBegin; - else - pvp->ioBase[prt] = range.rBegin; - ((CARD32 *)(&(pcp->pci_base0)))[res_n] = - (CARD32)(*p_base) | (CARD32)(p_type); - pciWriteLong(tag, PCI_CMD_BASE_REG + res_n * sizeof(CARD32), - ((CARD32 *)(&(pcp->pci_base0)))[res_n]); - if (PCI_MAP_IS64BITMEM(p_type)) { -#if defined(LONG64) || defined(WORD64) - ((CARD32 *)(&(pcp->pci_base0)))[res_n + 1] = - (CARD32)(*p_base >> 32); - pciWriteLong(tag, PCI_CMD_BASE_REG + (res_n + 1) * sizeof(CARD32), - ((CARD32 *)(&(pcp->pci_base0)))[res_n + 1]); -#else - ((CARD32 *)(&(pcp->pci_base0)))[res_n + 1] = 0; - pciWriteLong(tag, PCI_CMD_BASE_REG + (res_n + 1) * sizeof(CARD32), - 0); -#endif - } - } else { - pvp->biosBase = range.rBegin; - pcp->pci_baserom = (pciReadLong(tag,PCI_CMD_BIOS_REG) & 0x01) | - (CARD32)(*p_base); - pciWriteLong(tag, PCI_CMD_BIOS_REG, pcp->pci_baserom); - } - /* @@@ fake BIOS allocated resource */ - range.type |= ResBios; - Acc = xf86AddResToList(Acc, &range,-1); - - return TRUE; - -} - -_X_EXPORT Bool -xf86FixPciResource(int entityIndex, int prt, memType alignment, - unsigned long type) -{ - pciVideoPtr pvp = xf86GetPciInfoForEntity(entityIndex); - return fixPciResource(prt, alignment, pvp, type); -} - -_X_EXPORT resPtr -xf86ReallocatePciResources(int entityIndex, resPtr pRes) -{ - pciVideoPtr pvp = xf86GetPciInfoForEntity(entityIndex); - resPtr pBad = NULL,pResTmp; - unsigned int prt = 0; - int i; - - if (!pvp) return pRes; - - while (pRes) { - switch (pRes->res_type & ResPhysMask) { - case ResMem: - if (pRes->block_begin == B2M(TAG(pvp),pvp->biosBase) && - pRes->block_end == B2M(TAG(pvp),pvp->biosBase - + SIZE(pvp->biosSize))) - prt = 6; - else for (i = 0 ; i < 6; i++) - if ((pRes->block_begin == B2M(TAG(pvp),pvp->memBase[i])) - && (pRes->block_end == B2M(TAG(pvp),pvp->memBase[i] - + SIZE(pvp->size[i])))) { - prt = i; - break; - } - break; - case ResIo: - for (i = 0 ; i < 6; i++) - if (pRes->block_begin == B2I(TAG(pvp),pvp->ioBase[i]) - && pRes->block_end == B2I(TAG(pvp),pvp->ioBase[i] - + SIZE(pvp->size[i]))) { - prt = i; - break; - } - break; - } - - if (!prt) return pRes; - - pResTmp = pRes->next; - if (! fixPciResource(prt, 0, pvp, pRes->res_type)) { - pRes->next = pBad; - pBad = pRes; - } else - xfree(pRes); - - pRes = pResTmp; - } - return pBad; -} - -/* - * BIOS releated - */ -static resPtr -getOwnResources(pciVideoPtr pvp, resPtr mem) -{ - resRange range; - int i; - /* Make sure we don't conflict with our own mem resources */ - for (i = 0; i < 6; i++) { - if (!pvp->memBase[i]) - continue; - P_M_RANGE(range,TAG(pvp),pvp->memBase[i],pvp->size[i], - ResExcMemBlock); - mem = xf86AddResToList(mem,&range,-1); - } - return mem; } +/* move to OS layer */ +#define MASKBITS (PCI_PCI_BRIDGE_VGA_EN | PCI_PCI_BRIDGE_MASTER_ABORT_EN) static void -getPciRangesForMapping(pciVideoPtr pvp, resPtr *map, resPtr *avoid) -{ - PciBusPtr pbp; - resPtr tmp; - - *avoid = xf86DupResList(pciAvoidRes); - - pbp = xf86PciBus; - while (pbp) { - if (pbp->secondary == pvp->bus) { - if (pbp->preferred_pmem) - tmp = xf86DupResList(pbp->preferred_pmem); - else - tmp = xf86DupResList(pbp->pmem); - *map = xf86JoinResLists(*map,tmp); - if (pbp->preferred_mem) - tmp = xf86DupResList(pbp->preferred_mem); - else - tmp = xf86DupResList(pbp->mem); - *map = xf86JoinResLists(*map,tmp); - tmp = *map; - while (tmp) { - tmp->block_end = min(tmp->block_end,PCI_MEM32_LENGTH_MAX); - tmp = tmp->next; - } - } else if ((pbp->primary == pvp->bus) && - (pbp->secondary >= 0) && - (pbp->primary != pbp->secondary)) { - tmp = xf86DupResList(pbp->preferred_pmem); - *avoid = xf86JoinResLists(*avoid, tmp); - tmp = xf86DupResList(pbp->pmem); - *avoid = xf86JoinResLists(*avoid, tmp); - tmp = xf86DupResList(pbp->preferred_mem); - *avoid = xf86JoinResLists(*avoid, tmp); - tmp = xf86DupResList(pbp->mem); - *avoid = xf86JoinResLists(*avoid, tmp); - } - pbp = pbp->next; - } - pciConvertListToHost(pvp->bus,pvp->device,pvp->func, *avoid); - pciConvertListToHost(pvp->bus,pvp->device,pvp->func, *map); -} - -static memType -findPciRange(PCITAG tag, resPtr m, resPtr avoid, CARD32 size) -{ - resRange range; - CARD32 alignment = (1 << size) - 1; - - while (m) { - range = xf86GetBlock(RANGE_TYPE(ResExcMemBlock, xf86GetPciDomain(tag)), - PCI_SIZE(ResMem, tag, 1 << size), - m->block_begin, m->block_end, - PCI_SIZE(ResMem, tag, alignment), - avoid); - if (range.type != ResEnd) { - return M2B(tag, range.rBase); - } - m = m->next; - } - return 0; -} - -static pciVideoPtr -getPciVideoPtr(PCITAG tag) +restorePciBusState(BusAccPtr ptr) { - int n = 0; - - pciVideoPtr pvp = NULL; - if (!xf86PciVideoInfo) return 0; - - while ((pvp = xf86PciVideoInfo[n++])) { - if (pciTag(pvp->bus,pvp->device,pvp->func) == tag) - return pvp; - } - return NULL; -} +#if 0 + struct pci_device * const dev = ptr->busdep.pci.dev; + uint16_t ctrl; -memType -getValidBIOSBase(PCITAG tag, int num) -{ - pciVideoPtr pvp = NULL; - memType ret; - CARD32 biosSize; - resPtr mem = NULL; - resPtr avoid = NULL, m = NULL; - resRange range; - - pvp = getPciVideoPtr(tag); - - if (!pvp) return 0; - - biosSize = pvp->biosSize; - - if (biosSize > 24) - biosSize = 24; - - switch ((romBaseSource)num) { - case ROM_BASE_PRESET: - return 0; /* This should not happen */ - case ROM_BASE_BIOS: - /* In some cases the BIOS base register contains the size mask */ - if ((memType)(-1 << biosSize) == PCIGETROM(pvp->biosBase)) - return 0; - mem = getOwnResources(pvp,mem); - P_M_RANGE(range, tag, pvp->biosBase,biosSize,ResExcMemBlock); - ret = pvp->biosBase; - break; - case ROM_BASE_MEM0: - case ROM_BASE_MEM1: - case ROM_BASE_MEM2: - case ROM_BASE_MEM3: - case ROM_BASE_MEM4: - case ROM_BASE_MEM5: - if (!pvp->memBase[num] || (pvp->size[num] < biosSize)) - return 0; - P_M_RANGE(range, tag ,pvp->memBase[num],biosSize, - ResExcMemBlock); - ret = pvp->memBase[num]; - break; - case ROM_BASE_FIND: - ret = 0; - break; - default: - return 0; /* This should not happen */ - } + /* Only restore the bits we've changed (and don't cause resets) */ + pci_device_cfg_read_u16( dev, & ctrl, PCI_PCI_BRIDGE_CONTROL_REG ); - /* Now find the ranges for validation */ - getPciRangesForMapping(pvp,&m,&avoid); - - if (!ret) { - /* Return a possible window */ - ret = findPciRange(tag,m,avoid,biosSize); - } else { -#if !defined(__ia64__) /* on ia64, trust the kernel, don't look for overlaps */ - if (mem) - pciConvertListToHost(pvp->bus,pvp->device,pvp->func, mem); - if (!xf86IsSubsetOf(range, m) || - ChkConflict(&range, avoid, SETUP) - || (mem && ChkConflict(&range, mem, SETUP))) - ret = 0; -#endif + if ((ctrl ^ ptr->busdep.pci.save.control) & MASKBITS) { + ctrl &= ~(MASKBITS | PCI_PCI_BRIDGE_SECONDARY_RESET); + ctrl |= ptr->busdep.pci.save.control & MASKBITS; + pci_device_cfg_write_u16(dev, ctrl, PCI_PCI_BRIDGE_CONTROL_REG); } - - xf86FreeResList(avoid); - xf86FreeResList(m); - return ret; +#endif } +#undef MASKBITS -memType -getEmptyPciRange(PCITAG tag, int base_reg) -{ - resPtr avoid = NULL, m = NULL; - memType ret; - - pciVideoPtr pvp = getPciVideoPtr(tag); - if (!pvp) return 0; - getPciRangesForMapping(pvp,&m,&avoid); - ret = findPciRange(tag,m,avoid,pvp->size[base_reg]); - xf86FreeResList(avoid); - xf86FreeResList(m); - - return ret; -} /* * xf86Bus.c interface @@ -1684,972 +470,42 @@ getEmptyPciRange(PCITAG tag, int base_reg) void xf86PciProbe(void) { - /* - * Initialise the pcidata entry points. - */ - xf86SetupPciIds = (ScanPciSetupProcPtr)LoaderSymbol("ScanPciSetupPciIds"); - xf86ClosePciIds = (ScanPciCloseProcPtr)LoaderSymbol("ScanPciClosePciIds"); - xf86FindPciNamesByDevice = - (ScanPciFindByDeviceProcPtr)LoaderSymbol("ScanPciFindPciNamesByDevice"); - xf86FindPciNamesBySubsys = - (ScanPciFindBySubsysProcPtr)LoaderSymbol("ScanPciFindPciNamesBySubsys"); - - if (!xf86SetupPciIds()) - FatalError("xf86SetupPciIds() failed\n"); - FindPCIVideoInfo(); } -static void alignBridgeRanges(PciBusPtr PciBusBase, PciBusPtr primary); - -static void -printBridgeInfo(PciBusPtr PciBus) -{ - char primary[8], secondary[8], subordinate[8], brbus[8]; - - xf86FormatPciBusNumber(PciBus->primary, primary); - xf86FormatPciBusNumber(PciBus->secondary, secondary); - xf86FormatPciBusNumber(PciBus->subordinate, subordinate); - xf86FormatPciBusNumber(PciBus->brbus, brbus); - - xf86MsgVerb(X_INFO, 3, "Bus %s: bridge is at (%s:%d:%d), (%s,%s,%s)," - " BCTRL: 0x%04x (VGA_EN is %s)\n", - secondary, brbus, PciBus->brdev, PciBus->brfunc, - primary, secondary, subordinate, PciBus->brcontrol, - (PciBus->brcontrol & PCI_PCI_BRIDGE_VGA_EN) ? - "set" : "cleared"); - if (PciBus->preferred_io) { - xf86MsgVerb(X_INFO, 3, - "Bus %s I/O range:\n", secondary); - xf86PrintResList(3, PciBus->preferred_io); - } - if (PciBus->preferred_mem) { - xf86MsgVerb(X_INFO, 3, - "Bus %s non-prefetchable memory range:\n", secondary); - xf86PrintResList(3, PciBus->preferred_mem); - } - if (PciBus->preferred_pmem) { - xf86MsgVerb(X_INFO, 3, - "Bus %s prefetchable memory range:\n", secondary); - xf86PrintResList(3, PciBus->preferred_pmem); - } -} - -static PciBusPtr -xf86GetPciBridgeInfo(void) -{ - const pciConfigPtr *pcrpp; - pciConfigPtr pcrp; - pciBusInfo_t *pBusInfo; - resRange range; - PciBusPtr PciBus, PciBusBase = NULL; - PciBusPtr *pnPciBus = &PciBusBase; - int MaxBus = 0; - int i, domain; - int primary, secondary, subordinate; - memType base, limit; - - resPtr pciBusAccWindows = xf86PciBusAccWindowsFromOS(); - - if (xf86PciInfo == NULL) - return NULL; - - /* Add each bridge */ - for (pcrpp = xf86PciInfo, pcrp = *pcrpp; pcrp; pcrp = *(++pcrpp)) { - if (pcrp->busnum > MaxBus) - MaxBus = pcrp->busnum; - if ( pcrp->pci_base_class == PCI_CLASS_BRIDGE ) { - const int sub_class = pcrp->pci_sub_class; - - domain = xf86GetPciDomain(pcrp->tag); - - switch (sub_class) { - case PCI_SUBCLASS_BRIDGE_PCI: - /* something fishy about the header? If so: just ignore! */ - if ((pcrp->pci_header_type & 0x7f) != 0x01) { - xf86MsgVerb(X_WARNING, 3, "PCI-PCI bridge at %x:%x:%x has" - " unexpected header: 0x%x", - pcrp->busnum, pcrp->devnum, - pcrp->funcnum, pcrp->pci_header_type); - break; - } - - domain = pcrp->busnum & 0x0000FF00; - primary = pcrp->busnum; - secondary = domain | pcrp->pci_secondary_bus_number; - subordinate = domain | pcrp->pci_subordinate_bus_number; - - /* Is this the correct bridge? If not, ignore it */ - pBusInfo = pcrp->businfo; - if (pBusInfo && (pcrp != pBusInfo->bridge)) { - xf86MsgVerb(X_WARNING, 3, "PCI bridge mismatch for bus %x:" - " %x:%x:%x and %x:%x:%x\n", secondary, - pcrp->busnum, pcrp->devnum, pcrp->funcnum, - pBusInfo->bridge->busnum, - pBusInfo->bridge->devnum, - pBusInfo->bridge->funcnum); - break; - } - - if (pBusInfo && pBusInfo->funcs->pciGetBridgeBuses) - (*pBusInfo->funcs->pciGetBridgeBuses)(secondary, - &primary, - &secondary, - &subordinate); - - if (!pcrp->fakeDevice && (primary >= secondary)) { - xf86MsgVerb(X_WARNING, 3, "Misconfigured PCI bridge" - " %x:%x:%x (%x,%x)\n", - pcrp->busnum, pcrp->devnum, pcrp->funcnum, - primary, secondary); - break; - } - - *pnPciBus = PciBus = xnfcalloc(1, sizeof(PciBusRec)); - pnPciBus = &PciBus->next; - - PciBus->primary = primary; - PciBus->secondary = secondary; - PciBus->subordinate = subordinate; - - PciBus->brbus = pcrp->busnum; - PciBus->brdev = pcrp->devnum; - PciBus->brfunc = pcrp->funcnum; - - PciBus->subclass = sub_class; - - /* The Intel bridges don't report as transparent - but guess what they are - from Linux kernel - airlied */ - if ((pcrp->pci_vendor == PCI_VENDOR_INTEL) && - ((pcrp->pci_device & 0xff00) == 0x2400)) { - xf86MsgVerb(X_INFO, 3, "Intel Bridge workaround enabled\n"); - PciBus->interface = PCI_IF_BRIDGE_PCI_SUBTRACTIVE; - } else { - PciBus->interface = pcrp->pci_prog_if; - } - - if (pBusInfo && pBusInfo->funcs->pciControlBridge) - PciBus->brcontrol = - (*pBusInfo->funcs->pciControlBridge)(secondary, 0, 0); - else - PciBus->brcontrol = pcrp->pci_bridge_control; - - if (pBusInfo && pBusInfo->funcs->pciGetBridgeResources) { - (*pBusInfo->funcs->pciGetBridgeResources)(secondary, - (pointer *)&PciBus->preferred_io, - (pointer *)&PciBus->preferred_mem, - (pointer *)&PciBus->preferred_pmem); - break; - } - - if ((pcrp->pci_command & PCI_CMD_IO_ENABLE) && - (pcrp->pci_upper_io_base || pcrp->pci_io_base || - pcrp->pci_upper_io_limit || pcrp->pci_io_limit)) { - base = (pcrp->pci_upper_io_base << 16) | - ((pcrp->pci_io_base & 0xf0u) << 8); - limit = (pcrp->pci_upper_io_limit << 16) | - ((pcrp->pci_io_limit & 0xf0u) << 8) | 0x0fff; - /* - * Deal with bridge ISA mode (256 wide ranges spaced 1K - * apart, but only in the first 64K). - */ - if (pcrp->pci_bridge_control & PCI_PCI_BRIDGE_ISA_EN) { - while ((base <= (CARD16)(-1)) && (base <= limit)) { - PCI_I_RANGE(range, pcrp->tag, - base, base + (CARD8)(-1), - ResIo | ResBlock | ResExclusive); - PciBus->preferred_io = - xf86AddResToList(PciBus->preferred_io, - &range, -1); - base += 0x0400; - } - } - if (base <= limit) { - PCI_I_RANGE(range, pcrp->tag, base, limit, - ResIo | ResBlock | ResExclusive); - PciBus->preferred_io = - xf86AddResToList(PciBus->preferred_io, &range, -1); - } - } - if (pcrp->pci_command & PCI_CMD_MEM_ENABLE) { - /* - * The P2P spec requires these next two, but some bridges - * don't comply. Err on the side of caution, making the not - * so bold assumption that no bridge would ever re-route the - * bottom megabyte. - */ - if (pcrp->pci_mem_base || pcrp->pci_mem_limit) { - base = pcrp->pci_mem_base & 0xfff0u; - limit = pcrp->pci_mem_limit & 0xfff0u; - if (base <= limit) { - PCI_M_RANGE(range, pcrp->tag, - base << 16, (limit << 16) | 0x0fffff, - ResMem | ResBlock | ResExclusive); - PciBus->preferred_mem = - xf86AddResToList(PciBus->preferred_mem, &range, -1); - } - } - - if (pcrp->pci_prefetch_mem_base || - pcrp->pci_prefetch_mem_limit || - pcrp->pci_prefetch_upper_mem_base || - pcrp->pci_prefetch_upper_mem_limit) { - base = pcrp->pci_prefetch_mem_base & 0xfff0u; - limit = pcrp->pci_prefetch_mem_limit & 0xfff0u; -#if defined(LONG64) || defined(WORD64) - base |= (memType)pcrp->pci_prefetch_upper_mem_base << 16; - limit |= (memType)pcrp->pci_prefetch_upper_mem_limit << 16; -#endif - if (base <= limit) { - PCI_M_RANGE(range, pcrp->tag, - base << 16, (limit << 16) | 0xfffff, - ResMem | ResBlock | ResExclusive); - PciBus->preferred_pmem = - xf86AddResToList(PciBus->preferred_pmem, - &range, -1); - } - } - } - break; - - case PCI_SUBCLASS_BRIDGE_CARDBUS: - /* something fishy about the header? If so: just ignore! */ - if ((pcrp->pci_header_type & 0x7f) != 0x02) { - xf86MsgVerb(X_WARNING, 3, "PCI-CardBus bridge at %x:%x:%x" - " has unexpected header: 0x%x", - pcrp->busnum, pcrp->devnum, - pcrp->funcnum, pcrp->pci_header_type); - break; - } - - domain = pcrp->busnum & 0x0000FF00; - primary = pcrp->busnum; - secondary = domain | pcrp->pci_cb_cardbus_bus_number; - subordinate = domain | pcrp->pci_subordinate_bus_number; - - /* Is this the correct bridge? If not, ignore it */ - pBusInfo = pcrp->businfo; - if (pBusInfo && (pcrp != pBusInfo->bridge)) { - xf86MsgVerb(X_WARNING, 3, "CardBus bridge mismatch for bus" - " %x: %x:%x:%x and %x:%x:%x\n", secondary, - pcrp->busnum, pcrp->devnum, pcrp->funcnum, - pBusInfo->bridge->busnum, - pBusInfo->bridge->devnum, - pBusInfo->bridge->funcnum); - break; - } - - if (pBusInfo && pBusInfo->funcs->pciGetBridgeBuses) - (*pBusInfo->funcs->pciGetBridgeBuses)(secondary, - &primary, - &secondary, - &subordinate); - - if (primary >= secondary) { - if (pcrp->pci_cb_cardbus_bus_number != 0) - xf86MsgVerb(X_WARNING, 3, "Misconfigured CardBus" - " bridge %x:%x:%x (%x,%x)\n", - pcrp->busnum, pcrp->devnum, pcrp->funcnum, - primary, secondary); - break; - } - - *pnPciBus = PciBus = xnfcalloc(1, sizeof(PciBusRec)); - pnPciBus = &PciBus->next; - - PciBus->primary = primary; - PciBus->secondary = secondary; - PciBus->subordinate = subordinate; - - PciBus->brbus = pcrp->busnum; - PciBus->brdev = pcrp->devnum; - PciBus->brfunc = pcrp->funcnum; - - PciBus->subclass = sub_class; - PciBus->interface = pcrp->pci_prog_if; - - if (pBusInfo && pBusInfo->funcs->pciControlBridge) - PciBus->brcontrol = - (*pBusInfo->funcs->pciControlBridge)(secondary, 0, 0); - else - PciBus->brcontrol = pcrp->pci_bridge_control; - - if (pBusInfo && pBusInfo->funcs->pciGetBridgeResources) { - (*pBusInfo->funcs->pciGetBridgeResources)(secondary, - (pointer *)&PciBus->preferred_io, - (pointer *)&PciBus->preferred_mem, - (pointer *)&PciBus->preferred_pmem); - break; - } - - if (pcrp->pci_command & PCI_CMD_IO_ENABLE) { - if (pcrp->pci_cb_iobase0) { - base = PCI_CB_IOBASE(pcrp->pci_cb_iobase0); - limit = PCI_CB_IOLIMIT(pcrp->pci_cb_iolimit0); - - /* - * Deal with bridge ISA mode (256-wide ranges spaced 1K - * apart (start to start), but only in the first 64K). - */ - if (pcrp->pci_bridge_control & PCI_PCI_BRIDGE_ISA_EN) { - while ((base <= (CARD16)(-1)) && - (base <= limit)) { - PCI_I_RANGE(range, pcrp->tag, - base, base + (CARD8)(-1), - ResIo | ResBlock | ResExclusive); - PciBus->preferred_io = - xf86AddResToList(PciBus->preferred_io, - &range, -1); - base += 0x0400; - } - } - - if (base <= limit) { - PCI_I_RANGE(range, pcrp->tag, base, limit, - ResIo | ResBlock | ResExclusive); - PciBus->preferred_io = - xf86AddResToList(PciBus->preferred_io, - &range, -1); - } - } - - if (pcrp->pci_cb_iobase1) { - base = PCI_CB_IOBASE(pcrp->pci_cb_iobase1); - limit = PCI_CB_IOLIMIT(pcrp->pci_cb_iolimit1); - - /* - * Deal with bridge ISA mode (256-wide ranges spaced 1K - * apart (start to start), but only in the first 64K). - */ - if (pcrp->pci_bridge_control & PCI_PCI_BRIDGE_ISA_EN) { - while ((base <= (CARD16)(-1)) && - (base <= limit)) { - PCI_I_RANGE(range, pcrp->tag, - base, base + (CARD8)(-1), - ResIo | ResBlock | ResExclusive); - PciBus->preferred_io = - xf86AddResToList(PciBus->preferred_io, - &range, -1); - base += 0x0400; - } - } - - if (base <= limit) { - PCI_I_RANGE(range, pcrp->tag, base, limit, - ResIo | ResBlock | ResExclusive); - PciBus->preferred_io = - xf86AddResToList(PciBus->preferred_io, - &range, -1); - } - } - } - - if (pcrp->pci_command & PCI_CMD_MEM_ENABLE) { - if ((pcrp->pci_cb_membase0) && - (pcrp->pci_cb_membase0 <= pcrp->pci_cb_memlimit0)) { - PCI_M_RANGE(range, pcrp->tag, - pcrp->pci_cb_membase0 & ~0x0fff, - pcrp->pci_cb_memlimit0 | 0x0fff, - ResMem | ResBlock | ResExclusive); - if (pcrp->pci_bridge_control & - PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) - PciBus->preferred_pmem = - xf86AddResToList(PciBus->preferred_pmem, - &range, -1); - else - PciBus->preferred_mem = - xf86AddResToList(PciBus->preferred_mem, - &range, -1); - } - if ((pcrp->pci_cb_membase1) && - (pcrp->pci_cb_membase1 <= pcrp->pci_cb_memlimit1)) { - PCI_M_RANGE(range, pcrp->tag, - pcrp->pci_cb_membase1 & ~0x0fff, - pcrp->pci_cb_memlimit1 | 0x0fff, - ResMem | ResBlock | ResExclusive); - if (pcrp->pci_bridge_control & - PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) - PciBus->preferred_pmem = - xf86AddResToList(PciBus->preferred_pmem, - &range, -1); - else - PciBus->preferred_mem = - xf86AddResToList(PciBus->preferred_mem, - &range, -1); - } - } - - break; - - case PCI_SUBCLASS_BRIDGE_ISA: - case PCI_SUBCLASS_BRIDGE_EISA: - case PCI_SUBCLASS_BRIDGE_MC: - *pnPciBus = PciBus = xnfcalloc(1, sizeof(PciBusRec)); - pnPciBus = &PciBus->next; - PciBus->primary = pcrp->busnum; - PciBus->secondary = PciBus->subordinate = -1; - PciBus->brbus = pcrp->busnum; - PciBus->brdev = pcrp->devnum; - PciBus->brfunc = pcrp->funcnum; - PciBus->subclass = sub_class; - PciBus->brcontrol = PCI_PCI_BRIDGE_VGA_EN; - break; - - case PCI_SUBCLASS_BRIDGE_HOST: - /* Is this the correct bridge? If not, ignore bus info */ - pBusInfo = pcrp->businfo; - - if (!pBusInfo || pBusInfo == HOST_NO_BUS) - break; - - secondary = 0; - /* Find "secondary" bus segment */ - while (pBusInfo != pciBusInfo[secondary]) - secondary++; - if (pcrp != pBusInfo->bridge) { - xf86MsgVerb(X_WARNING, 3, "Host bridge mismatch for" - " bus %x: %x:%x:%x and %x:%x:%x\n", - pBusInfo->primary_bus, - pcrp->busnum, pcrp->devnum, pcrp->funcnum, - pBusInfo->bridge->busnum, - pBusInfo->bridge->devnum, - pBusInfo->bridge->funcnum); - pBusInfo = NULL; - } - - *pnPciBus = PciBus = xnfcalloc(1, sizeof(PciBusRec)); - pnPciBus = &PciBus->next; - - - PciBus->primary = PciBus->secondary = secondary; - PciBus->subordinate = pciNumBuses - 1; - - if (pBusInfo->funcs->pciGetBridgeBuses) - (*pBusInfo->funcs->pciGetBridgeBuses) - (secondary, - &PciBus->primary, - &PciBus->secondary, - &PciBus->subordinate); - - PciBus->brbus = pcrp->busnum; - PciBus->brdev = pcrp->devnum; - PciBus->brfunc = pcrp->funcnum; - - PciBus->subclass = sub_class; - - if (pBusInfo && pBusInfo->funcs->pciControlBridge) - PciBus->brcontrol = - (*pBusInfo->funcs->pciControlBridge)(secondary, 0, 0); - else - PciBus->brcontrol = PCI_PCI_BRIDGE_VGA_EN; - - if (pBusInfo && pBusInfo->funcs->pciGetBridgeResources) { - (*pBusInfo->funcs->pciGetBridgeResources) - (secondary, - (pointer *)&PciBus->preferred_io, - (pointer *)&PciBus->preferred_mem, - (pointer *)&PciBus->preferred_pmem); - break; - } - - PciBus->preferred_io = - xf86ExtractTypeFromList(pciBusAccWindows, - RANGE_TYPE(ResIo, domain)); - PciBus->preferred_mem = - xf86ExtractTypeFromList(pciBusAccWindows, - RANGE_TYPE(ResMem, domain)); - PciBus->preferred_pmem = - xf86ExtractTypeFromList(pciBusAccWindows, - RANGE_TYPE(ResMem, domain)); - break; - - default: - break; - } - } - } - for (i = 0; i <= MaxBus; i++) { /* find PCI buses not attached to bridge */ - if (!pciBusInfo[i]) - continue; - for (PciBus = PciBusBase; PciBus; PciBus = PciBus->next) - if (PciBus->secondary == i) break; - if (!PciBus) { /* We assume it's behind a HOST-PCI bridge */ - /* - * Find the 'smallest' free HOST-PCI bridge, where 'small' is in - * the order of pciTag(). - */ - PCITAG minTag = 0xFFFFFFFF, tag; - PciBusPtr PciBusFound = NULL; - for (PciBus = PciBusBase; PciBus; PciBus = PciBus->next) - if ((PciBus->subclass == PCI_SUBCLASS_BRIDGE_HOST) && - (PciBus->secondary == -1) && - ((tag = pciTag(PciBus->brbus,PciBus->brdev,PciBus->brfunc)) - < minTag) ) { - minTag = tag; - PciBusFound = PciBus; - } - if (PciBusFound) - PciBusFound->secondary = i; - else { /* if nothing found it may not be visible: create new */ - /* Find a device on this bus */ - domain = 0; - for (pcrpp = xf86PciInfo; (pcrp = *pcrpp); pcrpp++) { - if (pcrp->busnum == i) { - domain = xf86GetPciDomain(pcrp->tag); - break; - } - } - *pnPciBus = PciBus = xnfcalloc(1, sizeof(PciBusRec)); - pnPciBus = &PciBus->next; - PciBus->primary = PciBus->secondary = i; - PciBus->subclass = PCI_SUBCLASS_BRIDGE_HOST; - PciBus->brcontrol = PCI_PCI_BRIDGE_VGA_EN; - PciBus->preferred_io = - xf86ExtractTypeFromList(pciBusAccWindows, - RANGE_TYPE(ResIo, domain)); - PciBus->preferred_mem = - xf86ExtractTypeFromList(pciBusAccWindows, - RANGE_TYPE(ResMem, domain)); - PciBus->preferred_pmem = - xf86ExtractTypeFromList(pciBusAccWindows, - RANGE_TYPE(ResMem, domain)); - } - } - } - - for (PciBus = PciBusBase; PciBus; PciBus = PciBus->next) { - if (PciBus->primary == PciBus->secondary) { - alignBridgeRanges(PciBusBase, PciBus); - } - } - - for (PciBus = PciBusBase; PciBus; PciBus = PciBus->next) { - switch (PciBus->subclass) { - case PCI_SUBCLASS_BRIDGE_PCI: - if (PciBus->interface == PCI_IF_BRIDGE_PCI_SUBTRACTIVE) - xf86MsgVerb(X_INFO, 3, "Subtractive PCI-to-PCI bridge:\n"); - else - xf86MsgVerb(X_INFO, 3, "PCI-to-PCI bridge:\n"); - break; - case PCI_SUBCLASS_BRIDGE_CARDBUS: - xf86MsgVerb(X_INFO, 3, "PCI-to-CardBus bridge:\n"); - break; - case PCI_SUBCLASS_BRIDGE_HOST: - xf86MsgVerb(X_INFO, 3, "Host-to-PCI bridge:\n"); - break; - case PCI_SUBCLASS_BRIDGE_ISA: - xf86MsgVerb(X_INFO, 3, "PCI-to-ISA bridge:\n"); - break; - case PCI_SUBCLASS_BRIDGE_EISA: - xf86MsgVerb(X_INFO, 3, "PCI-to-EISA bridge:\n"); - break; - case PCI_SUBCLASS_BRIDGE_MC: - xf86MsgVerb(X_INFO, 3, "PCI-to-MCA bridge:\n"); - break; - default: - break; - } - printBridgeInfo(PciBus); - } - xf86FreeResList(pciBusAccWindows); - return PciBusBase; -} - -static void -alignBridgeRanges(PciBusPtr PciBusBase, PciBusPtr primary) -{ - PciBusPtr PciBus; - - for (PciBus = PciBusBase; PciBus; PciBus = PciBus->next) { - if ((PciBus != primary) && (PciBus->primary != -1) - && (PciBus->primary == primary->secondary)) { - resPtr tmp; - tmp = xf86FindIntersectOfLists(primary->preferred_io, - PciBus->preferred_io); - xf86FreeResList(PciBus->preferred_io); - PciBus->preferred_io = tmp; - tmp = xf86FindIntersectOfLists(primary->preferred_pmem, - PciBus->preferred_pmem); - xf86FreeResList(PciBus->preferred_pmem); - PciBus->preferred_pmem = tmp; - tmp = xf86FindIntersectOfLists(primary->preferred_mem, - PciBus->preferred_mem); - xf86FreeResList(PciBus->preferred_mem); - PciBus->preferred_mem = tmp; - - /* Deal with subtractive decoding */ - switch (PciBus->subclass) { - case PCI_SUBCLASS_BRIDGE_PCI: - if (PciBus->interface != PCI_IF_BRIDGE_PCI_SUBTRACTIVE) - break; - /* Fall through */ -#if 0 /* Not yet */ - case PCI_SUBCLASS_BRIDGE_ISA: - case PCI_SUBCLASS_BRIDGE_EISA: - case PCI_SUBCLASS_BRIDGE_MC: -#endif - if (!(PciBus->io = primary->io)) - PciBus->io = primary->preferred_io; - if (!(PciBus->mem = primary->mem)) - PciBus->mem = primary->preferred_mem; - if (!(PciBus->pmem = primary->pmem)) - PciBus->pmem = primary->preferred_pmem; - default: - break; - } - - alignBridgeRanges(PciBusBase, PciBus); - } - } -} - -void -ValidatePci(void) -{ - pciVideoPtr pvp, pvp1; - PciBusPtr pbp; - pciConfigPtr pcrp, *pcrpp; - CARD32 *basep; - resPtr Sys; - resRange range; - int n = 0, m, i; - - if (!xf86PciVideoInfo) return; - - /* - * Mark all pciInfoRecs that need to be validated. These are - * the ones which have been assigned to a screen. - */ - Sys = xf86DupResList(osRes); - /* Only validate graphics devices in use */ - for (i=0; i<xf86NumScreens; i++) { - for (m = 0; m < xf86Screens[i]->numEntities; m++) - if ((pvp = xf86GetPciInfoForEntity(xf86Screens[i]->entityList[m]))) - pvp->validate = TRUE; - } - - /* - * Collect all background PCI resources we need to validate against. - * These are all resources which don't belong to PCINONSYSTEMCLASSES - * and which have not been assigned to an entity. - */ - /* First get the PCIINFOCLASSES */ - m = 0; - while ((pvp = xf86PciVideoInfo[m++])) { - /* is it a PCINONSYSTEMCLASS? */ - if (PCINONSYSTEMCLASSES(pvp->class, pvp->subclass)) - continue; - /* has it an Entity assigned to it? */ - for (i=0; i<xf86NumEntities; i++) { - EntityPtr p = xf86Entities[i]; - if (p->busType != BUS_PCI) - continue; - if (p->pciBusId.bus == pvp->bus - && p->pciBusId.device == pvp->device - && p->pciBusId.func == pvp->func) - break; - } - if (i != xf86NumEntities) /* found an Entity for this one */ - continue; - - for (i = 0; i<6; i++) { - if (pvp->ioBase[i]) { - PV_I_RANGE(range,pvp,i,ResExcIoBlock); - Sys = xf86AddResToList(Sys,&range,-1); - } else if (pvp->memBase[i]) { - PV_M_RANGE(range,pvp,i,ResExcMemBlock); - Sys = xf86AddResToList(Sys,&range,-1); - } - } - } - for (pcrpp = xf86PciInfo, pcrp = *pcrpp; pcrp; pcrp = *++(pcrpp)) { - - /* These were handled above */ - if (PCIINFOCLASSES(pcrp->pci_base_class, pcrp->pci_sub_class)) - continue; - - if ((pcrp->pci_header_type & 0x7f) || - !(pcrp->pci_command & (PCI_CMD_IO_ENABLE | PCI_CMD_MEM_ENABLE))) - continue; - - basep = &pcrp->pci_base0; - for (i = 0; i < 6; i++) { - if (basep[i]) { - if (PCI_MAP_IS_IO(basep[i])) { - if (!(pcrp->pci_command & PCI_CMD_IO_ENABLE)) - continue; - P_I_RANGE(range, pcrp->tag, PCIGETIO(basep[i]), - pcrp->basesize[i], ResExcIoBlock) - } else if (!PCI_MAP_IS64BITMEM(basep[i])) { - if (!(pcrp->pci_command & PCI_CMD_MEM_ENABLE)) - continue; - P_M_RANGE(range, pcrp->tag, PCIGETMEMORY(basep[i]), - pcrp->basesize[i], ResExcMemBlock) - } else { - i++; - if (!(pcrp->pci_command & PCI_CMD_MEM_ENABLE)) - continue; -#if defined(LONG64) || defined(WORD64) - P_M_RANGE(range, pcrp->tag, PCIGETMEMORY64(basep[i-1]), - pcrp->basesize[i-1], ResExcMemBlock) -#else - if (basep[i]) - continue; - P_M_RANGE(range, pcrp->tag, PCIGETMEMORY(basep[i-1]), - pcrp->basesize[i-1], ResExcMemBlock) -#endif - } - Sys = xf86AddResToList(Sys, &range, -1); - } - } - if ((pcrp->pci_baserom) && - (pcrp->pci_command & PCI_CMD_MEM_ENABLE) && - (pcrp->pci_baserom & PCI_MAP_ROM_DECODE_ENABLE)) { - P_M_RANGE(range,pcrp->tag,PCIGETROM(pcrp->pci_baserom), - pcrp->basesize[6],ResExcMemBlock); - Sys = xf86AddResToList(Sys, &range, -1); - } - } -#ifdef DEBUG - xf86MsgVerb(X_INFO, 3,"Sys:\n"); - xf86PrintResList(3,Sys); -#endif - - /* - * The order the video devices are listed in is - * just right: the lower buses come first. - * This way we attempt to fix a conflict of - * a lower bus device with a higher bus device - * where we have more room to find different - * resources. - */ - while ((pvp = xf86PciVideoInfo[n++])) { - resPtr res_mp = NULL, res_m_io = NULL; - resPtr NonSys; - resPtr tmp, avoid = NULL; - - if (!pvp->validate) continue; - NonSys = xf86DupResList(Sys); - m = n; - while ((pvp1 = xf86PciVideoInfo[m++])) { - if (!pvp1->validate) continue; - for (i = 0; i<6; i++) { - if (pvp1->ioBase[i]) { - PV_I_RANGE(range,pvp1,i,ResExcIoBlock); - NonSys = xf86AddResToList(NonSys,&range,-1); - } else if (pvp1->memBase[i]) { - PV_M_RANGE(range,pvp1,i,ResExcMemBlock); - NonSys = xf86AddResToList(NonSys,&range,-1); - } - } - } -#ifdef DEBUG - xf86MsgVerb(X_INFO, 3,"NonSys:\n"); - xf86PrintResList(3,NonSys); -#endif - pbp = xf86PciBus; - while (pbp) { - if (pbp->secondary == pvp->bus) { - if (pbp->preferred_pmem) { - /* keep prefetchable separate */ - res_mp = - xf86FindIntersectOfLists(pbp->preferred_pmem, ResRange); - } - if (pbp->pmem) { - res_mp = xf86FindIntersectOfLists(pbp->pmem, ResRange); - } - if (pbp->preferred_mem) { - res_m_io = - xf86FindIntersectOfLists(pbp->preferred_mem, ResRange); - } - if (pbp->mem) { - res_m_io = xf86FindIntersectOfLists(pbp->mem, ResRange); - } - if (pbp->preferred_io) { - res_m_io = xf86JoinResLists(res_m_io, - xf86FindIntersectOfLists(pbp->preferred_io, ResRange)); - } - if (pbp->io) { - res_m_io = xf86JoinResLists(res_m_io, - xf86FindIntersectOfLists(pbp->preferred_io, ResRange)); - } - } else if ((pbp->primary == pvp->bus) && - (pbp->secondary >= 0) && - (pbp->primary != pbp->secondary)) { - tmp = xf86DupResList(pbp->preferred_pmem); - avoid = xf86JoinResLists(avoid, tmp); - tmp = xf86DupResList(pbp->preferred_mem); - avoid = xf86JoinResLists(avoid, tmp); - tmp = xf86DupResList(pbp->preferred_io); - avoid = xf86JoinResLists(avoid, tmp); - } - pbp = pbp->next; - } - if (res_m_io == NULL) - res_m_io = xf86DupResList(ResRange); - - pciConvertListToHost(pvp->bus,pvp->device,pvp->func, avoid); - -#ifdef DEBUG - xf86MsgVerb(X_INFO, 3,"avoid:\n"); - xf86PrintResList(3,avoid); - xf86MsgVerb(X_INFO, 3,"prefetchable Memory:\n"); - xf86PrintResList(3,res_mp); - xf86MsgVerb(X_INFO, 3,"MEM/IO:\n"); - xf86PrintResList(3,res_m_io); -#endif - for (i = 0; i < 6; i++) { - int j; - resPtr own = NULL; - for (j = i+1; j < 6; j++) { - if (pvp->ioBase[j]) { - PV_I_RANGE(range,pvp,j,ResExcIoBlock); - own = xf86AddResToList(own,&range,-1); - } else if (pvp->memBase[j]) { - PV_M_RANGE(range,pvp,j,ResExcMemBlock); - own = xf86AddResToList(own,&range,-1); - } - } -#ifdef DEBUG - xf86MsgVerb(X_INFO, 3, "own:\n"); - xf86PrintResList(3, own); -#endif - if (pvp->ioBase[i]) { - PV_I_RANGE(range,pvp,i,ResExcIoBlock); - if (xf86IsSubsetOf(range,res_m_io) - && ! ChkConflict(&range,own,SETUP) - && ! ChkConflict(&range,avoid,SETUP) - && ! ChkConflict(&range,NonSys,SETUP)) { - xf86FreeResList(own); - continue; - } - xf86MsgVerb(X_WARNING, 0, - "****INVALID IO ALLOCATION**** b: 0x%lx e: 0x%lx " - "correcting\a\n", range.rBegin,range.rEnd); -#ifdef DEBUG - sleep(2); -#endif - fixPciResource(i, 0, pvp, range.type); - } else if (pvp->memBase[i]) { - PV_M_RANGE(range,pvp,i,ResExcMemBlock); - if (pvp->type[i] & PCI_MAP_MEMORY_CACHABLE) { - if (xf86IsSubsetOf(range,res_mp) - && ! ChkConflict(&range,own,SETUP) - && ! ChkConflict(&range,avoid,SETUP) - && ! ChkConflict(&range,NonSys,SETUP)) { - xf86FreeResList(own); - continue; - } - } - if (xf86IsSubsetOf(range,res_m_io) - && ! ChkConflict(&range,own,SETUP) - && ! ChkConflict(&range,avoid,SETUP) - && ! ChkConflict(&range,NonSys,SETUP)) { - xf86FreeResList(own); - continue; - } - xf86MsgVerb(X_WARNING, 0, - "****INVALID MEM ALLOCATION**** b: 0x%lx e: 0x%lx " - "correcting\a\n", range.rBegin,range.rEnd); - if (ChkConflict(&range,own,SETUP)) { - xf86MsgVerb(X_INFO,3,"own\n"); - xf86PrintResList(3,own); - } - if (ChkConflict(&range,avoid,SETUP)) { - xf86MsgVerb(X_INFO,3,"avoid\n"); - xf86PrintResList(3,avoid); - } - if (ChkConflict(&range,NonSys,SETUP)) { - xf86MsgVerb(X_INFO,3,"NonSys\n"); - xf86PrintResList(3,NonSys); - } - -#ifdef DEBUG - sleep(2); -#endif - fixPciResource(i, 0, pvp, range.type); - } - xf86FreeResList(own); - } - xf86FreeResList(avoid); - xf86FreeResList(NonSys); - xf86FreeResList(res_mp); - xf86FreeResList(res_m_io); - } - xf86FreeResList(Sys); -} - -resList -GetImplicitPciResources(int entityIndex) -{ - pciVideoPtr pvp; - int i; - resList list = NULL; - int num = 0; - - if (! (pvp = xf86GetPciInfoForEntity(entityIndex))) return NULL; - - for (i = 0; i < 6; i++) { - if (pvp->ioBase[i]) { - list = xnfrealloc(list,sizeof(resRange) * (++num)); - PV_I_RANGE(list[num - 1],pvp,i,ResShrIoBlock | ResBios); - } else if (pvp->memBase[i]) { - list = xnfrealloc(list,sizeof(resRange) * (++num)); - PV_M_RANGE(list[num - 1],pvp,i,ResShrMemBlock | ResBios); - } - } -#if 0 - if (pvp->biosBase) { - list = xnfrealloc(list,sizeof(resRange) * (++num)); - PV_B_RANGE(list[num - 1],pvp,ResShrMemBlock | ResBios); - } -#endif - list = xnfrealloc(list,sizeof(resRange) * (++num)); - list[num - 1].type = ResEnd; - - return list; -} - void initPciState(void) { - int i = 0; - int j = 0; - pciVideoPtr pvp; + unsigned i; pciAccPtr pcaccp; - if (xf86PciAccInfo != NULL) - return; - - if (xf86PciVideoInfo == NULL) + if (xf86PciVideoInfo == NULL) { return; + } + + for (i = 0 ; xf86PciVideoInfo[i] != NULL ; i++) { + struct pci_device * const pvp = xf86PciVideoInfo[i]; + + if (pvp->user_data == 0) { + pcaccp = xnfalloc( sizeof( pciAccRec ) ); + pvp->user_data = (intptr_t) pcaccp; - while ((pvp = xf86PciVideoInfo[i]) != NULL) { - i++; - j++; - xf86PciAccInfo = xnfrealloc(xf86PciAccInfo, - sizeof(pciAccPtr) * (j + 1)); - xf86PciAccInfo[j] = NULL; - pcaccp = xf86PciAccInfo[j - 1] = xnfalloc(sizeof(pciAccRec)); - pcaccp->busnum = pvp->bus; - pcaccp->devnum = pvp->device; - pcaccp->funcnum = pvp->func; - pcaccp->arg.tag = pciTag(pvp->bus, pvp->device, pvp->func); - pcaccp->ioAccess.AccessDisable = pciIoAccessDisable; - pcaccp->ioAccess.AccessEnable = pciIoAccessEnable; - pcaccp->ioAccess.arg = &pcaccp->arg; + pcaccp->arg.dev = pvp; + pcaccp->ioAccess.AccessDisable = pciIoAccessDisable; + pcaccp->ioAccess.AccessEnable = pciIoAccessEnable; + pcaccp->ioAccess.arg = &pcaccp->arg; pcaccp->io_memAccess.AccessDisable = pciIo_MemAccessDisable; pcaccp->io_memAccess.AccessEnable = pciIo_MemAccessEnable; pcaccp->io_memAccess.arg = &pcaccp->arg; pcaccp->memAccess.AccessDisable = pciMemAccessDisable; pcaccp->memAccess.AccessEnable = pciMemAccessEnable; pcaccp->memAccess.arg = &pcaccp->arg; - if (PCISHAREDIOCLASSES(pvp->class, pvp->subclass)) - pcaccp->ctrl = TRUE; - else - pcaccp->ctrl = FALSE; - savePciState(pcaccp->arg.tag, &pcaccp->save); + + pcaccp->ctrl = PCISHAREDIOCLASSES(pvp->device_class); + + savePciState(pvp, &pcaccp->save); pcaccp->arg.ctrl = pcaccp->save.command; + } } } @@ -2676,59 +532,60 @@ initPciState(void) void initPciBusState(void) { + static const struct pci_id_match bridge_match = { + PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, + (PCI_CLASS_BRIDGE << 16), 0x0000ff0000, 0 + }; + struct pci_device *dev; + struct pci_device_iterator *iter; BusAccPtr pbap, pbap_tmp; - PciBusPtr pbp = xf86PciBus; - pciBusInfo_t *pBusInfo; - while (pbp) { + iter = pci_id_match_iterator_create(& bridge_match); + while((dev = pci_device_next(iter)) != NULL) { + const uint8_t subclass = (dev->device_class >> 8) & 0x0ff; + int primary; + int secondary; + int subordinate; + + + pci_device_get_bridge_buses(dev, &primary, &secondary, &subordinate); + pbap = xnfcalloc(1,sizeof(BusAccRec)); - pbap->busdep.pci.bus = pbp->secondary; - pbap->busdep.pci.primary_bus = pbp->primary; + pbap->busdep.pci.bus = secondary; + pbap->busdep.pci.primary_bus = primary; pbap->busdep_type = BUS_PCI; - pbap->busdep.pci.acc = PCITAG_SPECIAL; + pbap->busdep.pci.dev = dev; - if ((pbp->secondary >= 0) && (pbp->secondary < pciNumBuses) && - (pBusInfo = pciBusInfo[pbp->secondary]) && - pBusInfo->funcs->pciControlBridge) { - pbap->type = BUS_PCI; - pbap->save_f = savePciDrvBusState; - pbap->restore_f = restorePciDrvBusState; - pbap->set_f = pciSetBusAccess; - pbap->enable_f = pciDrvBusAccessEnable; - pbap->disable_f = pciDrvBusAccessDisable; - savePciDrvBusState(pbap); - } else switch (pbp->subclass) { + pbap->set_f = pciSetBusAccess; + + switch (subclass) { case PCI_SUBCLASS_BRIDGE_HOST: pbap->type = BUS_PCI; - pbap->set_f = pciSetBusAccess; break; case PCI_SUBCLASS_BRIDGE_PCI: case PCI_SUBCLASS_BRIDGE_CARDBUS: pbap->type = BUS_PCI; pbap->save_f = savePciBusState; pbap->restore_f = restorePciBusState; - pbap->set_f = pciSetBusAccess; pbap->enable_f = pciBusAccessEnable; pbap->disable_f = pciBusAccessDisable; - pbap->busdep.pci.acc = pciTag(pbp->brbus,pbp->brdev,pbp->brfunc); savePciBusState(pbap); break; case PCI_SUBCLASS_BRIDGE_ISA: case PCI_SUBCLASS_BRIDGE_EISA: case PCI_SUBCLASS_BRIDGE_MC: pbap->type = BUS_ISA; - pbap->set_f = pciSetBusAccess; break; } pbap->next = xf86BusAccInfo; xf86BusAccInfo = pbap; - pbp = pbp->next; } - pbap = xf86BusAccInfo; + pci_iterator_destroy(iter); - while (pbap) { + for (pbap = xf86BusAccInfo; pbap; pbap = pbap->next) { pbap->primary = NULL; + if (pbap->busdep_type == BUS_PCI && pbap->busdep.pci.primary_bus > -1) { pbap_tmp = xf86BusAccInfo; @@ -2744,32 +601,34 @@ initPciBusState(void) pbap_tmp = pbap_tmp->next; } } - pbap = pbap->next; } } void PciStateEnter(void) { - pciAccPtr paccp; - int i = 0; - - if (xf86PciAccInfo == NULL) +#if 0 + unsigned i; + + if (xf86PciVideoInfo == NULL) return; - while ((paccp = xf86PciAccInfo[i]) != NULL) { - i++; - if (!paccp->ctrl) - continue; - savePciState(paccp->arg.tag, &paccp->save); - restorePciState(paccp->arg.tag, &paccp->restore); - paccp->arg.ctrl = paccp->restore.command; + for ( i = 0 ; xf86PciVideoInfo[i] != NULL ; i++ ) { + pciAccPtr paccp = (pciAccPtr) xf86PciVideoInfo[i]->user_data; + + if ( (paccp != NULL) && paccp->ctrl ) { + savePciState(paccp->arg.dev, &paccp->save); + restorePciState(paccp->arg.dev, &paccp->restore); + paccp->arg.ctrl = paccp->restore.command; + } } +#endif } void PciBusStateEnter(void) { +#if 0 BusAccPtr pbap = xf86BusAccInfo; while (pbap) { @@ -2777,29 +636,33 @@ PciBusStateEnter(void) pbap->save_f(pbap); pbap = pbap->next; } +#endif } void PciStateLeave(void) { - pciAccPtr paccp; - int i = 0; +#if 0 + unsigned i; - if (xf86PciAccInfo == NULL) + if (xf86PciVideoInfo == NULL) return; - while ((paccp = xf86PciAccInfo[i]) != NULL) { - i++; - if (!paccp->ctrl) - continue; - savePciState(paccp->arg.tag, &paccp->restore); - restorePciState(paccp->arg.tag, &paccp->save); + for ( i = 0 ; xf86PciVideoInfo[i] != NULL ; i++ ) { + pciAccPtr paccp = (pciAccPtr) xf86PciVideoInfo[i]->user_data; + + if ( (paccp != NULL) && paccp->ctrl ) { + savePciState(paccp->arg.dev, &paccp->restore); + restorePciState(paccp->arg.dev, &paccp->save); + } } +#endif } void PciBusStateLeave(void) { +#if 0 BusAccPtr pbap = xf86BusAccInfo; while (pbap) { @@ -2807,27 +670,32 @@ PciBusStateLeave(void) pbap->restore_f(pbap); pbap = pbap->next; } +#endif } void DisablePciAccess(void) { - int i = 0; - pciAccPtr paccp; - if (xf86PciAccInfo == NULL) +#if 0 + unsigned i; + + if (xf86PciVideoInfo == NULL) return; - while ((paccp = xf86PciAccInfo[i]) != NULL) { - i++; - if (!paccp->ctrl) /* disable devices that are under control initially*/ - continue; - pciIo_MemAccessDisable(paccp->io_memAccess.arg); + for ( i = 0 ; xf86PciVideoInfo[i] != NULL ; i++ ) { + pciAccPtr paccp = (pciAccPtr) xf86PciVideoInfo[i]->user_data; + + if ( (paccp != NULL) && paccp->ctrl ) { + pciIo_MemAccessDisable(paccp->io_memAccess.arg); + } } +#endif } void DisablePciBusAccess(void) { +#if 0 BusAccPtr pbap = xf86BusAccInfo; while (pbap) { @@ -2837,26 +705,7 @@ DisablePciBusAccess(void) pbap->primary->current = NULL; pbap = pbap->next; } -} - -/* - * Public functions - */ - -_X_EXPORT Bool -xf86IsPciDevPresent(int bus, int dev, int func) -{ - int i = 0; - pciConfigPtr pcp; - - while ((pcp = xf86PciInfo[i]) != NULL) { - if ((pcp->busnum == bus) - && (pcp->devnum == dev) - && (pcp->funcnum == func)) - return TRUE; - i++; - } - return FALSE; +#endif } /* @@ -2865,42 +714,35 @@ xf86IsPciDevPresent(int bus, int dev, int func) */ _X_EXPORT int -xf86ClaimPciSlot(int bus, int device, int func, DriverPtr drvp, +xf86ClaimPciSlot(struct pci_device * d, DriverPtr drvp, int chipset, GDevPtr dev, Bool active) { EntityPtr p = NULL; - pciAccPtr *ppaccp = xf86PciAccInfo; + pciAccPtr paccp = (pciAccPtr) d->user_data; BusAccPtr pbap = xf86BusAccInfo; + const unsigned bus = PCI_MAKE_BUS(d->domain, d->bus); int num; - if (xf86CheckPciSlot(bus, device, func)) { + if (xf86CheckPciSlot(d)) { num = xf86AllocateEntity(); p = xf86Entities[num]; p->driver = drvp; p->chipset = chipset; - p->busType = BUS_PCI; - p->pciBusId.bus = bus; - p->pciBusId.device = device; - p->pciBusId.func = func; + p->bus.type = BUS_PCI; + p->bus.id.pci = d; p->active = active; p->inUse = FALSE; if (dev) xf86AddDevToEntity(num, dev); /* Here we initialize the access structure */ p->access = xnfcalloc(1,sizeof(EntityAccessRec)); - while (ppaccp && *ppaccp) { - if ((*ppaccp)->busnum == bus - && (*ppaccp)->devnum == device - && (*ppaccp)->funcnum == func) { - p->access->fallback = &(*ppaccp)->io_memAccess; - p->access->pAccess = &(*ppaccp)->io_memAccess; - (*ppaccp)->ctrl = TRUE; /* mark control if not already */ - break; - } - ppaccp++; + if (paccp != NULL) { + p->access->fallback = & paccp->io_memAccess; + p->access->pAccess = & paccp->io_memAccess; + paccp->ctrl = TRUE; /* mark control if not already */ } - if (!ppaccp || !*ppaccp) { + else { p->access->fallback = &AccessNULL; p->access->pAccess = &AccessNULL; } @@ -2911,16 +753,12 @@ xf86ClaimPciSlot(int bus, int device, int func, DriverPtr drvp, p->busAcc = pbap; pbap = pbap->next; } - fixPciSizeInfo(num); - /* in case bios is enabled disable it */ - disablePciBios(pciTag(bus,device,func)); pciSlotClaimed = TRUE; if (active) { /* Map in this domain's I/O space */ - p->domainIO = xf86MapDomainIO(-1, VIDMEM_MMIO, - pciTag(bus, device, func), 0, 1); + p->domainIO = xf86MapLegacyIO(d); } return num; @@ -2929,138 +767,6 @@ xf86ClaimPciSlot(int bus, int device, int func, DriverPtr drvp, } /* - * Get xf86PciVideoInfo for a driver. - */ -_X_EXPORT pciVideoPtr * -xf86GetPciVideoInfo(void) -{ - return xf86PciVideoInfo; -} - -/* --- Used by ATI driver, but also more generally useful */ - -/* - * Get the full xf86scanpci data. - */ -_X_EXPORT pciConfigPtr * -xf86GetPciConfigInfo(void) -{ - return xf86PciInfo; -} - -/* - * Enable a device and route VGA to it. This is intended for a driver's - * Probe(), before creating EntityRec's. Only one device can be thus enabled - * at any one time, and should be disabled when the driver is done with it. - * - * The following special calls are also available: - * - * pvp == NULL && rt == NONE disable previously enabled device - * pvp != NULL && rt == NONE ensure device is disabled - * pvp == NULL && rt != NONE disable >all< subsequent calls to this function - * (done from xf86PostProbe()) - * The last combination has been removed! To do this cleanly we have - * to implement stages and need to test at each stage dependent function - * if it is allowed to execute. - * - * The device represented by pvp may not have been previously claimed. - */ -_X_EXPORT void -xf86SetPciVideo(pciVideoPtr pvp, resType rt) -{ - static BusAccPtr pbap = NULL; - static xf86AccessPtr pAcc = NULL; - static Bool DoneProbes = FALSE; - pciAccPtr pcaccp; - int i; - - if (DoneProbes) - return; - - /* Disable previous access */ - if (pAcc) { - if (pAcc->AccessDisable) - (*pAcc->AccessDisable)(pAcc->arg); - pAcc = NULL; - } - if (pbap) { - while (pbap->primary) { - if (pbap->disable_f) - (*pbap->disable_f)(pbap); - pbap->primary->current = NULL; - pbap = pbap->primary; - } - pbap = NULL; - } - - /* Check for xf86PostProbe's magic combo */ - if (!pvp) { - if (rt != NONE) - DoneProbes = TRUE; - return; - } - - /* Validate device */ - if (!xf86PciVideoInfo || !xf86PciAccInfo || !xf86BusAccInfo) - return; - - for (i = 0; pvp != xf86PciVideoInfo[i]; i++) - if (!xf86PciVideoInfo[i]) - return; - - /* Ignore request for claimed adapters */ - if (!xf86CheckPciSlot(pvp->bus, pvp->device, pvp->func)) - return; - - /* Find pciAccRec structure */ - for (i = 0; ; i++) { - if (!(pcaccp = xf86PciAccInfo[i])) - return; - if ((pvp->bus == pcaccp->busnum) && - (pvp->device == pcaccp->devnum) && - (pvp->func == pcaccp->funcnum)) - break; - } - - if (rt == NONE) { - /* This is a call to ensure the adapter is disabled */ - if (pcaccp->io_memAccess.AccessDisable) - (*pcaccp->io_memAccess.AccessDisable)(pcaccp->io_memAccess.arg); - return; - } - - /* Find BusAccRec structure */ - for (pbap = xf86BusAccInfo; ; pbap = pbap->next) { - if (!pbap) - return; - if (pvp->bus == pbap->busdep.pci.bus) - break; - } - - /* Route VGA */ - if (pbap->set_f) - (*pbap->set_f)(pbap); - - /* Enable device */ - switch (rt) { - case IO: - pAcc = &pcaccp->ioAccess; - break; - case MEM_IO: - pAcc = &pcaccp->io_memAccess; - break; - case MEM: - pAcc = &pcaccp->memAccess; - break; - default: /* no compiler noise */ - break; - } - - if (pAcc && pAcc->AccessEnable) - (*pAcc->AccessEnable)(pAcc->arg); -} - -/* * Parse a BUS ID string, and return the PCI bus parameters if it was * in the correct format for a PCI bus id. */ @@ -3157,54 +863,24 @@ xf86ComparePciBusString(const char *busID, int bus, int device, int func) */ _X_EXPORT Bool -xf86IsPrimaryPci(pciVideoPtr pPci) +xf86IsPrimaryPci(struct pci_device *pPci) { - if (primaryBus.type != BUS_PCI) return FALSE; - return (pPci->bus == primaryBus.id.pci.bus && - pPci->device == primaryBus.id.pci.device && - pPci->func == primaryBus.id.pci.func); + return ((primaryBus.type == BUS_PCI) && (pPci == primaryBus.id.pci)); } /* * xf86GetPciInfoForEntity() -- Get the pciVideoRec of entity. */ -_X_EXPORT pciVideoPtr +_X_EXPORT struct pci_device * xf86GetPciInfoForEntity(int entityIndex) { - pciVideoPtr *ppPci; EntityPtr p; if (entityIndex >= xf86NumEntities) return NULL; p = xf86Entities[entityIndex]; - if (p->busType != BUS_PCI) - return NULL; - - for (ppPci = xf86PciVideoInfo; *ppPci != NULL; ppPci++) { - if (p->pciBusId.bus == (*ppPci)->bus && - p->pciBusId.device == (*ppPci)->device && - p->pciBusId.func == (*ppPci)->func) - return (*ppPci); - } - return NULL; -} - -_X_EXPORT int -xf86GetPciEntity(int bus, int dev, int func) -{ - int i; - - for (i = 0; i < xf86NumEntities; i++) { - EntityPtr p = xf86Entities[i]; - if (p->busType != BUS_PCI) continue; - - if (p->pciBusId.bus == bus && - p->pciBusId.device == dev && - p->pciBusId.func == func) - return i; - } - return -1; + return (p->bus.type == BUS_PCI) ? p->bus.id.pci : NULL; } /* @@ -3212,12 +888,12 @@ xf86GetPciEntity(int bus, int dev, int func) * PCI base address register values for the given PCI device. */ _X_EXPORT Bool -xf86CheckPciMemBase(pciVideoPtr pPci, memType base) +xf86CheckPciMemBase( struct pci_device * pPci, memType base ) { int i; for (i = 0; i < 6; i++) - if (base == pPci->memBase[i]) + if (base == pPci->regions[i].base_addr) return TRUE; return FALSE; } @@ -3227,154 +903,32 @@ xf86CheckPciMemBase(pciVideoPtr pPci, memType base) */ _X_EXPORT Bool -xf86CheckPciSlot(int bus, int device, int func) +xf86CheckPciSlot(const struct pci_device *d) { int i; - EntityPtr p; for (i = 0; i < xf86NumEntities; i++) { - p = xf86Entities[i]; - /* Check if this PCI slot is taken */ - if (p->busType == BUS_PCI && p->pciBusId.bus == bus && - p->pciBusId.device == device && p->pciBusId.func == func) - return FALSE; - } - - return TRUE; -} - - -/* - * xf86FindPciVendorDevice() xf86FindPciClass(): These functions - * are meant to be used by the pci bios emulation. Some bioses - * need to see if there are _other_ chips of the same type around - * so by setting pvp_exclude one pci device can be explicitely - * _excluded if required. - */ -_X_EXPORT pciVideoPtr -xf86FindPciDeviceVendor(CARD16 vendorID, CARD16 deviceID, - char n, pciVideoPtr pvp_exclude) -{ - pciVideoPtr pvp, *ppvp; - n++; + const EntityPtr p = xf86Entities[i]; - for (ppvp = xf86PciVideoInfo, pvp =*ppvp; pvp ; pvp = *(++ppvp)) { - if (pvp == pvp_exclude) continue; - if ((pvp->vendor == vendorID) && (pvp->chipType == deviceID)) { - if (!(--n)) break; + if ((p->bus.type == BUS_PCI) && (p->bus.id.pci == d)) { + return FALSE; } } - return pvp; + return TRUE; } -_X_EXPORT pciVideoPtr -xf86FindPciClass(CARD8 intf, CARD8 subClass, CARD16 class, - char n, pciVideoPtr pvp_exclude) -{ - pciVideoPtr pvp, *ppvp; - n++; - - for (ppvp = xf86PciVideoInfo, pvp =*ppvp; pvp ; pvp = *(++ppvp)) { - if (pvp == pvp_exclude) continue; - if ((pvp->interface == intf) && (pvp->subclass == subClass) - && (pvp->class == class)) { - if (!(--n)) break; - } - } - return pvp; -} -/* - * This attempts to detect a multi-device card and sets up a list - * of pci tags of the devices of this card. On some of these - * cards the BIOS is not visible from all chipsets. We therefore - * need to use the BIOS from a chipset where it is visible. - * We do the following heuristics: - * If we detect only identical pci devices on a bus we assume it's - * a multi-device card. This assumption isn't true always, however. - * One might just use identical cards on a bus. We therefore don't - * detect this situation when we set up the PCI video info. Instead - * we wait until an attempt to read the BIOS fails. - */ -int -pciTestMultiDeviceCard(int bus, int dev, int func, PCITAG** pTag) +void +pciConvertRange2Host(int entityIndex, resRange *pRange) { - pciConfigPtr *ppcrp = xf86PciInfo; - pciConfigPtr pcrp = NULL; - int i,j; - Bool multicard = FALSE; - Bool multifunc = FALSE; - char str[256]; - char *str1; - - str1 = str; - if (!pTag) - return 0; - - *pTag = NULL; - - for (i=0; i < 8; i++) { - j = 0; + struct pci_device *const pvp = xf86GetPciInfoForEntity(entityIndex); + const PCITAG tag = PCI_MAKE_TAG(PCI_MAKE_BUS(pvp->domain, pvp->bus), + pvp->dev, pvp->func); - while (ppcrp[j]) { - if (ppcrp[j]->busnum == bus && ppcrp[j]->funcnum == i) { - pcrp = ppcrp[j]; - break; - } - j++; - } - - if (!pcrp) return 0; - - /* - * we check all functions here: since multifunc devices need - * to implement func 0 we catch all devices on the bus when - * i = 0 - */ - if (pcrp->pci_header_type &0x80) - multifunc = TRUE; - - j = 0; - - while (ppcrp[j]) { - if (ppcrp[j]->busnum == bus && ppcrp[j]->funcnum == i - && ppcrp[j]->devnum != pcrp->devnum) { - /* don't test subsys ID here. It might be set by POST - - however some cards might not have been POSTed */ - if (ppcrp[j]->pci_device_vendor != pcrp->pci_device_vendor - || ppcrp[j]->pci_header_type != pcrp->pci_header_type ) - return 0; - else - multicard = TRUE; - } - j++; - } - if (!multifunc) - break; - } - - if (!multicard) - return 0; - - j = 0; - i = 0; - while (ppcrp[i]) { - if (ppcrp[i]->busnum == bus && ppcrp[i]->funcnum == func) { - str1 += sprintf(str1,"[%x:%x:%x]",ppcrp[i]->busnum, - ppcrp[i]->devnum,ppcrp[i]->funcnum); - *pTag = xnfrealloc(*pTag,sizeof(PCITAG) * (j + 1)); - (*pTag)[j++] = pciTag(ppcrp[i]->busnum, - ppcrp[i]->devnum,ppcrp[i]->funcnum); + if (pvp == NULL) { + return; } - i++; - } - xf86MsgVerb(X_INFO,3,"Multi Device Card detected: %s\n",str); - return j; -} -static void -pciTagConvertRange2Host(PCITAG tag, resRange *pRange) -{ if (!(pRange->type & ResBus)) return; @@ -3411,41 +965,5 @@ pciTagConvertRange2Host(PCITAG tag, resRange *pRange) /* Set domain number */ pRange->type &= ~(ResDomain | ResBus); - pRange->type |= xf86GetPciDomain(tag) << 24; -} - -static void -pciConvertListToHost(int bus, int dev, int func, resPtr list) -{ - PCITAG tag = pciTag(bus,dev,func); - while (list) { - pciTagConvertRange2Host(tag, &list->val); - list = list->next; - } -} - -static void -updateAccessInfoStatusControlInfo(PCITAG tag, CARD32 ctrl) -{ - int i; - - if (!xf86PciAccInfo) - return; - - for (i = 0; xf86PciAccInfo[i] != NULL; i++) { - if (xf86PciAccInfo[i]->arg.tag == tag) - xf86PciAccInfo[i]->arg.ctrl = ctrl; - } -} - -void -pciConvertRange2Host(int entityIndex, resRange *pRange) -{ - PCITAG tag; - pciVideoPtr pvp; - - pvp = xf86GetPciInfoForEntity(entityIndex); - if (!pvp) return; - tag = TAG(pvp); - pciTagConvertRange2Host(tag, pRange); + pRange->type |= pvp->domain << 24; } diff --git a/hw/xfree86/common/xf86pciBus.h b/hw/xfree86/common/xf86pciBus.h index 90d9dd9b9..7d08502fc 100644 --- a/hw/xfree86/common/xf86pciBus.h +++ b/hw/xfree86/common/xf86pciBus.h @@ -42,14 +42,11 @@ typedef struct { } pciSave, *pciSavePtr; typedef struct { - PCITAG tag; + struct pci_device * dev; CARD32 ctrl; } pciArg; typedef struct { - int busnum; - int devnum; - int funcnum; pciArg arg; xf86AccessRec ioAccess; xf86AccessRec io_memAccess; @@ -63,24 +60,7 @@ typedef union { CARD16 control; } pciBridgesSave, *pciBridgesSavePtr; -typedef struct pciBusRec { - int brbus, brdev, brfunc; /* ID of the bridge to this bus */ - int primary, secondary, subordinate; - int subclass; /* bridge type */ - int interface; - resPtr preferred_io; /* I/O range */ - resPtr preferred_mem; /* non-prefetchable memory range */ - resPtr preferred_pmem; /* prefetchable memory range */ - resPtr io; /* for subtractive PCI-PCI bridges */ - resPtr mem; - resPtr pmem; - int brcontrol; /* bridge_control byte */ - struct pciBusRec *next; -} PciBusRec, *PciBusPtr; - void xf86PciProbe(void); -void ValidatePci(void); -resList GetImplicitPciResources(int entityIndex); void initPciState(void); void initPciBusState(void); void DisablePciAccess(void); @@ -89,10 +69,7 @@ void PciStateEnter(void); void PciBusStateEnter(void); void PciStateLeave(void); void PciBusStateLeave(void); -resPtr ResourceBrokerInitPci(resPtr *osRes); void pciConvertRange2Host(int entityIndex, resRange *pRange); void isaConvertRange2Host(resRange *pRange); -extern pciAccPtr * xf86PciAccInfo; - #endif /* _XF86_PCI_BUS_H */ diff --git a/hw/xfree86/common/xf86str.h b/hw/xfree86/common/xf86str.h index 086d2bfc4..0365ddd62 100644 --- a/hw/xfree86/common/xf86str.h +++ b/hw/xfree86/common/xf86str.h @@ -43,11 +43,21 @@ #include "xf86Opt.h" #include "xf86Pci.h" -/* - * memType is of the size of the addressable memory (machine size) - * usually unsigned long. +#include <pciaccess.h> + +/** + * Integer type that is of the size of the addressable memory (machine size). + * On most platforms \c uintptr_t will suffice. However, on some mixed + * 32-bit / 64-bit platforms, such as 32-bit binaries on 64-bit PowerPC, this + * must be 64-bits. */ -typedef unsigned long memType; +#include <inttypes.h> +#if defined(__powerpc__) +typedef uint64_t memType; +#else +typedef uintptr_t memType; +#endif + /* Video mode flags */ @@ -307,6 +317,9 @@ typedef struct { int refCount; } DriverRec1; +struct _SymTabRec; +struct _PciChipsets; + typedef struct _DriverRec { int driverVersion; char * driverName; @@ -316,6 +329,10 @@ typedef struct _DriverRec { pointer module; int refCount; xorgDriverFuncProc *driverFunc; + + const struct pci_id_match * supported_devices; + Bool (*PciProbe)( struct _DriverRec * drv, int entity_num, + struct pci_device * dev, intptr_t match_data ); } DriverRec, *DriverPtr; /* @@ -361,11 +378,7 @@ typedef enum { BUS_last /* Keep last */ } BusType; -typedef struct { - int bus; - int device; - int func; -} PciBusId; +struct pci_device; typedef struct { unsigned int dummy; @@ -379,7 +392,7 @@ typedef struct _bus { BusType type; union { IsaBusId isa; - PciBusId pci; + struct pci_device *pci; SbusBusId sbus; } id; } BusRec, *BusPtr; @@ -431,29 +444,6 @@ typedef struct { } IDevRec, *IDevPtr; typedef struct { - int vendor; - int chipType; - int chipRev; - int subsysVendor; - int subsysCard; - int bus; - int device; - int func; - int class; - int subclass; - int interface; - memType memBase[6]; - memType ioBase[6]; - int size[6]; - unsigned char type[6]; - memType biosBase; - int biosSize; - pointer thisCard; - Bool validSize; - Bool validate; -} pciVideoRec, *pciVideoPtr; - -typedef struct { int frameX0; int frameY0; int virtualX; @@ -735,7 +725,7 @@ typedef struct { resRange *resList; } IsaChipsets; -typedef struct { +typedef struct _PciChipsets { /** * Key used to match this device with its name in an array of * \c SymTabRec. @@ -1064,7 +1054,7 @@ typedef struct { ); } DGAFunctionRec, *DGAFunctionPtr; -typedef struct { +typedef struct _SymTabRec { int token; /* id of the token */ const char * name; /* token name */ } SymTabRec, *SymTabPtr; diff --git a/hw/xfree86/dri/dri.c b/hw/xfree86/dri/dri.c index 80e07c583..d1bbfcd14 100644 --- a/hw/xfree86/dri/dri.c +++ b/hw/xfree86/dri/dri.c @@ -2449,20 +2449,17 @@ DRIMoveBuffersHelper( } char * -DRICreatePCIBusID(pciVideoPtr PciInfo) +DRICreatePCIBusID(const struct pci_device * dev) { char *busID; - int domain; - PCITAG tag; busID = xalloc(20); if (busID == NULL) return NULL; - tag = pciTag(PciInfo->bus, PciInfo->device, PciInfo->func); - domain = xf86GetPciDomain(tag); - snprintf(busID, 20, "pci:%04x:%02x:%02x.%d", domain, - PCI_BUS_NO_DOMAIN(PciInfo->bus), PciInfo->device, PciInfo->func); + snprintf(busID, 20, "pci:%04x:%02x:%02x.%d", dev->domain, dev->bus, + dev->dev, dev->func); + return busID; } diff --git a/hw/xfree86/dri/dri.h b/hw/xfree86/dri/dri.h index 98e8b75be..516da97a5 100644 --- a/hw/xfree86/dri/dri.h +++ b/hw/xfree86/dri/dri.h @@ -35,6 +35,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #ifndef _DRI_H_ +#include <pciaccess.h> + #include "scrnintstr.h" #include "xf86dri.h" @@ -363,7 +365,7 @@ extern void DRIMoveBuffersHelper(ScreenPtr pScreen, int *ydir, RegionPtr reg); -extern char *DRICreatePCIBusID(pciVideoPtr PciInfo); +extern char *DRICreatePCIBusID(const struct pci_device *PciInfo); extern int drmInstallSIGIOHandler(int fd, void (*f)(int, void *, void *)); extern int drmRemoveSIGIOHandler(int fd); diff --git a/hw/xfree86/dummylib/Makefile.am b/hw/xfree86/dummylib/Makefile.am index 6299a1ff7..3e70d25fe 100644 --- a/hw/xfree86/dummylib/Makefile.am +++ b/hw/xfree86/dummylib/Makefile.am @@ -14,10 +14,7 @@ endif libdummy_nonserver_a_SOURCES = \ fatalerror.c \ - getvalidbios.c \ - getemptypci.c \ logvwrite.c \ - pcitestmulti.c \ $(STRL_SRCS) \ verrorf.c \ xalloc.c \ diff --git a/hw/xfree86/fbdevhw/fbdevhw.c b/hw/xfree86/fbdevhw/fbdevhw.c index a573b8f5b..00c7752b7 100644 --- a/hw/xfree86/fbdevhw/fbdevhw.c +++ b/hw/xfree86/fbdevhw/fbdevhw.c @@ -296,53 +296,99 @@ fbdev2xfree_timing(struct fb_var_screeninfo *var, DisplayModePtr mode) /* -------------------------------------------------------------------- */ /* open correct framebuffer device */ -/* try to find the framebuffer device for a given PCI device */ +/** + * Try to find the framebuffer device for a given PCI device + */ static int -fbdev_open_pci(pciVideoPtr pPci, char **namep) -{ - struct fb_fix_screeninfo fix; - char filename[16]; - int fd,i,j; - memType res_start, res_end; - - for (i = 0; i < 8; i++) { - sprintf(filename,"/dev/fb%d",i); - if (-1 == (fd = open(filename,O_RDWR,0))) { - xf86DrvMsg(-1, X_WARNING, - "open %s: %s\n", filename, strerror(errno)); - continue; +fbdev_open_pci(struct pci_device * pPci, char **namep) +{ + struct fb_fix_screeninfo fix; + char filename[256]; + int fd,i,j; + + + /* There are two ways to that we can determine which fb device is + * associated with this PCI device. The more modern way is to look in + * the sysfs directory for the PCI device for a file named + * "graphics:fb*" + */ + + for (i = 0; i < 8; i++) { + sprintf(filename, + "/sys/bus/pci/devices/%04x:%02x:%02x.%d/graphics:fb%d", + pPci->domain, pPci->bus, pPci->dev, pPci->func, i); + + fd = open(filename, O_RDONLY, 0); + if (fd != -1) { + close(fd); + sprintf(filename, "/dev/fb%d", i); + + fd = open(filename, O_RDWR, 0); + if (fd != -1) { + if (ioctl(fd, FBIOGET_FSCREENINFO, (void*) & fix) != -1) { + if (namep) { + *namep = xnfalloc(16); + strncpy(*namep,fix.id,16); + } + + return fd; } - if (-1 == ioctl(fd,FBIOGET_FSCREENINFO,(void*)&fix)) { - close(fd); - continue; - } - for (j = 0; j < 6; j++) { - res_start = pPci->memBase[j]; - res_end = res_start+pPci->size[j]; - if ((0 != fix.smem_len && - (memType) fix.smem_start >= res_start && - (memType) fix.smem_start < res_end) || - (0 != fix.mmio_len && - (memType) fix.mmio_start >= res_start && - (memType) fix.mmio_start < res_end)) - break; - } - if (j == 6) { - close(fd); - continue; - } - if (namep) { - *namep = xnfalloc(16); - strncpy(*namep,fix.id,16); - } - return fd; + } } - if (namep) - *namep = NULL; - xf86DrvMsg(-1, X_ERROR, - "Unable to find a valid framebuffer device\n"); - return -1; + close(fd); + } + + + /* The other way is to examine the resources associated with each fb + * device and see if there is a match with the PCI device. This technique + * has some problems on certain mixed 64-bit / 32-bit architectures. + * There is a flaw in the fb_fix_screeninfo structure in that it only + * returns the low 32-bits of the address of the resources associated with + * a device. However, on a mixed architecture the base addresses of PCI + * devices, even for 32-bit applications, may be higher than 0x0f0000000. + */ + + for (i = 0; i < 8; i++) { + sprintf(filename,"/dev/fb%d",i); + if (-1 == (fd = open(filename,O_RDWR,0))) { + xf86DrvMsg(-1, X_WARNING, + "open %s: %s\n", filename, strerror(errno)); + continue; + } + if (-1 == ioctl(fd,FBIOGET_FSCREENINFO,(void*)&fix)) { + close(fd); + continue; + } + for (j = 0; j < 6; j++) { + const pciaddr_t res_start = pPci->regions[j].base_addr; + const pciaddr_t res_end = res_start + pPci->regions[j].size; + + if ((0 != fix.smem_len && + (pciaddr_t) fix.smem_start >= res_start && + (pciaddr_t) fix.smem_start < res_end) || + (0 != fix.mmio_len && + (pciaddr_t) fix.mmio_start >= res_start && + (pciaddr_t) fix.mmio_start < res_end)) + break; + } + if (j == 6) { + close(fd); + continue; + } + if (namep) { + *namep = xnfalloc(16); + strncpy(*namep,fix.id,16); + } + return fd; + } + + if (namep) + *namep = NULL; + + xf86DrvMsg(-1, X_ERROR, + "Unable to find a valid framebuffer device\n"); + return -1; } static int @@ -387,7 +433,7 @@ fbdev_open(int scrnIndex, char *dev, char** namep) /* -------------------------------------------------------------------- */ Bool -fbdevHWProbe(pciVideoPtr pPci, char *device,char **namep) +fbdevHWProbe(struct pci_device * pPci, char *device,char **namep) { int fd; @@ -403,7 +449,7 @@ fbdevHWProbe(pciVideoPtr pPci, char *device,char **namep) } Bool -fbdevHWInit(ScrnInfoPtr pScrn, pciVideoPtr pPci, char *device) +fbdevHWInit(ScrnInfoPtr pScrn, struct pci_device * pPci, char *device) { fbdevHWPtr fPtr; diff --git a/hw/xfree86/fbdevhw/fbdevhw.h b/hw/xfree86/fbdevhw/fbdevhw.h index 741a4b341..614dc6fed 100644 --- a/hw/xfree86/fbdevhw/fbdevhw.h +++ b/hw/xfree86/fbdevhw/fbdevhw.h @@ -5,6 +5,8 @@ #include "xf86str.h" #include "colormapst.h" +#include <pciaccess.h> + #define FBDEVHW_PACKED_PIXELS 0 /* Packed Pixels */ #define FBDEVHW_PLANES 1 /* Non interleaved planes */ #define FBDEVHW_INTERLEAVED_PLANES 2 /* Interleaved planes */ @@ -14,8 +16,8 @@ Bool fbdevHWGetRec(ScrnInfoPtr pScrn); void fbdevHWFreeRec(ScrnInfoPtr pScrn); -Bool fbdevHWProbe(pciVideoPtr pPci, char *device, char **namep); -Bool fbdevHWInit(ScrnInfoPtr pScrn, pciVideoPtr pPci, char *device); +Bool fbdevHWProbe(struct pci_device * pPci, char *device, char **namep); +Bool fbdevHWInit(ScrnInfoPtr pScrn, struct pci_device * pPci, char *device); char* fbdevHWGetName(ScrnInfoPtr pScrn); int fbdevHWGetDepth(ScrnInfoPtr pScrn, int *fbbpp); diff --git a/hw/xfree86/int10/Makefile.am b/hw/xfree86/int10/Makefile.am index 28e20d502..78bef2515 100644 --- a/hw/xfree86/int10/Makefile.am +++ b/hw/xfree86/int10/Makefile.am @@ -9,7 +9,6 @@ libint10_la_LDFLAGS = -avoid-version COMMON_SOURCES = \ helper_exec.c \ helper_mem.c \ - pci.c \ xf86int10.c \ xf86int10module.c diff --git a/hw/xfree86/int10/generic.c b/hw/xfree86/int10/generic.c index aa240ca97..a30dee103 100644 --- a/hw/xfree86/int10/generic.c +++ b/hw/xfree86/int10/generic.c @@ -16,6 +16,7 @@ #define _INT10_PRIVATE #include "xf86int10.h" #include "int10Defines.h" +#include "Pci.h" #define ALLOC_ENTRIES(x) ((V_RAM / x) - 1) @@ -55,12 +56,66 @@ int10MemRec genericMem = { static void MapVRam(xf86Int10InfoPtr pInt); static void UnmapVRam(xf86Int10InfoPtr pInt); #ifdef _PC -#define GET_HIGH_BASE(x) (((V_BIOS + size + getpagesize() - 1)/getpagesize()) \ - * getpagesize()) +#define GET_HIGH_BASE(x) (((V_BIOS + (x) + getpagesize() - 1)/getpagesize()) \ + * getpagesize()) #endif static void *sysMem = NULL; +/** + * Read legacy VGA video BIOS associated with specified domain. + * + * Attempts to read up to 128KiB of legacy VGA video BIOS. + * + * \return + * The number of bytes read on success or -1 on failure. + * + * \bug + * PCI ROMs can contain multiple BIOS images (e.g., OpenFirmware, x86 VGA, + * etc.). How do we know that \c pci_device_read_rom will return the + * legacy VGA BIOS image? + */ +static int +read_legacy_video_BIOS(struct pci_device *dev, unsigned char *Buf) +{ + const ADDRESS Base = 0xC0000; + const int Len = 0x10000 * 2; + const int pagemask = getpagesize() - 1; + const ADDRESS offset = Base & ~pagemask; + const unsigned long size = ((Base + Len + pagemask) & ~pagemask) - offset; + unsigned char *ptr, *src; + int len; + + + /* Try to use the civilized PCI interface first. + */ + if (pci_device_read_rom(dev, Buf) == 0) { + return dev->rom_size; + } + + ptr = xf86MapDomainMemory(-1, VIDMEM_READONLY, dev, offset, size); + + if (!ptr) + return -1; + + /* Using memcpy() here can hang the system */ + src = ptr + (Base - offset); + for (len = 0; len < (Len / 2); len++) { + Buf[len] = src[len]; + } + + if ((Buf[0] == 0x55) && (Buf[1] == 0xAA) && (Buf[2] > 0x80)) { + for ( /* empty */ ; len < Len; len++) { + Buf[len] = src[len]; + } + } + + xf86UnMapVidMem(-1, ptr, size); + + return Len; +} + + xf86Int10InfoPtr xf86ExtendedInitInt10(int entityIndex, int Flags) { @@ -68,7 +123,6 @@ xf86ExtendedInitInt10(int entityIndex, int Flags) void* base = 0; void* vbiosMem = 0; void* options = NULL; - pciVideoPtr pvp; int screen; legacyVGARec vga; @@ -96,8 +150,10 @@ xf86ExtendedInitInt10(int entityIndex, int Flags) pInt->scrnIndex = screen; base = INTPriv(pInt)->base = xnfalloc(SYS_BIOS); - pvp = xf86GetPciInfoForEntity(entityIndex); - if (pvp) pInt->Tag = pciTag(pvp->bus, pvp->device, pvp->func); + /* FIXME: Shouldn't this be a failure case? Leaving dev as NULL seems like + * FIXME: an error + */ + pInt->dev = xf86GetPciInfoForEntity(entityIndex); /* * we need to map video RAM MMIO as some chipsets map mmio @@ -150,14 +206,18 @@ xf86ExtendedInitInt10(int entityIndex, int Flags) switch (location_type) { case BUS_PCI: { - const int pci_entity = pInt->entityIndex; + int err; + struct pci_device *rom_device = + xf86GetPciInfoForEntity(pInt->entityIndex); vbiosMem = (unsigned char *)base + bios_location; - if (!(size = mapPciRom(pci_entity,(unsigned char *)(vbiosMem)))) { - xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (3)\n"); + err = pci_device_read_rom(rom_device, vbiosMem); + if (err) { + xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (3) %s\n", + strerror(err)); goto error1; } - INTPriv(pInt)->highMemory = GET_HIGH_BASE(size); + INTPriv(pInt)->highMemory = GET_HIGH_BASE(rom_device->rom_size); break; } case BUS_ISA: @@ -191,24 +251,15 @@ xf86ExtendedInitInt10(int entityIndex, int Flags) setup_int_vect(pInt); set_return_trap(pInt); - /* - * Retrieve two segments: one at V_BIOS, the other 64kB beyond the first. - * This'll catch any BIOS that might have been initialised before server - * entry. + /* Retrieve the entire legacy video BIOS segment. This can be upto + * 128KiB. */ vbiosMem = (char *)base + V_BIOS; (void)memset(vbiosMem, 0, 2 * V_BIOS_SIZE); - if (xf86ReadDomainMemory(pInt->Tag, V_BIOS, V_BIOS_SIZE, vbiosMem) < - V_BIOS_SIZE) - xf86DrvMsg(screen, X_WARNING, - "Unable to retrieve all of segment 0x0C0000.\n"); - else if ((((unsigned char *)vbiosMem)[0] == 0x55) && - (((unsigned char *)vbiosMem)[1] == 0xAA) && - (((unsigned char *)vbiosMem)[2] > 0x80)) - if (xf86ReadDomainMemory(pInt->Tag, V_BIOS + V_BIOS_SIZE, V_BIOS_SIZE, - (unsigned char *)vbiosMem + V_BIOS_SIZE) < V_BIOS_SIZE) + if (read_legacy_video_BIOS(pInt->dev, vbiosMem) < V_BIOS_SIZE) { xf86DrvMsg(screen, X_WARNING, - "Unable to retrieve all of segment 0x0D0000.\n"); + "Unable to retrieve all of segment 0x0C0000.\n"); + } /* * If this adapter is the primary, use its post-init BIOS (if we can find @@ -227,9 +278,15 @@ xf86ExtendedInitInt10(int entityIndex, int Flags) "No legacy BIOS found -- trying PCI\n"); } if (!done) { - if (!mapPciRom(pInt->entityIndex, vbiosMem)) { - xf86DrvMsg(screen, X_ERROR, "Cannot read V_BIOS (5)\n"); - goto error1; + int err; + struct pci_device *rom_device = + xf86GetPciInfoForEntity(pInt->entityIndex); + + err = pci_device_read_rom(rom_device, vbiosMem); + if (err) { + xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (5) %s\n", + strerror(err)); + goto error1; } } } @@ -262,7 +319,7 @@ MapVRam(xf86Int10InfoPtr pInt) int size = ((VRAM_SIZE + pagesize - 1) / pagesize) * pagesize; INTPriv(pInt)->vRam = xf86MapDomainMemory(pInt->scrnIndex, VIDMEM_MMIO, - pInt->Tag, V_RAM, size); + pInt->dev, V_RAM, size); pInt->ioBase = xf86Screens[pInt->scrnIndex]->domainIOBase; } diff --git a/hw/xfree86/int10/helper_exec.c b/hw/xfree86/int10/helper_exec.c index a41965db9..3e1051dc2 100644 --- a/hw/xfree86/int10/helper_exec.c +++ b/hw/xfree86/int10/helper_exec.c @@ -29,6 +29,7 @@ #define _INT10_PRIVATE #include "int10Defines.h" #include "xf86int10.h" +#include "Pci.h" #ifdef _X86EMU #include "x86emu/x86emui.h" #endif @@ -470,7 +471,7 @@ pciCfg1in(CARD16 addr, CARD32 *val) return 1; } if (addr == 0xCFC) { - *val = pciReadLong(Int10Current->Tag, OFFSET(PciCfg1Addr)); + pci_device_cfg_read_u32(Int10Current->dev, val, OFFSET(PciCfg1Addr)); if (PRINT_PORT && DEBUG_IO_TRACE()) ErrorF(" cfg_inl(%#x) = %8.8x\n", PciCfg1Addr, *val); return 1; @@ -488,7 +489,7 @@ pciCfg1out(CARD16 addr, CARD32 val) if (addr == 0xCFC) { if (PRINT_PORT && DEBUG_IO_TRACE()) ErrorF(" cfg_outl(%#x, %8.8x)\n", PciCfg1Addr, val); - pciWriteLong(Int10Current->Tag, OFFSET(PciCfg1Addr), val); + pci_device_cfg_write_u32(Int10Current->dev, val, OFFSET(PciCfg1Addr)); return 1; } return 0; @@ -497,7 +498,7 @@ pciCfg1out(CARD16 addr, CARD32 val) static int pciCfg1inw(CARD16 addr, CARD16 *val) { - int offset, shift; + int shift; if ((addr >= 0xCF8) && (addr <= 0xCFB)) { shift = (addr - 0xCF8) * 8; @@ -505,8 +506,9 @@ pciCfg1inw(CARD16 addr, CARD16 *val) return 1; } if ((addr >= 0xCFC) && (addr <= 0xCFF)) { - offset = addr - 0xCFC; - *val = pciReadWord(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset); + const unsigned offset = addr - 0xCFC; + + pci_device_cfg_read_u16(Int10Current->dev, val, OFFSET(PciCfg1Addr) + offset); if (PRINT_PORT && DEBUG_IO_TRACE()) ErrorF(" cfg_inw(%#x) = %4.4x\n", PciCfg1Addr + offset, *val); return 1; @@ -517,7 +519,7 @@ pciCfg1inw(CARD16 addr, CARD16 *val) static int pciCfg1outw(CARD16 addr, CARD16 val) { - int offset, shift; + int shift; if ((addr >= 0xCF8) && (addr <= 0xCFB)) { shift = (addr - 0xCF8) * 8; @@ -526,10 +528,11 @@ pciCfg1outw(CARD16 addr, CARD16 val) return 1; } if ((addr >= 0xCFC) && (addr <= 0xCFF)) { - offset = addr - 0xCFC; + const unsigned offset = addr - 0xCFC; + if (PRINT_PORT && DEBUG_IO_TRACE()) ErrorF(" cfg_outw(%#x, %4.4x)\n", PciCfg1Addr + offset, val); - pciWriteWord(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset, val); + pci_device_cfg_write_u16(Int10Current->dev, val, OFFSET(PciCfg1Addr) + offset); return 1; } return 0; @@ -538,7 +541,7 @@ pciCfg1outw(CARD16 addr, CARD16 val) static int pciCfg1inb(CARD16 addr, CARD8 *val) { - int offset, shift; + int shift; if ((addr >= 0xCF8) && (addr <= 0xCFB)) { shift = (addr - 0xCF8) * 8; @@ -546,8 +549,9 @@ pciCfg1inb(CARD16 addr, CARD8 *val) return 1; } if ((addr >= 0xCFC) && (addr <= 0xCFF)) { - offset = addr - 0xCFC; - *val = pciReadByte(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset); + const unsigned offset = addr - 0xCFC; + + pci_device_cfg_read_u8(Int10Current->dev, val, OFFSET(PciCfg1Addr) + offset); if (PRINT_PORT && DEBUG_IO_TRACE()) ErrorF(" cfg_inb(%#x) = %2.2x\n", PciCfg1Addr + offset, *val); return 1; @@ -558,7 +562,7 @@ pciCfg1inb(CARD16 addr, CARD8 *val) static int pciCfg1outb(CARD16 addr, CARD8 val) { - int offset, shift; + int shift; if ((addr >= 0xCF8) && (addr <= 0xCFB)) { shift = (addr - 0xCF8) * 8; @@ -567,10 +571,11 @@ pciCfg1outb(CARD16 addr, CARD8 val) return 1; } if ((addr >= 0xCFC) && (addr <= 0xCFF)) { - offset = addr - 0xCFC; + const unsigned offset = addr - 0xCFC; + if (PRINT_PORT && DEBUG_IO_TRACE()) ErrorF(" cfg_outb(%#x, %2.2x)\n", PciCfg1Addr + offset, val); - pciWriteByte(Int10Current->Tag, OFFSET(PciCfg1Addr) + offset, val); + pci_device_cfg_write_u8(Int10Current->dev, val, OFFSET(PciCfg1Addr) + offset); return 1; } return 0; diff --git a/hw/xfree86/int10/pci.c b/hw/xfree86/int10/pci.c deleted file mode 100644 index 7ef6328da..000000000 --- a/hw/xfree86/int10/pci.c +++ /dev/null @@ -1,55 +0,0 @@ - -/* - * XFree86 int10 module - * execute BIOS int 10h calls in x86 real mode environment - * Copyright 1999 Egbert Eich - */ -#ifdef HAVE_XORG_CONFIG_H -#include <xorg-config.h> -#endif - -#include <string.h> - -#include "xf86Pci.h" -#include "xf86.h" -#define _INT10_PRIVATE -#include "xf86int10.h" - -int -mapPciRom(int pciEntity, unsigned char * address) -{ - PCITAG tag; - unsigned char *mem, *ptr; - int length; - - pciVideoPtr pvp = xf86GetPciInfoForEntity(pciEntity); - - if (pvp == NULL) { -#ifdef DEBUG - ErrorF("mapPciRom: no PCI info\n"); -#endif - return 0; - } - - tag = pciTag(pvp->bus,pvp->device,pvp->func); - length = 1 << pvp->biosSize; - - /* Read in entire PCI ROM */ - mem = ptr = xnfcalloc(length, 1); - length = xf86ReadPciBIOS(0, tag, -1, ptr, length); - if (length > 0) - memcpy(address, ptr, length); - /* unmap/close/disable PCI bios mem */ - xfree(mem); - -#ifdef DEBUG - if (!length) - ErrorF("mapPciRom: no BIOS found\n"); -#ifdef PRINT_PCI - else - dprint(address,0x20); -#endif -#endif - - return length; -} diff --git a/hw/xfree86/int10/xf86int10.c b/hw/xfree86/int10/xf86int10.c index d74643eaf..535978b89 100644 --- a/hw/xfree86/int10/xf86int10.c +++ b/hw/xfree86/int10/xf86int10.c @@ -13,6 +13,7 @@ #define _INT10_PRIVATE #include "xf86int10.h" #include "int10Defines.h" +#include "Pci.h" #define REG pInt @@ -23,8 +24,8 @@ static int int1A_handler(xf86Int10InfoPtr pInt); static int int42_handler(xf86Int10InfoPtr pInt); #endif static int intE6_handler(xf86Int10InfoPtr pInt); -static PCITAG findPci(xf86Int10InfoPtr pInt, unsigned short bx); -static CARD32 pciSlotBX(pciVideoPtr pvp); +static struct pci_device *findPci(xf86Int10InfoPtr pInt, unsigned short bx); +static CARD32 pciSlotBX( const struct pci_device * pvp ); int int_handler(xf86Int10InfoPtr pInt) @@ -592,13 +593,75 @@ int42_handler(xf86Int10InfoPtr pInt) #define DEVICE_NOT_FOUND 0x86 #define BAD_REGISTER_NUMBER 0x87 +#ifdef SHOW_ALL_DEVICES +/** + * These functions are meant to be used by the PCI BIOS emulation. Some + * BIOSes need to see if there are \b other chips of the same type around so + * by setting \c exclude one PCI device can be explicitely excluded, if + * required. + */ +static struct pci_device * +do_find(const struct pci_id_match *m, char n, const struct pci_device * exclude) +{ + struct pci_device *dev; + struct pci_device_iterator *iter; + + n++; + + iter = pci_id_match_iterator_create(m); + while ((dev = pci_device_next(iter)) != NULL) { + if ((dev != exclude) && !(--n)) { + break; + } + } + + pci_iterator_destroy(iter); + + return dev; +} + + +static struct pci_device * +find_pci_device_vendor(CARD16 vendorID, CARD16 deviceID, + char n, const struct pci_device * exclude) +{ + struct pci_id_match m; + + m.vendor_id = vendorID; + m.device_id = deviceID; + m.subvendor_id = PCI_MATCH_ANY; + m.subdevice_id = PCI_MATCH_ANY; + m.device_class = 0; + m.device_class_mask = 0; + + return do_find(& m, n, exclude); +} + +static struct pci_device * +find_pci_class(CARD8 intf, CARD8 subClass, CARD16 _class, + char n, const struct pci_device * exclude) +{ + struct pci_id_match m; + + m.vendor_id = PCI_MATCH_ANY; + m.device_id = PCI_MATCH_ANY; + m.subvendor_id = PCI_MATCH_ANY; + m.subdevice_id = PCI_MATCH_ANY; + m.device_class = (((uint32_t)_class) << 16) + | (((uint32_t)subClass) << 8) | intf; + m.device_class_mask = 0x00ffffff; + + return do_find(& m, n, exclude); +} +#endif + static int int1A_handler(xf86Int10InfoPtr pInt) { - PCITAG tag; - pciVideoPtr pvp; + struct pci_device * const pvp = xf86GetPciInfoForEntity(pInt->entityIndex); + struct pci_device * dev; - if (!(pvp = xf86GetPciInfoForEntity(pInt->entityIndex))) + if (pvp == NULL) return 0; /* oops */ #ifdef PRINT_INT @@ -619,17 +682,19 @@ int1A_handler(xf86Int10InfoPtr pInt) #endif return 1; case 0xb102: - if (X86_DX == pvp->vendor && X86_CX == pvp->chipType && X86_ESI == 0) { + if ( (X86_DX == pvp->vendor_id) + && (X86_CX == pvp->device_id) + && (X86_ESI == 0) ) { X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ X86_EBX = pciSlotBX(pvp); } #ifdef SHOW_ALL_DEVICES else - if ((pvp = xf86FindPciDeviceVendor(X86_EDX, X86_ECX, X86_ESI, pvp))) { + if ((dev = find_pci_device_vendor(X86_EDX, X86_ECX, X86_ESI, pvp))) { X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ - X86_EBX = pciSlotBX(pvp); + X86_EBX = pciSlotBX(dev); } #endif else { @@ -641,20 +706,18 @@ int1A_handler(xf86Int10InfoPtr pInt) #endif return 1; case 0xb103: - if (X86_CL == pvp->interface && - X86_CH == pvp->subclass && - ((X86_ECX & 0xFFFF0000) >> 16) == pvp->class) { + if ( (X86_ECX & 0x00FFFFFF) == pvp->device_class ) { X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EBX = pciSlotBX(pvp); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ } #ifdef SHOW_ALL_DEVICES - else if ((pvp = xf86FindPciClass(X86_CL, X86_CH, - (X86_ECX & 0xffff0000) >> 16, - X86_ESI, pvp))) { + else if ((dev = find_pci_class(X86_CL, X86_CH, + (X86_ECX & 0xffff0000) >> 16, + X86_ESI, pvp))) { X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ - X86_EBX = pciSlotBX(pvp); + X86_EBX = pciSlotBX(dev); } #endif else { @@ -666,8 +729,8 @@ int1A_handler(xf86Int10InfoPtr pInt) #endif return 1; case 0xb108: - if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) { - X86_CL = pciReadByte(tag, X86_EDI); + if ((dev = findPci(pInt, X86_EBX)) != NULL) { + pci_device_cfg_read_u8(dev, & X86_CL, X86_EDI); X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ } else { @@ -679,8 +742,8 @@ int1A_handler(xf86Int10InfoPtr pInt) #endif return 1; case 0xb109: - if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) { - X86_CX = pciReadWord(tag, X86_EDI); + if ((dev = findPci(pInt, X86_EBX)) != NULL) { + pci_device_cfg_read_u16(dev, & X86_CX, X86_EDI); X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ } else { @@ -692,8 +755,8 @@ int1A_handler(xf86Int10InfoPtr pInt) #endif return 1; case 0xb10a: - if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) { - X86_ECX = pciReadLong(tag, X86_EDI); + if ((dev = findPci(pInt, X86_EBX)) != NULL) { + pci_device_cfg_read_u32(dev, & X86_ECX, X86_EDI); X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ } else { @@ -705,8 +768,8 @@ int1A_handler(xf86Int10InfoPtr pInt) #endif return 1; case 0xb10b: - if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) { - pciWriteByte(tag, X86_EDI, X86_CL); + if ((dev = findPci(pInt, X86_EBX)) != NULL) { + pci_device_cfg_write_u8(dev, X86_CL, X86_EDI); X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ } else { @@ -718,8 +781,8 @@ int1A_handler(xf86Int10InfoPtr pInt) #endif return 1; case 0xb10c: - if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) { - pciWriteWord(tag, X86_EDI, X86_CX); + if ((dev = findPci(pInt, X86_EBX)) != NULL) { + pci_device_cfg_write_u16(dev, X86_CX, X86_EDI); X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ } else { @@ -731,8 +794,8 @@ int1A_handler(xf86Int10InfoPtr pInt) #endif return 1; case 0xb10d: - if ((tag = findPci(pInt, X86_EBX)) != PCI_NOT_FOUND) { - pciWriteLong(tag, X86_EDI, X86_ECX); + if ((dev = findPci(pInt, X86_EBX)) != NULL) { + pci_device_cfg_write_u32(dev, X86_ECX, X86_EDI); X86_EAX = X86_AL | (SUCCESSFUL << 8); X86_EFLAGS &= ~((unsigned long)0x01); /* clear carry flag */ } else { @@ -753,21 +816,20 @@ int1A_handler(xf86Int10InfoPtr pInt) } } -static PCITAG +static struct pci_device * findPci(xf86Int10InfoPtr pInt, unsigned short bx) { - int bus = ((pInt->Tag >> 16) & ~0x00FF) | ((bx >> 8) & 0x00FF); - int dev = (bx >> 3) & 0x1F; - int func = bx & 0x7; - if (xf86IsPciDevPresent(bus, dev, func)) - return pciTag(bus, dev, func); - return PCI_NOT_FOUND; + const unsigned bus = (bx >> 8) & 0x00FF; + const unsigned dev = (bx >> 3) & 0x001F; + const unsigned func = (bx ) & 0x0007; + + return pci_device_find_by_slot(pInt->dev->domain, bus, dev, func); } static CARD32 -pciSlotBX(pciVideoPtr pvp) +pciSlotBX(const struct pci_device * pvp) { - return ((pvp->bus << 8) & 0x00FF00) | (pvp->device << 3) | (pvp->func); + return ((pvp->bus << 8) & 0x00FF00) | (pvp->dev << 3) | (pvp->func); } /* @@ -776,10 +838,10 @@ pciSlotBX(pciVideoPtr pvp) static int intE6_handler(xf86Int10InfoPtr pInt) { - pciVideoPtr pvp; + struct pci_device * pvp; if ((pvp = xf86GetPciInfoForEntity(pInt->entityIndex))) - X86_AX = (pvp->bus << 8) | (pvp->device << 3) | (pvp->func & 0x7); + X86_AX = (pvp->bus << 8) | (pvp->dev << 3) | (pvp->func & 0x7); pushw(pInt, X86_CS); pushw(pInt, X86_IP); X86_CS = pInt->BIOSseg; diff --git a/hw/xfree86/int10/xf86int10.h b/hw/xfree86/int10/xf86int10.h index 04838f1f6..0e6669d8f 100644 --- a/hw/xfree86/int10/xf86int10.h +++ b/hw/xfree86/int10/xf86int10.h @@ -40,7 +40,7 @@ typedef struct { int bp; int flags; int stackseg; - PCITAG Tag; + struct pci_device *dev; IOADDRESS ioBase; } xf86Int10InfoRec, *xf86Int10InfoPtr; @@ -179,8 +179,5 @@ Bool xf86int10GetBiosSegment(xf86Int10InfoPtr pInt, void *base); void dprint(unsigned long start, unsigned long size); #endif -/* pci.c */ -int mapPciRom(int pciEntity, unsigned char *address); - #endif /* _INT10_PRIVATE */ #endif /* _XF86INT10_H */ diff --git a/hw/xfree86/loader/xf86sym.c b/hw/xfree86/loader/xf86sym.c index 23f820854..9b8dac82e 100644 --- a/hw/xfree86/loader/xf86sym.c +++ b/hw/xfree86/loader/xf86sym.c @@ -252,10 +252,7 @@ _X_HIDDEN void *xfree86LookupTab[] = { SYMFUNC(xf86MapVidMem) SYMFUNC(xf86UnMapVidMem) SYMFUNC(xf86MapReadSideEffects) - SYMFUNC(xf86GetPciDomain) SYMFUNC(xf86MapDomainMemory) - SYMFUNC(xf86MapDomainIO) - SYMFUNC(xf86ReadDomainMemory) SYMFUNC(xf86UDelay) SYMFUNC(xf86IODelay) SYMFUNC(xf86SlowBcopy) @@ -304,10 +301,6 @@ _X_HIDDEN void *xfree86LookupTab[] = { /* xf86Bus.c */ SYMFUNC(xf86CheckPciSlot) SYMFUNC(xf86ClaimPciSlot) - SYMFUNC(xf86GetPciVideoInfo) - SYMFUNC(xf86GetPciEntity) - SYMFUNC(xf86GetPciConfigInfo) - SYMFUNC(xf86SetPciVideo) SYMFUNC(xf86ClaimIsaSlot) SYMFUNC(xf86ClaimFbSlot) SYMFUNC(xf86ClaimNoSlot) @@ -338,17 +331,12 @@ _X_HIDDEN void *xfree86LookupTab[] = { SYMFUNC(xf86CheckPciMemBase) SYMFUNC(xf86SetAccessFuncs) SYMFUNC(xf86IsEntityPrimary) - SYMFUNC(xf86FixPciResource) SYMFUNC(xf86SetOperatingState) SYMFUNC(xf86EnterServerState) SYMFUNC(xf86GetBlock) SYMFUNC(xf86GetSparse) - SYMFUNC(xf86ReallocatePciResources) SYMFUNC(xf86ChkConflict) - SYMFUNC(xf86IsPciDevPresent) SYMFUNC(xf86FindScreenForEntity) - SYMFUNC(xf86FindPciDeviceVendor) - SYMFUNC(xf86FindPciClass) SYMFUNC(xf86RegisterStateChangeNotificationCallback) SYMFUNC(xf86DeregisterStateChangeNotificationCallback) SYMFUNC(xf86NoSharedResources) @@ -707,21 +695,18 @@ _X_HIDDEN void *xfree86LookupTab[] = { SYMFUNC(DPMSSet) SYMFUNC(DPMSSupported) #endif - SYMFUNC(pciFindFirst) - SYMFUNC(pciFindNext) - SYMFUNC(pciWriteByte) - SYMFUNC(pciWriteWord) - SYMFUNC(pciWriteLong) - SYMFUNC(pciReadByte) - SYMFUNC(pciReadWord) - SYMFUNC(pciReadLong) - SYMFUNC(pciSetBitsLong) +/* xf86Debug.c */ +#ifdef BUILDDEBUG + SYMFUNC(xf86Break1) + SYMFUNC(xf86Break2) + SYMFUNC(xf86Break3) + SYMFUNC(xf86SPTimestamp) + SYMFUNC(xf86STimestamp) +#endif + SYMFUNC(pciTag) SYMFUNC(pciBusAddrToHostAddr) - SYMFUNC(pciHostAddrToBusAddr) - SYMFUNC(xf86MapPciMem) SYMFUNC(xf86scanpci) - SYMFUNC(xf86ReadPciBIOS) /* Loader functions */ SYMFUNC(LoadSubModule) diff --git a/hw/xfree86/os-support/bus/Pci.c b/hw/xfree86/os-support/bus/Pci.c index 30f7667fa..31e9023f0 100644 --- a/hw/xfree86/os-support/bus/Pci.c +++ b/hw/xfree86/os-support/bus/Pci.c @@ -8,8 +8,6 @@ * All of the public PCI access functions exported to the other parts of * the server are declared in Pci.h and defined herein. These include: * pciInit() - Initialize PCI access functions - * pciFindFirst() - Find a PCI device by dev/vend id - * pciFindNext() - Find another PCI device by dev/vend id * pciReadLong() - Read a 32 bit value from a device's cfg space * pciReadWord() - Read a 16 bit value from a device's cfg space * pciReadByte() - Read an 8 bit value from a device's cfg space @@ -20,24 +18,11 @@ * pciSetBitsByte() - Write an 8 bit value against a mask * pciTag() - Return tag for a given PCI bus, device, & * function - * pciDomTag() - Return tag for a given PCI domain, bus, - * device & function * pciBusAddrToHostAddr() - Convert a PCI address to a host address - * pciHostAddrToBusAddr() - Convert a host address to a PCI address - * pciGetBaseSize() - Returns the number of bits in a PCI base - * addr mapping - * xf86MapPciMem() - Like xf86MapVidMem() except function expects - * a PCI address and a PCITAG that identifies - * a PCI device - * xf86ReadPciBIOS() - Like xf86ReadBIOS() but can handle PCI/host - * address translation and BIOS decode enabling * xf86scanpci() - Return info about all PCI devices - * xf86GetPciDomain() - Return domain number from a PCITAG * xf86MapDomainMemory() - Like xf86MapPciMem() but can handle * domain/host address translation - * xf86MapDomainIO() - Maps PCI I/O spaces - * xf86ReadDomainMemory() - Like xf86ReadPciBIOS() but can handle - * domain/host address translation + * xf86MapLegacyIO() - Maps PCI I/O spaces * * The actual PCI backend driver is selected by the pciInit() function * (see below) using either compile time definitions, run-time checks, @@ -210,269 +195,50 @@ #include "xf86_OSproc.h" #include "Pci.h" +#include <pciaccess.h> + +#if 0 +#include <stdio.h> +#include <unistd.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <fcntl.h> +#endif + #define PCI_MFDEV_SUPPORT 1 /* Include PCI multifunction device support */ #define PCI_BRIDGE_SUPPORT 1 /* Include support for PCI-to-PCI bridges */ /* * Global data */ -static int pciInitialized = 0; - -CARD32 pciDevid; /* Requested device/vendor ID (after mask) */ -CARD32 pciDevidMask; /* Bit mask applied (AND) before comparison */ - /* of real devid's with requested */ - -int pciBusNum; /* Bus Number of current device */ -int pciDevNum; /* Device number of current device */ -int pciFuncNum; /* Function number of current device */ -PCITAG pciDeviceTag; /* Tag for current device */ pciBusInfo_t *pciBusInfo[MAX_PCI_BUSES] = { NULL, }; _X_EXPORT int pciNumBuses = 0; /* Actual number of PCI buses */ int pciMaxBusNum = MAX_PCI_BUSES; -static Bool inProbe = FALSE; -static pciConfigPtr *pci_devp = NULL; - -static int readPciBios( PCITAG Tag, CARD8* tmp, ADDRESS hostbase, - unsigned char * buf, int len, PciBiosType BiosType ); - -static int (*pciOSHandleBIOS)(PCITAG Tag, int basereg, unsigned char *buf, int len); - -int xf86MaxPciDevs = 0; - -/* - * Platform specific PCI function pointers. - * - * NOTE: A platform/OS specific pci init procedure can override these defaults - * by setting them to the appropriate platform dependent functions. - */ -PCITAG (*pciFindFirstFP)(void) = pciGenFindFirst; -PCITAG (*pciFindNextFP)(void) = pciGenFindNext; /* * pciInit - choose correct platform/OS specific PCI init routine */ -void -pciInit() +static void +pciInit(void) { - if (pciInitialized) - return; + static int pciInitialized = 0; + if (!pciInitialized) { pciInitialized = 1; /* XXX */ #if defined(DEBUGPCI) - if (DEBUGPCI >= xf86Verbose) - xf86Verbose = DEBUGPCI; -#endif - - ARCH_PCI_INIT(); -#if defined(ARCH_PCI_OS_INIT) - if (pciNumBuses <= 0) - ARCH_PCI_OS_INIT(); -#endif - if (xf86MaxPciDevs == 0) { - xf86Msg(X_WARNING, - "OS did not count PCI devices, guessing wildly\n"); - xf86MaxPciDevs = MAX_PCI_DEVICES; + if (DEBUGPCI >= xf86Verbose) { + xf86Verbose = DEBUGPCI; } - if (pci_devp) - xfree(pci_devp); - pci_devp = xnfcalloc(xf86MaxPciDevs + 1, sizeof(pciConfigPtr)); -} - -void pciSetOSBIOSPtr(int (*bios_fn)(PCITAG Tag, int basereg, unsigned char * buf, int len)) -{ - pciOSHandleBIOS = bios_fn; -} - -_X_EXPORT PCITAG -pciFindFirst(CARD32 id, CARD32 mask) -{ -#ifdef DEBUGPCI - ErrorF("pciFindFirst(0x%lx, 0x%lx), pciInit = %d\n", id, mask, pciInitialized); -#endif - pciInit(); - - pciDevid = id & mask; - pciDevidMask = mask; - - return((*pciFindFirstFP)()); -} - -_X_EXPORT PCITAG -pciFindNext(void) -{ -#ifdef DEBUGPCI - ErrorF("pciFindNext(), pciInit = %d\n", pciInitialized); -#endif - pciInit(); - - return((*pciFindNextFP)()); -} - -_X_EXPORT CARD32 -pciReadLong(PCITAG tag, int offset) -{ - int bus = PCI_BUS_FROM_TAG(tag); - -#ifdef DEBUGPCI - ErrorF("pciReadLong(0x%lx, %d)\n", tag, offset); #endif - pciInit(); - if ((bus >= 0) && ((bus < pciNumBuses) || inProbe) && pciBusInfo[bus] && - pciBusInfo[bus]->funcs->pciReadLong) { - CARD32 rv = (*pciBusInfo[bus]->funcs->pciReadLong)(tag, offset); - - PCITRACE(1, ("pciReadLong: tag=0x%x [b=%d,d=%d,f=%d] returns 0x%08x\n", - tag, bus, PCI_DEV_FROM_TAG(tag), PCI_FUNC_FROM_TAG(tag), rv)); - return(rv); - } - - return(PCI_NOT_FOUND); -} - -_X_EXPORT CARD16 -pciReadWord(PCITAG tag, int offset) -{ - CARD32 tmp; - int shift = (offset & 3) * 8; - int aligned_offset = offset & ~3; - int bus = PCI_BUS_FROM_TAG(tag); - - if (shift != 0 && shift != 16) - FatalError("pciReadWord: Alignment error: Cannot read 16 bits " - "at offset %d\n", offset); - - pciInit(); - - if ((bus >= 0) && ((bus < pciNumBuses) || inProbe) && pciBusInfo[bus] && - pciBusInfo[bus]->funcs->pciReadWord) { - CARD32 rv = (*pciBusInfo[bus]->funcs->pciReadWord)(tag, offset); - - return(rv); - } else { - tmp = pciReadLong(tag, aligned_offset); - - return((CARD16)((tmp >> shift) & 0xffff)); - } -} - -_X_EXPORT CARD8 -pciReadByte(PCITAG tag, int offset) -{ - CARD32 tmp; - int shift = (offset & 3) * 8; - int aligned_offset = offset & ~3; - int bus = PCI_BUS_FROM_TAG(tag); - - pciInit(); - - if ((bus >= 0) && ((bus < pciNumBuses) || inProbe) && pciBusInfo[bus] && - pciBusInfo[bus]->funcs->pciReadByte) { - CARD8 rv = (*pciBusInfo[bus]->funcs->pciReadByte)(tag, offset); - - return(rv); - } else { - tmp = pciReadLong(tag, aligned_offset); - - return((CARD8)((tmp >> shift) & 0xff)); - } -} - -_X_EXPORT void -pciWriteLong(PCITAG tag, int offset, CARD32 val) -{ - int bus = PCI_BUS_FROM_TAG(tag); - - pciInit(); - - if ((bus >= 0) && (bus < pciNumBuses) && pciBusInfo[bus] && - pciBusInfo[bus]->funcs->pciWriteLong) - (*pciBusInfo[bus]->funcs->pciWriteLong)(tag, offset, val); -} - -_X_EXPORT void -pciWriteWord(PCITAG tag, int offset, CARD16 val) -{ - CARD32 tmp; - int aligned_offset = offset & ~3; - int shift = (offset & 3) * 8; - int bus = PCI_BUS_FROM_TAG(tag); - - if (shift != 0 && shift != 16) - FatalError("pciWriteWord: Alignment Error: Cannot read 16 bits " - "from offset %d\n", offset); - - pciInit(); - - if ((bus >= 0) && (bus < pciNumBuses) && pciBusInfo[bus] && - pciBusInfo[bus]->funcs->pciWriteWord) { - (*pciBusInfo[bus]->funcs->pciWriteWord)(tag, offset, val); - } else { - tmp = pciReadLong(tag, aligned_offset); - - tmp &= ~(0xffffL << shift); - tmp |= (((CARD32)val) << shift); - - pciWriteLong(tag, aligned_offset, tmp); - } -} - -_X_EXPORT void -pciWriteByte(PCITAG tag, int offset, CARD8 val) -{ - CARD32 tmp; - int aligned_offset = offset & ~3; - int shift = (offset & 3) *8 ; - int bus = PCI_BUS_FROM_TAG(tag); - - pciInit(); - - if ((bus >= 0) && (bus < pciNumBuses) && pciBusInfo[bus] && - pciBusInfo[bus]->funcs->pciWriteByte) { - (*pciBusInfo[bus]->funcs->pciWriteByte)(tag, offset, val); - } else { - - tmp = pciReadLong(tag, aligned_offset); - - tmp &= ~(0xffL << shift); - tmp |= (((CARD32)val) << shift); - - pciWriteLong(tag, aligned_offset, tmp); - } -} - -_X_EXPORT void -pciSetBitsLong(PCITAG tag, int offset, CARD32 mask, CARD32 val) -{ - int bus = PCI_BUS_FROM_TAG(tag); - -#ifdef DEBUGPCI - ErrorF("pciReadLong(0x%lx, %d)\n", tag, offset); -#endif - pciInit(); - - if ((bus >= 0) && (bus < pciNumBuses) && pciBusInfo[bus] && - pciBusInfo[bus]->funcs->pciSetBitsLong) { - (*pciBusInfo[bus]->funcs->pciSetBitsLong)(tag, offset, mask, val); + ARCH_PCI_INIT(); } } -void -pciSetBitsByte(PCITAG tag, int offset, CARD8 mask, CARD8 val) -{ - CARD32 tmp_mask, tmp_val; - int aligned_offset = offset & ~3; - int shift = (offset & 3) *8 ; - - tmp_mask = mask << shift; - tmp_val = val << shift; - pciSetBitsLong(tag, aligned_offset, tmp_mask, tmp_val); -} - _X_EXPORT ADDRESS pciBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr) { @@ -487,931 +253,54 @@ pciBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr) return(addr); } -_X_EXPORT ADDRESS -pciHostAddrToBusAddr(PCITAG tag, PciAddrType type, ADDRESS addr) -{ - int bus = PCI_BUS_FROM_TAG(tag); - - pciInit(); - - if ((bus >= 0) && (bus < pciNumBuses) && pciBusInfo[bus] && - pciBusInfo[bus]->funcs->pciAddrHostToBus) - return (*pciBusInfo[bus]->funcs->pciAddrHostToBus)(tag, type, addr); - else - return(addr); -} - -/* - * pciGetBaseSize() returns the size of a PCI base address mapping in bits. - * The index identifies the base register: 0-5 are the six standard registers, - * and 6 is the ROM base register. If destructive is TRUE, it will write - * to the base address register to get an accurate result. Otherwise it - * makes a conservative guess based on the alignment of the already allocated - * address. If the result is accurate (ie, not an over-estimate), this is - * indicated by setting *min to TRUE (when min is non-NULL). This happens - * when either the destructive flag is set, the information is supplied by - * the OS if the OS supports this. - */ - -int -pciGetBaseSize(PCITAG tag, int index, Bool destructive, Bool *min) -{ - int offset; - CARD32 addr1; - CARD32 addr2; - CARD32 mask1; - CARD32 mask2; - int bits = 0; - - /* - * Eventually a function for this should be added to pciBusFuncs_t, but for - * now we'll just use a simple method based on the alignment of the already - * allocated address. - */ - - /* - * silently ignore bogus index values. Valid values are 0-6. 0-5 are - * the 6 base address registers, and 6 is the ROM base address register. - */ - if (index < 0 || index > 6) - return 0; - - pciInit(); - - if (xf86GetPciSizeFromOS(tag, index, &bits)) { - if (min) - *min = TRUE; - return bits; - } - - if (min) - *min = destructive; - - /* Get the PCI offset */ - if (index == 6) - offset = PCI_MAP_ROM_REG; - else - offset = PCI_MAP_REG_START + (index << 2); - - addr1 = pciReadLong(tag, offset); - /* - * Check if this is the second part of a 64 bit address. - * XXX need to check how endianness affects 64 bit addresses. - */ - if (index > 0 && index < 6) { - addr2 = pciReadLong(tag, offset - 4); - if (PCI_MAP_IS_MEM(addr2) && PCI_MAP_IS64BITMEM(addr2)) - return 0; - } - - if (destructive) { - pciWriteLong(tag, offset, 0xffffffff); - mask1 = pciReadLong(tag, offset); - pciWriteLong(tag, offset, addr1); - } else { - mask1 = addr1; - } - - /* Check if this is the first part of a 64 bit address. */ - if (index < 5 && PCI_MAP_IS_MEM(mask1) && PCI_MAP_IS64BITMEM(mask1)) { - if (PCIGETMEMORY(mask1) == 0) { - addr2 = pciReadLong(tag, offset + 4); - if (destructive) { - pciWriteLong(tag, offset + 4, 0xffffffff); - mask2 = pciReadLong(tag, offset + 4); - pciWriteLong(tag, offset + 4, addr2); - } else { - mask2 = addr2; - } - if (mask2 == 0) - return 0; - bits = 32; - while ((mask2 & 1) == 0) { - bits++; - mask2 >>= 1; - } - if (bits > 32) - return bits; - } - } - if (index < 6) - if (PCI_MAP_IS_MEM(mask1)) - mask1 = PCIGETMEMORY(mask1); - else - mask1 = PCIGETIO(mask1); - else - mask1 = PCIGETROM(mask1); - if (mask1 == 0) - return 0; - bits = 0; - while ((mask1 & 1) == 0) { - bits++; - mask1 >>= 1; - } - /* I/O maps can be no larger than 8 bits */ - - if ((index < 6) && PCI_MAP_IS_IO(addr1) && bits > 8) - bits = 8; - /* ROM maps can be no larger than 24 bits */ - if (index == 6 && bits > 24) - bits = 24; - return bits; -} - _X_EXPORT PCITAG pciTag(int busnum, int devnum, int funcnum) { return(PCI_MAKE_TAG(busnum,devnum,funcnum)); } -_X_EXPORT PCITAG -pciDomTag(int domnum, int busnum, int devnum, int funcnum) -{ - return(PCI_MAKE_TAG(PCI_MAKE_BUS(domnum,busnum),devnum,funcnum)); -} - -#if defined(PCI_MFDEV_SUPPORT) - -Bool -pciMfDev(int busnum, int devnum) -{ - PCITAG tag0, tag1; - CARD32 id0, id1, val; - - /* Detect a multi-function device that complies to the PCI 2.0 spec */ - - tag0 = PCI_MAKE_TAG(busnum, devnum, 0); - id0 = pciReadLong(tag0, PCI_ID_REG); - if ((CARD16)(id0 + 1) <= (CARD16)1UL) - return FALSE; - - val = pciReadLong(tag0, PCI_HEADER_MISC) & 0x00ff0000; - if ((val != 0x00ff0000) && (val & PCI_HEADER_MULTIFUNCTION)) - return TRUE; - - /* - * Now, to find non-compliant devices... - * If there is a valid ID for function 1 and the ID for func 0 and 1 - * are different, or the base0 values of func 0 and 1 are differend, - * then assume there is a multi-function device. - */ - tag1 = PCI_MAKE_TAG(busnum, devnum, 1); - id1 = pciReadLong(tag1, PCI_ID_REG); - if ((CARD16)(id1 + 1) <= (CARD16)1UL) - return FALSE; - - /* Vendor IDs should match */ - if ((id0 ^ id1) & 0x0000ffff) - return FALSE; - - if ((id0 != id1) || - /* Note the following test is valid for header types 0, 1 and 2 */ - (pciReadLong(tag0, PCI_MAP_REG_START) != - pciReadLong(tag1, PCI_MAP_REG_START))) - return TRUE; - - return FALSE; -} - -#endif - -/* - * Generic find/read/write functions - */ -PCITAG -pciGenFindNext(void) -{ - CARD32 devid, tmp; - int sec_bus, pri_bus; - static int previousBus = 0; - Bool speculativeProbe = FALSE; - unsigned char base_class, sub_class; - -#ifdef DEBUGPCI - ErrorF("pciGenFindNext\n"); -#endif - - for (;;) { - -#ifdef DEBUGPCI - ErrorF("pciGenFindNext: pciBusNum %d\n", pciBusNum); -#endif - if (pciBusNum == -1) { - /* - * Start at top of the order - */ - if (pciNumBuses <= 0) - return(PCI_NOT_FOUND); - - /* Skip ahead to the first bus defined by pciInit() */ - for (pciBusNum = 0; !pciBusInfo[pciBusNum]; ++pciBusNum); - pciFuncNum = 0; - pciDevNum = 0; - previousBus = pciBusNum; /* make sure previousBus exists */ - } else { -#ifdef PCI_MFDEV_SUPPORT -#ifdef DEBUGPCI - ErrorF("pciGenFindNext: pciFuncNum %d\n", pciFuncNum); -#endif - /* - * Somewhere in middle of order. Determine who's - * next up - */ - if (pciFuncNum == 0) { - /* - * Is current dev a multifunction device? - */ - if (!speculativeProbe && pciMfDev(pciBusNum, pciDevNum)) - /* Probe for other functions */ - pciFuncNum = 1; - else - /* - * No more functions this device. Next - * device please - */ - pciDevNum ++; - } else if (++pciFuncNum >= 8) { - /* No more functions for this device. Next device please */ - pciFuncNum = 0; - pciDevNum ++; - } -#else - pciDevNum ++; -#endif - if (pciDevNum >= 32 || - !pciBusInfo[pciBusNum] || - pciDevNum >= pciBusInfo[pciBusNum]->numDevices) { -#ifdef DEBUGPCI - ErrorF("pciGenFindNext: next bus\n"); -#endif - /* - * No more devices for this bus. Next bus please - */ - if (speculativeProbe) { - NextSpeculativeBus: - xfree(pciBusInfo[pciBusNum]); - pciBusInfo[pciBusNum] = NULL; - speculativeProbe = FALSE; - } - - if (++pciBusNum >= pciMaxBusNum) { -#ifdef DEBUGPCI - ErrorF("pciGenFindNext: out of buses\n"); -#endif - /* No more buses. All done for now */ - return(PCI_NOT_FOUND); - } - - pciDevNum = 0; - } - } - -#ifdef DEBUGPCI - ErrorF("pciGenFindNext: pciBusInfo[%d] = 0x%lx\n", pciBusNum, pciBusInfo[pciBusNum]); -#endif - if (!pciBusInfo[pciBusNum]) { - pciBusInfo[pciBusNum] = xnfalloc(sizeof(pciBusInfo_t)); - *pciBusInfo[pciBusNum] = *pciBusInfo[previousBus]; - - speculativeProbe = TRUE; - } - - /* - * At this point, pciBusNum, pciDevNum, and pciFuncNum have been - * advanced to the next device. Compute the tag, and read the - * device/vendor ID field. - */ -#ifdef DEBUGPCI - ErrorF("pciGenFindNext: [%d, %d, %d]\n", pciBusNum, pciDevNum, pciFuncNum); -#endif - pciDeviceTag = PCI_MAKE_TAG(pciBusNum, pciDevNum, pciFuncNum); - inProbe = TRUE; - devid = pciReadLong(pciDeviceTag, PCI_ID_REG); - inProbe = FALSE; -#ifdef DEBUGPCI - ErrorF("pciGenFindNext: pciDeviceTag = 0x%lx, devid = 0x%lx\n", pciDeviceTag, devid); -#endif - if ((CARD16)(devid + 1U) <= (CARD16)1UL) - continue; /* Nobody home. Next device please */ - - /* - * Some devices mis-decode configuration cycles in such a way as to - * create phantom buses. - */ - if (speculativeProbe && (pciDevNum == 0) && (pciFuncNum == 0) && - (PCI_BUS_NO_DOMAIN(pciBusNum) > 0)) { - for (;;) { - if (++pciDevNum >= pciBusInfo[pciBusNum]->numDevices) - goto NextSpeculativeBus; - if (devid != - pciReadLong(PCI_MAKE_TAG(pciBusNum, pciDevNum, 0), - PCI_ID_REG)) - break; - } - - pciDevNum = 0; - } - - if (pciNumBuses <= pciBusNum) - pciNumBuses = pciBusNum + 1; - - speculativeProbe = FALSE; - previousBus = pciBusNum; - -#ifdef PCI_BRIDGE_SUPPORT - /* - * Before checking for a specific devid, look for enabled - * PCI to PCI bridge devices. If one is found, create and - * initialize a bus info record (if one does not already exist). - */ - tmp = pciReadLong(pciDeviceTag, PCI_CLASS_REG); - base_class = PCI_CLASS_EXTRACT(tmp); - sub_class = PCI_SUBCLASS_EXTRACT(tmp); - if ((base_class == PCI_CLASS_BRIDGE) && - ((sub_class == PCI_SUBCLASS_BRIDGE_PCI) || - (sub_class == PCI_SUBCLASS_BRIDGE_CARDBUS))) { - tmp = pciReadLong(pciDeviceTag, PCI_PCI_BRIDGE_BUS_REG); - sec_bus = PCI_SECONDARY_BUS_EXTRACT(tmp, pciDeviceTag); - pri_bus = PCI_PRIMARY_BUS_EXTRACT(tmp, pciDeviceTag); -#ifdef DEBUGPCI - ErrorF("pciGenFindNext: pri_bus %d sec_bus %d\n", - pri_bus, sec_bus); -#endif - if (pciBusNum != pri_bus) { - /* Some bridges do not implement the primary bus register */ - if ((PCI_BUS_NO_DOMAIN(pri_bus) != 0) || - (sub_class != PCI_SUBCLASS_BRIDGE_CARDBUS)) - xf86Msg(X_WARNING, - "pciGenFindNext: primary bus mismatch on PCI" - " bridge 0x%08lx (0x%02x, 0x%02x)\n", - pciDeviceTag, pciBusNum, pri_bus); - pri_bus = pciBusNum; - } - if ((pri_bus < sec_bus) && (sec_bus < pciMaxBusNum) && - pciBusInfo[pri_bus]) { - /* - * Found a secondary PCI bus - */ - if (!pciBusInfo[sec_bus]) { - pciBusInfo[sec_bus] = xnfalloc(sizeof(pciBusInfo_t)); - - /* Copy parents settings... */ - *pciBusInfo[sec_bus] = *pciBusInfo[pri_bus]; - } - - /* ...but not everything same as parent */ - pciBusInfo[sec_bus]->primary_bus = pri_bus; - pciBusInfo[sec_bus]->secondary = TRUE; - pciBusInfo[sec_bus]->numDevices = 32; - - if (pciNumBuses <= sec_bus) - pciNumBuses = sec_bus + 1; - } - } -#endif - - /* - * Does this device match the requested devid after - * applying mask? - */ -#ifdef DEBUGPCI - ErrorF("pciGenFindNext: pciDevidMask = 0x%lx, pciDevid = 0x%lx\n", pciDevidMask, pciDevid); -#endif - if ((devid & pciDevidMask) == pciDevid) - /* Yes - Return it. Otherwise, next device */ - return(pciDeviceTag); /* got a match */ - - } /* for */ - /*NOTREACHED*/ -} - -PCITAG -pciGenFindFirst(void) -{ - /* Reset PCI bus number to start from top */ - pciBusNum = -1; - - return pciGenFindNext(); -} - -CARD32 -pciByteSwap(CARD32 u) -{ -#if X_BYTE_ORDER == X_BIG_ENDIAN - - return lswapl(u); - -#else /* !BIG_ENDIAN */ - - return(u); - -#endif -} - ADDRESS pciAddrNOOP(PCITAG tag, PciAddrType type, ADDRESS addr) { return(addr); } -_X_EXPORT pciConfigPtr * -xf86scanpci(int flags) +_X_EXPORT Bool +xf86scanpci(void) { - pciConfigPtr devp; - pciBusInfo_t *busp; - int idx = 0, i; - PCITAG tag; static Bool done = FALSE; + static Bool success = FALSE; /* * if we haven't found PCI devices checking for pci_devp may * result in an endless recursion if platform/OS specific PCI * bus probing code calls this function from with in it. */ - if (done || pci_devp) - return pci_devp; + if (done) + return success; done = TRUE; + success = (pci_system_init() == 0); pciInit(); -#ifdef XF86SCANPCI_WRAPPER - XF86SCANPCI_WRAPPER(SCANPCI_INIT); -#endif - - tag = pciFindFirst(0,0); /* 0 mask means match any valid device */ - /* Check if no devices, return now */ - if (tag == PCI_NOT_FOUND) { -#ifdef XF86SCANPCI_WRAPPER - XF86SCANPCI_WRAPPER(SCANPCI_TERM); -#endif - return NULL; - } - -#ifdef DEBUGPCI - ErrorF("xf86scanpci: tag = 0x%lx\n", tag); -#endif -#ifndef OLD_FORMAT - xf86MsgVerb(X_INFO, 2, "PCI: PCI scan (all values are in hex)\n"); -#endif - - while (idx < xf86MaxPciDevs && tag != PCI_NOT_FOUND) { - devp = xcalloc(1, sizeof(pciDevice)); - if (!devp) { - xf86Msg(X_ERROR, - "xf86scanpci: Out of memory after %d devices!!\n", idx); - return (pciConfigPtr *)NULL; - } - - /* Identify pci device by bus, dev, func, and tag */ - devp->tag = tag; - devp->busnum = PCI_BUS_FROM_TAG(tag); - devp->devnum = PCI_DEV_FROM_TAG(tag); - devp->funcnum = PCI_FUNC_FROM_TAG(tag); - - /* Read config space for this device */ - for (i = 0; i < 17; i++) /* PCI hdr plus 1st dev spec dword */ - devp->cfgspc.dwords[i] = pciReadLong(tag, i * sizeof(CARD32)); - - /* Some broken devices don't implement this field... */ - if (devp->pci_header_type == 0xff) - devp->pci_header_type = 0; - - switch (devp->pci_header_type & 0x7f) { - case 0: - /* Get base address sizes for type 0 headers */ - for (i = 0; i < 7; i++) - devp->basesize[i] = - pciGetBaseSize(tag, i, FALSE, &devp->minBasesize); - break; - - case 1: - case 2: - /* Allow master aborts to complete normally on secondary buses */ - if (!(devp->pci_bridge_control & PCI_PCI_BRIDGE_MASTER_ABORT_EN)) - break; - pciWriteByte(tag, PCI_PCI_BRIDGE_CONTROL_REG, - devp->pci_bridge_control & - ~(PCI_PCI_BRIDGE_MASTER_ABORT_EN | - PCI_PCI_BRIDGE_SECONDARY_RESET)); - break; - - default: - break; - } - -#ifdef OLD_FORMAT - xf86MsgVerb(X_INFO, 2, "PCI: BusID 0x%.2x,0x%02x,0x%1x " - "ID 0x%04x,0x%04x Rev 0x%02x Class 0x%02x,0x%02x\n", - devp->busnum, devp->devnum, devp->funcnum, - devp->pci_vendor, devp->pci_device, devp->pci_rev_id, - devp->pci_base_class, devp->pci_sub_class); -#else - xf86MsgVerb(X_INFO, 2, "PCI: %.2x:%02x:%1x: chip %04x,%04x" - " card %04x,%04x rev %02x class %02x,%02x,%02x hdr %02x\n", - devp->busnum, devp->devnum, devp->funcnum, - devp->pci_vendor, devp->pci_device, - devp->pci_subsys_vendor, devp->pci_subsys_card, - devp->pci_rev_id, devp->pci_base_class, - devp->pci_sub_class, devp->pci_prog_if, - devp->pci_header_type); -#endif - - pci_devp[idx++] = devp; - if (idx == xf86MaxPciDevs) - break; - tag = pciFindNext(); - -#ifdef DEBUGPCI - ErrorF("xf86scanpci: tag = pciFindNext = 0x%lx\n", tag); -#endif - } - - /* Restore modified data (in reverse order), and link buses */ - while (--idx >= 0) { - devp = pci_devp[idx]; - switch (devp->pci_header_type & 0x7f) { - case 0: - if ((devp->pci_base_class != PCI_CLASS_BRIDGE) || - (devp->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST)) - break; - pciBusInfo[devp->busnum]->bridge = devp; - pciBusInfo[devp->busnum]->primary_bus = devp->busnum; - break; - - case 1: - case 2: - i = PCI_SECONDARY_BUS_EXTRACT(devp->pci_pp_bus_register, devp->tag); - if (i > devp->busnum) { - if (pciBusInfo[i]) { - pciBusInfo[i]->bridge = devp; - /* - * The back link needs to be set here, and is unlikely to - * change. - */ - devp->businfo = pciBusInfo[i]; - } -#ifdef ARCH_PCI_PCI_BRIDGE - ARCH_PCI_PCI_BRIDGE(devp); -#endif - } - if (!(devp->pci_bridge_control & PCI_PCI_BRIDGE_MASTER_ABORT_EN)) - break; - pciWriteByte(devp->tag, PCI_PCI_BRIDGE_CONTROL_REG, - devp->pci_bridge_control & ~PCI_PCI_BRIDGE_SECONDARY_RESET); - break; - - default: - break; - } - } - -#ifdef XF86SCANPCI_WRAPPER - XF86SCANPCI_WRAPPER(SCANPCI_TERM); -#endif - - /* - * Lastly, link bridges to their secondary bus, after the architecture has - * had a chance to modify these assignments. - */ - for (idx = 0; idx < pciNumBuses; idx++) { - if (!(busp = pciBusInfo[idx]) || !(devp = busp->bridge)) - continue; - devp->businfo = busp; - } - -#ifndef OLD_FORMAT - xf86MsgVerb(X_INFO, 2, "PCI: End of PCI scan\n"); -#endif - - return pci_devp; -} - -pciConfigPtr -xf86GetPciConfigFromTag(PCITAG Tag) -{ - pciConfigPtr pDev; - int i = 0; - - for (i = 0 ; (pDev = pci_devp[i]) && i <= xf86MaxPciDevs; i++) { - if (Tag == pDev->tag) - return pDev; - } - - return NULL; /* Bad data */ + return success; } -CARD32 -pciCheckForBrokenBase(PCITAG Tag,int basereg) -{ - pciWriteLong(Tag, PCI_MAP_REG_START + (basereg << 2), 0xffffffff); - return pciReadLong(Tag, PCI_MAP_REG_START + (basereg << 2)); -} - -#if defined(INCLUDE_XF86_MAP_PCI_MEM) - -_X_EXPORT pointer -xf86MapPciMem(int ScreenNum, int Flags, PCITAG Tag, ADDRESS Base, - unsigned long Size) -{ - ADDRESS hostbase = pciBusAddrToHostAddr(Tag, PCI_MEM,Base); - pointer base; - CARD32 save = 0; - - /* - * If there are possible read side-effects, disable memory while - * doing the mapping. - */ - if (Flags & VIDMEM_READSIDEEFFECT) { - save = pciReadLong(Tag, PCI_CMD_STAT_REG); - pciWriteLong(Tag, PCI_CMD_STAT_REG, - save & ~PCI_CMD_MEM_ENABLE); - } - base = xf86MapDomainMemory(ScreenNum, Flags, Tag, hostbase, Size); - if (!base) { - FatalError("xf86MapPciMem: Could not mmap PCI memory " - "[base=0x%lx,hostbase=0x%lx,size=%lx] (%s)\n", - Base, hostbase, Size, strerror(errno)); - } - /* - * If read side-effects, do whatever might be needed to prevent - * unintended reads, then restore PCI_CMD_STAT_REG. - */ - if (Flags & VIDMEM_READSIDEEFFECT) { - xf86MapReadSideEffects(ScreenNum, Flags, base, Size); - pciWriteLong(Tag, PCI_CMD_STAT_REG, save); - } - return((pointer)base); -} - -static int -handlePciBIOS( PCITAG Tag, int basereg, unsigned char * buf, int len ) -{ - CARD32 romsave = 0; - int i; - romBaseSource b_reg; - ADDRESS hostbase; - CARD8 tmp[64]; - int ret = 0; - - romsave = pciReadLong(Tag, PCI_MAP_ROM_REG); - - for (i = ROM_BASE_PRESET; i <= ROM_BASE_FIND; i++) { - memType savebase = 0, newbase, romaddr; - - switch (i) { - case ROM_BASE_PRESET: - /* Does the driver have a preference? */ - if (basereg > ROM_BASE_PRESET && basereg <= ROM_BASE_FIND) - b_reg = basereg; - else - b_reg = ++i; - break; - case ROM_BASE_FIND: - /* - * If we have something that looks like a valid address - * in romsave, it's probably not going to help to try - * to guess a new address and reprogram it. - */ - if (PCIGETROM(romsave)) { - pciWriteLong(Tag, PCI_MAP_ROM_REG, PCI_MAP_ROM_ADDRESS_MASK); - if (romsave != pciReadLong(Tag, PCI_MAP_ROM_REG)) { - pciWriteLong(Tag, PCI_MAP_ROM_REG, romsave); - continue; - } - } - default: - b_reg = i; - } - - if (!(newbase = getValidBIOSBase(Tag, b_reg))) - continue; /* no valid address found */ - - romaddr = PCIGETROM(newbase); - - /* if we use a mem base save it and move it out of the way */ - if (b_reg >= 0 && b_reg <= 5) { - memType emptybase; - savebase = pciReadLong(Tag, PCI_MAP_REG_START+(b_reg<<2)); - xf86MsgVerb(X_INFO,5,"xf86ReadPciBios: modifying membase[%i]" - " for device %i:%i:%i\n", basereg, - (int)PCI_BUS_FROM_TAG(Tag), (int)PCI_DEV_FROM_TAG(Tag), - (int)PCI_FUNC_FROM_TAG(Tag)); - if (!(emptybase = getEmptyPciRange(Tag,b_reg))) { - xf86Msg(X_ERROR,"Cannot find empty range to map base to\n"); - return 0; - } - pciWriteLong(Tag, PCI_MAP_REG_START + (b_reg << 2), - emptybase); - } - /* Set ROM base address and enable ROM address decoding */ - pciWriteLong(Tag, PCI_MAP_ROM_REG, romaddr - | PCI_MAP_ROM_DECODE_ENABLE); - - hostbase = pciBusAddrToHostAddr(Tag, PCI_MEM, PCIGETROM(romaddr)); - - if ((xf86ReadDomainMemory(Tag, hostbase, sizeof(tmp), tmp) != - sizeof(tmp)) || - (tmp[0] != 0x55) || (tmp[1] != 0xaa) || !tmp[2] ) { - /* Restore the base registers if they were changed. */ - pciWriteLong(Tag, PCI_MAP_ROM_REG, romsave); - if (savebase) pciWriteLong(Tag, PCI_MAP_REG_START + (b_reg << 2), - (CARD32) savebase); - - /* No BIOS found: try another address */ - continue; - } - - ret = readPciBios( Tag, tmp, hostbase, buf, len, PCI_BIOS_PC ); - - /* Restore the base register if it was changed. */ - if (savebase) pciWriteLong(Tag, PCI_MAP_REG_START + (b_reg << 2), - (CARD32) savebase); - /* Restore ROM address decoding */ - pciWriteLong(Tag, PCI_MAP_ROM_REG, romsave); - - return ret; - } - /* Restore ROM address decoding */ - pciWriteLong(Tag, PCI_MAP_ROM_REG, romsave); - return 0; -} - - -static int -readPciBios(PCITAG Tag, CARD8* tmp, ADDRESS hostbase, unsigned char * buf, - int len, PciBiosType bios_type ) -{ - unsigned int image_length = 0; - int ret; - - /* We found a PCI BIOS Image. Now we look for the correct type */ - while ((tmp[0] == 0x55) && (tmp[1] == 0xAA)) { - unsigned short data_off = tmp[0x18] | (tmp[0x19] << 8); - unsigned char data[0x18]; - unsigned char type; - - if ((xf86ReadDomainMemory(Tag, hostbase + data_off, sizeof(data), data) - != sizeof(data)) || - (data[0] != 'P') || - (data[1] != 'C') || - (data[2] != 'I') || - (data[3] != 'R')) - break; - - type = data[0x14]; -#ifdef PRINT_PCI - ErrorF("data segment in BIOS: 0x%x, type: 0x%x\n", data_off, type); -#endif - if (type != bios_type) { /* not correct image: find next one */ - const unsigned char indicator = data[0x15]; - unsigned int i_length; - - if (indicator & 0x80) /* last image */ - break; - - i_length = (data[0x10] | (data[0x11] << 8)) << 9; - -#ifdef PRINT_PCI - ErrorF( "data image length: 0x%x, ind: 0x%x\n", i_length, indicator ); -#endif - hostbase += i_length; - if (xf86ReadDomainMemory(Tag, hostbase, sizeof(tmp), tmp) - != sizeof(tmp)) - break; - continue; - } - /* OK, we have a PCI BIOS Image of the correct type */ - - if ( bios_type == PCI_BIOS_PC ) - image_length = tmp[2] << 9; - else - image_length = (data[0x10] | (data[0x11] << 8)) << 9; -#ifdef PRINT_PCI - ErrorF("BIOS length: 0x%x\n", image_length); -#endif - break; - } - - ret = 0; - if (image_length) { - - /* If no length is given return the full length. Beware: Area pointed to - * by Buf must be large enough! - */ - if (len == 0) { - len = image_length; - } - else if ( len > image_length ) { - len = image_length; - xf86MsgVerb( X_INFO, 3, "Truncating PCI BIOS Length to %i\n", - len ); - } - - /* Read BIOS */ - ret = xf86ReadDomainMemory( Tag, hostbase, len, buf ); - } - - return ret; -} - - -static int -HandlePciBios(PCITAG Tag, int basereg, unsigned char * buf, int len) -{ - int n, num; - CARD32 Acc1, Acc2; - PCITAG *pTag; - int i; - - /* fall back to the old code if the OS code fails */ - if (pciOSHandleBIOS) { - n = pciOSHandleBIOS(Tag, basereg, buf, len); - if (n) - return n; - } - - n = handlePciBIOS( Tag, basereg, buf, len ); - if (n) - return n; - - num = pciTestMultiDeviceCard(PCI_BUS_FROM_TAG(Tag), - PCI_DEV_FROM_TAG(Tag), - PCI_FUNC_FROM_TAG(Tag),&pTag); - - if (!num) return 0; - -#define PCI_ENA (PCI_CMD_MEM_ENABLE | PCI_CMD_IO_ENABLE) - Acc1 = pciReadLong(Tag, PCI_CMD_STAT_REG); - pciWriteLong(Tag, PCI_CMD_STAT_REG, (Acc1 & ~PCI_ENA)); - - for (i = 0; i < num; i++) { - Acc2 = pciReadLong(pTag[i], PCI_CMD_STAT_REG); - pciWriteLong(pTag[i], PCI_CMD_STAT_REG, (Acc2 | PCI_ENA)); - - n = handlePciBIOS( pTag[i], 0, buf, len ); - - pciWriteLong(pTag[i], PCI_CMD_STAT_REG, Acc2); - if (n) - break; - } - pciWriteLong(Tag, PCI_CMD_STAT_REG, Acc1); - return n; -} - -_X_EXPORT int -xf86ReadPciBIOS(unsigned long Offset, PCITAG Tag, int basereg, - unsigned char *Buf, int Len) -{ - return HandlePciBios(Tag, basereg, Buf, Len); -} - -#endif /* INCLUDE_XF86_MAP_PCI_MEM */ - #ifdef INCLUDE_XF86_NO_DOMAIN -_X_EXPORT int -xf86GetPciDomain(PCITAG Tag) -{ - return 0; -} - _X_EXPORT pointer -xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag, +xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev, ADDRESS Base, unsigned long Size) { return xf86MapVidMem(ScreenNum, Flags, Base, Size); } -_X_EXPORT IOADDRESS -xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag, - IOADDRESS Base, unsigned long Size) -{ - return Base; -} - -_X_EXPORT int -xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, unsigned char *Buf) +IOADDRESS +xf86MapLegacyIO(struct pci_device *dev) { - int ret, length, rlength; - - /* Read in 64kB chunks */ - ret = 0; - while ((length = Len) > 0) { - if (length > 0x010000) length = 0x010000; - rlength = xf86ReadBIOS(Base, 0, Buf, length); - if (rlength < 0) { - ret = rlength; - break; - } - ret += rlength; - if (rlength < length) break; - Base += rlength; - Buf += rlength; - Len -= rlength; - } - - return ret; + (void) dev; + return 0; } #endif /* INCLUDE_XF86_NO_DOMAIN */ diff --git a/hw/xfree86/os-support/bus/Pci.h b/hw/xfree86/os-support/bus/Pci.h index 5ebbdd55e..632a7a048 100644 --- a/hw/xfree86/os-support/bus/Pci.h +++ b/hw/xfree86/os-support/bus/Pci.h @@ -157,50 +157,6 @@ #define PCI_TAG_NO_DOMAIN(tag) ((tag) & 0x00ffff00u) /* - * Macros for bus numbers found in P2P headers. - */ -#define PCI_PRIMARY_BUS_EXTRACT(x, tag) \ - ((((x) & PCI_PRIMARY_BUS_MASK ) >> 0) | (PCI_DOM_FROM_TAG(tag) << 8)) -#define PCI_SECONDARY_BUS_EXTRACT(x, tag) \ - ((((x) & PCI_SECONDARY_BUS_MASK ) >> 8) | (PCI_DOM_FROM_TAG(tag) << 8)) -#define PCI_SUBORDINATE_BUS_EXTRACT(x, tag) \ - ((((x) & PCI_SUBORDINATE_BUS_MASK) >> 16) | (PCI_DOM_FROM_TAG(tag) << 8)) - -#define PCI_PRIMARY_BUS_INSERT(x, y) \ - (((x) & ~PCI_PRIMARY_BUS_MASK ) | (((y) & 0xffu) << 0)) -#define PCI_SECONDARY_BUS_INSERT(x, y) \ - (((x) & ~PCI_SECONDARY_BUS_MASK ) | (((y) & 0xffu) << 8)) -#define PCI_SUBORDINATE_BUS_INSERT(x, y) \ - (((x) & ~PCI_SUBORDINATE_BUS_MASK) | (((y) & 0xffu) << 16)) - -/* Ditto for CardBus bridges */ -#define PCI_CB_PRIMARY_BUS_EXTRACT(x, tag) \ - PCI_PRIMARY_BUS_EXTRACT(x, tag) -#define PCI_CB_CARDBUS_BUS_EXTRACT(x, tag) \ - PCI_SECONDARY_BUS_EXTRACT(x, tag) -#define PCI_CB_SUBORDINATE_BUS_EXTRACT(x, tag) \ - PCI_SUBORDINATE_BUS_EXTRACT(x, tag) - -#define PCI_CB_PRIMARY_BUS_INSERT(x, tag) \ - PCI_PRIMARY_BUS_INSERT(x, tag) -#define PCI_CB_CARDBUS_BUS_INSERT(x, tag) \ - PCI_SECONDARY_BUS_INSERT(x, tag) -#define PCI_CB_SUBORDINATE_BUS_INSERT(x, tag) \ - PCI_SUBORDINATE_BUS_INSERT(x, tag) - -#if X_BYTE_ORDER == X_BIG_ENDIAN -#define PCI_CPU(val) (((val >> 24) & 0x000000ff) | \ - ((val >> 8) & 0x0000ff00) | \ - ((val << 8) & 0x00ff0000) | \ - ((val << 24) & 0xff000000)) -#define PCI_CPU16(val) (((val >> 8) & 0x000000ff) | \ - ((val << 8) & 0x0000ff00)) -#else -#define PCI_CPU(val) (val) -#define PCI_CPU16(val) (val) -#endif - -/* * Debug Macros/Definitions */ /* #define DEBUGPCI 2 */ /* Disable/enable trace in PCI code */ @@ -234,97 +190,79 @@ #if defined(__alpha__) # if defined(linux) # define ARCH_PCI_INIT axpPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # elif defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) # define ARCH_PCI_INIT freebsdPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # elif defined(__NetBSD__) # define ARCH_PCI_INIT netbsdPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif #elif defined(__arm__) # if defined(linux) # define ARCH_PCI_INIT linuxPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif #elif defined(__hppa__) # if defined(linux) # define ARCH_PCI_INIT linuxPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif #elif defined(__ia64__) # if defined(linux) # define ARCH_PCI_INIT ia64linuxPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # elif defined(FreeBSD) # define ARCH_PCI_INIT freebsdPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif # define XF86SCANPCI_WRAPPER ia64ScanPCIWrapper #elif defined(__i386__) || defined(i386) -# define ARCH_PCI_INIT ix86PciInit -# define INCLUDE_XF86_MAP_PCI_MEM -# define INCLUDE_XF86_NO_DOMAIN # if defined(linux) -# define ARCH_PCI_OS_INIT linuxPciInit +# define ARCH_PCI_INIT linuxPciInit +# else +# define ARCH_PCI_INIT ix86PciInit # endif +# define INCLUDE_XF86_NO_DOMAIN #elif defined(__mc68000__) # if defined(linux) # define ARCH_PCI_INIT linuxPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif #elif defined(__mips__) # if defined(linux) # define ARCH_PCI_INIT linuxPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif #elif defined(__powerpc__) || defined(__powerpc64__) # if defined(linux) # define ARCH_PCI_INIT linuxPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN /* Needs kernel work to remove */ # elif defined(__FreeBSD__) || defined(__OpenBSD__) # define ARCH_PCI_INIT freebsdPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # elif defined(__NetBSD__) # define ARCH_PCI_INIT netbsdPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # else # define ARCH_PCI_INIT ppcPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif #elif defined(__s390__) # if defined(linux) # define ARCH_PCI_INIT linuxPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif #elif defined(__sh__) # if defined(linux) # define ARCH_PCI_INIT linuxPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif #elif defined(__sparc__) || defined(sparc) # if defined(linux) # define ARCH_PCI_INIT linuxPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # elif defined(sun) # define ARCH_PCI_INIT sparcPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # elif (defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__sparc64__) # define ARCH_PCI_INIT freebsdPciInit -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif # if !defined(__FreeBSD__) && !defined(linux) @@ -333,28 +271,21 @@ #elif defined(__amd64__) || defined(__amd64) # if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) # define ARCH_PCI_INIT freebsdPciInit +# elif defined(linux) +# define ARCH_PCI_INIT linuxPciInit # else # define ARCH_PCI_INIT ix86PciInit # endif -# define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN -# if defined(linux) -# define ARCH_PCI_OS_INIT linuxPciInit -# endif #endif #ifndef ARCH_PCI_INIT #error No PCI support available for this architecture/OS combination #endif -extern void ARCH_PCI_INIT(void); -#if defined(ARCH_PCI_OS_INIT) -extern void ARCH_PCI_OS_INIT(void); -#endif +#undef INCLUDE_XF86_NO_DOMAIN -#if defined(ARCH_PCI_PCI_BRIDGE) -extern void ARCH_PCI_PCI_BRIDGE(pciConfigPtr pPCI); -#endif +extern void ARCH_PCI_INIT(void); #if defined(XF86SCANPCI_WRAPPER) typedef enum { @@ -369,27 +300,7 @@ extern void XF86SCANPCI_WRAPPER(scanpciWrapperOpt flags); * (e.g. a primary PCI bus and all of its secondaries) */ typedef struct pci_bus_funcs { - CARD32 (*pciReadLong)(PCITAG, int); - void (*pciWriteLong)(PCITAG, int, CARD32); - void (*pciSetBitsLong)(PCITAG, int, CARD32, CARD32); - ADDRESS (*pciAddrHostToBus)(PCITAG, PciAddrType, ADDRESS); ADDRESS (*pciAddrBusToHost)(PCITAG, PciAddrType, ADDRESS); - /* - * The next three are optional. If NULL, the corresponding function is - * to be performed generically. - */ - CARD16 (*pciControlBridge)(int, CARD16, CARD16); - void (*pciGetBridgeBuses)(int, int *, int *, int *); - /* Use pointer's to avoid #include recursion */ - void (*pciGetBridgeResources)(int, pointer *, pointer *, pointer *); - - /* These are optional and will be implemented using read long - * if not present. */ - CARD8 (*pciReadByte)(PCITAG, int); - void (*pciWriteByte)(PCITAG, int, CARD8); - CARD16 (*pciReadWord)(PCITAG, int); - void (*pciWriteWord)(PCITAG, int, CARD16); - } pciBusFuncs_t, *pciBusFuncs_p; /* @@ -402,7 +313,7 @@ typedef struct pci_bus_info { int primary_bus; /* Parent bus */ pciBusFuncs_p funcs; /* PCI access functions */ void *pciBusPriv; /* Implementation private data */ - pciConfigPtr bridge; /* bridge that opens this bus */ + struct pci_device *bridge; /* bridge that opens this bus */ } pciBusInfo_t; #define HOST_NO_BUS ((pciBusInfo_t *)(-1)) @@ -414,32 +325,14 @@ typedef struct pci_bus_info { #define PCI_CFG_MECH_OTHER 3 /* Something else */ /* Generic PCI service functions and helpers */ -PCITAG pciGenFindFirst(void); -PCITAG pciGenFindNext(void); CARD32 pciCfgMech1Read(PCITAG tag, int offset); void pciCfgMech1Write(PCITAG tag, int offset, CARD32 val); void pciCfgMech1SetBits(PCITAG tag, int offset, CARD32 mask, CARD32 val); -CARD32 pciByteSwap(CARD32); -Bool pciMfDev(int, int); ADDRESS pciAddrNOOP(PCITAG tag, PciAddrType type, ADDRESS); -extern void pciSetOSBIOSPtr(int (*bios_fn)(PCITAG Tag, int basereg, unsigned char * buf, int len)); -extern PCITAG (*pciFindFirstFP)(void); -extern PCITAG (*pciFindNextFP)(void); - -extern CARD32 pciDevid; -extern CARD32 pciDevidMask; - extern int pciMaxBusNum; -extern int pciBusNum; -extern int pciDevNum; -extern int pciFuncNum; -extern PCITAG pciDeviceTag; - -extern int xf86MaxPciDevs; - extern pciBusInfo_t *pciBusInfo[]; #endif /* _PCI_H */ diff --git a/hw/xfree86/os-support/bus/axpPci.c b/hw/xfree86/os-support/bus/axpPci.c index fc16a512e..e2f086c53 100644 --- a/hw/xfree86/os-support/bus/axpPci.c +++ b/hw/xfree86/os-support/bus/axpPci.c @@ -229,9 +229,6 @@ axpPciInit() pciNumBuses = bus + 1; } - - pciFindFirstFP = pciGenFindFirst; - pciFindNextFP = pciGenFindNext; } /* @@ -330,12 +327,11 @@ xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag, pDomain->dense_mem + Base - _bus_base(), Size); } -_X_EXPORT IOADDRESS -xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag, - IOADDRESS Base, unsigned long Size) +IOADDRESS +xf86MapLegacyIO(struct pci_device *dev) { axpDomainPtr pDomain; - int domain = PCI_DOM_FROM_TAG(Tag); + const int domain = dev->domain; if ((domain < 0) || (domain >= pciNumDomains) || !(pDomain = xf86DomainInfo[domain])) @@ -346,7 +342,7 @@ xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag, * base [this is ok since we also constrain sparse I/O systems to * a single domain in axpSetupDomains()] */ - if (pDomain->sparse_io) return Base; + if (pDomain->sparse_io) return 0; /* * I/O addresses on Alpha are really just different physical memory @@ -359,42 +355,11 @@ xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag, * Map the entire I/O space (64kB) at once and only once. */ if (!pDomain->mapped_io) - pDomain->mapped_io = (IOADDRESS)xf86MapVidMem(ScreenNum, Flags, + pDomain->mapped_io = (IOADDRESS)xf86MapVidMem(-1, VIDMEM_MMIO, pDomain->dense_io - _bus_base(), 0x10000); - return pDomain->mapped_io + Base; -} - -_X_EXPORT int -xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, unsigned char *Buf) -{ - static unsigned long pagemask = 0; - unsigned char *MappedAddr; - unsigned long MapSize; - ADDRESS MapBase; - int i; - - if (!pagemask) pagemask = xf86getpagesize() - 1; - - /* Ensure page boundaries */ - MapBase = Base & ~pagemask; - MapSize = ((Base + Len + pagemask) & ~pagemask) - MapBase; - - /* - * VIDMEM_MMIO in order to get sparse mapping on sparse memory systems - * so we can use mmio functions to read (that way we can really get byte - * at a time reads on dense memory systems with byte/word instructions. - */ - MappedAddr = xf86MapDomainMemory(-1, VIDMEM_READONLY | VIDMEM_MMIO, - Tag, MapBase, MapSize); - - for (i = 0; i < Len; i++) { - *Buf++ = xf86ReadMmio8(MappedAddr, Base - MapBase + i); - } - - xf86UnMapVidMem(-1, MappedAddr, MapSize); - return Len; + return pDomain->mapped_io; } resPtr diff --git a/hw/xfree86/os-support/bus/freebsdPci.c b/hw/xfree86/os-support/bus/freebsdPci.c index 63c00b262..ff11c72f4 100644 --- a/hw/xfree86/os-support/bus/freebsdPci.c +++ b/hw/xfree86/os-support/bus/freebsdPci.c @@ -124,8 +124,6 @@ freebsdPciInit() pciNumBuses = 1; pciBusInfo[0] = &freebsdPci0; - pciFindFirstFP = pciGenFindFirst; - pciFindNextFP = pciGenFindNext; } static CARD32 diff --git a/hw/xfree86/os-support/bus/ix86Pci.c b/hw/xfree86/os-support/bus/ix86Pci.c index fd7bdf6c8..3ed4f1422 100644 --- a/hw/xfree86/os-support/bus/ix86Pci.c +++ b/hw/xfree86/os-support/bus/ix86Pci.c @@ -171,6 +171,7 @@ /* * Intel x86 platform specific PCI access functions */ +#if 0 static CARD32 ix86PciReadLongSetup(PCITAG tag, int off); static void ix86PciWriteLongSetup(PCITAG, int off, CARD32 val); static void ix86PciSetBitsLongSetup(PCITAG, int off, CARD32 mask, CARD32 val); @@ -180,27 +181,34 @@ static void ix86PciSetBitsLongCFG1(PCITAG, int off, CARD32 mask, CARD32 val); static CARD32 ix86PciReadLongCFG2(PCITAG tag, int off); static void ix86PciWriteLongCFG2(PCITAG, int off, CARD32 val); static void ix86PciSetBitsLongCFG2(PCITAG, int off, CARD32 mask, CARD32 val); +#endif static pciBusFuncs_t ix86Funcs0 = { +#if 0 /* pciReadLong */ ix86PciReadLongSetup, /* pciWriteLong */ ix86PciWriteLongSetup, /* pciSetBitsLong */ ix86PciSetBitsLongSetup, +#endif /* pciAddrHostToBus */ pciAddrNOOP, /* pciAddrBusToHost */ pciAddrNOOP }; static pciBusFuncs_t ix86Funcs1 = { +#if 0 /* pciReadLong */ ix86PciReadLongCFG1, /* pciWriteLong */ ix86PciWriteLongCFG1, /* pciSetBitsLong */ ix86PciSetBitsLongCFG1, +#endif /* pciAddrHostToBus */ pciAddrNOOP, /* pciAddrBusToHost */ pciAddrNOOP }; static pciBusFuncs_t ix86Funcs2 = { +#if 0 /* pciReadLong */ ix86PciReadLongCFG2, /* pciWriteLong */ ix86PciWriteLongCFG2, /* pciSetBitsLong */ ix86PciSetBitsLongCFG2, +#endif /* pciAddrHostToBus */ pciAddrNOOP, /* pciAddrBusToHost */ pciAddrNOOP }; @@ -218,6 +226,7 @@ static pciBusInfo_t ix86Pci0 = { static Bool ix86PciBusCheck(void) { +#if 0 PCITAG tag; CARD32 id, class; CARD8 device; @@ -250,6 +259,7 @@ ix86PciBusCheck(void) break; } } +#endif return FALSE; } @@ -271,12 +281,7 @@ void ix86PciSelectCfgmech(void) * We rely on xf86Info.pciFlags to tell which mechanisms to try.... */ switch (xf86Info.pciFlags) { - case PCIOsConfig: -#ifdef ARCH_PCI_OS_INIT - return; -#endif - case PCIProbe1: if (!xf86EnableIO()) return; @@ -544,6 +549,7 @@ ix86PcibusTag(CARD8 bus, CARD8 cardnum, CARD8 func) } #endif +#if 0 static CARD32 ix86PciReadLongSetup(PCITAG Tag, int reg) { @@ -680,6 +686,7 @@ ix86PciSetBitsLongCFG2(PCITAG Tag, int reg, CARD32 mask, CARD32 val) outb(PCI_CFGMECH2_ENABLE_REG, 0); outb(PCI_CFGMECH2_FORWARD_REG, 0); } +#endif void ix86PciInit() @@ -687,8 +694,6 @@ ix86PciInit() /* Initialize pciBusInfo[] array and function pointers */ pciNumBuses = 1; pciBusInfo[0] = &ix86Pci0; - pciFindFirstFP = pciGenFindFirst; - pciFindNextFP = pciGenFindNext; /* Make sure that there is a PCI bus present. */ ix86PciSelectCfgmech(); diff --git a/hw/xfree86/os-support/bus/linuxPci.c b/hw/xfree86/os-support/bus/linuxPci.c index 9a9a99d49..b88fae6c7 100644 --- a/hw/xfree86/os-support/bus/linuxPci.c +++ b/hw/xfree86/os-support/bus/linuxPci.c @@ -60,31 +60,15 @@ * linux platform specific PCI access functions -- using /proc/bus/pci * needs kernel version 2.2.x */ -static CARD32 linuxPciCfgRead(PCITAG tag, int off); -static void linuxPciCfgWrite(PCITAG, int off, CARD32 val); -static void linuxPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits); static ADDRESS linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr); #if defined(__powerpc__) static ADDRESS linuxPpcBusAddrToHostAddr(PCITAG, PciAddrType, ADDRESS); -static ADDRESS linuxPpcHostAddrToBusAddr(PCITAG, PciAddrType, ADDRESS); #endif -static CARD8 linuxPciCfgReadByte(PCITAG tag, int off); -static void linuxPciCfgWriteByte(PCITAG tag, int off, CARD8 val); -static CARD16 linuxPciCfgReadWord(PCITAG tag, int off); -static void linuxPciCfgWriteWord(PCITAG tag, int off, CARD16 val); -static int linuxPciHandleBIOS(PCITAG Tag, int basereg, unsigned char *buf, int len); -static Bool linuxDomainSupport(void); - static pciBusFuncs_t linuxFuncs0 = { -/* pciReadLong */ linuxPciCfgRead, -/* pciWriteLong */ linuxPciCfgWrite, -/* pciSetBitsLong */ linuxPciCfgSetBits, #if defined(__powerpc__) -/* pciAddrHostToBus */ linuxPpcHostAddrToBusAddr, /* pciAddrBusToHost */ linuxPpcBusAddrToHostAddr, #else -/* pciAddrHostToBus */ pciAddrNOOP, /* linuxTransAddrBusToHost is busted on sparc64 but the PCI rework tree * makes it all moot, so we kludge it for now */ #if defined(__sparc__) @@ -93,16 +77,6 @@ static pciBusFuncs_t linuxFuncs0 = { /* pciAddrBusToHost */ linuxTransAddrBusToHost, #endif /* __sparc64__ */ #endif - -/* pciControlBridge */ NULL, -/* pciGetBridgeBuses */ NULL, -/* pciGetBridgeResources */ NULL, - -/* pciReadByte */ linuxPciCfgReadByte, -/* pciWriteByte */ linuxPciCfgWriteByte, - -/* pciReadWord */ linuxPciCfgReadWord, -/* pciWriteWord */ linuxPciCfgWriteWord, }; static pciBusInfo_t linuxPci0 = { @@ -115,150 +89,108 @@ static pciBusInfo_t linuxPci0 = { /* bridge */ NULL }; -/* from lnx_pci.c. */ -extern int lnxPciInit(void); +static const struct pci_id_match match_host_bridge = { + PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, + (PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_HOST << 8), + 0x0000ffff00, 0 +}; -static Bool domain_support = FALSE; +#ifndef INCLUDE_XF86_NO_DOMAIN +#define MAX_DOMAINS 257 +static pointer DomainMmappedIO[MAX_DOMAINS]; +#endif void -linuxPciInit() +linuxPciInit(void) { struct stat st; + +#ifndef INCLUDE_XF86_NO_DOMAIN + (void) memset(DomainMmappedIO, 0, sizeof(DomainMmappedIO)); +#endif + if ((xf86Info.pciFlags == PCIForceNone) || (-1 == stat("/proc/bus/pci", &st))) { /* when using this as default for all linux architectures, we'll need a fallback for 2.0 kernels here */ return; } -#ifndef INCLUDE_XF86_NO_DOMAIN - domain_support = linuxDomainSupport(); -#endif pciNumBuses = 1; pciBusInfo[0] = &linuxPci0; - pciFindFirstFP = pciGenFindFirst; - pciFindNextFP = pciGenFindNext; - pciSetOSBIOSPtr(linuxPciHandleBIOS); - xf86MaxPciDevs = lnxPciInit(); } +/** + * \bug + * The generation of the procfs file name for the domain != 0 case may not be + * correct. + */ static int -linuxPciOpenFile(PCITAG tag, Bool write) +linuxPciOpenFile(struct pci_device *dev, Bool write) { - static int ldomain, lbus,ldev,lfunc,fd = -1,is_write = 0; - int domain, bus, dev, func; - char file[64]; - struct stat ignored; - static int is26 = -1; - - domain = PCI_DOM_FROM_TAG(tag); - bus = PCI_BUS_NO_DOMAIN(PCI_BUS_FROM_TAG(tag)); - dev = PCI_DEV_FROM_TAG(tag); - func = PCI_FUNC_FROM_TAG(tag); - if (is26 == -1) { - if (stat("/sys/bus/pci",&ignored) < 0) - is26 = 0; - else - is26 = 1; - } + static struct pci_device *last_dev = NULL; + static int fd = -1,is_write = 0; + char file[64]; + struct stat ignored; + static int is26 = -1; + + if (dev == NULL) { + return -1; + } + + if (is26 == -1) { + is26 = (stat("/sys/bus/pci", &ignored) < 0) ? 0 : 1; + } - if (!domain_support && domain > 0) - return -1; - - if (fd == -1 || (write && (!is_write)) || domain != ldomain - || bus != lbus || dev != ldev || func != lfunc) { - if (fd != -1) { - close(fd); - fd = -1; - } - if (is26) - sprintf(file,"/sys/bus/pci/devices/%04x:%02x:%02x.%01x/config", - domain, bus, dev, func); - else { - if (bus < 256) { - sprintf(file, "/proc/bus/pci/%04x:%02x", domain, bus); - if (stat(file, &ignored) < 0) { - if (domain == 0) - sprintf(file, "/proc/bus/pci/%02x/%02x.%1x", - bus, dev, func); - else - goto bail; - } else - sprintf(file, "/proc/bus/pci/%04x:%02x/%02x.%1x", - domain, bus, dev, func); - } else { - sprintf(file, "/proc/bus/pci/%04x:%04x", domain, bus); - if (stat(file, &ignored) < 0) { - if (domain == 0) - sprintf(file, "/proc/bus/pci/%04x/%02x.%1x", - bus, dev, func); - else - goto bail; - } else - sprintf(file, "/proc/bus/pci/%04x:%04x/%02x.%1x", - domain, bus, dev, func); - } + if (fd == -1 || (write && (!is_write)) || (last_dev != dev)) { + if (fd != -1) { + close(fd); + fd = -1; + } + + if (is26) { + sprintf(file,"/sys/bus/pci/devices/%04u:%02x:%02x.%01x/config", + dev->domain, dev->bus, dev->dev, dev->func); + } else { + if (dev->domain == 0) { + sprintf(file,"/proc/bus/pci/%02x", dev->bus); + if (stat(file, &ignored) < 0) { + sprintf(file, "/proc/bus/pci/0000:%02x/%02x.%1x", + dev->bus, dev->dev, dev->func); + } else { + sprintf(file, "/proc/bus/pci/%02x/%02x.%1x", + dev->bus, dev->dev, dev->func); } - if (write) { - fd = open(file,O_RDWR); - if (fd != -1) is_write = TRUE; - } else switch (is_write) { - case TRUE: - fd = open(file,O_RDWR); - if (fd > -1) - break; - default: - fd = open(file,O_RDONLY); - is_write = FALSE; + } else { + sprintf(file,"/proc/bus/pci/%02x%02x", dev->domain, dev->bus); + if (stat(file, &ignored) < 0) { + sprintf(file, "/proc/bus/pci/%04x:%04x/%02x.%1x", + dev->domain, dev->bus, dev->dev, dev->func); + } else { + sprintf(file, "/proc/bus/pci/%02x%02x/%02x.%1x", + dev->domain, dev->bus, dev->dev, dev->func); } - bail: - ldomain = domain; - lbus = bus; - ldev = dev; - lfunc = func; + } } - return fd; -} - -static CARD32 -linuxPciCfgRead(PCITAG tag, int off) -{ - int fd; - CARD32 val = 0xffffffff; - if (-1 != (fd = linuxPciOpenFile(tag,FALSE))) { - lseek(fd,off,SEEK_SET); - read(fd,&val,4); + if (write) { + fd = open(file,O_RDWR); + if (fd != -1) is_write = TRUE; + } else { + switch (is_write) { + case TRUE: + fd = open(file,O_RDWR); + if (fd > -1) + break; + default: + fd = open(file,O_RDONLY); + is_write = FALSE; + } } - return PCI_CPU(val); -} - -static void -linuxPciCfgWrite(PCITAG tag, int off, CARD32 val) -{ - int fd; - if (-1 != (fd = linuxPciOpenFile(tag,TRUE))) { - lseek(fd,off,SEEK_SET); - val = PCI_CPU(val); - write(fd,&val,4); - } -} + last_dev = dev; + } -static void -linuxPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits) -{ - int fd; - CARD32 val = 0xffffffff; - - if (-1 != (fd = linuxPciOpenFile(tag,TRUE))) { - lseek(fd,off,SEEK_SET); - read(fd,&val,4); - val = PCI_CPU(val); - val = (val & ~mask) | (bits & mask); - val = PCI_CPU(val); - lseek(fd,off,SEEK_SET); - write(fd,&val,4); - } + return fd; } /* @@ -305,77 +237,8 @@ linuxPpcBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr) else return addr; } -static ADDRESS -linuxPpcHostAddrToBusAddr(PCITAG tag, PciAddrType type, ADDRESS addr) -{ - if (type == PCI_MEM) - { - ADDRESS membase = syscall(__NR_pciconfig_iobase, 1, - PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag)); - return (addr - membase); - } - else if (type == PCI_IO) - { - ADDRESS iobase = syscall(__NR_pciconfig_iobase, 2, - PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag)); - return (addr - iobase); - } - else return addr; -} - #endif /* __powerpc__ */ -static CARD8 -linuxPciCfgReadByte(PCITAG tag, int off) -{ - int fd; - CARD8 val = 0xff; - - if (-1 != (fd = linuxPciOpenFile(tag,FALSE))) { - lseek(fd,off,SEEK_SET); - read(fd,&val,1); - } - - return val; -} - -static void -linuxPciCfgWriteByte(PCITAG tag, int off, CARD8 val) -{ - int fd; - - if (-1 != (fd = linuxPciOpenFile(tag,TRUE))) { - lseek(fd,off,SEEK_SET); - write(fd, &val, 1); - } -} - -static CARD16 -linuxPciCfgReadWord(PCITAG tag, int off) -{ - int fd; - CARD16 val = 0xff; - - if (-1 != (fd = linuxPciOpenFile(tag,FALSE))) { - lseek(fd, off, SEEK_SET); - read(fd, &val, 2); - } - - return PCI_CPU16(val); -} - -static void -linuxPciCfgWriteWord(PCITAG tag, int off, CARD16 val) -{ - int fd; - - if (-1 != (fd = linuxPciOpenFile(tag,TRUE))) { - lseek(fd, off, SEEK_SET); - val = PCI_CPU16(val); - write(fd, &val, 2); - } -} - #ifndef INCLUDE_XF86_NO_DOMAIN /* @@ -422,19 +285,42 @@ linuxPciCfgWriteWord(PCITAG tag, int off, CARD16 val) #endif /* This probably shouldn't be Linux-specific */ -static pciConfigPtr -xf86GetPciHostConfigFromTag(PCITAG Tag) +static struct pci_device * +get_parent_bridge(struct pci_device *dev) { - int bus = PCI_BUS_FROM_TAG(Tag); - pciBusInfo_t *pBusInfo; + struct pci_id_match bridge_match = { + PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, + (PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_PCI << 8), + 0 + }; + struct pci_device *bridge; + struct pci_device_iterator *iter; - while ((bus < pciNumBuses) && (pBusInfo = pciBusInfo[bus])) { - if (bus == pBusInfo->primary_bus) - return pBusInfo->bridge; - bus = pBusInfo->primary_bus; + if (dev == NULL) { + return NULL; } - return NULL; /* Bad data */ + iter = pci_id_match_iterator_create(& bridge_match); + if (iter == NULL) { + return NULL; + } + + while ((bridge = pci_device_next(iter)) != NULL) { + if (bridge->domain == dev->domain) { + const struct pci_bridge_info *info = + pci_device_get_bridge_info(bridge); + + if (info != NULL) { + if (info->secondary_bus == dev->bus) { + break; + } + } + } + } + + pci_iterator_destroy(iter); + + return bridge; } /* @@ -470,20 +356,18 @@ static const struct pciSizes { #define NUM_SIZES (sizeof(pciControllerSizes) / sizeof(pciControllerSizes[0])) static const struct pciSizes * -linuxGetSizesStruct(PCITAG Tag) +linuxGetSizesStruct(const struct pci_device *dev) { static const struct pciSizes default_size = { 0, 0, 1U << 16, (unsigned long)(1ULL << 32) }; - pciConfigPtr pPCI; int i; - /* Find host bridge */ - if ((pPCI = xf86GetPciHostConfigFromTag(Tag))) { - /* Look up vendor/device */ + /* Look up vendor/device */ + if (dev != NULL) { for (i = 0; i < NUM_SIZES; i++) { - if ((pPCI->pci_vendor == pciControllerSizes[i].vendor) - && (pPCI->pci_device == pciControllerSizes[i].device)) { + if ((dev->vendor_id == pciControllerSizes[i].vendor) + && (dev->device_id == pciControllerSizes[i].device)) { return & pciControllerSizes[i]; } } @@ -494,84 +378,31 @@ linuxGetSizesStruct(PCITAG Tag) } static __inline__ unsigned long -linuxGetIOSize(PCITAG Tag) +linuxGetIOSize(const struct pci_device *dev) { - const struct pciSizes * const sizes = linuxGetSizesStruct(Tag); + const struct pciSizes * const sizes = linuxGetSizesStruct(dev); return sizes->io_size; } -static __inline__ void -linuxGetSizes(PCITAG Tag, unsigned long *io_size, unsigned long *mem_size) -{ - const struct pciSizes * const sizes = linuxGetSizesStruct(Tag); - - *io_size = sizes->io_size; - *mem_size = sizes->mem_size; -} - -static Bool -linuxDomainSupport(void) -{ - DIR *dir; - struct dirent *dirent; - char *end; - - if (!(dir = opendir("/proc/bus/pci"))) - return FALSE; - while (1) { - if (!(dirent = readdir(dir))) - return FALSE; - strtol(dirent->d_name,&end,16); - /* entry of the form xx or xxxx : x=[0..f] no domain */ - if (*end == '\0') - return FALSE; - else if (*end == ':') { - /* ':' found immediately after: verify for xxxx:xx or xxxx:xxxx */ - strtol(end + 1,&end,16); - if (*end == '\0') - return TRUE; - } - } - return FALSE; -} - -_X_EXPORT int -xf86GetPciDomain(PCITAG Tag) -{ - pciConfigPtr pPCI; - int fd, result; - - pPCI = xf86GetPciHostConfigFromTag(Tag); - - if (pPCI && (result = PCI_DOM_FROM_BUS(pPCI->busnum))) - return result + 1; - - if (!pPCI || pPCI->fakeDevice) - return 1; /* Domain 0 is reserved */ - - if ((fd = linuxPciOpenFile(pPCI ? pPCI->tag : 0,FALSE)) < 0) - return 0; - - if ((result = ioctl(fd, PCIIOC_CONTROLLER, 0)) < 0) - return 0; - - return result + 1; /* Domain 0 is reserved */ -} - static pointer -linuxMapPci(int ScreenNum, int Flags, PCITAG Tag, +linuxMapPci(int ScreenNum, int Flags, struct pci_device *dev, ADDRESS Base, unsigned long Size, int mmap_ioctl) { + /* Align to page boundary */ + const ADDRESS realBase = Base & ~(getpagesize() - 1); + const ADDRESS Offset = Base - realBase; + do { - pciConfigPtr pPCI; unsigned char *result; - ADDRESS realBase, Offset; int fd, mmapflags, prot; xf86InitVidMem(); - prot = ((Flags & VIDMEM_READONLY) == 0); - if (((fd = linuxPciOpenFile(Tag, prot)) < 0) || + /* If dev is NULL, linuxPciOpenFile will return -1, and this routine + * will fail gracefully. + */ + prot = ((Flags & VIDMEM_READONLY) == 0); + if (((fd = linuxPciOpenFile(dev, prot)) < 0) || (ioctl(fd, mmap_ioctl, 0) < 0)) break; @@ -601,9 +432,6 @@ linuxMapPci(int ScreenNum, int Flags, PCITAG Tag, #endif /* ?__ia64__ */ - /* Align to page boundary */ - realBase = Base & ~(getpagesize() - 1); - Offset = Base - realBase; if (Flags & VIDMEM_READONLY) prot = PROT_READ; @@ -626,49 +454,23 @@ linuxMapPci(int ScreenNum, int Flags, PCITAG Tag, return NULL; } -#define MAX_DOMAINS 257 -static pointer DomainMmappedIO[MAX_DOMAINS]; - static int -linuxOpenLegacy(PCITAG Tag, char *name) +linuxOpenLegacy(struct pci_device *dev, char *name) { -#define PREFIX "/sys/class/pci_bus/%04x:%02x/%s" - char *path; - int domain, bus; - pciBusInfo_t *pBusInfo; - pciConfigPtr bridge = NULL; - int fd; - - path = xalloc(strlen(PREFIX) + strlen(name)); - if (!path) - return -1; - - for (;;) { - domain = xf86GetPciDomain(Tag); - bus = PCI_BUS_NO_DOMAIN(PCI_BUS_FROM_TAG(Tag)); - - /* Domain 0 is reserved -- see xf86GetPciDomain() */ - if ((domain <= 0) || (domain >= MAX_DOMAINS)) - FatalError("linuxOpenLegacy(): domain out of range\n"); + static const char PREFIX[] = "/sys/class/pci_bus/%04x:%02x/%s"; + char path[sizeof(PREFIX) + 10]; + int fd = -1; - sprintf(path, PREFIX, domain - 1, bus, name); + while (dev != NULL) { + snprintf(path, sizeof(path) - 1, PREFIX, dev->domain, dev->bus, name); fd = open(path, O_RDWR); if (fd >= 0) { - xfree(path); return fd; } - pBusInfo = pciBusInfo[PCI_BUS_FROM_TAG(Tag)]; - if (!pBusInfo || (bridge == pBusInfo->bridge) || - !(bridge = pBusInfo->bridge)) { - xfree(path); - return -1; - } - - Tag = bridge->tag; + dev = get_parent_bridge(dev); } - xfree(path); return fd; } @@ -680,10 +482,9 @@ linuxOpenLegacy(PCITAG Tag, char *name) * the legacy ISA memory space (memory in a domain between 0 and 1MB). */ _X_EXPORT pointer -xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag, +xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev, ADDRESS Base, unsigned long Size) { - int domain = xf86GetPciDomain(Tag); int fd = -1; pointer addr; @@ -691,11 +492,8 @@ xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag, * We use /proc/bus/pci on non-legacy addresses or if the Linux sysfs * legacy_mem interface is unavailable. */ - if (Base >= 1024*1024) - addr = linuxMapPci(ScreenNum, Flags, Tag, Base, Size, - PCIIOC_MMAP_IS_MEM); - else if ((fd = linuxOpenLegacy(Tag, "legacy_mem")) < 0) - addr = linuxMapPci(ScreenNum, Flags, Tag, Base, Size, + if ((Base > 1024*1024) || ((fd = linuxOpenLegacy(dev, "legacy_mem")) < 0)) + return linuxMapPci(ScreenNum, Flags, dev, Base, Size, PCIIOC_MMAP_IS_MEM); else addr = mmap(NULL, Size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, Base); @@ -709,434 +507,143 @@ xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag, return addr; } -/* - * xf86MapDomainIO - map I/O space in this domain +/** + * Map I/O space in this domain * * Each domain has a legacy ISA I/O space. This routine will try to * map it using the Linux sysfs legacy_io interface. If that fails, * it'll fall back to using /proc/bus/pci. * - * If the legacy_io interface *does* exist, the file descriptor (fd below) - * will be saved in the DomainMmappedIO array in the upper bits of the + * If the legacy_io interface \b does exist, the file descriptor (\c fd below) + * will be saved in the \c DomainMmappedIO array in the upper bits of the * pointer. Callers will do I/O with small port numbers (<64k values), so - * the platform I/O code can extract the port number and the fd, lseek to - * the port number in the legacy_io file, and issue the read or write. + * the platform I/O code can extract the port number and the \c fd, \c lseek + * to the port number in the legacy_io file, and issue the read or write. * * This has no means of returning failure, so all errors are fatal */ -_X_EXPORT IOADDRESS -xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag, - IOADDRESS Base, unsigned long Size) +IOADDRESS +xf86MapLegacyIO(struct pci_device *dev) { - int domain = xf86GetPciDomain(Tag); + const int domain = dev->domain; + struct pci_device *bridge = get_parent_bridge(dev); int fd; - if ((domain <= 0) || (domain >= MAX_DOMAINS)) - FatalError("xf86MapDomainIO(): domain out of range\n"); + if (domain >= MAX_DOMAINS) + FatalError("xf86MapLegacyIO(): domain out of range\n"); - if (DomainMmappedIO[domain]) - return (IOADDRESS)DomainMmappedIO[domain] + Base; - - /* Permanently map all of I/O space */ - if ((fd = linuxOpenLegacy(Tag, "legacy_io")) < 0) { - DomainMmappedIO[domain] = linuxMapPci(ScreenNum, Flags, Tag, - 0, linuxGetIOSize(Tag), + if (DomainMmappedIO[domain] == NULL) { + /* Permanently map all of I/O space */ + fd = linuxOpenLegacy(bridge, "legacy_io"); + if (fd < 0) { + DomainMmappedIO[domain] = linuxMapPci(-1, VIDMEM_MMIO, bridge, + 0, linuxGetIOSize(bridge), PCIIOC_MMAP_IS_IO); - /* ia64 can't mmap legacy IO port space */ - if (!DomainMmappedIO[domain]) - return Base; - } - else { /* legacy_io file exists, encode fd */ - DomainMmappedIO[domain] = (pointer)(fd << 24); - } - - return (IOADDRESS)DomainMmappedIO[domain] + Base; -} - -/* - * xf86ReadDomainMemory - copy from domain memory into a caller supplied buffer - */ -_X_EXPORT int -xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, unsigned char *Buf) -{ - unsigned char *ptr, *src; - ADDRESS offset; - unsigned long size; - int len, pagemask = getpagesize() - 1; - - unsigned int i, dom, bus, dev, func; - unsigned int fd; - char file[256]; - struct stat st; - - dom = PCI_DOM_FROM_TAG(Tag); - bus = PCI_BUS_NO_DOMAIN(PCI_BUS_FROM_TAG(Tag)); - dev = PCI_DEV_FROM_TAG(Tag); - func = PCI_FUNC_FROM_TAG(Tag); - sprintf(file, "/sys/bus/pci/devices/%04x:%02x:%02x.%1x/rom", - dom, bus, dev, func); - - /* - * If the caller wants the ROM and the sysfs rom interface exists, - * try to use it instead of reading it from /proc/bus/pci. - */ - if (((Base & 0xfffff) == 0xC0000) && (stat(file, &st) == 0)) { - if ((fd = open(file, O_RDWR))) - Base = 0x0; - - /* enable the ROM first */ - write(fd, "1", 2); - lseek(fd, 0, SEEK_SET); - - len = min(Len, st.st_size); - - /* copy the ROM until we hit Len, EOF or read error */ - for (; len && (size = read(fd, Buf, len)) > 0 ; Buf+=size, len-=size) - ; - - write(fd, "0", 2); - close(fd); - - return Len; + } + else { /* legacy_io file exists, encode fd */ + DomainMmappedIO[domain] = (pointer)(fd << 24); + } } - /* Ensure page boundaries */ - offset = Base & ~pagemask; - size = ((Base + Len + pagemask) & ~pagemask) - offset; - - ptr = xf86MapDomainMemory(-1, VIDMEM_READONLY, Tag, offset, size); - - if (!ptr) - return -1; - - /* Using memcpy() here can hang the system */ - src = ptr + (Base - offset); - for (len = Len; len-- > 0;) - *Buf++ = *src++; - - xf86UnMapVidMem(-1, ptr, size); - - return Len; + return (IOADDRESS)DomainMmappedIO[domain]; } resPtr xf86BusAccWindowsFromOS(void) { - pciConfigPtr *ppPCI, pPCI; + struct pci_device *dev; + struct pci_device_iterator *iter; resPtr pRes = NULL; resRange range; - unsigned long io_size, mem_size; - int domain; - - if ((ppPCI = xf86scanpci(0))) { - for (; (pPCI = *ppPCI); ppPCI++) { - if ((pPCI->pci_base_class != PCI_CLASS_BRIDGE) || - (pPCI->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST)) - continue; - - domain = xf86GetPciDomain(pPCI->tag); - linuxGetSizes(pPCI->tag, &io_size, &mem_size); - - RANGE(range, 0, (ADDRESS)(mem_size - 1), - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - RANGE(range, 0, (IOADDRESS)(io_size - 1), - RANGE_TYPE(ResExcIoBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - - if (domain <= 0) - break; - } + iter = pci_id_match_iterator_create(& match_host_bridge); + while ((dev = pci_device_next(iter)) != NULL) { + const int domain = dev->domain; + const struct pciSizes * const sizes = linuxGetSizesStruct(dev); + + RANGE(range, 0, (ADDRESS)(sizes->mem_size - 1), + RANGE_TYPE(ResExcMemBlock, domain)); + pRes = xf86AddResToList(pRes, &range, -1); + + RANGE(range, 0, (IOADDRESS)(sizes->io_size - 1), + RANGE_TYPE(ResExcIoBlock, domain)); + pRes = xf86AddResToList(pRes, &range, -1); + + /* FIXME: The old code reserved domain 0 for a special purpose. The + * FIXME: new code just uses whatever domains the kernel tells it, + * FIXME: but there is no way to get a domain < 0. What should + * FIXME: happen here? + * + if (domain <= 0) + break; + */ } + pci_iterator_destroy(iter); + return pRes; } resPtr xf86PciBusAccWindowsFromOS(void) { - pciConfigPtr *ppPCI, pPCI; - resPtr pRes = NULL; - resRange range; - unsigned long io_size, mem_size; - int domain; - - if ((ppPCI = xf86scanpci(0))) { - for (; (pPCI = *ppPCI); ppPCI++) { - if ((pPCI->pci_base_class != PCI_CLASS_BRIDGE) || - (pPCI->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST)) - continue; - - domain = xf86GetPciDomain(pPCI->tag); - linuxGetSizes(pPCI->tag, &io_size, &mem_size); - - RANGE(range, 0, (ADDRESS)(mem_size - 1), - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - - RANGE(range, 0, (IOADDRESS)(io_size - 1), - RANGE_TYPE(ResExcIoBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - - if (domain <= 0) - break; - } - } - - return pRes; + return xf86BusAccWindowsFromOS(); } resPtr xf86AccResFromOS(resPtr pRes) { - pciConfigPtr *ppPCI, pPCI; + struct pci_device *dev; + struct pci_device_iterator *iter; resRange range; - unsigned long io_size, mem_size; - int domain; - - if ((ppPCI = xf86scanpci(0))) { - for (; (pPCI = *ppPCI); ppPCI++) { - if ((pPCI->pci_base_class != PCI_CLASS_BRIDGE) || - (pPCI->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST)) - continue; - - domain = xf86GetPciDomain(pPCI->tag); - linuxGetSizes(pPCI->tag, &io_size, &mem_size); - - /* - * At minimum, the top and bottom resources must be claimed, so - * that resources that are (or appear to be) unallocated can be - * relocated. - */ - RANGE(range, 0x00000000u, 0x0009ffffu, - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - RANGE(range, 0x000c0000u, 0x000effffu, - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - RANGE(range, 0x000f0000u, 0x000fffffu, - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - - RANGE(range, (ADDRESS)(mem_size - 1), (ADDRESS)(mem_size - 1), - RANGE_TYPE(ResExcMemBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - - RANGE(range, 0x00000000u, 0x00000000u, - RANGE_TYPE(ResExcIoBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - RANGE(range, (IOADDRESS)(io_size - 1), (IOADDRESS)(io_size - 1), - RANGE_TYPE(ResExcIoBlock, domain)); - pRes = xf86AddResToList(pRes, &range, -1); - - if (domain <= 0) - break; - } - } - - return pRes; -} - -#endif /* !INCLUDE_XF86_NO_DOMAIN */ - -int linuxPciHandleBIOS(PCITAG Tag, int basereg, unsigned char *buf, int len) -{ - unsigned int dom, bus, dev, func; - unsigned int fd; - char file[256]; - struct stat st; - int ret; - int sofar = 0; - - dom = PCI_DOM_FROM_TAG(Tag); - bus = PCI_BUS_NO_DOMAIN(PCI_BUS_FROM_TAG(Tag)); - dev = PCI_DEV_FROM_TAG(Tag); - func = PCI_FUNC_FROM_TAG(Tag); - sprintf(file, "/sys/bus/pci/devices/%04x:%02x:%02x.%1x/rom", - dom, bus, dev, func); - - if (stat(file, &st) == 0) - { - if ((fd = open(file, O_RDWR))) - basereg = 0x0; - - /* enable the ROM first */ - write(fd, "1", 2); - lseek(fd, 0, SEEK_SET); - do { - /* copy the ROM until we hit Len, EOF or read error */ - ret = read(fd, buf+sofar, len-sofar); - if (ret <= 0) - break; - sofar += ret; - } while (sofar < len); - - write(fd, "0", 2); - close(fd); - if (sofar < len) - xf86MsgVerb(X_INFO, 3, "Attempted to read BIOS %dKB from %s: got %dKB\n", len/1024, file, sofar/1024); - return sofar; - } - return 0; -} - -#ifdef __ia64__ -static PCITAG ia64linuxPciFindFirst(void); -static PCITAG ia64linuxPciFindNext(void); - -void -ia64linuxPciInit() -{ - struct stat st; - - linuxPciInit(); - - if (!stat("/proc/sgi_sn/licenseID", &st) && pciNumBuses) { - /* Be a little paranoid here and only use this code for Altix systems. - * It is generic, so it should work on any system, but depends on - * /proc/bus/pci entries for each domain/bus combination. Altix is - * guaranteed a recent enough kernel to have them. - */ - pciFindFirstFP = ia64linuxPciFindFirst; - pciFindNextFP = ia64linuxPciFindNext; - } -} - -static DIR *busdomdir; -static DIR *devdir; - -static PCITAG -ia64linuxPciFindFirst(void) -{ - busdomdir = opendir("/proc/bus/pci"); - devdir = NULL; - - return ia64linuxPciFindNext(); -} -static struct dirent *getnextbus(int *domain, int *bus) -{ - struct dirent *entry; - int dombus; - - for (;;) { - entry = readdir(busdomdir); - if (entry == NULL) { - *domain = 0; - *bus = 0; - closedir(busdomdir); - return NULL; - } - if (sscanf(entry->d_name, "%04x:%02x", domain, bus) != 2) - continue; - dombus = PCI_MAKE_BUS(*domain, *bus); - - if (pciNumBuses <= dombus) - pciNumBuses = dombus + 1; - if (!pciBusInfo[dombus]) { - pciBusInfo[dombus] = xnfalloc(sizeof(pciBusInfo_t)); - *pciBusInfo[dombus] = *pciBusInfo[0]; - } - - return entry; + iter = pci_id_match_iterator_create(& match_host_bridge); + while ((dev = pci_device_next(iter)) != NULL) { + const int domain = dev->domain; + const struct pciSizes * const sizes = linuxGetSizesStruct(dev); + + /* + * At minimum, the top and bottom resources must be claimed, so + * that resources that are (or appear to be) unallocated can be + * relocated. + */ + RANGE(range, 0x00000000u, 0x0009ffffu, + RANGE_TYPE(ResExcMemBlock, domain)); + pRes = xf86AddResToList(pRes, &range, -1); + RANGE(range, 0x000c0000u, 0x000effffu, + RANGE_TYPE(ResExcMemBlock, domain)); + pRes = xf86AddResToList(pRes, &range, -1); + RANGE(range, 0x000f0000u, 0x000fffffu, + RANGE_TYPE(ResExcMemBlock, domain)); + pRes = xf86AddResToList(pRes, &range, -1); + + RANGE(range, (ADDRESS)(sizes->mem_size - 1), + (ADDRESS)(sizes->mem_size - 1), + RANGE_TYPE(ResExcMemBlock, domain)); + pRes = xf86AddResToList(pRes, &range, -1); + + RANGE(range, 0x00000000u, 0x00000000u, + RANGE_TYPE(ResExcIoBlock, domain)); + pRes = xf86AddResToList(pRes, &range, -1); + RANGE(range, (IOADDRESS)(sizes->io_size - 1), + (IOADDRESS)(sizes->io_size - 1), + RANGE_TYPE(ResExcIoBlock, domain)); + pRes = xf86AddResToList(pRes, &range, -1); + + /* FIXME: The old code reserved domain 0 for a special purpose. The + * FIXME: new code just uses whatever domains the kernel tells it, + * FIXME: but there is no way to get a domain < 0. What should + * FIXME: happen here? + * + if (domain <= 0) + break; + */ } -} -static PCITAG -ia64linuxPciFindNext(void) -{ - struct dirent *entry; - char file[40]; - static int bus, dev, func, domain; - PCITAG pciDeviceTag; - CARD32 devid; - - for (;;) { - if (devdir == NULL) { - entry = getnextbus(&domain, &bus); - if (!entry) - return PCI_NOT_FOUND; - snprintf(file, 40, "/proc/bus/pci/%s", entry->d_name); - devdir = opendir(file); - if (!devdir) - return PCI_NOT_FOUND; - - } + pci_iterator_destroy(iter); - entry = readdir(devdir); - - if (entry == NULL) { - closedir(devdir); - devdir = NULL; - continue; - } - - if (sscanf(entry->d_name, "%02x . %01x", &dev, &func) == 2) { - CARD32 tmp; - int sec_bus, pri_bus; - unsigned char base_class, sub_class; - - int pciBusNum = PCI_MAKE_BUS(domain, bus); - pciDeviceTag = PCI_MAKE_TAG(pciBusNum, dev, func); - - /* - * Before checking for a specific devid, look for enabled - * PCI to PCI bridge devices. If one is found, create and - * initialize a bus info record (if one does not already exist). - */ - tmp = pciReadLong(pciDeviceTag, PCI_CLASS_REG); - base_class = PCI_CLASS_EXTRACT(tmp); - sub_class = PCI_SUBCLASS_EXTRACT(tmp); - if ((base_class == PCI_CLASS_BRIDGE) && - ((sub_class == PCI_SUBCLASS_BRIDGE_PCI) || - (sub_class == PCI_SUBCLASS_BRIDGE_CARDBUS))) { - tmp = pciReadLong(pciDeviceTag, PCI_PCI_BRIDGE_BUS_REG); - sec_bus = PCI_SECONDARY_BUS_EXTRACT(tmp, pciDeviceTag); - pri_bus = PCI_PRIMARY_BUS_EXTRACT(tmp, pciDeviceTag); -#ifdef DEBUGPCI - ErrorF("ia64linuxPciFindNext: pri_bus %d sec_bus %d\n", - pri_bus, sec_bus); -#endif - if (pciBusNum != pri_bus) { - /* Some bridges do not implement the primary bus register */ - if ((PCI_BUS_NO_DOMAIN(pri_bus) != 0) || - (sub_class != PCI_SUBCLASS_BRIDGE_CARDBUS)) - xf86Msg(X_WARNING, - "ia64linuxPciFindNext: primary bus mismatch on PCI" - " bridge 0x%08lx (0x%02x, 0x%02x)\n", - pciDeviceTag, pciBusNum, pri_bus); - pri_bus = pciBusNum; - } - if ((pri_bus < sec_bus) && (sec_bus < pciMaxBusNum) && - pciBusInfo[pri_bus]) { - /* - * Found a secondary PCI bus - */ - if (!pciBusInfo[sec_bus]) { - pciBusInfo[sec_bus] = xnfalloc(sizeof(pciBusInfo_t)); - - /* Copy parents settings... */ - *pciBusInfo[sec_bus] = *pciBusInfo[pri_bus]; - } - - /* ...but not everything same as parent */ - pciBusInfo[sec_bus]->primary_bus = pri_bus; - pciBusInfo[sec_bus]->secondary = TRUE; - pciBusInfo[sec_bus]->numDevices = 32; - - if (pciNumBuses <= sec_bus) - pciNumBuses = sec_bus + 1; - } - } - - devid = pciReadLong(pciDeviceTag, PCI_ID_REG); - if ((devid & pciDevidMask) == pciDevid) - /* Yes - Return it. Otherwise, next device */ - return pciDeviceTag; - } - } + return pRes; } -#endif +#endif /* !INCLUDE_XF86_NO_DOMAIN */ diff --git a/hw/xfree86/os-support/bus/netbsdPci.c b/hw/xfree86/os-support/bus/netbsdPci.c index ee52c89cc..760302752 100644 --- a/hw/xfree86/os-support/bus/netbsdPci.c +++ b/hw/xfree86/os-support/bus/netbsdPci.c @@ -79,8 +79,6 @@ netbsdPciInit() pciNumBuses = 1; pciBusInfo[0] = &netbsdPci0; - pciFindFirstFP = pciGenFindFirst; - pciFindNextFP = pciGenFindNext; /* use businfo to get the number of devs */ if (ioctl(devpci, PCI_IOC_BUSINFO, &pci_businfo) != 0) FatalError("netbsdPciInit: not a PCI bus device"); diff --git a/hw/xfree86/os-support/bus/sparcPci.c b/hw/xfree86/os-support/bus/sparcPci.c index 5dd6b9369..82b1d89b9 100644 --- a/hw/xfree86/os-support/bus/sparcPci.c +++ b/hw/xfree86/os-support/bus/sparcPci.c @@ -622,7 +622,7 @@ xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag, } _X_EXPORT IOADDRESS -xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag, +xf86MapLegacyIO(int ScreenNum, int Flags, PCITAG Tag, IOADDRESS Base, unsigned long Size) { sparcDomainPtr pDomain; @@ -632,7 +632,7 @@ xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag, !(pDomain = xf86DomainInfo[domain]) || (((unsigned long long)Base + (unsigned long long)Size) > pDomain->io_size)) - FatalError("xf86MapDomainIO() called with invalid parameters.\n"); + FatalError("xf86MapLegacyIO() called with invalid parameters.\n"); /* Permanently map all of I/O space */ if (!pDomain->io) { @@ -648,30 +648,6 @@ xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag, return (IOADDRESS)pDomain->io + Base; } -_X_EXPORT int -xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, unsigned char *Buf) -{ - unsigned char *ptr, *src; - ADDRESS offset; - unsigned long size; - int len; - - /* Ensure page boundaries */ - offset = Base & ~pagemask; - size = ((Base + Len + pagemask) & ~pagemask) - offset; - - ptr = xf86MapDomainMemory(-1, VIDMEM_READONLY, Tag, offset, size); - - /* Using memcpy() here hangs the system */ - src = ptr + (Base - offset); - for (len = Len; len-- > 0;) - *Buf++ = *src++; - - xf86UnMapVidMem(-1, ptr, size); - - return Len; -} - resPtr xf86BusAccWindowsFromOS(void) { diff --git a/hw/xfree86/os-support/bus/xf86Pci.h b/hw/xfree86/os-support/bus/xf86Pci.h index c444a0cd1..2b8a4f76b 100644 --- a/hw/xfree86/os-support/bus/xf86Pci.h +++ b/hw/xfree86/os-support/bus/xf86Pci.h @@ -106,8 +106,7 @@ #include <X11/Xarch.h> #include <X11/Xfuncproto.h> #include "misc.h" - -#define PCI_NOT_FOUND 0xFFFFFFFFU +#include <pciaccess.h> /* * PCI cfg space definitions (e.g. stuff right out of the PCI spec) @@ -172,19 +171,6 @@ #define PCI_SUBCLASS_PREHISTORIC_MISC 0x00 #define PCI_SUBCLASS_PREHISTORIC_VGA 0x01 -/* 0x01 mass storage subclasses */ -#define PCI_SUBCLASS_MASS_STORAGE_SCSI 0x00 -#define PCI_SUBCLASS_MASS_STORAGE_IDE 0x01 -#define PCI_SUBCLASS_MASS_STORAGE_FLOPPY 0x02 -#define PCI_SUBCLASS_MASS_STORAGE_IPI 0x03 -#define PCI_SUBCLASS_MASS_STORAGE_MISC 0x80 - -/* 0x02 network subclasses */ -#define PCI_SUBCLASS_NETWORK_ETHERNET 0x00 -#define PCI_SUBCLASS_NETWORK_TOKENRING 0x01 -#define PCI_SUBCLASS_NETWORK_FDDI 0x02 -#define PCI_SUBCLASS_NETWORK_MISC 0x80 - /* 0x03 display subclasses */ #define PCI_SUBCLASS_DISPLAY_VGA 0x00 #define PCI_SUBCLASS_DISPLAY_XGA 0x01 @@ -195,11 +181,6 @@ #define PCI_SUBCLASS_MULTIMEDIA_AUDIO 0x01 #define PCI_SUBCLASS_MULTIMEDIA_MISC 0x80 -/* 0x05 memory subclasses */ -#define PCI_SUBCLASS_MEMORY_RAM 0x00 -#define PCI_SUBCLASS_MEMORY_FLASH 0x01 -#define PCI_SUBCLASS_MEMORY_MISC 0x80 - /* 0x06 bridge subclasses */ #define PCI_SUBCLASS_BRIDGE_HOST 0x00 #define PCI_SUBCLASS_BRIDGE_ISA 0x01 @@ -213,33 +194,6 @@ #define PCI_SUBCLASS_BRIDGE_MISC 0x80 #define PCI_IF_BRIDGE_PCI_SUBTRACTIVE 0x01 -/* 0x07 communications controller subclasses */ -#define PCI_SUBCLASS_COMMUNICATIONS_SERIAL 0x00 -#define PCI_SUBCLASS_COMMUNICATIONS_PARALLEL 0x01 -#define PCI_SUBCLASS_COMMUNICATIONS_MULTISERIAL 0x02 -#define PCI_SUBCLASS_COMMUNICATIONS_MODEM 0x03 -#define PCI_SUBCLASS_COMMUNICATIONS_MISC 0x80 - -/* 0x08 generic system peripherals subclasses */ -#define PCI_SUBCLASS_SYSPERIPH_PIC 0x00 -#define PCI_SUBCLASS_SYSPERIPH_DMA 0x01 -#define PCI_SUBCLASS_SYSPERIPH_TIMER 0x02 -#define PCI_SUBCLASS_SYSPERIPH_RTC 0x03 -#define PCI_SUBCLASS_SYSPERIPH_HOTPCI 0x04 -#define PCI_SUBCLASS_SYSPERIPH_MISC 0x80 - -/* 0x09 input device subclasses */ -#define PCI_SUBCLASS_INPUT_KEYBOARD 0x00 -#define PCI_SUBCLASS_INPUT_DIGITIZER 0x01 -#define PCI_SUBCLASS_INPUT_MOUSE 0x02 -#define PCI_SUBCLASS_INPUT_SCANNER 0x03 -#define PCI_SUBCLASS_INPUT_GAMEPORT 0x04 -#define PCI_SUBCLASS_INPUT_MISC 0x80 - -/* 0x0a docking station subclasses */ -#define PCI_SUBCLASS_DOCKING_GENERIC 0x00 -#define PCI_SUBCLASS_DOCKING_MISC 0x80 - /* 0x0b processor subclasses */ #define PCI_SUBCLASS_PROCESSOR_386 0x00 #define PCI_SUBCLASS_PROCESSOR_486 0x01 @@ -249,101 +203,6 @@ #define PCI_SUBCLASS_PROCESSOR_MIPS 0x30 #define PCI_SUBCLASS_PROCESSOR_COPROC 0x40 -/* 0x0c serial bus controller subclasses */ -#define PCI_SUBCLASS_SERIAL_FIREWIRE 0x00 -#define PCI_SUBCLASS_SERIAL_ACCESS 0x01 -#define PCI_SUBCLASS_SERIAL_SSA 0x02 -#define PCI_SUBCLASS_SERIAL_USB 0x03 -#define PCI_SUBCLASS_SERIAL_FIBRECHANNEL 0x04 -#define PCI_SUBCLASS_SERIAL_SMBUS 0x05 - -/* 0x0d wireless controller subclasses */ -#define PCI_SUBCLASS_WIRELESS_IRDA 0x00 -#define PCI_SUBCLASS_WIRELESS_CONSUMER_IR 0x01 -#define PCI_SUBCLASS_WIRELESS_RF 0x02 -#define PCI_SUBCLASS_WIRELESS_MISC 0x80 - -/* 0x0e intelligent I/O controller subclasses */ -#define PCI_SUBCLASS_I2O_I2O 0x00 - -/* 0x0f satellite communications controller subclasses */ -#define PCI_SUBCLASS_SATELLITE_TV 0x01 -#define PCI_SUBCLASS_SATELLITE_AUDIO 0x02 -#define PCI_SUBCLASS_SATELLITE_VOICE 0x03 -#define PCI_SUBCLASS_SATELLITE_DATA 0x04 - -/* 0x10 encryption/decryption controller subclasses */ -#define PCI_SUBCLASS_CRYPT_NET_COMPUTING 0x00 -#define PCI_SUBCLASS_CRYPT_ENTERTAINMENT 0x10 -#define PCI_SUBCLASS_CRYPT_MISC 0x80 - -/* 0x11 data acquisition and signal processing controller subclasses */ -#define PCI_SUBCLASS_DATAACQ_DPIO 0x00 -#define PCI_SUBCLASS_DATAACQ_MISC 0x80 - - -/* Header */ -#define PCI_HEADER_MISC 0x0c -#define PCI_HEADER_MULTIFUNCTION 0x00800000 - -/* Interrupt configration register */ -#define PCI_INTERRUPT_REG 0x3c -#define PCI_INTERRUPT_PIN_MASK 0x0000ff00 -#define PCI_INTERRUPT_PIN_EXTRACT(x) \ - ((((x) & PCI_INTERRUPT_PIN_MASK) >> 8) & 0xff) -#define PCI_INTERRUPT_PIN_NONE 0x00 -#define PCI_INTERRUPT_PIN_A 0x01 -#define PCI_INTERRUPT_PIN_B 0x02 -#define PCI_INTERRUPT_PIN_C 0x03 -#define PCI_INTERRUPT_PIN_D 0x04 - -#define PCI_INTERRUPT_LINE_MASK 0x000000ff -#define PCI_INTERRUPT_LINE_EXTRACT(x) \ - ((((x) & PCI_INTERRUPT_LINE_MASK) >> 0) & 0xff) -#define PCI_INTERRUPT_LINE_INSERT(x,v) \ - (((x) & ~PCI_INTERRUPT_LINE_MASK) | ((v) << 0)) - -/* Base registers */ -#define PCI_MAP_REG_START 0x10 -#define PCI_MAP_REG_END 0x28 -#define PCI_MAP_ROM_REG 0x30 - -#define PCI_MAP_MEMORY 0x00000000 -#define PCI_MAP_IO 0x00000001 - -#define PCI_MAP_MEMORY_TYPE 0x00000007 -#define PCI_MAP_IO_TYPE 0x00000003 - -#define PCI_MAP_MEMORY_TYPE_32BIT 0x00000000 -#define PCI_MAP_MEMORY_TYPE_32BIT_1M 0x00000002 -#define PCI_MAP_MEMORY_TYPE_64BIT 0x00000004 -#define PCI_MAP_MEMORY_TYPE_MASK 0x00000006 -#define PCI_MAP_MEMORY_CACHABLE 0x00000008 -#define PCI_MAP_MEMORY_ATTR_MASK 0x0000000e -#define PCI_MAP_MEMORY_ADDRESS_MASK 0xfffffff0 - -#define PCI_MAP_IO_ATTR_MASK 0x00000003 - -#define PCI_MAP_IS_IO(b) ((b) & PCI_MAP_IO) -#define PCI_MAP_IS_MEM(b) (!PCI_MAP_IS_IO(b)) - -#define PCI_MAP_IS64BITMEM(b) \ - (((b) & PCI_MAP_MEMORY_TYPE) == PCI_MAP_MEMORY_TYPE_64BIT) - -#define PCIGETMEMORY(b) ((b) & PCI_MAP_MEMORY_ADDRESS_MASK) -#define PCIGETMEMORY64HIGH(b) (*((CARD32*)&(b) + 1)) -#define PCIGETMEMORY64(b) \ - (PCIGETMEMORY(b) | ((CARD64)PCIGETMEMORY64HIGH(b) << 32)) - -#define PCI_MAP_IO_ADDRESS_MASK 0xfffffffc - -#define PCIGETIO(b) ((b) & PCI_MAP_IO_ADDRESS_MASK) - -#define PCI_MAP_ROM_DECODE_ENABLE 0x00000001 -#define PCI_MAP_ROM_ADDRESS_MASK 0xfffff800 - -#define PCIGETROM(b) ((b) & PCI_MAP_ROM_ADDRESS_MASK) - /* PCI-PCI bridge mapping registers */ #define PCI_PCI_BRIDGE_BUS_REG 0x18 #define PCI_SUBORDINATE_BUS_MASK 0x00ff0000 @@ -354,12 +213,6 @@ #define PCI_PCI_BRIDGE_MEM_REG 0x20 #define PCI_PCI_BRIDGE_PMEM_REG 0x24 -#define PCI_PPB_IOBASE_EXTRACT(x) (((x) << 8) & 0xFF00) -#define PCI_PPB_IOLIMIT_EXTRACT(x) (((x) << 0) & 0xFF00) - -#define PCI_PPB_MEMBASE_EXTRACT(x) (((x) << 16) & 0xFFFF0000) -#define PCI_PPB_MEMLIMIT_EXTRACT(x) (((x) << 0) & 0xFFFF0000) - #define PCI_PCI_BRIDGE_CONTROL_REG 0x3E #define PCI_PCI_BRIDGE_PARITY_EN 0x01 #define PCI_PCI_BRIDGE_SERR_EN 0x02 @@ -368,31 +221,6 @@ #define PCI_PCI_BRIDGE_MASTER_ABORT_EN 0x20 #define PCI_PCI_BRIDGE_SECONDARY_RESET 0x40 #define PCI_PCI_BRIDGE_FAST_B2B_EN 0x80 -/* header type 2 extensions */ -#define PCI_CB_BRIDGE_CTL_CB_RESET 0x40 /* CardBus reset */ -#define PCI_CB_BRIDGE_CTL_16BIT_INT 0x80 /* Enable interrupt for 16-bit cards */ -#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100 -#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200 -#define PCI_CB_BRIDGE_CTL_POST_WRITES 0x400 - -#define PCI_CB_SEC_STATUS_REG 0x16 /* Secondary status */ -#define PCI_CB_PRIMARY_BUS_REG 0x18 /* PCI bus number */ -#define PCI_CB_CARD_BUS_REG 0x19 /* CardBus bus number */ -#define PCI_CB_SUBORDINATE_BUS_REG 0x1a /* Subordinate bus number */ -#define PCI_CB_LATENCY_TIMER_REG 0x1b /* CardBus latency timer */ -#define PCI_CB_MEM_BASE_0_REG 0x1c -#define PCI_CB_MEM_LIMIT_0_REG 0x20 -#define PCI_CB_MEM_BASE_1_REG 0x24 -#define PCI_CB_MEM_LIMIT_1_REG 0x28 -#define PCI_CB_IO_BASE_0_REG 0x2c -#define PCI_CB_IO_LIMIT_0_REG 0x30 -#define PCI_CB_IO_BASE_1_REG 0x34 -#define PCI_CB_IO_LIMIT_1_REG 0x38 -#define PCI_CB_BRIDGE_CONTROL_REG 0x3E - -#define PCI_CB_IO_RANGE_MASK ~0x03 -#define PCI_CB_IOBASE(x) (x & PCI_CB_IO_RANGE_MASK) -#define PCI_CB_IOLIMIT(x) ((x & PCI_CB_IO_RANGE_MASK) + 3) /* Subsystem identification register */ #define PCI_SUBSYSTEM_ID_REG 0x2c @@ -410,258 +238,6 @@ typedef unsigned long ADDRESS; /* Memory/PCI address */ typedef unsigned long IOADDRESS; /* Must be large enough for a pointer */ typedef unsigned long PCITAG; -/* - * PCI configuration space - */ -typedef struct pci_cfg_regs { - /* start of official PCI config space header */ - union { /* Offset 0x0 - 0x3 */ - CARD32 device_vendor; - struct { -#if X_BYTE_ORDER == X_BIG_ENDIAN - CARD16 device; - CARD16 vendor; -#else - CARD16 vendor; - CARD16 device; -#endif - } dv; - } dv_id; - - union { /* Offset 0x4 - 0x8 */ - CARD32 status_command; - struct { -#if X_BYTE_ORDER == X_BIG_ENDIAN - CARD16 status; - CARD16 command; -#else - CARD16 command; - CARD16 status; -#endif - } sc; - } stat_cmd; - - union { /* Offset 0x8 - 0xb */ - CARD32 class_revision; - struct { -#if X_BYTE_ORDER == X_BIG_ENDIAN - CARD8 base_class; - CARD8 sub_class; - CARD8 prog_if; - CARD8 rev_id; -#else - CARD8 rev_id; - CARD8 prog_if; - CARD8 sub_class; - CARD8 base_class; -#endif - } cr; - } class_rev; - - union { /* Offset 0xc - 0xf */ - CARD32 bist_header_latency_cache; - struct { -#if X_BYTE_ORDER == X_BIG_ENDIAN - CARD8 bist; - CARD8 header_type; - CARD8 latency_timer; - CARD8 cache_line_size; -#else - CARD8 cache_line_size; - CARD8 latency_timer; - CARD8 header_type; - CARD8 bist; -#endif - } bhlc; - } bhlc; - union { /* Offset 0x10 - 0x3b */ - struct { /* header type 2 */ - CARD32 cg_rsrvd1; /* 0x10 */ -#if X_BYTE_ORDER == X_BIG_ENDIAN - CARD16 secondary_status; /* 0x16 */ - CARD16 cg_rsrvd2; /* 0x14 */ - - union { - CARD32 cg_bus_reg; - struct { - CARD8 latency_timer; /* 0x1b */ - CARD8 subordinate_bus_number; /* 0x1a */ - CARD8 cardbus_bus_number; /* 0x19 */ - CARD8 primary_bus_number; /* 0x18 */ - } cgbr; - } cgbr; -#else - CARD16 cg_rsrvd2; /* 0x14 */ - CARD16 secondary_status; /* 0x16 */ - - union { - CARD32 cg_bus_reg; - struct { - CARD8 primary_bus_number; /* 0x18 */ - CARD8 cardbus_bus_number; /* 0x19 */ - CARD8 subordinate_bus_number; /* 0x1a */ - CARD8 latency_timer; /* 0x1b */ - } cgbr; - } cgbr; -#endif - CARD32 mem_base0; /* 0x1c */ - CARD32 mem_limit0; /* 0x20 */ - CARD32 mem_base1; /* 0x24 */ - CARD32 mem_limit1; /* 0x28 */ - CARD32 io_base0; /* 0x2c */ - CARD32 io_limit0; /* 0x30 */ - CARD32 io_base1; /* 0x34 */ - CARD32 io_limit1; /* 0x38 */ - } cg; - struct { - union { /* Offset 0x10 - 0x27 */ - struct { /* header type 0 */ - CARD32 dv_base0; - CARD32 dv_base1; - CARD32 dv_base2; - CARD32 dv_base3; - CARD32 dv_base4; - CARD32 dv_base5; - } dv; - struct { /* header type 1 */ - CARD32 bg_rsrvd[2]; -#if X_BYTE_ORDER == X_BIG_ENDIAN - union { - CARD32 pp_bus_reg; - struct { - CARD8 secondary_latency_timer; - CARD8 subordinate_bus_number; - CARD8 secondary_bus_number; - CARD8 primary_bus_number; - } ppbr; - } ppbr; - - CARD16 secondary_status; - CARD8 io_limit; - CARD8 io_base; - - CARD16 mem_limit; - CARD16 mem_base; - - CARD16 prefetch_mem_limit; - CARD16 prefetch_mem_base; -#else - union { - CARD32 pp_bus_reg; - struct { - CARD8 primary_bus_number; - CARD8 secondary_bus_number; - CARD8 subordinate_bus_number; - CARD8 secondary_latency_timer; - } ppbr; - } ppbr; - - CARD8 io_base; - CARD8 io_limit; - CARD16 secondary_status; - - CARD16 mem_base; - CARD16 mem_limit; - - CARD16 prefetch_mem_base; - CARD16 prefetch_mem_limit; -#endif - } bg; - } bc; - union { /* Offset 0x28 - 0x2b */ - CARD32 rsvd1; - CARD32 pftch_umem_base; - CARD32 cardbus_cis_ptr; - } um_c_cis; - union { /* Offset 0x2c - 0x2f */ - CARD32 subsys_card_vendor; - CARD32 pftch_umem_limit; - CARD32 rsvd2; - struct { -#if X_BYTE_ORDER == X_BIG_ENDIAN - CARD16 subsys_card; - CARD16 subsys_vendor; -#else - CARD16 subsys_vendor; - CARD16 subsys_card; -#endif - } ssys; - } um_ssys_id; - union { /* Offset 0x30 - 0x33 */ - CARD32 baserom; - struct { -#if X_BYTE_ORDER == X_BIG_ENDIAN - CARD16 io_ulimit; - CARD16 io_ubase; -#else - CARD16 io_ubase; - CARD16 io_ulimit; -#endif - } b_u_io; - } uio_rom; - struct { - CARD32 rsvd3; /* Offset 0x34 - 0x37 */ - CARD32 rsvd4; /* Offset 0x38 - 0x3b */ - } rsvd; - } cd; - } cx; - union { /* Offset 0x3c - 0x3f */ - union { /* header type 0 */ - CARD32 max_min_ipin_iline; - struct { -#if X_BYTE_ORDER == X_BIG_ENDIAN - CARD8 max_lat; - CARD8 min_gnt; - CARD8 int_pin; - CARD8 int_line; -#else - CARD8 int_line; - CARD8 int_pin; - CARD8 min_gnt; - CARD8 max_lat; -#endif - } mmii; - } mmii; - struct { /* header type 1 */ -#if X_BYTE_ORDER == X_BIG_ENDIAN - CARD16 bridge_control; /* upper 8 bits reserved */ - CARD8 rsvd2; - CARD8 rsvd1; -#else - CARD8 rsvd1; - CARD8 rsvd2; - CARD16 bridge_control; /* upper 8 bits reserved */ -#endif - } bctrl; - } bm; - union { /* Offset 0x40 - 0xff */ - CARD32 dwords[48]; - CARD8 bytes[192]; - } devspf; -} pciCfgRegs; - -typedef union pci_cfg_spc { - pciCfgRegs regs; - CARD32 dwords[256/sizeof(CARD32)]; - CARD8 bytes[256/sizeof(CARD8)]; -} pciCfgSpc; - -/* - * Data structure returned by xf86scanpci including contents of - * PCI config space header - */ -typedef struct pci_device { - PCITAG tag; - int busnum; - int devnum; - int funcnum; - pciCfgSpc cfgspc; - int basesize[7]; /* number of bits in base addr allocations */ - Bool minBasesize; - pointer businfo; /* pointer to secondary's bus info structure */ - Bool fakeDevice; /* Device added by system chipset support */ -} pciDevice, *pciConfigPtr; - typedef enum { PCI_MEM, PCI_MEM_SIZE, @@ -673,130 +249,17 @@ typedef enum { PCI_IO_SPARSE_MASK } PciAddrType; -#define pci_device_vendor cfgspc.regs.dv_id.device_vendor -#define pci_vendor cfgspc.regs.dv_id.dv.vendor -#define pci_device cfgspc.regs.dv_id.dv.device -#define pci_status_command cfgspc.regs.stat_cmd.status_command -#define pci_command cfgspc.regs.stat_cmd.sc.command -#define pci_status cfgspc.regs.stat_cmd.sc.status -#define pci_class_revision cfgspc.regs.class_rev.class_revision -#define pci_rev_id cfgspc.regs.class_rev.cr.rev_id -#define pci_prog_if cfgspc.regs.class_rev.cr.prog_if -#define pci_sub_class cfgspc.regs.class_rev.cr.sub_class -#define pci_base_class cfgspc.regs.class_rev.cr.base_class -#define pci_bist_header_latency_cache cfgspc.regs.bhlc.bist_header_latency_cache -#define pci_cache_line_size cfgspc.regs.bhlc.bhlc.cache_line_size -#define pci_latency_timer cfgspc.regs.bhlc.bhlc.latency_timer -#define pci_header_type cfgspc.regs.bhlc.bhlc.header_type -#define pci_bist cfgspc.regs.bhlc.bhlc.bist -#define pci_cb_secondary_status cfgspc.regs.cx.cg.secondary_status -#define pci_cb_bus_register cfgspc.regs.cx.cg.cgbr.cg_bus_reg -#define pci_cb_primary_bus_number cfgspc.regs.cx.cg.cgbr.cgbr.primary_bus_number -#define pci_cb_cardbus_bus_number cfgspc.regs.cx.cg.cgbr.cgbr.cardbus_bus_number -#define pci_cb_subordinate_bus_number cfgspc.regs.cx.cg.cgbr.cgbr.subordinate_bus_number -#define pci_cb_latency_timer cfgspc.regs.cx.cg.cgbr.cgbr.latency_timer -#define pci_cb_membase0 cfgspc.regs.cx.cg.mem_base0 -#define pci_cb_memlimit0 cfgspc.regs.cx.cg.mem_limit0 -#define pci_cb_membase1 cfgspc.regs.cx.cg.mem_base1 -#define pci_cb_memlimit1 cfgspc.regs.cx.cg.mem_limit1 -#define pci_cb_iobase0 cfgspc.regs.cx.cg.io_base0 -#define pci_cb_iolimit0 cfgspc.regs.cx.cg.io_limit0 -#define pci_cb_iobase1 cfgspc.regs.cx.cg.io_base1 -#define pci_cb_iolimit1 cfgspc.regs.cx.cg.io_limit1 -#define pci_base0 cfgspc.regs.cx.cd.bc.dv.dv_base0 -#define pci_base1 cfgspc.regs.cx.cd.bc.dv.dv_base1 -#define pci_base2 cfgspc.regs.cx.cd.bc.dv.dv_base2 -#define pci_base3 cfgspc.regs.cx.cd.bc.dv.dv_base3 -#define pci_base4 cfgspc.regs.cx.cd.bc.dv.dv_base4 -#define pci_base5 cfgspc.regs.cx.cd.bc.dv.dv_base5 -#define pci_cardbus_cis_ptr cfgspc.regs.cx.cd.umem_c_cis.cardbus_cis_ptr -#define pci_subsys_card_vendor cfgspc.regs.cx.cd.um_ssys_id.subsys_card_vendor -#define pci_subsys_vendor cfgspc.regs.cx.cd.um_ssys_id.ssys.subsys_vendor -#define pci_subsys_card cfgspc.regs.cx.cd.um_ssys_id.ssys.subsys_card -#define pci_baserom cfgspc.regs.cx.cd.uio_rom.baserom -#define pci_pp_bus_register cfgspc.regs.cx.cd.bc.bg.ppbr.pp_bus_reg -#define pci_primary_bus_number cfgspc.regs.cx.cd.bc.bg.ppbr.ppbr.primary_bus_number -#define pci_secondary_bus_number cfgspc.regs.cx.cd.bc.bg.ppbr.ppbr.secondary_bus_number -#define pci_subordinate_bus_number cfgspc.regs.cx.cd.bc.bg.ppbr.ppbr.subordinate_bus_number -#define pci_secondary_latency_timer cfgspc.regs.cx.cd.bc.bg.ppbr.ppbr.secondary_latency_timer -#define pci_io_base cfgspc.regs.cx.cd.bc.bg.io_base -#define pci_io_limit cfgspc.regs.cx.cd.bc.bg.io_limit -#define pci_secondary_status cfgspc.regs.cx.cd.bc.bg.secondary_status -#define pci_mem_base cfgspc.regs.cx.cd.bc.bg.mem_base -#define pci_mem_limit cfgspc.regs.cx.cd.bc.bg.mem_limit -#define pci_prefetch_mem_base cfgspc.regs.cx.cd.bc.bg.prefetch_mem_base -#define pci_prefetch_mem_limit cfgspc.regs.cx.cd.bc.bg.prefetch_mem_limit -#define pci_rsvd1 cfgspc.regs.cx.cd.um_c_cis.rsvd1 -#define pci_rsvd2 cfgspc.regs.cx.cd.um_ssys_id.rsvd2 -#define pci_prefetch_upper_mem_base cfgspc.regs.cx.cd.um_c_cis.pftch_umem_base -#define pci_prefetch_upper_mem_limit cfgspc.regs.cx.cd.um_ssys_id.pftch_umem_limit -#define pci_upper_io_base cfgspc.regs.cx.cd.uio_rom.b_u_io.io_ubase -#define pci_upper_io_limit cfgspc.regs.cx.cd.uio_rom.b_u_io.io_ulimit -#define pci_int_line cfgspc.regs.bm.mmii.mmii.int_line -#define pci_int_pin cfgspc.regs.bm.mmii.mmii.int_pin -#define pci_min_gnt cfgspc.regs.bm.mmii.mmii.min_gnt -#define pci_max_lat cfgspc.regs.bm.mmii.mmii.max_lat -#define pci_max_min_ipin_iline cfgspc.regs.bm.mmii.max_min_ipin_iline -#define pci_bridge_control cfgspc.regs.bm.bctrl.bridge_control -#define pci_user_config cfgspc.regs.devspf.dwords[0] -#define pci_user_config_0 cfgspc.regs.devspf.bytes[0] -#define pci_user_config_1 cfgspc.regs.devspf.bytes[1] -#define pci_user_config_2 cfgspc.regs.devspf.bytes[2] -#define pci_user_config_3 cfgspc.regs.devspf.bytes[3] - -typedef enum { - PCI_BIOS_PC = 0, - PCI_BIOS_OPEN_FIRMWARE, - PCI_BIOS_HP_PA_RISC, - PCI_BIOS_OTHER -} PciBiosType; /* Public PCI access functions */ -void pciInit(void); -PCITAG pciFindFirst(CARD32 id, CARD32 mask); -PCITAG pciFindNext(void); -CARD32 pciReadLong(PCITAG tag, int offset); -CARD16 pciReadWord(PCITAG tag, int offset); -CARD8 pciReadByte(PCITAG tag, int offset); -void pciWriteLong(PCITAG tag, int offset, CARD32 val); -void pciWriteWord(PCITAG tag, int offset, CARD16 val); -void pciWriteByte(PCITAG tag, int offset, CARD8 val); -void pciSetBitsLong(PCITAG tag, int offset, CARD32 mask, CARD32 val); -void pciSetBitsByte(PCITAG tag, int offset, CARD8 mask, CARD8 val); ADDRESS pciBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr); -ADDRESS pciHostAddrToBusAddr(PCITAG tag, PciAddrType type, ADDRESS addr); PCITAG pciTag(int busnum, int devnum, int funcnum); -PCITAG pciDomTag(int domnum, int busnum, int devnum, int funcnum); -int pciGetBaseSize(PCITAG tag, int indx, Bool destructive, Bool *min); -CARD32 pciCheckForBrokenBase(PCITAG tag,int basereg); -pointer xf86MapPciMem(int ScreenNum, int Flags, PCITAG Tag, - ADDRESS Base, unsigned long Size); -int xf86ReadPciBIOS(unsigned long Offset, PCITAG Tag, int basereg, - unsigned char *Buf, int Len); -pciConfigPtr *xf86scanpci(int flags); -pciConfigPtr xf86GetPciConfigFromTag(PCITAG Tag); +Bool xf86scanpci(void); extern int pciNumBuses; /* Domain access functions. Some of these probably shouldn't be public */ -int xf86GetPciDomain(PCITAG tag); -pointer xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag, - ADDRESS Base, unsigned long Size); -IOADDRESS xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag, - IOADDRESS Base, unsigned long Size); -int xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, - unsigned char *Buf); - -typedef enum { - ROM_BASE_PRESET = -2, - ROM_BASE_BIOS, - ROM_BASE_MEM0 = 0, - ROM_BASE_MEM1, - ROM_BASE_MEM2, - ROM_BASE_MEM3, - ROM_BASE_MEM4, - ROM_BASE_MEM5, - ROM_BASE_FIND -} romBaseSource; +pointer xf86MapDomainMemory(int ScreenNum, int Flags, struct pci_device *dev, + ADDRESS Base, unsigned long Size); +IOADDRESS xf86MapLegacyIO(struct pci_device *dev); #endif /* _XF86PCI_H */ diff --git a/hw/xfree86/os-support/bus/zx1PCI.c b/hw/xfree86/os-support/bus/zx1PCI.c index d83bc9116..561fbd9f7 100644 --- a/hw/xfree86/os-support/bus/zx1PCI.c +++ b/hw/xfree86/os-support/bus/zx1PCI.c @@ -1073,13 +1073,13 @@ xf86PostScanZX1(void) xf86MsgVerb(X_INFO, 2, "PCI: BusID 0x%.2x,0x%02x,0x%1x " "ID 0x%04x,0x%04x Rev 0x%02x Class 0x%02x,0x%02x\n", pPCI->busnum, pPCI->devnum, pPCI->funcnum, - pPCI->pci_vendor, pPCI->pci_device, pPCI->pci_rev_id, + pPCI->pci_vendor, pPCI->_pci_device, pPCI->pci_rev_id, pPCI->pci_base_class, pPCI->pci_sub_class); #else xf86MsgVerb(X_INFO, 2, "PCI: %.2x:%02x:%1x: chip %04x,%04x" " card %04x,%04x rev %02x class %02x,%02x,%02x hdr %02x\n", pPCI->busnum, pPCI->devnum, pPCI->funcnum, - pPCI->pci_vendor, pPCI->pci_device, + pPCI->pci_vendor, pPCI->_pci_device, pPCI->pci_subsys_vendor, pPCI->pci_subsys_card, pPCI->pci_rev_id, pPCI->pci_base_class, pPCI->pci_sub_class, pPCI->pci_prog_if, @@ -1122,13 +1122,13 @@ xf86PostScanZX1(void) xf86MsgVerb(X_INFO, 2, "PCI: BusID 0x%.2x,0x%02x,0x%1x " "ID 0x%04x,0x%04x Rev 0x%02x Class 0x%02x,0x%02x\n", pPCI->busnum, pPCI->devnum, pPCI->funcnum, - pPCI->pci_vendor, pPCI->pci_device, pPCI->pci_rev_id, + pPCI->pci_vendor, pPCI->_pci_device, pPCI->pci_rev_id, pPCI->pci_base_class, pPCI->pci_sub_class); #else xf86MsgVerb(X_INFO, 2, "PCI: %.2x:%02x:%1x: chip %04x,%04x" " card %04x,%04x rev %02x class %02x,%02x,%02x hdr %02x\n", pPCI->busnum, pPCI->devnum, pPCI->funcnum, - pPCI->pci_vendor, pPCI->pci_device, + pPCI->pci_vendor, pPCI->_pci_device, pPCI->pci_subsys_vendor, pPCI->pci_subsys_card, pPCI->pci_rev_id, pPCI->pci_base_class, pPCI->pci_sub_class, pPCI->pci_prog_if, diff --git a/hw/xfree86/os-support/linux/int10/linux.c b/hw/xfree86/os-support/linux/int10/linux.c index d8f4633de..574843473 100644 --- a/hw/xfree86/os-support/linux/int10/linux.c +++ b/hw/xfree86/os-support/linux/int10/linux.c @@ -89,7 +89,6 @@ xf86ExtendedInitInt10(int entityIndex, int Flags) memType cs; legacyVGARec vga; Bool videoBiosMapped = FALSE; - pciVideoPtr pvp; if (int10Generation != serverGeneration) { counter = 0; @@ -151,8 +150,8 @@ xf86ExtendedInitInt10(int entityIndex, int Flags) pInt = (xf86Int10InfoPtr)xnfcalloc(1, sizeof(xf86Int10InfoRec)); pInt->scrnIndex = screen; pInt->entityIndex = entityIndex; - pvp = xf86GetPciInfoForEntity(entityIndex); - if (pvp) pInt->Tag = pciTag(pvp->bus, pvp->device, pvp->func); + pInt->dev = xf86GetPciInfoForEntity(entityIndex); + if (!xf86Int10ExecSetup(pInt)) goto error0; pInt->mem = &linuxMem; @@ -275,12 +274,17 @@ xf86ExtendedInitInt10(int entityIndex, int Flags) switch (location_type) { case BUS_PCI: { - const int pci_entity = pInt->entityIndex; - - if (!mapPciRom(pci_entity, (unsigned char *)(V_BIOS))) { - xf86DrvMsg(screen, X_ERROR, "Cannot read V_BIOS\n"); + int err; + struct pci_device *rom_device = + xf86GetPciInfoForEntity(pInt->entityIndex); + + err = pci_device_read_rom(rom_device, (unsigned char *)(V_BIOS)); + if (err) { + xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (%s)\n", + strerror(err)); goto error3; } + pInt->BIOSseg = V_BIOS >> 4; break; } diff --git a/hw/xfree86/os-support/linux/lnx_axp.c b/hw/xfree86/os-support/linux/lnx_axp.c index e255118cc..a8ad161b6 100644 --- a/hw/xfree86/os-support/linux/lnx_axp.c +++ b/hw/xfree86/os-support/linux/lnx_axp.c @@ -183,7 +183,7 @@ _alpha_iobase_query(unsigned flags, int hose, int bus, int devfn) /* * Only take over the inx/outx functions if this is a dense I/O * system *and* addressing domains are being used. The dense I/O - * routines expect I/O to be mapped (as done in xf86MapDomainIO) + * routines expect I/O to be mapped (as done in xf86MapLegacyIO) */ _alpha_outb = _dense_outb; _alpha_outw = _dense_outw; diff --git a/hw/xfree86/os-support/linux/lnx_pci.c b/hw/xfree86/os-support/linux/lnx_pci.c index a95703899..8415aa01c 100644 --- a/hw/xfree86/os-support/linux/lnx_pci.c +++ b/hw/xfree86/os-support/linux/lnx_pci.c @@ -13,6 +13,7 @@ #define XF86_OS_PRIVS #include "xf86_OSproc.h" #include "xf86Pci.h" +#include "Pci.h" #ifdef __sparc__ #define PCIADDR_TYPE long long @@ -162,8 +163,8 @@ xf86GetPciSizeFromOS(PCITAG tag, int index, int* bits) return FALSE; for (device = xf86OSLinuxPCIDevs; device; device = device->next) { - if (tag == pciDomTag (device->domain, device->bus, - device->dev, device->fn)) { + if (tag == PCI_MAKE_TAG(PCI_MAKE_BUS(device->domain, device->bus), + device->dev, device->fn)) { if (device->size[index] != 0) { Size = device->size[index] - ((PCIADDR_TYPE) 1); while (Size & ((PCIADDR_TYPE) 0x01)) { @@ -197,8 +198,8 @@ xf86GetPciOffsetFromOS(PCITAG tag, int index, unsigned long* bases) return FALSE; for (device = xf86OSLinuxPCIDevs; device; device = device->next) { - if (tag == pciDomTag (device->domain, device->bus, - device->dev, device->fn)) { + if (tag == PCI_MAKE_TAG(PCI_MAKE_BUS(device->domain, device->bus), + device->dev, device->fn)) { /* return the offset for the index requested */ *bases = device->offset[index]; return TRUE; @@ -215,6 +216,7 @@ xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base) { unsigned int ndx; struct pci_dev *device; + struct pci_device *dev; if (!xf86OSLinuxPCIDevs) { xf86OSLinuxPCIDevs = xf86OSLinuxGetPciDevs(); @@ -224,25 +226,31 @@ xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base) } for (device = xf86OSLinuxPCIDevs; device; device = device->next) { - if (tag == pciDomTag (device->domain, device->bus, - device->dev, device->fn)) { + dev = pci_device_find_by_slot(device->domain, device->bus, + device->dev, device->fn); + if (dev != NULL) { /* ok now look through all the BAR values of this device */ - pciConfigPtr pDev = xf86GetPciConfigFromTag(tag); - for (ndx=0; ndx<7; ndx++) { - unsigned long savePtr, flagMask; - if (ndx == 6) - savePtr = pDev->pci_baserom; - else /* this the ROM bar */ - savePtr = (&pDev->pci_base0)[ndx]; - /* Ignore unset base addresses. The kernel may - * have reported non-zero size and address even - * if they are disabled (e.g. disabled ROM BAR). + uint32_t savePtr; + uint32_t flagMask; + + /* The ROM BAR isn't with the other BARs. + */ + const pciaddr_t offset = (ndx == 6) + ? (4 * 12) : (4 * ndx) + 16; + + pci_device_cfg_read_u32(dev, &savePtr, offset); + + /* Ignore unset base addresses. The kernel may have reported + * non-zero size and address even if they are disabled (e.g., + * disabled ROM BAR). */ if (savePtr == 0) continue; + /* Remove memory attribute bits, different for IO - * and memory ranges. */ + * and memory ranges. + */ flagMask = (savePtr & 0x1) ? ~0x3UL : ~0xFUL; savePtr &= flagMask; @@ -252,7 +260,7 @@ xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base) } } } - }; + } return 0; } diff --git a/hw/xfree86/os-support/shared/ia64Pci.c b/hw/xfree86/os-support/shared/ia64Pci.c index 708840c71..45522e933 100644 --- a/hw/xfree86/os-support/shared/ia64Pci.c +++ b/hw/xfree86/os-support/shared/ia64Pci.c @@ -55,7 +55,7 @@ * space of a given PCI domain; reads and writes are used to do port I/O. * The file descriptor for the file is stored in the upper bits of the * value passed in by the caller, and is created and populated by - * xf86MapDomainIO. + * xf86MapLegacyIO. * * If the legacy_io interface doesn't exist, we fall back to the glibc in/out * routines, which are prefixed by an underscore (e.g. _outb). diff --git a/hw/xfree86/scanpci/Makefile.am b/hw/xfree86/scanpci/Makefile.am deleted file mode 100644 index d4d9da222..000000000 --- a/hw/xfree86/scanpci/Makefile.am +++ /dev/null @@ -1,32 +0,0 @@ -module_LTLIBRARIES = libscanpci.la libpcidata.la - -libpcidata_la_LDFLAGS = -avoid-version -libscanpci_la_LDFLAGS = -avoid-version - -libpcidata_la_SOURCES = xf86PciData.c -libscanpci_la_SOURCES = xf86ScanPci.c - -INCLUDES = $(XORG_INCS) - -AM_CFLAGS = $(DIX_CFLAGS) $(XORG_CFLAGS) - -BUILT_SOURCES = xf86PciIds.h - -EXTRA_DIST = \ - xf86PciData.h \ - xf86PciIds.h \ - xf86PciStdIds.h \ - xf86PciStr.h \ - xf86ScanPci.h \ - pci.ids \ - extrapci.ids \ - pciid2c.pl - -xf86PciData.c: - echo "#define PCIDATA" > $@ - echo "#include \"$(srcdir)/xf86ScanPci.c\"" >> $@ - -xf86PciIds.h: $(srcdir)/../common/xf86PciInfo.h - cat $(srcdir)/pci.ids $(srcdir)/extrapci.ids | $(PERL) $(srcdir)/pciid2c.pl $(srcdir)/../common/xf86PciInfo.h > xf86PciIds.h - -DISTCLEANFILES = xf86PciData.c xf86PciIds.h diff --git a/hw/xfree86/scanpci/xf86PciData.h b/hw/xfree86/scanpci/xf86PciData.h deleted file mode 100644 index 5f92a7d03..000000000 --- a/hw/xfree86/scanpci/xf86PciData.h +++ /dev/null @@ -1,69 +0,0 @@ - -/* - * Copyright (c) 2000-2002 by The XFree86 Project, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Except as contained in this notice, the name of the copyright holder(s) - * and author(s) shall not be used in advertising or otherwise to promote - * the sale, use or other dealings in this Software without prior written - * authorization from the copyright holder(s) and author(s). - */ - -#ifdef HAVE_XORG_CONFIG_H -#include <xorg-config.h> -#endif - -#ifndef PCI_DATA_H_ -#define PCI_DATA_H_ - -#define NOVENDOR 0xFFFF -#define NODEVICE 0xFFFF -#define NOSUBSYS 0xFFFF - -typedef Bool (*ScanPciSetupProcPtr)(void); -typedef void (*ScanPciCloseProcPtr)(void); -typedef int (*ScanPciFindByDeviceProcPtr)( - unsigned short vendor, unsigned short device, - unsigned short svendor, unsigned short subsys, - const char **vname, const char **dname, - const char **svname, const char **sname); -typedef int (*ScanPciFindBySubsysProcPtr)( - unsigned short svendor, unsigned short subsys, - const char **svname, const char **sname); - -/* - * Whoever loads this module needs to define these and initialise them - * after loading. - */ -extern ScanPciSetupProcPtr xf86SetupPciIds; -extern ScanPciCloseProcPtr xf86ClosePciIds; -extern ScanPciFindByDeviceProcPtr xf86FindPciNamesByDevice; -extern ScanPciFindBySubsysProcPtr xf86FindPciNamesBySubsys; - -Bool ScanPciSetupPciIds(void); -void ScanPciClosePciIds(void); -int ScanPciFindPciNamesByDevice(unsigned short vendor, unsigned short device, - unsigned short svendor, unsigned short subsys, - const char **vname, const char **dname, - const char **svname, const char **sname); -int ScanPciFindPciNamesBySubsys(unsigned short svendor, unsigned short subsys, - const char **svname, const char **sname); - -#endif diff --git a/hw/xfree86/scanpci/xf86PciStr.h b/hw/xfree86/scanpci/xf86PciStr.h deleted file mode 100644 index 41b039c2c..000000000 --- a/hw/xfree86/scanpci/xf86PciStr.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (c) 2002 by The XFree86 Project, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Except as contained in this notice, the name of the copyright holder(s) - * and author(s) shall not be used in advertising or otherwise to promote - * the sale, use or other dealings in this Software without prior written - * authorization from the copyright holder(s) and author(s). - */ - -/* - * Structs used to hold the pre-parsed pci.ids data. These are private - * to the scanpci and pcidata modules. - */ - -#ifdef HAVE_XORG_CONFIG_H -#include <xorg-config.h> -#endif - -#ifndef _XF86_PCISTR_H -#define _XF86_PCISTR_H - -typedef struct { - unsigned short VendorID; - unsigned short SubsystemID; - const char *SubsystemName; - unsigned short class; -} pciSubsystemInfo; - -typedef struct { - unsigned short DeviceID; - const char *DeviceName; - const pciSubsystemInfo **Subsystem; - unsigned short class; -} pciDeviceInfo; - -typedef struct { - unsigned short VendorID; - const char *VendorName; - const pciDeviceInfo **Device; -} pciVendorInfo; - -typedef struct { - unsigned short VendorID; - const char *VendorName; - const pciSubsystemInfo **Subsystem; -} pciVendorSubsysInfo; - -#endif /* _XF86_PCISTR_H */ diff --git a/hw/xfree86/scanpci/xf86ScanPci.c b/hw/xfree86/scanpci/xf86ScanPci.c deleted file mode 100644 index 2343f001b..000000000 --- a/hw/xfree86/scanpci/xf86ScanPci.c +++ /dev/null @@ -1,346 +0,0 @@ -/* - * Display the Subsystem Vendor Id and Subsystem Id in order to identify - * the cards installed in this computer - * - * A lot of this comes from Robin Cutshaw's scanpci - * - */ -/* - * Copyright (c) 1995-2002 by The XFree86 Project, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Except as contained in this notice, the name of the copyright holder(s) - * and author(s) shall not be used in advertising or otherwise to promote - * the sale, use or other dealings in this Software without prior written - * authorization from the copyright holder(s) and author(s). - */ - -/* - * This file is used to build both the scanpci and pcidata modules. - * The interfaces have changed compared with XFree86 4.2.0 and earlier. - * The data is no longer exported directly. Lookup functions are provided. - * This means that the data format can change in the future without affecting - * the exported interfaces. - * - * The namespaces for pcidata and scanpci clash, so both modules can't be - * loaded at the same time. The X server should only load the scanpci module - * when run with the '-scanpci' flag. The main difference between the - * two modules is size. pcidata only holds the subset of data that is - * "interesting" to the X server. "Interesting" is determined by the - * PCI_VENDOR_* defines in ../common/xf86PciInfo.h. - */ - - -/* XXX This is including a lot of stuff that modules should not include! */ - -#ifdef HAVE_XORG_CONFIG_H -#include <xorg-config.h> -#endif - -#include <X11/X.h> -#include "os.h" -#include "xf86.h" -#include "xf86Priv.h" -#include "xf86Pci.h" -#include "xf86_OSproc.h" - -#include <ctype.h> -#include <stdlib.h> - -#ifndef PCIDATA -#define VENDOR_INCLUDE_NONVIDEO -#endif -#define INIT_SUBSYS_INFO -#define INIT_VENDOR_SUBSYS_INFO - -#include "xf86PciStr.h" -#include "xf86PciIds.h" -#include "xf86ScanPci.h" - -#include "xf86Module.h" - -#ifdef PCIDATA - -static XF86ModuleVersionInfo pciDataVersRec = { - "pcidata", - MODULEVENDORSTRING, - MODINFOSTRING1, - MODINFOSTRING2, - XORG_VERSION_CURRENT, - 1, 0, 0, - ABI_CLASS_VIDEODRV, - ABI_VIDEODRV_VERSION, - NULL, - {0, 0, 0, 0} -}; - -_X_EXPORT XF86ModuleData pcidataModuleData = { &pciDataVersRec, NULL, NULL }; - -#else - -static XF86ModuleVersionInfo scanPciVersRec = { - "scanpci", - MODULEVENDORSTRING, - MODINFOSTRING1, - MODINFOSTRING2, - XORG_VERSION_CURRENT, - 1, 0, 0, - ABI_CLASS_VIDEODRV, - ABI_VIDEODRV_VERSION, - NULL, - {0, 0, 0, 0} -}; - -_X_EXPORT XF86ModuleData scanpciModuleData = { &scanPciVersRec, NULL, NULL }; - -#endif /* PCIDATA */ - -/* Initialisation/Close hooks, in case they're ever needed. */ -Bool -ScanPciSetupPciIds(void) -{ - return TRUE; -} - -void -ScanPciClosePciIds(void) -{ - return; -} - -/* - * The return value is the number of strings found, or -1 for an error. - * Requested strings that aren't found are set to NULL. - */ - -int -ScanPciFindPciNamesByDevice(unsigned short vendor, unsigned short device, - unsigned short svendor, unsigned short subsys, - const char **vname, const char **dname, - const char **svname, const char **sname) -{ - int i, j, k; - const pciDeviceInfo **pDev; - const pciSubsystemInfo **pSub; - - /* It's an error to not provide the Vendor */ - if (vendor == NOVENDOR) - return -1; - - /* Initialise returns requested/provided to NULL */ - if (vname) - *vname = NULL; - if (device != NODEVICE && dname) - *dname = NULL; - if (svendor != NOVENDOR && svname) - *svname = NULL; - if (subsys != NOSUBSYS && sname) - *sname = NULL; - - for (i = 0; pciVendorInfoList[i].VendorName; i++) { - if (vendor == pciVendorInfoList[i].VendorID) { - if (vname) { - *vname = pciVendorInfoList[i].VendorName; - } - if (device == NODEVICE) { - return 1; - } - pDev = pciVendorInfoList[i].Device; - if (!pDev) { - return 1; - } - for (j = 0; pDev[j]; j++) { - if (device == pDev[j]->DeviceID) { - if (dname) { - *dname = pDev[j]->DeviceName; - } - if (svendor == NOVENDOR) { - return 2; - } - for (k = 0; pciVendorInfoList[k].VendorName; k++) { - if (svendor && - svendor == pciVendorInfoList[k].VendorID) { - if (svname) { - *svname = pciVendorInfoList[k].VendorName; - } - if (subsys == NOSUBSYS) { - return 3; - } - break; - } - } - if (!pciVendorInfoList[k].VendorName) { - return 2; - } - pSub = pDev[j]->Subsystem; - if (!pSub) { - return 3; - } - for (k = 0; pSub[k]; k++) { - if (svendor == pSub[k]->VendorID && - subsys == pSub[k]->SubsystemID) { - if (sname) - *sname = pSub[k]->SubsystemName; - return 4; - } - } - /* No vendor/subsys match */ - return 3; - } - } - /* No device match */ - return 1; - } - } - /* No vendor match */ - return 0; -} - -Bool -ScanPciFindPciNamesBySubsys(unsigned short svendor, unsigned short subsys, - const char **svname, const char **sname) -{ - int i, j; - const pciSubsystemInfo **pSub; - - /* It's an error to not provide the Vendor */ - if (svendor == NOVENDOR) - return -1; - - /* Initialise returns requested/provided to NULL */ - if (svname) - *svname = NULL; - if (subsys != NOSUBSYS && sname) - *sname = NULL; - - for (i = 0; pciVendorSubsysInfoList[i].VendorName; i++) { - if (svendor == pciVendorSubsysInfoList[i].VendorID) { - if (svname) { - *svname = pciVendorSubsysInfoList[i].VendorName; - } - if (subsys == NOSUBSYS) { - return 1; - } - pSub = pciVendorSubsysInfoList[i].Subsystem; - if (!pSub) { - return 1; - } - for (j = 0; pSub[j]; j++) { - if (subsys == pSub[j]->SubsystemID) { - if (sname) { - *sname = pSub[j]->SubsystemName; - } - } - } - /* No subsys match */ - return 1; - } - } - /* No vendor match */ - return 0; -} - -#ifndef PCIDATA -void -ScanPciDisplayPCICardInfo(int verbosity) -{ - pciConfigPtr pcrp, *pcrpp; - int i; - - xf86EnableIO(); - pcrpp = xf86scanpci(0); - - if (pcrpp == NULL) { - xf86MsgVerb(X_NONE,0,"No PCI info available\n"); - return; - } - xf86MsgVerb(X_NONE,0,"Probing for PCI devices (Bus:Device:Function)\n\n"); - for (i = 0; (pcrp = pcrpp[i]); i++) { - const char *svendorname = NULL, *subsysname = NULL; - const char *vendorname = NULL, *devicename = NULL; - Bool noCard = FALSE; - const char *prefix1 = "", *prefix2 = ""; - - xf86MsgVerb(X_NONE, -verbosity, "(%d:%d:%d) ", - pcrp->busnum, pcrp->devnum, pcrp->funcnum); - - /* - * Lookup as much as we can about the device. - */ - if (pcrp->pci_subsys_vendor || pcrp->pci_subsys_card) { - ScanPciFindPciNamesByDevice(pcrp->pci_vendor, pcrp->pci_device, - NOVENDOR, NOSUBSYS, - &vendorname, &devicename, NULL, NULL); - } else { - ScanPciFindPciNamesByDevice(pcrp->pci_vendor, pcrp->pci_device, - pcrp->pci_subsys_vendor, - pcrp->pci_subsys_card, - &vendorname, &devicename, - &svendorname, &subsysname); - } - - if (svendorname) - xf86MsgVerb(X_NONE, -verbosity, "%s ", svendorname); - if (subsysname) - xf86MsgVerb(X_NONE, -verbosity, "%s ", subsysname); - if (svendorname && !subsysname) { - if (pcrp->pci_subsys_card && pcrp->pci_subsys_card != NOSUBSYS) { - xf86MsgVerb(X_NONE, -verbosity, "unknown card (0x%04x) ", - pcrp->pci_subsys_card); - } else { - xf86MsgVerb(X_NONE, -verbosity, "card "); - } - } - if (!svendorname && !subsysname) { - /* - * We didn't find a text representation of the information - * about the card. - */ - if (pcrp->pci_subsys_vendor || pcrp->pci_subsys_card) { - /* - * If there was information and we just couldn't interpret - * it, print it out as unknown, anyway. - */ - xf86MsgVerb(X_NONE, -verbosity, - "unknown card (0x%04x/0x%04x) ", - pcrp->pci_subsys_vendor, pcrp->pci_subsys_card); - } else - noCard = TRUE; - } - if (!noCard) { - prefix1 = "using a "; - prefix2 = "using an "; - } - if (vendorname && devicename) { - xf86MsgVerb(X_NONE, -verbosity,"%s%s %s\n", prefix1, vendorname, - devicename); - } else if (vendorname) { - xf86MsgVerb(X_NONE, -verbosity, - "%sunknown chip (DeviceId 0x%04x) from %s\n", - prefix2, pcrp->pci_device, vendorname); - } else { - xf86MsgVerb(X_NONE, -verbosity, - "%sunknown chipset(0x%04x/0x%04x)\n", - prefix2, pcrp->pci_vendor, pcrp->pci_device); - } - } -} -#endif - diff --git a/hw/xfree86/scanpci/xf86ScanPci.h b/hw/xfree86/scanpci/xf86ScanPci.h deleted file mode 100644 index 93ecee8dc..000000000 --- a/hw/xfree86/scanpci/xf86ScanPci.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2000-2002 by The XFree86 Project, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Except as contained in this notice, the name of the copyright holder(s) - * and author(s) shall not be used in advertising or otherwise to promote - * the sale, use or other dealings in this Software without prior written - * authorization from the copyright holder(s) and author(s). - */ - -#ifdef HAVE_XORG_CONFIG_H -#include <xorg-config.h> -#endif - -#ifndef SCANPCI_H_ -#define SCANPCI_H_ - -#include "xf86PciData.h" - -typedef void (*ScanPciDisplayCardInfoProcPtr)(int verbosity); - -/* - * Whoever loads this module needs to define these and initialise them - * after loading. - */ - -extern ScanPciDisplayCardInfoProcPtr xf86DisplayPCICardInfo; - -void ScanPciDisplayPCICardInfo(int verbosity); - -#endif diff --git a/hw/xfree86/utils/Makefile.am b/hw/xfree86/utils/Makefile.am index 38f90b4ae..e3e7a6177 100644 --- a/hw/xfree86/utils/Makefile.am +++ b/hw/xfree86/utils/Makefile.am @@ -3,7 +3,5 @@ SUBDIRS = \ cvt \ ioport \ kbd_mode \ - pcitweak \ - scanpci \ xorgcfg \ xorgconfig diff --git a/hw/xfree86/utils/pcitweak/.gitignore b/hw/xfree86/utils/pcitweak/.gitignore deleted file mode 100644 index c866baf62..000000000 --- a/hw/xfree86/utils/pcitweak/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -pcitweak.1 -pcitweak.1x - diff --git a/hw/xfree86/utils/pcitweak/Makefile.am b/hw/xfree86/utils/pcitweak/Makefile.am deleted file mode 100644 index 5c2a6eb56..000000000 --- a/hw/xfree86/utils/pcitweak/Makefile.am +++ /dev/null @@ -1,60 +0,0 @@ -# Copyright 2005 Sun Microsystems, Inc. All rights reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a -# copy of this software and associated documentation files (the -# "Software"), to deal in the Software without restriction, including -# without limitation the rights to use, copy, modify, merge, publish, -# distribute, and/or sell copies of the Software, and to permit persons -# to whom the Software is furnished to do so, provided that the above -# copyright notice(s) and this permission notice appear in all copies of -# the Software and that both the above copyright notice(s) and this -# permission notice appear in supporting documentation. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS -# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT -# OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR -# HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL -# INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING -# FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, -# NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION -# WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -# -# Except as contained in this notice, the name of a copyright holder -# shall not be used in advertising or otherwise to promote the sale, use -# or other dealings in this Software without prior written authorization -# of the copyright holder. -# - -bin_PROGRAMS = pcitweak - -XFREE86_SRCDIR = $(top_srcdir)/hw/xfree86 -DUMMYLIB_SRCDIR = $(XFREE86_SRCDIR)/dummylib - -INCLUDES = $(XORG_INCS) -I$(DUMMYLIB_SRCDIR) - -pcitweak_CFLAGS = $(DIX_CFLAGS) $(XORG_CFLAGS) -pcitweak_LDADD = \ - ../../os-support/libxorgos.la \ - ../../dummylib/libdummy-nonserver.a \ - ${SYS_LIBS} - -pcitweak_SOURCES = \ - pcitweak.c - -appmandir = $(APP_MAN_DIR) - -appman_PRE = pcitweak.man -appman_DATA = $(appman_PRE:man=@APP_MAN_SUFFIX@) - -include $(top_srcdir)/cpprules.in - -EXTRA_DIST = pcitweak.man.pre -BUILT_SOURCES = $(appman_PRE) -CLEANFILES = $(appman_PRE) $(appman_DATA) - -SUFFIXES += .$(APP_MAN_SUFFIX) .man - -.man.$(APP_MAN_SUFFIX): - -rm -f $@ - $(LN_S) $< $@ diff --git a/hw/xfree86/utils/pcitweak/pcitweak.c b/hw/xfree86/utils/pcitweak/pcitweak.c deleted file mode 100644 index 5648e796d..000000000 --- a/hw/xfree86/utils/pcitweak/pcitweak.c +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Copyright (c) 1999-2002 by The XFree86 Project, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Except as contained in this notice, the name of the copyright holder(s) - * and author(s) shall not be used in advertising or otherwise to promote - * the sale, use or other dealings in this Software without prior written - * authorization from the copyright holder(s) and author(s). - */ - -/* - * pcitweak.c - * - * Author: David Dawes <dawes@xfree86.org> - */ - -#include <X11/X.h> -#include "os.h" -#include "xf86.h" -#include "xf86Priv.h" -#include "xf86_OSproc.h" -#include "xf86Pci.h" - -#ifdef __CYGWIN__ -#include <getopt.h> -#endif - -#include <stdarg.h> -#include <stdlib.h> -#ifdef __linux__ -/* to get getopt on Linux */ -#ifndef __USE_POSIX2 -#define __USE_POSIX2 -#endif -#endif -#include <unistd.h> -#if defined(ISC) || defined(Lynx) -extern char *optarg; -extern int optind, opterr; -#endif - -pciVideoPtr *xf86PciVideoInfo = NULL; - -static void usage(void); -static Bool parsePciBusString(const char *id, int *bus, int *device, int *func); -static char *myname = NULL; - -int -main(int argc, char *argv[]) -{ - int c; - PCITAG tag; - int bus, device, func; - Bool list = FALSE, rd = FALSE, wr = FALSE; - Bool byte = FALSE, halfword = FALSE; - int offset = 0; - CARD32 value = 0; - char *id = NULL, *end; - - myname = argv[0]; - while ((c = getopt(argc, argv, "bhlr:w:")) != -1) { - switch (c) { - case 'b': - byte = TRUE; - break; - case 'h': - halfword = TRUE; - break; - case 'l': - list = TRUE; - break; - case 'r': - rd = TRUE; - id = optarg; - break; - case 'w': - wr = TRUE; - id = optarg; - break; - case '?': - default: - usage(); - } - } - argc -= optind; - argv += optind; - - if (list) { - xf86Verbose = 2; - xf86EnableIO(); - xf86scanpci(0); - xf86DisableIO(); - exit(0); - } - - if (rd && wr) - usage(); - if (wr && argc != 2) - usage(); - if (rd && argc != 1) - usage(); - if (byte && halfword) - usage(); - - if (rd || wr) { - if (!parsePciBusString(id, &bus, &device, &func)) { - fprintf(stderr, "%s: Bad PCI ID string\n", myname); - usage(); - } - offset = strtoul(argv[0], &end, 0); - if (*end != '\0') { - fprintf(stderr, "%s: Bad offset\n", myname); - usage(); - } - if (halfword) { - if (offset % 2) { - fprintf(stderr, "%s: offset must be a multiple of two\n", - myname); - exit(1); - } - } else if (!byte) { - if (offset % 4) { - fprintf(stderr, "%s: offset must be a multiple of four\n", - myname); - exit(1); - } - } - } else { - usage(); - } - - if (wr) { - value = strtoul(argv[1], &end, 0); - if (*end != '\0') { - fprintf(stderr, "%s: Bad value\n", myname); - usage(); - } - } - - xf86EnableIO(); - - /* - * This is needed to setup all the buses. Otherwise secondary buses - * can't be accessed. - */ - xf86scanpci(0); - - tag = pciTag(bus, device, func); - if (rd) { - if (byte) { - printf("0x%02x\n", (unsigned int)pciReadByte(tag, offset) & 0xFF); - } else if (halfword) { - printf("0x%04x\n", (unsigned int)pciReadWord(tag, offset) & 0xFFFF); - } else { - printf("0x%08lx\n", (unsigned long)pciReadLong(tag, offset)); - } - } else if (wr) { - if (byte) { - pciWriteByte(tag, offset, value & 0xFF); - } else if (halfword) { - pciWriteWord(tag, offset, value & 0xFFFF); - } else { - pciWriteLong(tag, offset, value); - } - } - - xf86DisableIO(); - exit(0); -} - -static void -usage() -{ - fprintf(stderr, "usage:\tpcitweak -l\n" - "\tpcitweak -r ID [-b | -h] offset\n" - "\tpcitweak -w ID [-b | -h] offset value\n" - "\n" - "\t\t-l -- list\n" - "\t\t-r -- read\n" - "\t\t-w -- write\n" - "\t\t-b -- read/write a single byte\n" - "\t\t-h -- read/write a single halfword (16 bit)\n" - "\t\tID -- PCI ID string in form bus:dev:func " - "(all in hex)\n"); - - exit(1); -} - -Bool -parsePciBusString(const char *busID, int *bus, int *device, int *func) -{ - /* - * The format is assumed to be "bus:device:func", where bus, device - * and func are hexadecimal integers. func may be omitted and assumed to - * be zero, although it doing this isn't encouraged. - */ - - char *p, *s, *end; - - s = strdup(busID); - p = strtok(s, ":"); - if (p == NULL || *p == 0) - return FALSE; - *bus = strtoul(p, &end, 16); - if (*end != '\0') - return FALSE; - p = strtok(NULL, ":"); - if (p == NULL || *p == 0) - return FALSE; - *device = strtoul(p, &end, 16); - if (*end != '\0') - return FALSE; - *func = 0; - p = strtok(NULL, ":"); - if (p == NULL || *p == 0) - return TRUE; - *func = strtoul(p, &end, 16); - if (*end != '\0') - return FALSE; - return TRUE; -} - -#include "xf86getpagesize.c" - diff --git a/hw/xfree86/utils/pcitweak/pcitweak.man.pre b/hw/xfree86/utils/pcitweak/pcitweak.man.pre deleted file mode 100644 index 3549d9740..000000000 --- a/hw/xfree86/utils/pcitweak/pcitweak.man.pre +++ /dev/null @@ -1,64 +0,0 @@ -.\" $XFree86: xc/programs/Xserver/hw/xfree86/etc/pcitweak.man,v 3.3 2001/01/27 18:20:56 dawes Exp $ -.TH PCITWEAK 1 __vendorversion__ -.SH NAME -pcitweak - read/write PCI config space -.SH SYNOPSIS -.B pcitweak -.B \-l -.br -.B pcitweak -.B \-r -.I PCI-ID -.RB [ \-b | \-h ] -.I offset -.br -.B pcitweak -.B \-w -.I PCI-ID -.RB [ \-b | \-h ] -.I offset -.I value -.SH DESCRIPTION -.I Pcitweak -is a utility that can be used to examine or change registers in the PCI -configuration space. On most platforms -.I pcitweak -can only be run by the root user. -.SH OPTIONS -.TP 8 -.B \-l -Probe the PCI buses and print a line for each detected device. Each line -contains the bus location (bus:device:function), chip vendor/device, card -(subsystem) vendor/card, revision, class and header type. All values -printed are in hexadecimal. -.TP 8 -.BI "\-r " PCI-ID -Read the PCI configuration space register at -.I offset -for the PCI device at bus location -.IR PCI-ID . -.I PCI-ID -should be given in the form bus:device:function, with each value in -hexadecimal. By default, a 32-bit register is read. -.TP 8 -.BI "\-w " PCI-ID -Write -.I value -to the PCI configuration space register at -.I offset -for the PCI device at bus location -.IR PCI-ID . -.I PCI-ID -should be given in the form bus:device:function, with each value in -hexadecimal. By default, a 32-bit register is written. -.TP 8 -.B \-b -Read or write an 8-bit value (byte). -.TP 8 -.B \-h -Read or write a 16-bit value (halfword). -.SH "SEE ALSO" -scanpci(1) -.SH AUTHORS -David Dawes -.RI ( dawes@xfree86.org ). diff --git a/hw/xfree86/utils/scanpci/.gitignore b/hw/xfree86/utils/scanpci/.gitignore deleted file mode 100644 index b752c7455..000000000 --- a/hw/xfree86/utils/scanpci/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -scanpci.1 -scanpci.1x diff --git a/hw/xfree86/utils/scanpci/Makefile.am b/hw/xfree86/utils/scanpci/Makefile.am deleted file mode 100644 index 6af8eaee5..000000000 --- a/hw/xfree86/utils/scanpci/Makefile.am +++ /dev/null @@ -1,62 +0,0 @@ -# Copyright 2005 Sun Microsystems, Inc. All rights reserved. -# -# Permission is hereby granted, free of charge, to any person obtaining a -# copy of this software and associated documentation files (the -# "Software"), to deal in the Software without restriction, including -# without limitation the rights to use, copy, modify, merge, publish, -# distribute, and/or sell copies of the Software, and to permit persons -# to whom the Software is furnished to do so, provided that the above -# copyright notice(s) and this permission notice appear in all copies of -# the Software and that both the above copyright notice(s) and this -# permission notice appear in supporting documentation. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS -# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT -# OF THIRD PARTY RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR -# HOLDERS INCLUDED IN THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL -# INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING -# FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, -# NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION -# WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -# -# Except as contained in this notice, the name of a copyright holder -# shall not be used in advertising or otherwise to promote the sale, use -# or other dealings in this Software without prior written authorization -# of the copyright holder. -# - -bin_PROGRAMS = scanpci - -XFREE86_SRCDIR = $(top_srcdir)/hw/xfree86 -SCANPCI_SRCDIR = $(XFREE86_SRCDIR)/scanpci -DUMMYLIB_SRCDIR = $(XFREE86_SRCDIR)/dummylib - -INCLUDES = $(XORG_INCS) -I$(SCANPCI_SRCDIR) -I$(DUMMYLIB_SRCDIR) - -scanpci_CFLAGS = $(DIX_CFLAGS) $(XORG_CFLAGS) -scanpci_LDADD = \ - ../../scanpci/libscanpci.la \ - ../../os-support/libxorgos.la \ - ../../dummylib/libdummy-nonserver.a \ - ${SYS_LIBS} - -scanpci_SOURCES = \ - scanpci.c - -appmandir = $(APP_MAN_DIR) - -appman_PRE = scanpci.man -appman_DATA = $(appman_PRE:man=@APP_MAN_SUFFIX@) - -include $(top_srcdir)/cpprules.in - -EXTRA_DIST = scanpci.man.pre -BUILT_SOURCES = $(appman_PRE) -CLEANFILES = $(appman_PRE) $(appman_DATA) - -SUFFIXES += .$(APP_MAN_SUFFIX) .man - -.man.$(APP_MAN_SUFFIX): - -rm -f $@ - $(LN_S) $< $@ diff --git a/hw/xfree86/utils/scanpci/scanpci.c b/hw/xfree86/utils/scanpci/scanpci.c deleted file mode 100644 index 609f1faaf..000000000 --- a/hw/xfree86/utils/scanpci/scanpci.c +++ /dev/null @@ -1,779 +0,0 @@ -/* - * Copyright 2000 by Egbert Eich - * Copyright 1995 by Robin Cutshaw <robin@XFree86.Org> - * Copyright 2002 by David Dawes - * - * Permission to use, copy, modify, distribute, and sell this software and its - * documentation for any purpose is hereby granted without fee, provided that - * the above copyright notice appear in all copies and that both that - * copyright notice and this permission notice appear in supporting - * documentation, and that the names of the above listed copyright holder(s) - * not be used in advertising or publicity pertaining to distribution of - * the software without specific, written prior permission. The above listed - * copyright holder(s) make(s) no representations about the suitability of this - * software for any purpose. It is provided "as is" without express or - * implied warranty. - * - * THE ABOVE LISTED COPYRIGHT HOLDER(S) DISCLAIM(S) ALL WARRANTIES WITH REGARD - * TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS, IN NO EVENT SHALL THE ABOVE LISTED COPYRIGHT HOLDER(S) BE - * LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY - * DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER - * IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING - * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include <X11/X.h> -#include "os.h" -#include "xf86.h" -#include "xf86Priv.h" -#include "xf86_OSproc.h" -#include "xf86Pci.h" -#include "xf86PciInfo.h" -#include "xf86ScanPci.h" -#include "dummylib.h" - -#include <stdarg.h> -#include <stdlib.h> -#ifdef __linux__ -/* to get getopt on Linux */ -#ifndef __USE_POSIX2 -#define __USE_POSIX2 -#endif -#endif -#include <unistd.h> - -#if defined(ISC) || defined(Lynx) -extern char *optarg; -extern int optind, opterr; -#endif - -pciVideoPtr *xf86PciVideoInfo = NULL; - -static void usage(void); -static void identify_card(pciConfigPtr pcr, int verbose); -static void print_default_class(pciConfigPtr pcr); -static void print_bridge_pci_class(pciConfigPtr pcr); -static void print_mach64(pciConfigPtr pcr); -static void print_i128(pciConfigPtr pcr); -static void print_dc21050(pciConfigPtr pcr); -static void print_simba(pciConfigPtr pcr); -static void print_460gx_sac(pciConfigPtr pcr); -static void print_460gx_pxb(pciConfigPtr pcr); -static void print_460gx_gxb(pciConfigPtr pcr); - -#define MAX_DEV_PER_VENDOR 40 - -typedef struct { - unsigned int Vendor; - struct { - int DeviceID; - void(*func)(pciConfigPtr); - } Device[MAX_DEV_PER_VENDOR]; -} pciVendorDevFuncInfo; - -static pciVendorDevFuncInfo vendorDeviceFuncInfo[] = { - { PCI_VENDOR_ATI, { - { PCI_CHIP_MACH64CT, print_mach64 }, - { PCI_CHIP_MACH64CX, print_mach64 }, - { PCI_CHIP_MACH64ET, print_mach64 }, - { PCI_CHIP_MACH64GB, print_mach64 }, - { PCI_CHIP_MACH64GD, print_mach64 }, - { PCI_CHIP_MACH64GI, print_mach64 }, - { PCI_CHIP_MACH64GL, print_mach64 }, - { PCI_CHIP_MACH64GM, print_mach64 }, - { PCI_CHIP_MACH64GN, print_mach64 }, - { PCI_CHIP_MACH64GO, print_mach64 }, - { PCI_CHIP_MACH64GP, print_mach64 }, - { PCI_CHIP_MACH64GQ, print_mach64 }, - { PCI_CHIP_MACH64GR, print_mach64 }, - { PCI_CHIP_MACH64GS, print_mach64 }, - { PCI_CHIP_MACH64GT, print_mach64 }, - { PCI_CHIP_MACH64GU, print_mach64 }, - { PCI_CHIP_MACH64GV, print_mach64 }, - { PCI_CHIP_MACH64GW, print_mach64 }, - { PCI_CHIP_MACH64GX, print_mach64 }, - { PCI_CHIP_MACH64GY, print_mach64 }, - { PCI_CHIP_MACH64GZ, print_mach64 }, - { PCI_CHIP_MACH64LB, print_mach64 }, - { PCI_CHIP_MACH64LD, print_mach64 }, - { PCI_CHIP_MACH64LG, print_mach64 }, - { PCI_CHIP_MACH64LI, print_mach64 }, - { PCI_CHIP_MACH64LM, print_mach64 }, - { PCI_CHIP_MACH64LN, print_mach64 }, - { PCI_CHIP_MACH64LP, print_mach64 }, - { PCI_CHIP_MACH64LQ, print_mach64 }, - { PCI_CHIP_MACH64LR, print_mach64 }, - { PCI_CHIP_MACH64LS, print_mach64 }, - { PCI_CHIP_MACH64VT, print_mach64 }, - { PCI_CHIP_MACH64VU, print_mach64 }, - { PCI_CHIP_MACH64VV, print_mach64 }, - { 0x0000, NULL } } }, - { PCI_VENDOR_DIGITAL, { - { PCI_CHIP_DC21050, print_dc21050}, - { 0x0000, NULL } } }, - { PCI_VENDOR_NUMNINE, { - { PCI_CHIP_I128, print_i128 }, - { PCI_CHIP_I128_2, print_i128 }, - { PCI_CHIP_I128_T2R, print_i128 }, - { PCI_CHIP_I128_T2R4, print_i128 }, - { 0x0000, NULL } } }, - { PCI_VENDOR_SUN, { - { PCI_CHIP_SIMBA, print_simba }, - { 0x0000, NULL } } }, - { PCI_VENDOR_INTEL, { - { PCI_CHIP_460GX_SAC, print_460gx_sac }, - { PCI_CHIP_460GX_PXB, print_460gx_pxb }, - { PCI_CHIP_460GX_GXB_1, print_460gx_gxb }, - { PCI_CHIP_460GX_WXB, print_460gx_pxb }, /* Uncertain */ - { 0x0000, NULL } } }, - { 0x0000, { - { 0x0000, NULL } } } -}; - -static void -usage(void) -{ - printf("Usage: scanpci [-v12OfV]\n"); - printf(" -v print config space\n"); - printf(" -1 config type 1\n"); - printf(" -2 config type 2\n"); - printf(" -O use OS config support\n"); - printf(" -f force config type\n"); - printf(" -V set message verbosity level\n"); -} - -int -main(int argc, char *argv[]) -{ - pciConfigPtr *pcrpp = NULL; - int Verbose = 0; - int i = 0; - int force = 0; - int c; - - xf86Info.pciFlags = PCIProbe1; - - while ((c = getopt(argc, argv, "?v12OfV:")) != -1) - switch(c) { - case 'v': - Verbose = 1; - break; - case '1': - xf86Info.pciFlags = PCIProbe1; - break; - case '2': - xf86Info.pciFlags = PCIProbe2; - break; - case 'O': - xf86Info.pciFlags = PCIOsConfig; - break; - case 'f': - force = 1; - break; - case 'V': - xf86Verbose = atoi(optarg); - break; - case '?': - default: - usage(); - exit (1); - break; - } - - if (force) - switch (xf86Info.pciFlags) { - case PCIProbe1: - xf86Info.pciFlags = PCIForceConfig1; - break; - case PCIProbe2: - xf86Info.pciFlags = PCIForceConfig2; - break; - default: - break; - } - - pcrpp = xf86scanpci(0); - - if (!pcrpp) { - printf("No PCI devices found\n"); - xf86DisableIO(); - exit (1); - } - - while (pcrpp[i]) - identify_card(pcrpp[i++],Verbose); - - xf86DisableIO(); - exit(0); -} - -static void -identify_card(pciConfigPtr pcr, int verbose) -{ - int i, j; - int foundit = 0; - int foundvendor = 0; - const char *vname = NULL, *dname = NULL, *svname = NULL, *sname = NULL; - - pciVendorDevFuncInfo *vdf = vendorDeviceFuncInfo; - - if (!ScanPciSetupPciIds()) { - fprintf(stderr, "xf86SetupPciIds() failed\n"); - exit(1); - } - - printf("\npci bus 0x%04x cardnum 0x%02x function 0x%02x:" - " vendor 0x%04x device 0x%04x\n", - pcr->busnum, pcr->devnum, pcr->funcnum, - pcr->pci_vendor, pcr->pci_device); - - ScanPciFindPciNamesByDevice(pcr->pci_vendor, pcr->pci_device, - pcr->pci_subsys_vendor, pcr->pci_subsys_card, - &vname, &dname, &svname, &sname); - - if (vname) { - printf(" %s ", vname); - if (dname) { - printf("%s", dname); - foundit = 1; - } - } - - if (!foundit) - printf(" Device unknown\n"); - else { - printf("\n"); - if (verbose) { - for (i = 0; vdf[i].Vendor; i++) { - if (vdf[i].Vendor == pcr->pci_vendor) { - for (j = 0; vdf[i].Device[j].DeviceID; j++) { - if (vdf[i].Device[j].DeviceID == pcr->pci_device) { - (*vdf[i].Device[j].func)(pcr); - return; - } - } - break; - } - } - } - } - - if (verbose && !(pcr->pci_header_type & 0x7f) && - (pcr->pci_subsys_vendor != 0 || pcr->pci_subsys_card != 0) && - ((pcr->pci_subsys_vendor != NOVENDOR) - || (pcr->pci_subsys_card != NOSUBSYS)) && - (pcr->pci_vendor != pcr->pci_subsys_vendor || - pcr->pci_device != pcr->pci_subsys_card)) { - foundit = 0; - foundvendor = 0; - printf(" CardVendor 0x%04x card 0x%04x", - pcr->pci_subsys_vendor, pcr->pci_subsys_card); - if (svname) { - printf(" (%s", svname); - foundvendor = 1; - if (sname) { - printf(" %s)", sname); - foundit = 1; - } - } - - if (!foundit) { - if (!foundvendor) - printf(" ("); - else - printf(", "); - printf("Card unknown)"); - } - printf("\n"); - } - - if (verbose) { - printf(" STATUS 0x%04x COMMAND 0x%04x\n", - pcr->pci_status, pcr->pci_command); - printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", - pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if, - pcr->pci_rev_id); - if ((pcr->pci_base_class == PCI_CLASS_BRIDGE) && - (pcr->pci_sub_class == PCI_SUBCLASS_BRIDGE_PCI)) - print_bridge_pci_class(pcr); - else - print_default_class(pcr); - } -} - -static void -print_default_class(pciConfigPtr pcr) -{ - printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", - pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer, - pcr->pci_cache_line_size); - if (pcr->pci_base0) { - if ((pcr->pci_base0 & 0x7) == 0x4) { - printf(" BASE0 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n", - (int)pcr->pci_base1, (int)pcr->pci_base0, - (int)pcr->pci_base1, - (int)(pcr->pci_base0 & - (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base0 & 0x8) ? " PREFETCHABLE" :""); - } else { - printf(" BASE0 0x%08x addr 0x%08x %s%s\n", - (int)pcr->pci_base0, - (int)(pcr->pci_base0 & - (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base0 & 0x1) ? "I/O" : "MEM", - ((pcr->pci_base0 & 0x9) == 0x8) ? " PREFETCHABLE" :""); - } - } - if ((pcr->pci_base1) && ((pcr->pci_base0 & 0x7) != 0x4)) { - if ((pcr->pci_base1 & 0x7) == 0x4) { - printf(" BASE1 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n", - (int)pcr->pci_base2, (int)pcr->pci_base1, - (int)pcr->pci_base2, - (int)(pcr->pci_base1 & - (pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base1 & 0x8) ? " PREFETCHABLE" :""); - } else { - printf(" BASE1 0x%08x addr 0x%08x %s%s\n", - (int)pcr->pci_base1, - (int)(pcr->pci_base1 & - (pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base1 & 0x1) ? "I/O" : "MEM", - ((pcr->pci_base1 & 0x9) == 0x8) ? " PREFETCHABLE" :""); - } - } - if ((pcr->pci_base2) && ((pcr->pci_base1 & 0x7) != 0x4)) { - if ((pcr->pci_base2 & 0x7) == 0x4) { - printf(" BASE2 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n", - (int)pcr->pci_base3, (int)pcr->pci_base2, - (int)pcr->pci_base3, - (int)(pcr->pci_base2 & - (pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base2 & 0x8) ? " PREFETCHABLE" :""); - } else { - printf(" BASE2 0x%08x addr 0x%08x %s%s\n", - (int)pcr->pci_base2, - (int)(pcr->pci_base2 & - (pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base2 & 0x1) ? "I/O" : "MEM", - ((pcr->pci_base2 & 0x9) == 0x8) ? " PREFETCHABLE" :""); - } - } - if ((pcr->pci_base3) && ((pcr->pci_base2 & 0x7) != 0x4)) { - if ((pcr->pci_base3 & 0x7) == 0x4) { - printf(" BASE3 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n", - (int)pcr->pci_base4, (int)pcr->pci_base3, - (int)pcr->pci_base4, - (int)(pcr->pci_base3 & - (pcr->pci_base3 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base3 & 0x8) ? " PREFETCHABLE" :""); - } else { - printf(" BASE3 0x%08x addr 0x%08x %s%s\n", - (int)pcr->pci_base3, - (int)(pcr->pci_base3 & - (pcr->pci_base3 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base3 & 0x1) ? "I/O" : "MEM", - ((pcr->pci_base3 & 0x9) == 0x8) ? " PREFETCHABLE" :""); - } - } - if ((pcr->pci_base4) && ((pcr->pci_base3 & 0x7) != 0x4)) { - if ((pcr->pci_base4 & 0x7) == 0x4) { - printf(" BASE4 0x%08x%08x addr 0x%08x%08x MEM%s 64BIT\n", - (int)pcr->pci_base5, (int)pcr->pci_base4, - (int)pcr->pci_base5, - (int)(pcr->pci_base4 & - (pcr->pci_base4 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base4 & 0x8) ? " PREFETCHABLE" :""); - } else { - printf(" BASE4 0x%08x addr 0x%08x %s%s\n", - (int)pcr->pci_base4, - (int)(pcr->pci_base4 & - (pcr->pci_base4 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base4 & 0x1) ? "I/O" : "MEM", - ((pcr->pci_base4 & 0x9) == 0x8) ? " PREFETCHABLE" :""); - } - } - if ((pcr->pci_base5) && ((pcr->pci_base4 & 0x7) != 0x4)) { - printf(" BASE5 0x%08x addr 0x%08x %s%s%s\n", - (int)pcr->pci_base5, - (int)(pcr->pci_base5 & - (pcr->pci_base5 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)), - (pcr->pci_base5 & 0x1) ? "I/O" : "MEM", - ((pcr->pci_base5 & 0x9) == 0x8) ? " PREFETCHABLE" :"", - ((pcr->pci_base5 & 0x7) == 0x4) ? " 64BIT" : ""); - } - if (pcr->pci_baserom) - printf(" BASEROM 0x%08x addr 0x%08x %sdecode-enabled\n", - (int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000), - pcr->pci_baserom & 0x1 ? "" : "not-"); - if (pcr->pci_max_min_ipin_iline) - printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x" - " INT_PIN 0x%02x INT_LINE 0x%02x\n", - pcr->pci_max_lat, pcr->pci_min_gnt, - pcr->pci_int_pin, pcr->pci_int_line); - if (pcr->pci_user_config) - printf(" BYTE_0 0x%02x BYTE_1 0x%02x" - " BYTE_2 0x%02x BYTE_3 0x%02x\n", - (int)pcr->pci_user_config_0, (int)pcr->pci_user_config_1, - (int)pcr->pci_user_config_2, (int)pcr->pci_user_config_3); -} - -#define PCI_B_FAST_B_B 0x80 -#define PCI_B_SB_RESET 0x40 -#define PCI_B_M_ABORT 0x20 -#define PCI_B_VGA_EN 0x08 -#define PCI_B_ISA_EN 0x04 -#define PCI_B_SERR_EN 0x02 -#define PCI_B_P_ERR 0x01 - -static void -print_bridge_pci_class(pciConfigPtr pcr) -{ - printf(" HEADER 0x%02x LATENCY 0x%02x\n", - pcr->pci_header_type, pcr->pci_latency_timer); - printf(" PRIBUS 0x%02x SECBUS 0x%02x SUBBUS 0x%02x\n", - pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number, - pcr->pci_subordinate_bus_number); - printf(" SECLT 0x%02x SECSTATUS 0x%04x\n", - pcr->pci_secondary_latency_timer, pcr->pci_secondary_status); - - if (pcr->pci_io_base || pcr->pci_io_limit || - pcr->pci_upper_io_base || pcr->pci_upper_io_limit) { - if (((pcr->pci_io_base & 0x0f) == 0x01) || - ((pcr->pci_io_limit & 0x0f) == 0x01)) { - printf(" IOBASE 0x%04x%04x IOLIM 0x%04x%04x\n", - pcr->pci_upper_io_base, (pcr->pci_io_base & 0x00f0) << 8, - pcr->pci_upper_io_limit, (pcr->pci_io_limit << 8) | 0x0fff); - } else { - printf(" IOBASE 0x%04x IOLIM 0x%04x\n", - (pcr->pci_io_base & 0x00f0) << 8, - (pcr->pci_io_limit << 8) | 0x0fff); - } - } - - if (pcr->pci_mem_base || pcr->pci_mem_limit) - printf(" NOPREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n", - (pcr->pci_mem_base & 0x00fff0) << 16, - (pcr->pci_mem_limit << 16) | 0x0fffff); - - if (pcr->pci_prefetch_mem_base || pcr->pci_prefetch_mem_limit || - pcr->pci_prefetch_upper_mem_base || - pcr->pci_prefetch_upper_mem_limit) { - if (((pcr->pci_prefetch_mem_base & 0x0f) == 0x01) || - ((pcr->pci_prefetch_mem_limit & 0x0f) == 0x01)) { - printf(" PREFETCH_MEMBASE 0x%08x%08x MEMLIM 0x%08x%08x\n", - (int)pcr->pci_prefetch_upper_mem_base, - (pcr->pci_prefetch_mem_base & 0x00fff0) << 16, - (int)pcr->pci_prefetch_upper_mem_limit, - (pcr->pci_prefetch_mem_limit << 16) | 0x0fffff); - } else { - printf(" PREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n", - (pcr->pci_prefetch_mem_base & 0x00fff0) << 16, - (pcr->pci_prefetch_mem_limit << 16) | 0x0fffff); - } - } - - printf(" %sFAST_B2B %sSEC_BUS_RST %sM_ABRT %sVGA_EN %sISA_EN" - " %sSERR_EN %sPERR_EN\n", - (pcr->pci_bridge_control & PCI_B_FAST_B_B) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_SB_RESET) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_M_ABORT) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_VGA_EN) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_ISA_EN) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_SERR_EN) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_P_ERR) ? "" : "NO_"); -} - -static void -print_mach64(pciConfigPtr pcr) -{ - CARD32 sparse_io = 0; - - printf(" CardVendor 0x%04x card 0x%04x\n", - pcr->pci_subsys_vendor, pcr->pci_subsys_card); - printf(" STATUS 0x%04x COMMAND 0x%04x\n", - pcr->pci_status, pcr->pci_command); - printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", - pcr->pci_base_class, pcr->pci_sub_class, - pcr->pci_prog_if, pcr->pci_rev_id); - printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", - pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer, - pcr->pci_cache_line_size); - if (pcr->pci_base0) - printf(" APBASE 0x%08x addr 0x%08x\n", - (int)pcr->pci_base0, (int)(pcr->pci_base0 & - (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0))); - if (pcr->pci_base1) - printf(" BLOCKIO 0x%08x addr 0x%08x\n", - (int)pcr->pci_base1, (int)(pcr->pci_base1 & - (pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0))); - if (pcr->pci_base2) - printf(" REGBASE 0x%08x addr 0x%08x\n", - (int)pcr->pci_base2, (int)(pcr->pci_base2 & - (pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0))); - if (pcr->pci_baserom) - printf(" BASEROM 0x%08x addr 0x%08x %sdecode-enabled\n", - (int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000), - pcr->pci_baserom & 0x1 ? "" : "not-"); - if (pcr->pci_max_min_ipin_iline) - printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x" - " INT_PIN 0x%02x INT_LINE 0x%02x\n", - pcr->pci_max_lat, pcr->pci_min_gnt, - pcr->pci_int_pin, pcr->pci_int_line); - switch (pcr->pci_user_config_0 & 0x03) { - case 0: - sparse_io = 0x2ec; - break; - case 1: - sparse_io = 0x1cc; - break; - case 2: - sparse_io = 0x1c8; - break; - } - printf(" SPARSEIO 0x%03x %s IO enabled %sable 0x46E8\n", - (int)sparse_io, pcr->pci_user_config_0 & 0x04 ? "Block" : "Sparse", - pcr->pci_user_config_0 & 0x08 ? "Dis" : "En"); -} - -static void -print_i128(pciConfigPtr pcr) -{ - printf(" CardVendor 0x%04x card 0x%04x\n", - pcr->pci_subsys_vendor, pcr->pci_subsys_card); - printf(" STATUS 0x%04x COMMAND 0x%04x\n", - pcr->pci_status, pcr->pci_command); - printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", - pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if, - pcr->pci_rev_id); - printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", - pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer, - pcr->pci_cache_line_size); - printf(" MW0_AD 0x%08x addr 0x%08x %spre-fetchable\n", - (int)pcr->pci_base0, (int)(pcr->pci_base0 & 0xFFC00000), - pcr->pci_base0 & 0x8 ? "" : "not-"); - printf(" MW1_AD 0x%08x addr 0x%08x %spre-fetchable\n", - (int)pcr->pci_base1, (int)(pcr->pci_base1 & 0xFFC00000), - pcr->pci_base1 & 0x8 ? "" : "not-"); - printf(" XYW_AD(A) 0x%08x addr 0x%08x\n", - (int)pcr->pci_base2, (int)(pcr->pci_base2 & 0xFFC00000)); - printf(" XYW_AD(B) 0x%08x addr 0x%08x\n", - (int)pcr->pci_base3, (int)(pcr->pci_base3 & 0xFFC00000)); - printf(" RBASE_G 0x%08x addr 0x%08x\n", - (int)pcr->pci_base4, (int)(pcr->pci_base4 & 0xFFFF0000)); - printf(" IO 0x%08x addr 0x%08x\n", - (int)pcr->pci_base5, (int)(pcr->pci_base5 & 0xFFFFFF00)); - printf(" RBASE_E 0x%08x addr 0x%08x %sdecode-enabled\n", - (int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000), - pcr->pci_baserom & 0x1 ? "" : "not-"); - if (pcr->pci_max_min_ipin_iline) - printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x" - " INT_PIN 0x%02x INT_LINE 0x%02x\n", - pcr->pci_max_lat, pcr->pci_min_gnt, - pcr->pci_int_pin, pcr->pci_int_line); -} - -static void -print_dc21050(pciConfigPtr pcr) -{ - printf(" STATUS 0x%04x COMMAND 0x%04x\n", - pcr->pci_status, pcr->pci_command); - printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", - pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if, - pcr->pci_rev_id); - printf(" BIST 0x%02x HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", - pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer, - pcr->pci_cache_line_size); - printf(" PRIBUS 0x%02x SECBUS 0x%02x SUBBUS 0x%02x SECLT 0x%02x\n", - pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number, - pcr->pci_subordinate_bus_number, pcr->pci_secondary_latency_timer); - printf(" IOBASE 0x%02x IOLIM 0x%02x SECSTATUS 0x%04x\n", - pcr->pci_io_base << 8, (pcr->pci_io_limit << 8) | 0xfff, - pcr->pci_secondary_status); - printf(" NOPREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n", - pcr->pci_mem_base << 16, (pcr->pci_mem_limit << 16) | 0xfffff); - printf(" PREFETCH_MEMBASE 0x%08x MEMLIM 0x%08x\n", - pcr->pci_prefetch_mem_base << 16, - (pcr->pci_prefetch_mem_limit << 16) | 0xfffff); - printf(" RBASE_E 0x%08x addr 0x%08x %sdecode-enabled\n", - (int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000), - pcr->pci_baserom & 0x1 ? "" : "not-"); - if (pcr->pci_max_min_ipin_iline) - printf(" MAX_LAT 0x%02x MIN_GNT 0x%02x" - " INT_PIN 0x%02x INT_LINE 0x%02x\n", - pcr->pci_max_lat, pcr->pci_min_gnt, - pcr->pci_int_pin, pcr->pci_int_line); -} - -static void -print_simba(pciConfigPtr pcr) -{ - int i; - CARD8 io, mem; - - printf(" STATUS 0x%04x COMMAND 0x%04x\n", - pcr->pci_status, pcr->pci_command); - printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", - pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if, - pcr->pci_rev_id); - printf(" HEADER 0x%02x LATENCY 0x%02x CACHE 0x%02x\n", - pcr->pci_header_type, pcr->pci_latency_timer, - pcr->pci_cache_line_size); - printf(" PRIBUS 0x%02x SECBUS 0x%02x SUBBUS 0x%02x SECLT 0x%02x\n", - pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number, - pcr->pci_subordinate_bus_number, pcr->pci_secondary_latency_timer); - printf(" SECSTATUS 0x%04x\n", - pcr->pci_secondary_status); - printf(" %sFAST_B2B %sSEC_BUS_RST %sM_ABRT %sVGA_EN %sISA_EN" - " %sSERR_EN %sPERR_EN\n", - (pcr->pci_bridge_control & PCI_B_FAST_B_B) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_SB_RESET) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_M_ABORT) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_VGA_EN) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_ISA_EN) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_SERR_EN) ? "" : "NO_", - (pcr->pci_bridge_control & PCI_B_P_ERR) ? "" : "NO_"); - printf(" TICK 0x%08lx SECCNTL 0x%02x\n", (long) - pciReadLong(pcr->tag, 0x00b0), pciReadByte(pcr->tag, 0x00dd)); - printf(" MASTER RETRIES: PRIMARY 0x%02x, SECONDARY 0x%02x\n", - pciReadByte(pcr->tag, 0x00c0), pciReadByte(pcr->tag, 0x00dc)); - printf(" TARGET RETRIES: PIO 0x%02x, DMA 0x%02x\n", - pciReadByte(pcr->tag, 0x00d8), pciReadByte(pcr->tag, 0x00da)); - printf(" TARGET LATENCY: PIO 0x%02x, DMA 0x%02x\n", - pciReadByte(pcr->tag, 0x00d9), pciReadByte(pcr->tag, 0x00db)); - printf(" DMA AFSR 0x%08lx%08lx AFAR 0x%08lx%08lx\n", - (long)pciReadLong(pcr->tag, 0x00cc), - (long)pciReadLong(pcr->tag, 0x00c8), - (long)pciReadLong(pcr->tag, 0x00d4), - (long)pciReadLong(pcr->tag, 0x00d0)); - printf(" PIO AFSR 0x%08lx%08lx AFAR 0x%08lx%08lx\n", - (long)pciReadLong(pcr->tag, 0x00ec), - (long)pciReadLong(pcr->tag, 0x00e8), - (long)pciReadLong(pcr->tag, 0x00f4), - (long)pciReadLong(pcr->tag, 0x00f0)); - printf(" PCI CNTL 0x%08lx%08lx DIAG 0x%08lx%08lx\n", - (long)pciReadLong(pcr->tag, 0x00e4), - (long)pciReadLong(pcr->tag, 0x00e0), - (long)pciReadLong(pcr->tag, 0x00fc), - (long)pciReadLong(pcr->tag, 0x00f8)); - printf(" MAPS: I/O 0x%02x, MEM 0x%02x\n", - (io = pciReadByte(pcr->tag, 0x00de)), - (mem = pciReadByte(pcr->tag, 0x00df))); - for (i = 0; i < 8; i++) - if (io & (1 << i)) - printf(" BUS I/O 0x%06x-0x%06x\n", i << 21, ((i + 1) << 21) - 1); - for (i = 0; i < 8; i++) - if (mem & (1 << i)) - printf(" BUS MEM 0x%08x-0x%08x\n", i << 29, ((i + 1) << 29) - 1); -} - -static int cbn_460gx = -1; - -static void -print_460gx_sac(pciConfigPtr pcr) -{ - CARD32 tmp; - - /* Print generalities */ - printf(" STATUS 0x%04x COMMAND 0x%04x\n", - pcr->pci_status, pcr->pci_command); - printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", - pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if, - pcr->pci_rev_id); - - tmp = pcr->pci_user_config; - pcr->pci_user_config = 0; - print_default_class(pcr); - pcr->pci_user_config = tmp; - - /* Only print what XFree86 might be interested in */ - if (pcr->busnum == 0) { - if ((pcr->devnum != 0x10) || (pcr->funcnum != 0)) - return; - - /* Get Chipset Bus Number */ - cbn_460gx = (unsigned int)pciReadByte(pcr->tag, 0x0040); - printf(" CBN 0x%02x CBUSES 0x%02x\n", - cbn_460gx, pciReadByte(pcr->tag, 0x0044)); - - return; - } - - if ((pcr->busnum != cbn_460gx) || (pcr->funcnum != 0)) - return; - - switch (pcr->devnum) { - case 0: - printf(" F16NUM 0x%02x F16CPL 0x%02x DEVNPRES 0x%08lx\n", - pciReadByte(pcr->tag, 0x0060), pciReadByte(pcr->tag, 0x0078), - (long)pciReadLong(pcr->tag, 0x0070)); - - return; - - case 0x10: - printf(" TOM 0x%04x IORD 0x%04x\n", - pciReadWord(pcr->tag, 0x0050), pciReadWord(pcr->tag, 0x008E)); - /* Fall through */ - - case 0x11: case 0x12: case 0x13: - case 0x14: case 0x15: case 0x16: case 0x17: - printf(" BUSNO 0x%02x SUBNO 0x%02x\n", - pciReadByte(pcr->tag, 0x0048), pciReadByte(pcr->tag, 0x0049)); - printf(" VGASE 0x%02x PCIS 0x%02x IOR 0x%02x\n", - pciReadByte(pcr->tag, 0x0080), pciReadByte(pcr->tag, 0x0084), - pciReadByte(pcr->tag, 0x008C)); - /* Fall through */ - - default: - return; - } -} - -static void -print_460gx_pxb(pciConfigPtr pcr) -{ - CARD32 tmp; - - /* Print generalities */ - printf(" STATUS 0x%04x COMMAND 0x%04x\n", - pcr->pci_status, pcr->pci_command); - printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", - pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if, - pcr->pci_rev_id); - - tmp = pcr->pci_user_config; - pcr->pci_user_config = 0; - print_default_class(pcr); - pcr->pci_user_config = tmp; - - /* Only print what XFree86 might be interested in */ - printf(" ERRCMD 0x%02x GAPEN 0x%02x\n", - pciReadByte(pcr->tag, 0x0046), pciReadByte(pcr->tag, 0x0060)); -} - -static void -print_460gx_gxb(pciConfigPtr pcr) -{ - CARD32 tmp; - - /* Print generalities */ - printf(" STATUS 0x%04x COMMAND 0x%04x\n", - pcr->pci_status, pcr->pci_command); - printf(" CLASS 0x%02x 0x%02x 0x%02x REVISION 0x%02x\n", - pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if, - pcr->pci_rev_id); - - tmp = pcr->pci_user_config; - pcr->pci_user_config = 0; - print_default_class(pcr); - pcr->pci_user_config = tmp; - - /* Only print what XFree86 might be interested in */ - printf(" BAPBASE 0x%08lx%08lx AGPSIZ 0x%02x VGAGE 0x%02x\n", - (long)pciReadLong(pcr->tag, 0x009C), - (long)pciReadLong(pcr->tag, 0x0098), - pciReadByte(pcr->tag, 0x00A2), pciReadByte(pcr->tag, 0x0060)); -} - -#include "xf86getpagesize.c" diff --git a/hw/xfree86/utils/scanpci/scanpci.man.pre b/hw/xfree86/utils/scanpci/scanpci.man.pre deleted file mode 100644 index 2c9bcc964..000000000 --- a/hw/xfree86/utils/scanpci/scanpci.man.pre +++ /dev/null @@ -1,42 +0,0 @@ -.\" $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.man,v 3.2 2000/12/11 20:18:45 dawes Exp $ -.TH SCANPCI 1 __vendorversion__ -.SH NAME -scanpci - scan/probe PCI buses -.SH SYNOPSIS -.B scanpci -.RB [ \-v12OfV ] -.SH DESCRIPTION -.I Scanpci -is a utility that can be used to scan PCI buses and report information -about the configuration space settings for each PCI device. -On most platforms, -.I scanpci -can only be run by the root user. -.SH OPTIONS -.TP 8 -.B \-v -Print the configuration space information for each device in a verbose -format. Without this option, only a brief description is printed for -each device. -.TP 8 -.B \-1 -Use PCI config type 1. -.TP 8 -.B \-2 -Use PCI config type 2. -.TP 8 -.B \-f -Used in conjunction with the above two options, this forces the specified -configuration type to be used for config space access. -.TP 8 -.B \-O -Use the OS's PCI config space access mechanism to access the PCI config -space (when available). -.TP 8 -.BI "\-V " n -Set the verbosity level to -.I n -for the internal PCI scanner. This is primarily for debugging use. -.SH "SEE ALSO" -pcitweak(1) -.SH AUTHORS diff --git a/hw/xfree86/utils/xorgcfg/loadmod.c b/hw/xfree86/utils/xorgcfg/loadmod.c index 6f83f3509..1207820ce 100644 --- a/hw/xfree86/utils/xorgcfg/loadmod.c +++ b/hw/xfree86/utils/xorgcfg/loadmod.c @@ -69,15 +69,13 @@ void xf86Msg(int, const char*, ...); void xf86MsgVerb(int, int, const char*, ...); void xf86PrintChipsets(const char*, const char*, SymTabPtr); void xf86ErrorFVerb(int verb, const char *format, ...); -pciVideoPtr *xf86GetPciVideoInfo(void); int xf86MatchDevice(const char*, GDevPtr**); int xf86MatchPciInstances(const char*, int, SymTabPtr, PciChipsets*, GDevPtr*, int, DriverPtr,int**); int xf86MatchIsaInstances(const char*, SymTabPtr, pointer*, DriverPtr, pointer, GDevPtr*, int, int**); void *xf86LoadDrvSubModule(DriverPtr drv, const char*); void xf86DrvMsg(int, int, const char*, ...); -pciConfigPtr *xf86GetPciConfigInfo(void); Bool xf86IsPrimaryPci(pcVideoPtr*); -Bool xf86CheckPciSlot(int bus, int device, int func); +Bool xf86CheckPciSlot( const struct pci_device * ); #endif extern char *loaderPath, **loaderList, **ploaderList; @@ -306,14 +304,12 @@ LOOKUP xfree86LookupTab[] = { SYMFUNC(ErrorF) SYMFUNC(xf86PrintChipsets) SYMFUNC(xf86ErrorFVerb) - SYMFUNC(xf86GetPciVideoInfo) SYMFUNC(xf86MatchDevice) SYMFUNC(xf86MatchPciInstances) SYMFUNC(xf86MatchIsaInstances) SYMFUNC(Xfree) SYMFUNC(xf86LoadDrvSubModule) SYMFUNC(xf86DrvMsg) - SYMFUNC(xf86GetPciConfigInfo) SYMFUNC(xf86IsPrimaryPci) SYMFUNC(xf86CheckPciSlot) SYMFUNC(XNFalloc) @@ -607,17 +603,6 @@ xf86PrintChipsets(const char *name, const char *msg, SymTabPtr chipsets) chips = chipsets; } -_X_EXPORT pciVideoPtr * -xf86GetPciVideoInfo(void) -{ - static pciVideoRec pci_video; - static pciVideoPtr pci_video_ptr[2] = { &pci_video }; - - memset(&pci_video, 0, sizeof(pciVideoRec)); - - return (pci_video_ptr); -} - _X_EXPORT int xf86MatchDevice(const char *name, GDevPtr **gdev) { @@ -661,12 +646,6 @@ xf86LoadDrvSubModule(DriverPtr drv, const char *name) return (ret); } -_X_EXPORT pciConfigPtr * -xf86GetPciConfigInfo(void) -{ - return (NULL); -} - _X_EXPORT Bool xf86IsPrimaryPci(pciVideoPtr pPci) { @@ -674,8 +653,9 @@ xf86IsPrimaryPci(pciVideoPtr pPci) } _X_EXPORT Bool -xf86CheckPciSlot(int bus, int device, int func) +xf86CheckPciSlot( const struct pci_device * d ) { + (void) d; return (False); } #endif diff --git a/hw/xfree86/vgahw/vgaHW.c b/hw/xfree86/vgahw/vgaHW.c index 36fd0099d..ccbd19574 100644 --- a/hw/xfree86/vgahw/vgaHW.c +++ b/hw/xfree86/vgahw/vgaHW.c @@ -30,6 +30,8 @@ #include "xf86cmap.h" +#include "Pci.h" + #ifndef SAVE_FONT1 #define SAVE_FONT1 1 #endif @@ -1636,7 +1638,6 @@ vgaHWGetHWRec(ScrnInfoPtr scrp) { vgaRegPtr regp; vgaHWPtr hwp; - pciVideoPtr pvp; int i; /* @@ -1722,8 +1723,7 @@ vgaHWGetHWRec(ScrnInfoPtr scrp) vgaHWSetStdFuncs(hwp); hwp->PIOOffset = scrp->domainIOBase; - if ((pvp = xf86GetPciInfoForEntity(scrp->entityList[0]))) - hwp->Tag = pciTag(pvp->bus, pvp->device, pvp->func); + hwp->dev = xf86GetPciInfoForEntity(scrp->entityList[0]); return TRUE; } @@ -1775,7 +1775,7 @@ vgaHWMapMem(ScrnInfoPtr scrp) #ifdef DEBUG ErrorF("Mapping VGAMem\n"); #endif - hwp->Base = xf86MapDomainMemory(scr_index, VIDMEM_MMIO_32BIT, hwp->Tag, + hwp->Base = xf86MapDomainMemory(scr_index, VIDMEM_MMIO_32BIT, hwp->dev, hwp->MapPhys, hwp->MapSize); return hwp->Base != NULL; } diff --git a/hw/xfree86/vgahw/vgaHW.h b/hw/xfree86/vgahw/vgaHW.h index ff7d1e5e0..a38ea7559 100644 --- a/hw/xfree86/vgahw/vgaHW.h +++ b/hw/xfree86/vgahw/vgaHW.h @@ -156,7 +156,7 @@ typedef struct _vgaHWRec { = pioreg */ vgaHWReadProcPtr readEnable; vgaHWWriteProcPtr writeEnable; - PCITAG Tag; + struct pci_device *dev; } vgaHWRec; /* Some macros that VGA drivers can use in their ChipProbe() function */ |