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authorvboxsync <vboxsync@cfe28804-0f27-0410-a406-dd0f0b0b656f>2019-01-07 13:48:16 +0000
committervboxsync <vboxsync@cfe28804-0f27-0410-a406-dd0f0b0b656f>2019-01-07 13:48:16 +0000
commit5471ffaefccba01b854ba482b042fc777ed7b8a4 (patch)
tree29b70a814628480170b10a232913cd357c920532 /src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp
parentfca30fa70e121f6dc6a4b06fad609b5b928b31b1 (diff)
downloadVirtualBox-svn-5471ffaefccba01b854ba482b042fc777ed7b8a4.tar.gz
Port r124260, r124263, r124271, r124273, r124277, r124278, r124279, r124284, r124285, r124286, r124287, r124288, r124289 and r124290 (Ported fixes over from 5.2, see bugref:9179 for more information)
git-svn-id: https://www.virtualbox.org/svn/vbox/trunk@76678 cfe28804-0f27-0410-a406-dd0f0b0b656f
Diffstat (limited to 'src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp')
-rw-r--r--src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp18
1 files changed, 11 insertions, 7 deletions
diff --git a/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp b/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp
index cea7d3591b0..aab78ef4986 100644
--- a/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp
+++ b/src/VBox/VMM/VMMAll/CPUMAllMsrs.cpp
@@ -1520,13 +1520,15 @@ static DECLCALLBACK(VBOXSTRICTRC) cpumMsrRd_Ia32ArchCapabilities(PVMCPU pVCpu, u
}
-
-
-
-
-
-
-
+/** @callback_method_impl{FNCPUMWRMSR} */
+static DECLCALLBACK(VBOXSTRICTRC) cpumMsrWr_Ia32FlushCmd(PVMCPU pVCpu, uint32_t idMsr, PCCPUMMSRRANGE pRange, uint64_t uValue, uint64_t uRawValue)
+{
+ RT_NOREF_PV(pVCpu); RT_NOREF_PV(idMsr); RT_NOREF_PV(pRange); RT_NOREF_PV(uRawValue);
+ if ((uValue & ~MSR_IA32_FLUSH_CMD_F_L1D) == 0)
+ return VINF_SUCCESS;
+ Log(("CPUM: Invalid MSR_IA32_FLUSH_CMD_ bits (trying to write %#llx)\n", uValue));
+ return VERR_CPUM_RAISE_GP_0;
+}
@@ -5336,6 +5338,7 @@ static const PFNCPUMWRMSR g_aCpumWrMsrFns[kCpumMsrWrFn_End] =
cpumMsrWr_Ia32DebugInterface,
cpumMsrWr_Ia32SpecCtrl,
cpumMsrWr_Ia32PredCmd,
+ cpumMsrWr_Ia32FlushCmd,
cpumMsrWr_Amd64Efer,
cpumMsrWr_Amd64SyscallTarget,
@@ -6042,6 +6045,7 @@ int cpumR3MsrStrictInitChecks(void)
CPUM_ASSERT_WR_MSR_FN(Ia32DebugInterface);
CPUM_ASSERT_WR_MSR_FN(Ia32SpecCtrl);
CPUM_ASSERT_WR_MSR_FN(Ia32PredCmd);
+ CPUM_ASSERT_WR_MSR_FN(Ia32FlushCmd);
CPUM_ASSERT_WR_MSR_FN(Amd64Efer);
CPUM_ASSERT_WR_MSR_FN(Amd64SyscallTarget);