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authorvboxsync <vboxsync@cfe28804-0f27-0410-a406-dd0f0b0b656f>2019-06-26 09:09:46 +0000
committervboxsync <vboxsync@cfe28804-0f27-0410-a406-dd0f0b0b656f>2019-06-26 09:09:46 +0000
commit85befcd1a20c6815f58eb3fabd2ad9ed8a271474 (patch)
treec9b6ae8272f0bb247cdf49cc96dc748cae9f9186 /src/VBox/VMM/VMMR3/HM.cpp
parent1e3adb31d8695d9e7db33f94b1237630831b62d3 (diff)
downloadVirtualBox-svn-85befcd1a20c6815f58eb3fabd2ad9ed8a271474.tar.gz
VMM/HM: Nested VMX: bugref:9180 Implemented VMCS shadowing.
git-svn-id: https://www.virtualbox.org/svn/vbox/trunk@79345 cfe28804-0f27-0410-a406-dd0f0b0b656f
Diffstat (limited to 'src/VBox/VMM/VMMR3/HM.cpp')
-rw-r--r--src/VBox/VMM/VMMR3/HM.cpp39
1 files changed, 9 insertions, 30 deletions
diff --git a/src/VBox/VMM/VMMR3/HM.cpp b/src/VBox/VMM/VMMR3/HM.cpp
index 85d83b546d8..b654bdc71cc 100644
--- a/src/VBox/VMM/VMMR3/HM.cpp
+++ b/src/VBox/VMM/VMMR3/HM.cpp
@@ -1596,30 +1596,6 @@ static int hmR3InitFinalizeR0Intel(PVM pVM)
VERR_HM_IPE_1);
/*
- * Enable VPID if configured and supported.
- */
- if (pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed1 & VMX_PROC_CTLS2_VPID)
- pVM->hm.s.vmx.fVpid = pVM->hm.s.vmx.fAllowVpid;
-
-#if 0
- /*
- * Enable APIC register virtualization and virtual-interrupt delivery if supported.
- */
- if ( (pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed1 & VMX_PROC_CTLS2_APIC_REG_VIRT)
- && (pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed1 & VMX_PROC_CTLS2_VIRT_INTR_DELIVERY))
- pVM->hm.s.fVirtApicRegs = true;
-
- /*
- * Enable posted-interrupt processing if supported.
- */
- /** @todo Add and query IPRT API for host OS support for posted-interrupt IPI
- * here. */
- if ( (pVM->hm.s.vmx.Msrs.PinCtls.n.allowed1 & VMX_PIN_CTLS_POSTED_INT)
- && (pVM->hm.s.vmx.Msrs.ExitCtls.n.allowed1 & VMX_EXIT_CTLS_ACK_EXT_INT))
- pVM->hm.s.fPostedIntrs = true;
-#endif
-
- /*
* Disallow RDTSCP in the guest if there is no secondary process-based VM execution controls as otherwise
* RDTSCP would cause a #UD. There might be no CPUs out there where this happens, as RDTSCP was introduced
* in Nehalems and secondary VM exec. controls should be supported in all of them, but nonetheless it's Intel...
@@ -1770,12 +1746,6 @@ static int hmR3InitFinalizeR0Intel(PVM pVM)
else
Assert(!pVM->hm.s.vmx.fUnrestrictedGuest);
- if (pVM->hm.s.fVirtApicRegs)
- LogRel(("HM: Enabled APIC-register virtualization support\n"));
-
- if (pVM->hm.s.fPostedIntrs)
- LogRel(("HM: Enabled posted-interrupt processing support\n"));
-
if (pVM->hm.s.vmx.fVpid)
{
LogRel(("HM: Enabled VPID\n"));
@@ -1798,6 +1768,15 @@ static int hmR3InitFinalizeR0Intel(PVM pVM)
else
LogRel(("HM: Disabled VMX-preemption timer\n"));
+ if (pVM->hm.s.fVirtApicRegs)
+ LogRel(("HM: Enabled APIC-register virtualization support\n"));
+
+ if (pVM->hm.s.fPostedIntrs)
+ LogRel(("HM: Enabled posted-interrupt processing support\n"));
+
+ if (pVM->hm.s.vmx.fUseVmcsShadowing)
+ LogRel(("HM: Enabled VMCS shadowing support\n"));
+
return VINF_SUCCESS;
}