diff options
author | vboxsync <vboxsync@cfe28804-0f27-0410-a406-dd0f0b0b656f> | 2017-10-11 16:11:23 +0000 |
---|---|---|
committer | vboxsync <vboxsync@cfe28804-0f27-0410-a406-dd0f0b0b656f> | 2017-10-11 16:11:23 +0000 |
commit | e5f0bc1332edc628534af2f25d53f2310abb25d0 (patch) | |
tree | f2cade1ee25d514c6d505a6243de510451fae9f1 /src/VBox/VMM | |
parent | 044db295034debbc9d8f0313802103185d1a7360 (diff) | |
download | VirtualBox-svn-e5f0bc1332edc628534af2f25d53f2310abb25d0.tar.gz |
Global: replace fall-through comments with RT_FALL_THRU().
bugref:8192: gcc warnings
git-svn-id: https://www.virtualbox.org/svn/vbox/trunk@69046 cfe28804-0f27-0410-a406-dd0f0b0b656f
Diffstat (limited to 'src/VBox/VMM')
25 files changed, 55 insertions, 56 deletions
diff --git a/src/VBox/VMM/VMMAll/APICAll.cpp b/src/VBox/VMM/VMMAll/APICAll.cpp index da9b0d7c037..0ae4ca51210 100644 --- a/src/VBox/VMM/VMMAll/APICAll.cpp +++ b/src/VBox/VMM/VMMAll/APICAll.cpp @@ -2122,7 +2122,7 @@ VMM_INT_DECL(VBOXSTRICTRC) APICWriteMsr(PVMCPU pVCpu, uint32_t u32Reg, uint64_t break; } } - /* fall thru */ + RT_FALL_THRU(); /* Read-only MSRs: */ case MSR_IA32_X2APIC_ID: case MSR_IA32_X2APIC_VERSION: @@ -2536,7 +2536,7 @@ VMM_INT_DECL(VBOXSTRICTRC) APICLocalInterrupt(PVMCPU pVCpu, uint8_t u8Pin, uint8 /** @todo won't work in R0/RC because callers don't care about rcRZ. */ AssertMsgFailed(("INIT through LINT0/LINT1 is not yet supported\n")); } - /* fall thru */ + RT_FALL_THRU(); case XAPICDELIVERYMODE_FIXED: { PAPICCPU pApicCpu = VMCPU_TO_APICCPU(pVCpu); diff --git a/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp b/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp index 32113fbfbaa..2cc2756f55a 100644 --- a/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp +++ b/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp @@ -1366,7 +1366,7 @@ VMMDECL(void) CPUMGetGuestCpuId(PVMCPU pVCpu, uint32_t uLeaf, uint32_t uSubLeaf, { default: AssertFailed(); - /* fall thru */ + RT_FALL_THRU(); case CPUMUNKNOWNCPUID_DEFAULTS: case CPUMUNKNOWNCPUID_LAST_STD_LEAF: /* ASSUME this is executed */ case CPUMUNKNOWNCPUID_LAST_STD_LEAF_WITH_ECX: /** @todo Implement CPUMUNKNOWNCPUID_LAST_STD_LEAF_WITH_ECX */ diff --git a/src/VBox/VMM/VMMAll/EMAll.cpp b/src/VBox/VMM/VMMAll/EMAll.cpp index 9dd48d9f5be..f5271ee7ec5 100644 --- a/src/VBox/VMM/VMMAll/EMAll.cpp +++ b/src/VBox/VMM/VMMAll/EMAll.cpp @@ -2562,7 +2562,7 @@ static int emInterpretMov(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE case DISQPV_TYPE_IMMEDIATE: if(!(param1.flags & (DISQPV_FLAG_32|DISQPV_FLAG_64))) return VERR_EM_INTERPRETER; - /* fallthru */ + RT_FALL_THRU(); case DISQPV_TYPE_ADDRESS: pDest = (RTGCPTR)param1.val.val64; @@ -2635,7 +2635,7 @@ static int emInterpretMov(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE case DISQPV_TYPE_IMMEDIATE: if(!(param2.flags & (DISQPV_FLAG_32|DISQPV_FLAG_64))) return VERR_EM_INTERPRETER; - /* fallthru */ + RT_FALL_THRU(); case DISQPV_TYPE_ADDRESS: pSrc = (RTGCPTR)param2.val.val64; diff --git a/src/VBox/VMM/VMMAll/IEMAll.cpp b/src/VBox/VMM/VMMAll/IEMAll.cpp index 5db01e919d3..698137c3120 100644 --- a/src/VBox/VMM/VMMAll/IEMAll.cpp +++ b/src/VBox/VMM/VMMAll/IEMAll.cpp @@ -3502,7 +3502,7 @@ IEM_STATIC VBOXSTRICTRC iemRaiseLoadStackFromTss32Or16(PVMCPU pVCpu, PCCPUMCTX p /* * 16-bit TSS (X86TSS16). */ - case X86_SEL_TYPE_SYS_286_TSS_AVAIL: AssertFailed(); /* fall thru */ + case X86_SEL_TYPE_SYS_286_TSS_AVAIL: AssertFailed(); RT_FALL_THRU(); case X86_SEL_TYPE_SYS_286_TSS_BUSY: { uint32_t off = uCpl * 4 + 2; @@ -3529,7 +3529,7 @@ IEM_STATIC VBOXSTRICTRC iemRaiseLoadStackFromTss32Or16(PVMCPU pVCpu, PCCPUMCTX p /* * 32-bit TSS (X86TSS32). */ - case X86_SEL_TYPE_SYS_386_TSS_AVAIL: AssertFailed(); /* fall thru */ + case X86_SEL_TYPE_SYS_386_TSS_AVAIL: AssertFailed(); RT_FALL_THRU(); case X86_SEL_TYPE_SYS_386_TSS_BUSY: { uint32_t off = uCpl * 8 + 4; @@ -4690,7 +4690,7 @@ iemRaiseXcptOrIntInProtMode(PVMCPU pVCpu, case X86_SEL_TYPE_SYS_286_INT_GATE: f32BitGate = false; - /* fall thru */ + RT_FALL_THRU(); case X86_SEL_TYPE_SYS_386_INT_GATE: fEflToClear |= X86_EFL_IF; break; @@ -5776,7 +5776,7 @@ DECL_NO_INLINE(IEM_STATIC, VBOXSTRICTRC) iemRaisePageFault(PVMCPU pVCpu, RTGCPTR default: AssertMsgFailed(("%Rrc\n", rc)); - /* fall thru */ + RT_FALL_THRU(); case VERR_ACCESS_DENIED: uErr = X86_TRAP_PF_P; break; diff --git a/src/VBox/VMM/VMMAll/IEMAllInstructionsOneByte.cpp.h b/src/VBox/VMM/VMMAll/IEMAllInstructionsOneByte.cpp.h index 25f363e03c8..8f5a8435491 100644 --- a/src/VBox/VMM/VMMAll/IEMAllInstructionsOneByte.cpp.h +++ b/src/VBox/VMM/VMMAll/IEMAllInstructionsOneByte.cpp.h @@ -11519,7 +11519,7 @@ FNIEMOP_DEF_2(iemOpHlp_Grp5_far_Ep, uint8_t, bRm, FNIEMCIMPLFARBRANCH *, pfnCImp return VINF_SUCCESS; } /* AMD falls thru. */ - /* fall thru */ + RT_FALL_THRU(); case IEMMODE_32BIT: IEM_MC_BEGIN(3, 1); diff --git a/src/VBox/VMM/VMMAll/PGMAllPhys.cpp b/src/VBox/VMM/VMMAll/PGMAllPhys.cpp index 6f4caabf1f3..f9da3369c16 100644 --- a/src/VBox/VMM/VMMAll/PGMAllPhys.cpp +++ b/src/VBox/VMM/VMMAll/PGMAllPhys.cpp @@ -1077,7 +1077,7 @@ int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys) { case PGM_PAGE_STATE_WRITE_MONITORED: pgmPhysPageMakeWriteMonitoredWritable(pVM, pPage); - /* fall thru */ + RT_FALL_THRU(); default: /* to shut up GCC */ case PGM_PAGE_STATE_ALLOCATED: return VINF_SUCCESS; @@ -1090,7 +1090,7 @@ int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys) case PGM_PAGE_STATE_ZERO: if (PGM_PAGE_IS_MMIO(pPage)) return VERR_PGM_PHYS_PAGE_RESERVED; - /* fall thru */ + RT_FALL_THRU(); case PGM_PAGE_STATE_SHARED: return pgmPhysAllocPage(pVM, pPage, GCPhys); @@ -4432,7 +4432,7 @@ VMM_INT_DECL(int) PGMPhysIemGCPhys2PtrNoLock(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCP break; case PGM_PAGE_STATE_BALLOONED: AssertFailed(); - /* fall thru */ + RT_FALL_THRU(); case PGM_PAGE_STATE_ZERO: case PGM_PAGE_STATE_SHARED: case PGM_PAGE_STATE_WRITE_MONITORED: @@ -4473,7 +4473,7 @@ VMM_INT_DECL(int) PGMPhysIemGCPhys2PtrNoLock(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCP break; case PGM_PAGE_STATE_BALLOONED: AssertFailed(); - /* fall thru */ + RT_FALL_THRU(); case PGM_PAGE_STATE_ZERO: case PGM_PAGE_STATE_SHARED: case PGM_PAGE_STATE_WRITE_MONITORED: diff --git a/src/VBox/VMM/VMMAll/PGMAllPool.cpp b/src/VBox/VMM/VMMAll/PGMAllPool.cpp index 2052492b846..feb4bc275c5 100644 --- a/src/VBox/VMM/VMMAll/PGMAllPool.cpp +++ b/src/VBox/VMM/VMMAll/PGMAllPool.cpp @@ -3985,7 +3985,7 @@ static void pgmPoolTrackClearPageUser(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PCPGMP */ ASMReloadCR3(); #endif - /* fall thru */ + RT_FALL_THRU(); case PGMPOOLKIND_PAE_PD_PHYS: case PGMPOOLKIND_PAE_PDPT_PHYS: case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD: diff --git a/src/VBox/VMM/VMMAll/TMAll.cpp b/src/VBox/VMM/VMMAll/TMAll.cpp index 946eb282842..658146fa1b2 100644 --- a/src/VBox/VMM/VMMAll/TMAll.cpp +++ b/src/VBox/VMM/VMMAll/TMAll.cpp @@ -442,7 +442,7 @@ DECLINLINE(void) tmTimerQueueScheduleOne(PTMTIMERQUEUE pQueue, PTMTIMER pTimer) if (RT_UNLIKELY(!tmTimerTry(pTimer, TMTIMERSTATE_PENDING_SCHEDULE, TMTIMERSTATE_PENDING_RESCHEDULE))) break; /* retry */ tmTimerQueueUnlinkActive(pQueue, pTimer); - /* fall thru */ + RT_FALL_THRU(); /* * Schedule timer (insert into the active list). @@ -461,7 +461,7 @@ DECLINLINE(void) tmTimerQueueScheduleOne(PTMTIMERQUEUE pQueue, PTMTIMER pTimer) if (RT_UNLIKELY(!tmTimerTry(pTimer, TMTIMERSTATE_PENDING_STOP_SCHEDULE, TMTIMERSTATE_PENDING_STOP))) break; /* retry */ tmTimerQueueUnlinkActive(pQueue, pTimer); - /* fall thru */ + RT_FALL_THRU(); /* * Stop the timer (not on the active list). @@ -1617,7 +1617,7 @@ VMMDECL(int) TMTimerSetRelative(PTMTIMER pTimer, uint64_t cTicksToNext, uint64_t * (99.9% sure this that the assertion is caused by DevAPIC.cpp * re-starting the timer in response to a initial_count write.) */ } - /* fall thru */ + RT_FALL_THRU(); case TMTIMERSTATE_EXPIRED_DELIVER: if (tmTimerTryWithLink(pTimer, TMTIMERSTATE_PENDING_SCHEDULE_SET_EXPIRE, enmState)) { diff --git a/src/VBox/VMM/VMMAll/TRPMAll.cpp b/src/VBox/VMM/VMMAll/TRPMAll.cpp index 71d18e43169..07df5a0d945 100644 --- a/src/VBox/VMM/VMMAll/TRPMAll.cpp +++ b/src/VBox/VMM/VMMAll/TRPMAll.cpp @@ -495,7 +495,7 @@ VMMDECL(int) TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGat if (RT_SUCCESS(rc)) Log(("TRPMForwardTrap: caller=%RGv\n", pCallerGC)); } - /* fall thru */ + RT_FALL_THRU(); case X86_XCPT_DF: case X86_XCPT_TS: case X86_XCPT_NP: diff --git a/src/VBox/VMM/VMMR0/HMSVMR0.cpp b/src/VBox/VMM/VMMR0/HMSVMR0.cpp index da8775122b5..4b14d6575e6 100644 --- a/src/VBox/VMM/VMMR0/HMSVMR0.cpp +++ b/src/VBox/VMM/VMMR0/HMSVMR0.cpp @@ -5350,7 +5350,7 @@ static uint32_t hmR0SvmGetIemXcptFlags(PCSVMEVENT pEvent) break; } /** @todo How do we distinguish ICEBP \#DB from the regular one? */ - /* fall thru */ + RT_FALL_THRU(); case SVM_EVENT_NMI: fIemXcptFlags = IEM_XCPT_FLAGS_T_CPU_XCPT; break; diff --git a/src/VBox/VMM/VMMR0/HMVMXR0.cpp b/src/VBox/VMM/VMMR0/HMVMXR0.cpp index ba79ac16718..f2cb00cd762 100644 --- a/src/VBox/VMM/VMMR0/HMVMXR0.cpp +++ b/src/VBox/VMM/VMMR0/HMVMXR0.cpp @@ -7269,7 +7269,7 @@ static void hmR0VmxTrpmTrapToPendingEvent(PVMCPU pVCpu) case X86_XCPT_GP: case X86_XCPT_AC: u32IntInfo |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID; - /* fall thru */ + RT_FALL_THRU(); default: u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT); break; @@ -8247,7 +8247,7 @@ static VBOXSTRICTRC hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uin case X86_XCPT_AC: AssertMsg(VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(u32IntInfo), ("Error-code-valid bit not set for exception that has an error code uVector=%#x\n", uVector)); - /* fall thru */ + RT_FALL_THRU(); default: break; } @@ -11590,10 +11590,10 @@ HMVMX_EXIT_DECL hmR0VmxExitXcptOrNmi(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANS { case VMX_EXIT_INTERRUPTION_INFO_TYPE_PRIV_SW_XCPT: /* Privileged software exception. (#DB from ICEBP) */ Assert(uVector == X86_XCPT_DB); - /* fall thru */ + RT_FALL_THRU(); case VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT: /* Software exception. (#BP or #OF) */ Assert(uVector == X86_XCPT_BP || uVector == X86_XCPT_OF || uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_PRIV_SW_XCPT); - /* fall thru */ + RT_FALL_THRU(); case VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT: { /* @@ -12446,7 +12446,7 @@ HMVMX_EXIT_DECL hmR0VmxExitWrmsr(PVMCPU pVCpu, PCPUMCTX pMixedCtx, PVMXTRANSIENT HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_SYSENTER_ESP_MSR); HMVMXCPU_GST_SET_UPDATED(pVCpu, HMVMX_UPDATED_GUEST_SYSENTER_ESP_MSR); break; - case MSR_K8_FS_BASE: /* fall thru */ + case MSR_K8_FS_BASE: RT_FALL_THRU(); case MSR_K8_GS_BASE: HMCPU_CF_SET(pVCpu, HM_CHANGED_GUEST_SEGMENT_REGS); break; case MSR_K6_EFER: /* already handled above */ break; default: diff --git a/src/VBox/VMM/VMMR3/CSAM.cpp b/src/VBox/VMM/VMMR3/CSAM.cpp index 12a3864f08f..1e1680c4792 100644 --- a/src/VBox/VMM/VMMR3/CSAM.cpp +++ b/src/VBox/VMM/VMMR3/CSAM.cpp @@ -1067,7 +1067,7 @@ static DECLCALLBACK(int) CSAMR3AnalyseCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTR case OP_IRET: if (EMIsRawRing1Enabled(pVM)) break; - /* fall thru */ + RT_FALL_THRU(); case OP_ILLUD2: /* This appears to be some kind of kernel panic in Linux 2.4; no point to continue. */ @@ -1164,11 +1164,11 @@ static DECLCALLBACK(int) CSAMR3AnalyseCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTR if (pCpu->pCurInstr->fParam1 != OP_PARM_REG_CS) break; - /* fall thru */ #ifndef VBOX_WITH_SAFE_STR + RT_FALL_THRU(); case OP_STR: #endif - /* fall thru */ + RT_FALL_THRU(); case OP_LSL: case OP_LAR: case OP_SGDT: diff --git a/src/VBox/VMM/VMMR3/DBGF.cpp b/src/VBox/VMM/VMMR3/DBGF.cpp index 62562b76261..5e9cdc1ff8f 100644 --- a/src/VBox/VMM/VMMR3/DBGF.cpp +++ b/src/VBox/VMM/VMMR3/DBGF.cpp @@ -882,7 +882,7 @@ static int dbgfR3VMMWait(PVM pVM) /* remember return code. */ default: AssertReleaseMsgFailed(("rc=%Rrc is not in the switch!\n", rc)); - /* fall thru */ + RT_FALL_THRU(); case VINF_EM_RESET: case VINF_EM_SUSPEND: case VINF_EM_HALT: diff --git a/src/VBox/VMM/VMMR3/DBGFDisas.cpp b/src/VBox/VMM/VMMR3/DBGFDisas.cpp index d0de7045f41..76c6d4dbde6 100644 --- a/src/VBox/VMM/VMMR3/DBGFDisas.cpp +++ b/src/VBox/VMM/VMMR3/DBGFDisas.cpp @@ -132,7 +132,7 @@ static int dbgfR3DisasInstrFirst(PVM pVM, PVMCPU pVCpu, PDBGFSELINFO pSelInfo, P { default: AssertFailed(); - /* fall thru */ + RT_FALL_THRU(); case DBGF_DISAS_FLAGS_DEFAULT_MODE: enmCpuMode = pState->f64Bits ? DISCPUMODE_64BIT diff --git a/src/VBox/VMM/VMMR3/EM.cpp b/src/VBox/VMM/VMMR3/EM.cpp index 54350564612..bd93fde9bc8 100644 --- a/src/VBox/VMM/VMMR3/EM.cpp +++ b/src/VBox/VMM/VMMR3/EM.cpp @@ -2358,7 +2358,7 @@ VMMR3_INT_DECL(int) EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu) break; } /* fall through and get scheduled. */ - /* fall thru */ + RT_FALL_THRU(); /* * Reschedule. @@ -2521,7 +2521,7 @@ VMMR3_INT_DECL(int) EMR3ExecuteVM(PVM pVM, PVMCPU pVCpu) continue; } /* Else fall through and trigger a guru. */ - /* fall thru */ + RT_FALL_THRU(); case VERR_VMM_RING0_ASSERTION: Log(("EMR3ExecuteVM: %Rrc: %d -> %d (EMSTATE_GURU_MEDITATION)\n", rc, enmOldState, EMSTATE_GURU_MEDITATION)); diff --git a/src/VBox/VMM/VMMR3/EMRaw.cpp b/src/VBox/VMM/VMMR3/EMRaw.cpp index 89ab18f6def..94ccdbd2e11 100644 --- a/src/VBox/VMM/VMMR3/EMRaw.cpp +++ b/src/VBox/VMM/VMMR3/EMRaw.cpp @@ -1030,7 +1030,7 @@ static int emR3RawPrivileged(PVM pVM, PVMCPU pVCpu) pCtx->eip = pOrgInstrGC; } /* no break; we could just return VINF_EM_HALT here */ - /* fall thru */ + RT_FALL_THRU(); case OP_MOV_CR: case OP_MOV_DR: diff --git a/src/VBox/VMM/VMMR3/PATM.cpp b/src/VBox/VMM/VMMR3/PATM.cpp index 3965355f0b4..043f233b384 100644 --- a/src/VBox/VMM/VMMR3/PATM.cpp +++ b/src/VBox/VMM/VMMR3/PATM.cpp @@ -1555,7 +1555,7 @@ static int patmAnalyseBlockCallback(PVM pVM, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_ } break; /* sti doesn't mark the end of a pushf block; only popf does. */ } - /* fall thru */ + RT_FALL_THRU(); case OP_RETN: /* exit point for function replacement */ return VINF_SUCCESS; @@ -5204,10 +5204,10 @@ VMMR3_INT_DECL(int) PATMR3ReadOrgInstr(PVM pVM, RTGCPTR32 GCPtrInstr, uint8_t *p cbToRead = cbMax; switch (cbToRead) { - case 5: pbDst[4] = pbSrc[4]; /* fall thru */ - case 4: pbDst[3] = pbSrc[3]; /* fall thru */ - case 3: pbDst[2] = pbSrc[2]; /* fall thru */ - case 2: pbDst[1] = pbSrc[1]; /* fall thru */ + case 5: pbDst[4] = pbSrc[4]; RT_FALL_THRU(); + case 4: pbDst[3] = pbSrc[3]; RT_FALL_THRU(); + case 3: pbDst[2] = pbSrc[2]; RT_FALL_THRU(); + case 2: pbDst[1] = pbSrc[1]; RT_FALL_THRU(); case 1: pbDst[0] = pbSrc[0]; break; default: diff --git a/src/VBox/VMM/VMMR3/PGM.cpp b/src/VBox/VMM/VMMR3/PGM.cpp index c3af89afa54..2fd694f6671 100644 --- a/src/VBox/VMM/VMMR3/PGM.cpp +++ b/src/VBox/VMM/VMMR3/PGM.cpp @@ -4033,7 +4033,7 @@ static DECLCALLBACK(int) pgmR3CmdPhysToFile(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, default: AssertFailed(); - /* fall thru */ + RT_FALL_THRU(); case PGMPAGETYPE_MMIO: case PGMPAGETYPE_MMIO2_ALIAS_MMIO: case PGMPAGETYPE_SPECIAL_ALIAS_MMIO: diff --git a/src/VBox/VMM/VMMR3/PGMPhys.cpp b/src/VBox/VMM/VMMR3/PGMPhys.cpp index 916eb61dae4..5de09b17b1f 100644 --- a/src/VBox/VMM/VMMR3/PGMPhys.cpp +++ b/src/VBox/VMM/VMMR3/PGMPhys.cpp @@ -2016,7 +2016,7 @@ int pgmR3PhysRamZeroAll(PVM pVM) case PGM_PAGE_STATE_WRITE_MONITORED: rc = pgmPhysPageMakeWritable(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT)); AssertLogRelRCReturn(rc, rc); - /* fall thru */ + RT_FALL_THRU(); case PGM_PAGE_STATE_ALLOCATED: if (pVM->pgm.s.fZeroRamPagesOnReset) @@ -4858,7 +4858,7 @@ int pgmR3PhysChunkMap(PVM pVM, uint32_t idChunk, PPPGMCHUNKR3MAP ppChunk) break; } } - /* fall thru */ + RT_FALL_THRU(); default: rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)pgmR3PhysUnmapChunk, 1, pVM); AssertRC(rc); @@ -5416,7 +5416,7 @@ VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, case PGM_PAGE_STATE_SHARED: if (rc == VINF_PGM_PHYS_TLB_CATCH_WRITE) break; - /* fall thru */ + RT_FALL_THRU(); case PGM_PAGE_STATE_WRITE_MONITORED: rc2 = pgmPhysPageMakeWritable(pVM, pPage, GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK); AssertLogRelRCReturn(rc2, rc2); diff --git a/src/VBox/VMM/VMMR3/PGMPool.cpp b/src/VBox/VMM/VMMR3/PGMPool.cpp index bc959a721c9..45f854e9632 100644 --- a/src/VBox/VMM/VMMR3/PGMPool.cpp +++ b/src/VBox/VMM/VMMR3/PGMPool.cpp @@ -682,9 +682,8 @@ DECLCALLBACK(VBOXSTRICTRC) pgmR3PoolClearAllRendezvous(PVM pVM, PVMCPU pVCpu, vo pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX; } } - /* fall thru */ + RT_FALL_THRU(); #ifdef PGM_WITH_LARGE_PAGES - /* fall thru */ default_case: #endif default: diff --git a/src/VBox/VMM/VMMR3/PGMSavedState.cpp b/src/VBox/VMM/VMMR3/PGMSavedState.cpp index 46152b3d7f4..381afc10355 100644 --- a/src/VBox/VMM/VMMR3/PGMSavedState.cpp +++ b/src/VBox/VMM/VMMR3/PGMSavedState.cpp @@ -1178,7 +1178,7 @@ static int pgmR3PrepRamPages(PVM pVM) default: AssertMsgFailed(("%R[pgmpage]", pPage)); - /* fall thru */ + RT_FALL_THRU(); case PGMPAGETYPE_MMIO2: case PGMPAGETYPE_MMIO2_ALIAS_MMIO: paLSPages[iPage].fZero = 0; @@ -2198,7 +2198,7 @@ DECLINLINE(bool) pgmR3CompareNewAndOldPageTypes(PPGMPAGE pPage, uint8_t uOldType case PGMPAGETYPE_MMIO2_ALIAS_MMIO: uOldPageType = PGMPAGETYPE_OLD_MMIO2_ALIAS_MMIO; break; case PGMPAGETYPE_ROM_SHADOW: uOldPageType = PGMPAGETYPE_OLD_ROM_SHADOW; break; case PGMPAGETYPE_ROM: uOldPageType = PGMPAGETYPE_OLD_ROM; break; - case PGMPAGETYPE_SPECIAL_ALIAS_MMIO: /* fall thru */ + case PGMPAGETYPE_SPECIAL_ALIAS_MMIO: RT_FALL_THRU(); case PGMPAGETYPE_MMIO: uOldPageType = PGMPAGETYPE_OLD_MMIO; break; default: AssertFailed(); @@ -2933,7 +2933,7 @@ static int pgmR3LoadMemory(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t || PGM_PAGE_IS_BALLOONED(pRealPage)) break; /** @todo implement zero page replacing. */ - /* fall thru */ + RT_FALL_THRU(); case PGM_STATE_REC_ROM_VIRGIN: case PGM_STATE_REC_ROM_SHW_RAW: { diff --git a/src/VBox/VMM/VMMR3/SSM.cpp b/src/VBox/VMM/VMMR3/SSM.cpp index 29bb0ae47b4..85e53e70ce9 100644 --- a/src/VBox/VMM/VMMR3/SSM.cpp +++ b/src/VBox/VMM/VMMR3/SSM.cpp @@ -6219,16 +6219,16 @@ static int ssmR3DataReadRecHdrV2(PSSMHANDLE pSSM) { case 6: AssertLogRelMsgReturn((abHdr[6] & 0xc0) == 0x80, ("6/%u: %.*Rhxs\n", cb, cb + 1, &abHdr[0]), VERR_SSM_INTEGRITY_REC_HDR); - /* fall thru */ + RT_FALL_THRU(); case 5: AssertLogRelMsgReturn((abHdr[5] & 0xc0) == 0x80, ("5/%u: %.*Rhxs\n", cb, cb + 1, &abHdr[0]), VERR_SSM_INTEGRITY_REC_HDR); - /* fall thru */ + RT_FALL_THRU(); case 4: AssertLogRelMsgReturn((abHdr[4] & 0xc0) == 0x80, ("4/%u: %.*Rhxs\n", cb, cb + 1, &abHdr[0]), VERR_SSM_INTEGRITY_REC_HDR); - /* fall thru */ + RT_FALL_THRU(); case 3: AssertLogRelMsgReturn((abHdr[3] & 0xc0) == 0x80, ("3/%u: %.*Rhxs\n", cb, cb + 1, &abHdr[0]), VERR_SSM_INTEGRITY_REC_HDR); - /* fall thru */ + RT_FALL_THRU(); case 2: AssertLogRelMsgReturn((abHdr[2] & 0xc0) == 0x80, ("2/%u: %.*Rhxs\n", cb, cb + 1, &abHdr[0]), VERR_SSM_INTEGRITY_REC_HDR); break; diff --git a/src/VBox/VMM/VMMR3/TM.cpp b/src/VBox/VMM/VMMR3/TM.cpp index 61d0f023915..e5dc3e4d456 100644 --- a/src/VBox/VMM/VMMR3/TM.cpp +++ b/src/VBox/VMM/VMMR3/TM.cpp @@ -2612,7 +2612,7 @@ VMMR3DECL(int) TMR3TimerSave(PTMTIMERR3 pTimer, PSSMHANDLE pSSM) AssertMsgFailed(("u64Expire is being updated! (%s)\n", pTimer->pszDesc)); if (!RTThreadYield()) RTThreadSleep(1); - /* fall thru */ + RT_FALL_THRU(); case TMTIMERSTATE_ACTIVE: case TMTIMERSTATE_PENDING_SCHEDULE: case TMTIMERSTATE_PENDING_RESCHEDULE: diff --git a/src/VBox/VMM/VMMR3/VMMGuruMeditation.cpp b/src/VBox/VMM/VMMR3/VMMGuruMeditation.cpp index 24ddeb4da8c..0804488ad65 100644 --- a/src/VBox/VMM/VMMR3/VMMGuruMeditation.cpp +++ b/src/VBox/VMM/VMMR3/VMMGuruMeditation.cpp @@ -283,7 +283,7 @@ VMMR3DECL(void) VMMR3FatalDump(PVM pVM, PVMCPU pVCpu, int rcErr) || strchr(pszMsg2, '\0')[-1] != '\n') pHlp->pfnPrintf(pHlp, "\n"); } - /* fall thru */ + RT_FALL_THRU(); case VERR_TRPM_DONT_PANIC: case VERR_TRPM_PANIC: case VINF_EM_RAW_STALE_SELECTOR: diff --git a/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp b/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp index 471309675f9..95e9b8d6f85 100644 --- a/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp +++ b/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp @@ -842,7 +842,7 @@ static int trpmGCTrap0dHandlerRing0(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFram */ pCpu->Param1.fUse = DISUSE_IMMEDIATE8; pCpu->Param1.uValue = 3; - /* fallthru */ + RT_FALL_THRU(); case OP_INT: { Assert(pCpu->Param1.fUse & DISUSE_IMMEDIATE8); @@ -898,7 +898,7 @@ static int trpmGCTrap0dHandlerRing0(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFram if ( !PATMIsPatchGCAddr(pVM, PC) && !CSAMIsKnownDangerousInstr(pVM, PC)) break; - /* fall thru */ + RT_FALL_THRU(); case OP_INVLPG: case OP_LLDT: case OP_STI: @@ -953,7 +953,7 @@ static int trpmGCTrap0dHandlerRing3(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFram */ pCpu->Param1.fUse = DISUSE_IMMEDIATE8; pCpu->Param1.uValue = 3; - /* fall thru */ + RT_FALL_THRU(); case OP_INT: { Assert(pCpu->Param1.fUse & DISUSE_IMMEDIATE8); |