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-rw-r--r--include/VBox/vmm/vm.h45
-rw-r--r--include/VBox/vmm/vm.mac11
-rw-r--r--include/VBox/vmm/vmm.h37
-rw-r--r--src/VBox/VMM/VMMAll/PGMAll.cpp52
-rw-r--r--src/VBox/VMM/VMMR0/HMSVMR0.cpp4
-rw-r--r--src/VBox/VMM/VMMR0/HMVMXR0.cpp27
-rw-r--r--src/VBox/VMM/VMMR3/HM.cpp90
-rw-r--r--src/VBox/VMM/VMMR3/VM.cpp12
-rw-r--r--src/VBox/VMM/include/HMInternal.h22
-rw-r--r--src/VBox/VMM/testcase/tstVMStruct.h2
10 files changed, 48 insertions, 254 deletions
diff --git a/include/VBox/vmm/vm.h b/include/VBox/vmm/vm.h
index acd3d262399..abb9b10cf18 100644
--- a/include/VBox/vmm/vm.h
+++ b/include/VBox/vmm/vm.h
@@ -146,21 +146,24 @@ typedef struct VMCPU
/** @name Static per-cpu data.
* (Putting this after IEM, hoping that it's less frequently used than it.)
* @{ */
- /** The CPU ID.
- * This is the index into the VM::aCpu array. */
- VMCPUID idCpu;
- /** Raw-mode Context VM Pointer. */
- PVMRC pVMRC;
/** Ring-3 Host Context VM Pointer. */
PVMR3 pVMR3;
/** Ring-0 Host Context VM Pointer. */
PVMR0 pVMR0;
+ /** Raw-mode Context VM Pointer. */
+ uint32_t pVMRC;
+ /** Padding for new raw-mode (long mode). */
+ uint32_t pVMRCPadding;
/** Pointer to the ring-3 UVMCPU structure. */
PUVMCPU pUVCpu;
/** The native thread handle. */
RTNATIVETHREAD hNativeThread;
/** The native R0 thread handle. (different from the R3 handle!) */
RTNATIVETHREAD hNativeThreadR0;
+ /** The CPU ID.
+ * This is the index into the VM::aCpu array. */
+ VMCPUID idCpu;
+
/** Align the structures below bit on a 64-byte boundary and make sure it starts
* at the same offset in both 64-bit and 32-bit builds.
*
@@ -169,7 +172,7 @@ typedef struct VMCPU
* data could be lumped together at the end with a < 64 byte padding
* following it (to grow into and align the struct size).
*/
- uint8_t abAlignment1[64 - 4 - 4 - 5 * (HC_ARCH_BITS == 64 ? 8 : 4)];
+ uint8_t abAlignment1[64 - 4 - 6 * 8];
/** @} */
/** HM part. */
@@ -1152,7 +1155,9 @@ typedef struct VM
/** Ring-0 Host Context VM Pointer. */
R0PTRTYPE(struct VM *) pVMR0;
/** Raw-mode Context VM Pointer. */
- RCPTRTYPE(struct VM *) pVMRC;
+ uint32_t pVMRC;
+ /** Padding for new raw-mode (long mode). */
+ uint32_t pVMRCPadding;
/** The GVM VM handle. Only the GVM should modify this field. */
uint32_t hSelf;
@@ -1186,14 +1191,7 @@ typedef struct VM
* This is placed here for performance reasons.
* @todo obsoleted by bMainExecutionEngine, eliminate. */
bool fHMEnabled;
- /** Hardware VM support requires a minimal raw-mode context.
- * This is never set on 64-bit hosts, only 32-bit hosts requires it. */
- bool fHMNeedRawModeCtx;
- /** Set when this VM is the master FT node.
- * @todo This doesn't need to be here, FTM should store it in it's own
- * structures instead. */
- bool fFaultTolerantMaster;
/** Large page enabled flag.
* @todo This doesn't need to be here, PGM should store it in it's own
* structures instead. */
@@ -1201,7 +1199,7 @@ typedef struct VM
/** @} */
/** Alignment padding. */
- uint8_t uPadding1[7];
+ uint8_t uPadding1[5];
/** @name Debugging
* @{ */
@@ -1379,15 +1377,6 @@ typedef struct VM
uint8_t padding[128]; /* multiple of 64 */
} ssm;
- /** FTM part. */
- union
- {
-#ifdef VMM_INCLUDED_SRC_include_FTMInternal_h
- struct FTM s;
-#endif
- uint8_t padding[512]; /* multiple of 64 */
- } ftm;
-
#ifdef VBOX_WITH_REM
/** REM part. */
union
@@ -1438,16 +1427,16 @@ typedef struct VM
#ifdef VBOX_BUGREF_9217
/** Padding for aligning the structure size on a page boundrary. */
# ifdef VBOX_WITH_REM
- uint8_t abAlignment2[2134 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
+ uint8_t abAlignment2[2646 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
# else
- uint8_t abAlignment2[2390 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
+ uint8_t abAlignment2[2902 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];
# endif
#else
/** Padding for aligning the cpu array on a page boundary. */
# ifdef VBOX_WITH_REM
- uint8_t abAlignment2[2134];
+ uint8_t abAlignment2[2646];
# else
- uint8_t abAlignment2[2390];
+ uint8_t abAlignment2[2902];
# endif
#endif
diff --git a/include/VBox/vmm/vm.mac b/include/VBox/vmm/vm.mac
index 98e491f415f..036190b017f 100644
--- a/include/VBox/vmm/vm.mac
+++ b/include/VBox/vmm/vm.mac
@@ -51,13 +51,13 @@ struc VMCPU
.iem resb 18496
alignb 64
- .idCpu resd 1
- .pVMRC RTRCPTR_RES 1
.pVMR3 RTR3PTR_RES 1
.pVMR0 RTR0PTR_RES 1
+ .pVMRC resq 1
.pUVCpu RTR3PTR_RES 1
.hNativeThread RTR0PTR_RES 1
.hNativeThreadR0 RTR0PTR_RES 1
+ .idCpu resd 1
alignb 64
.hm resb 5888
@@ -95,7 +95,7 @@ struc VM
.pUVM RTR3PTR_RES 1
.pVMR3 RTR3PTR_RES 1
.pVMR0 RTR0PTR_RES 1
- .pVMRC RTRCPTR_RES 1
+ .pVMRC resq 1
.hSelf resd 1
.cCpus resd 1
.uCpuExecutionCap resd 1
@@ -109,11 +109,9 @@ struc VM
%endif
.bMainExecutionEngine resb 1
.fHMEnabled resb 1
- .fHMNeedRawModeCtx resb 1
- .fFaultTolerantMaster resb 1
.fUseLargePages resb 1
- .uPadding1 resb 7
+ .uPadding1 resb 5
.hTraceBufR3 RTR3PTR_RES 1
.hTraceBufR0 RTR0PTR_RES 1
@@ -133,7 +131,6 @@ struc VM
.tm resb 2496
.dbgf resb 2432
.ssm resb 128
- .ftm resb 512
%ifdef VBOX_WITH_REM
.rem resb 0x11100
%endif
diff --git a/include/VBox/vmm/vmm.h b/include/VBox/vmm/vmm.h
index 555bb8f95e4..fd84cdcd705 100644
--- a/include/VBox/vmm/vmm.h
+++ b/include/VBox/vmm/vmm.h
@@ -46,41 +46,6 @@ RT_C_DECLS_BEGIN
* @{
*/
-/**
- * World switcher identifiers.
- */
-typedef enum VMMSWITCHER
-{
- /** The usual invalid 0. */
- VMMSWITCHER_INVALID = 0,
- /** Switcher for 32-bit host to 32-bit shadow paging. */
- VMMSWITCHER_32_TO_32,
- /** Switcher for 32-bit host paging to PAE shadow paging. */
- VMMSWITCHER_32_TO_PAE,
- /** Switcher for 32-bit host paging to AMD64 shadow paging. */
- VMMSWITCHER_32_TO_AMD64,
- /** Switcher for PAE host to 32-bit shadow paging. */
- VMMSWITCHER_PAE_TO_32,
- /** Switcher for PAE host to PAE shadow paging. */
- VMMSWITCHER_PAE_TO_PAE,
- /** Switcher for PAE host paging to AMD64 shadow paging. */
- VMMSWITCHER_PAE_TO_AMD64,
- /** Switcher for AMD64 host paging to 32-bit shadow paging. */
- VMMSWITCHER_AMD64_TO_32,
- /** Switcher for AMD64 host paging to PAE shadow paging. */
- VMMSWITCHER_AMD64_TO_PAE,
- /** Switcher for AMD64 host paging to AMD64 shadow paging. */
- VMMSWITCHER_AMD64_TO_AMD64,
- /** Stub switcher for 32-bit and PAE. */
- VMMSWITCHER_X86_STUB,
- /** Stub switcher for AMD64. */
- VMMSWITCHER_AMD64_STUB,
- /** Used to make a count for array declarations and suchlike. */
- VMMSWITCHER_MAX,
- /** The usual 32-bit paranoia. */
- VMMSWITCHER_32BIT_HACK = 0x7fffffff
-} VMMSWITCHER;
-
/**
* VMMRZCallRing3 operations.
@@ -509,8 +474,6 @@ VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM);
VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM);
VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM);
-VMMR3_INT_DECL(int) VMMR3SelectSwitcher(PVM pVM, VMMSWITCHER enmSwitcher);
-VMMR3_INT_DECL(RTR0PTR) VMMR3GetHostToGuestSwitcher(PVM pVM, VMMSWITCHER enmSwitcher);
VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu);
VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr);
VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr);
diff --git a/src/VBox/VMM/VMMAll/PGMAll.cpp b/src/VBox/VMM/VMMAll/PGMAll.cpp
index bb827f5dc89..9d5d84efd43 100644
--- a/src/VBox/VMM/VMMAll/PGMAll.cpp
+++ b/src/VBox/VMM/VMMAll/PGMAll.cpp
@@ -3032,13 +3032,9 @@ DECLINLINE(unsigned) pgmModeToType(PGMMODE pgmMode)
* @param enmGuestMode The guest mode.
* @param enmHostMode The host mode.
* @param enmShadowMode The current shadow mode.
- * @param penmSwitcher Where to store the switcher to use.
- * VMMSWITCHER_INVALID means no change.
*/
-static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE enmHostMode, PGMMODE enmShadowMode,
- VMMSWITCHER *penmSwitcher)
+static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE enmHostMode, PGMMODE enmShadowMode)
{
- VMMSWITCHER enmSwitcher = VMMSWITCHER_INVALID;
switch (enmGuestMode)
{
/*
@@ -3060,7 +3056,6 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_32_BIT:
case SUPPAGINGMODE_32_BIT_GLOBAL:
enmShadowMode = PGMMODE_32_BIT;
- enmSwitcher = VMMSWITCHER_32_TO_32;
break;
case SUPPAGINGMODE_PAE:
@@ -3068,7 +3063,6 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_PAE_GLOBAL:
case SUPPAGINGMODE_PAE_GLOBAL_NX:
enmShadowMode = PGMMODE_PAE;
- enmSwitcher = VMMSWITCHER_PAE_TO_PAE;
break;
case SUPPAGINGMODE_AMD64:
@@ -3076,12 +3070,10 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_AMD64_NX:
case SUPPAGINGMODE_AMD64_GLOBAL_NX:
enmShadowMode = PGMMODE_PAE;
- enmSwitcher = VMMSWITCHER_AMD64_TO_PAE;
break;
default:
- AssertLogRelMsgFailedReturnStmt(("enmHostMode=%d\n", enmHostMode),
- *penmSwitcher = VMMSWITCHER_INVALID, PGMMODE_INVALID);
+ AssertLogRelMsgFailedReturn(("enmHostMode=%d\n", enmHostMode), PGMMODE_INVALID);
}
break;
@@ -3091,7 +3083,6 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_32_BIT:
case SUPPAGINGMODE_32_BIT_GLOBAL:
enmShadowMode = PGMMODE_32_BIT;
- enmSwitcher = VMMSWITCHER_32_TO_32;
break;
case SUPPAGINGMODE_PAE:
@@ -3099,7 +3090,6 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_PAE_GLOBAL:
case SUPPAGINGMODE_PAE_GLOBAL_NX:
enmShadowMode = PGMMODE_PAE;
- enmSwitcher = VMMSWITCHER_PAE_TO_PAE;
break;
case SUPPAGINGMODE_AMD64:
@@ -3107,12 +3097,10 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_AMD64_NX:
case SUPPAGINGMODE_AMD64_GLOBAL_NX:
enmShadowMode = PGMMODE_PAE;
- enmSwitcher = VMMSWITCHER_AMD64_TO_PAE;
break;
default:
- AssertLogRelMsgFailedReturnStmt(("enmHostMode=%d\n", enmHostMode),
- *penmSwitcher = VMMSWITCHER_INVALID, PGMMODE_INVALID);
+ AssertLogRelMsgFailedReturn(("enmHostMode=%d\n", enmHostMode), PGMMODE_INVALID);
}
break;
@@ -3123,7 +3111,6 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_32_BIT:
case SUPPAGINGMODE_32_BIT_GLOBAL:
enmShadowMode = PGMMODE_PAE;
- enmSwitcher = VMMSWITCHER_32_TO_PAE;
break;
case SUPPAGINGMODE_PAE:
@@ -3131,7 +3118,6 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_PAE_GLOBAL:
case SUPPAGINGMODE_PAE_GLOBAL_NX:
enmShadowMode = PGMMODE_PAE;
- enmSwitcher = VMMSWITCHER_PAE_TO_PAE;
break;
case SUPPAGINGMODE_AMD64:
@@ -3139,12 +3125,10 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_AMD64_NX:
case SUPPAGINGMODE_AMD64_GLOBAL_NX:
enmShadowMode = PGMMODE_PAE;
- enmSwitcher = VMMSWITCHER_AMD64_TO_PAE;
break;
default:
- AssertLogRelMsgFailedReturnStmt(("enmHostMode=%d\n", enmHostMode),
- *penmSwitcher = VMMSWITCHER_INVALID, PGMMODE_INVALID);
+ AssertLogRelMsgFailedReturn(("enmHostMode=%d\n", enmHostMode), PGMMODE_INVALID);
}
break;
@@ -3155,7 +3139,6 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_32_BIT:
case SUPPAGINGMODE_32_BIT_GLOBAL:
enmShadowMode = PGMMODE_AMD64;
- enmSwitcher = VMMSWITCHER_32_TO_AMD64;
break;
case SUPPAGINGMODE_PAE:
@@ -3163,7 +3146,6 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_PAE_GLOBAL:
case SUPPAGINGMODE_PAE_GLOBAL_NX:
enmShadowMode = PGMMODE_AMD64;
- enmSwitcher = VMMSWITCHER_PAE_TO_AMD64;
break;
case SUPPAGINGMODE_AMD64:
@@ -3171,18 +3153,15 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
case SUPPAGINGMODE_AMD64_NX:
case SUPPAGINGMODE_AMD64_GLOBAL_NX:
enmShadowMode = PGMMODE_AMD64;
- enmSwitcher = VMMSWITCHER_AMD64_TO_AMD64;
break;
default:
- AssertLogRelMsgFailedReturnStmt(("enmHostMode=%d\n", enmHostMode),
- *penmSwitcher = VMMSWITCHER_INVALID, PGMMODE_INVALID);
+ AssertLogRelMsgFailedReturn(("enmHostMode=%d\n", enmHostMode), PGMMODE_INVALID);
}
break;
default:
- AssertLogRelMsgFailedReturnStmt(("enmGuestMode=%d\n", enmGuestMode),
- *penmSwitcher = VMMSWITCHER_INVALID, PGMMODE_INVALID);
+ AssertLogRelMsgFailedReturn(("enmGuestMode=%d\n", enmGuestMode), PGMMODE_INVALID);
}
/*
@@ -3232,14 +3211,12 @@ static PGMMODE pgmCalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE en
break;
#endif
default:
- AssertLogRelMsgFailedReturnStmt(("enmHostMode=%d\n", pVM->pgm.s.enmHostMode),
- *penmSwitcher = VMMSWITCHER_INVALID, PGMMODE_INVALID);
+ AssertLogRelMsgFailedReturn(("enmHostMode=%d\n", pVM->pgm.s.enmHostMode), PGMMODE_INVALID);
}
}
}
}
- *penmSwitcher = enmSwitcher;
return enmShadowMode;
}
@@ -3264,21 +3241,8 @@ VMM_INT_DECL(int) PGMHCChangeMode(PVM pVM, PVMCPU pVCpu, PGMMODE enmGuestMode)
/*
* Calc the shadow mode and switcher.
*/
- VMMSWITCHER enmSwitcher = VMMSWITCHER_INVALID;
PGMMODE enmShadowMode = PGMMODE_INVALID;
- enmShadowMode = pgmCalcShadowMode(pVM, enmGuestMode, pVM->pgm.s.enmHostMode, pVCpu->pgm.s.enmShadowMode, &enmSwitcher);
-
-#ifdef VBOX_WITH_RAW_MODE_NOT_R0
- if ( enmSwitcher != VMMSWITCHER_INVALID
- && VM_IS_RAW_MODE_ENABLED(pVM))
- {
- /*
- * Select new switcher.
- */
- int rc = VMMR3SelectSwitcher(pVM, enmSwitcher);
- AssertLogRelMsgRCReturn(rc,("VMMR3SelectSwitcher(%d) -> %Rrc\n", enmSwitcher, rc), rc);
- }
-#endif
+ enmShadowMode = pgmCalcShadowMode(pVM, enmGuestMode, pVM->pgm.s.enmHostMode, pVCpu->pgm.s.enmShadowMode);
/*
* Exit old mode(s).
diff --git a/src/VBox/VMM/VMMR0/HMSVMR0.cpp b/src/VBox/VMM/VMMR0/HMSVMR0.cpp
index 358c6159d17..e7c26094e27 100644
--- a/src/VBox/VMM/VMMR0/HMSVMR0.cpp
+++ b/src/VBox/VMM/VMMR0/HMSVMR0.cpp
@@ -1590,7 +1590,7 @@ static int hmR0SvmExportGuestCR4(PVMCPU pVCpu, PSVMVMCB pVmcb)
case PGMMODE_AMD64: /* 64-bit AMD paging (long mode). */
case PGMMODE_AMD64_NX: /* 64-bit AMD paging (long mode) with NX enabled. */
-#ifdef VBOX_ENABLE_64_BITS_GUESTS
+#ifdef VBOX_WITH_64_BITS_GUESTS
break;
#else
return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE;
@@ -2216,7 +2216,7 @@ static int hmR0SvmSelectVMRunHandler(PVMCPU pVCpu)
{
if (CPUMIsGuestInLongMode(pVCpu))
{
-#ifndef VBOX_ENABLE_64_BITS_GUESTS
+#ifndef VBOX_WITH_64_BITS_GUESTS
return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE;
#else
# if HC_ARCH_BITS != 64 || ARCH_BITS != 64
diff --git a/src/VBox/VMM/VMMR0/HMVMXR0.cpp b/src/VBox/VMM/VMMR0/HMVMXR0.cpp
index ad5105dde3b..12a0ded5079 100644
--- a/src/VBox/VMM/VMMR0/HMVMXR0.cpp
+++ b/src/VBox/VMM/VMMR0/HMVMXR0.cpp
@@ -337,9 +337,6 @@ DECLINLINE(VBOXSTRICTRC) hmR0VmxHandleExitNested(PVMCPU pVCpu, PVMXTRA
#endif
static int hmR0VmxImportGuestState(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, uint64_t fWhat);
-#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
-static void hmR0VmxInitVmcsReadCache(PVMCPU pVCpu);
-#endif
/** @name VM-exit handler prototypes.
* @{
@@ -2888,17 +2885,6 @@ VMMR0DECL(int) VMXR0InvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt)
if (pVM->hm.s.vmx.fVpid)
{
bool fVpidFlush = RT_BOOL(pVM->hm.s.vmx.Msrs.u64EptVpidCaps & MSR_IA32_VMX_EPT_VPID_CAP_INVVPID_INDIV_ADDR);
-
-#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
- /*
- * Workaround Erratum BV75, AAJ159 and others that affect several Intel CPUs
- * where executing INVVPID outside 64-bit mode does not flush translations of
- * 64-bit linear addresses, see @bugref{6208#c72}.
- */
- if (RT_HI_U32(GCVirt))
- fVpidFlush = false;
-#endif
-
if (fVpidFlush)
{
hmR0VmxFlushVpid(pVCpu, VMXTLBFLUSHVPID_INDIV_ADDR, GCVirt);
@@ -4704,12 +4690,6 @@ static bool hmR0VmxShouldSwapEferMsr(PCVMCPU pVCpu)
return true;
#else
PCCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
-#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
- /* For 32-bit hosts running 64-bit guests, we always swap EFER MSR in the world-switcher. Nothing to do here. */
- if (CPUMIsGuestInLongModeEx(pCtx))
- return false;
-#endif
-
PVM pVM = pVCpu->CTX_SUFF(pVM);
uint64_t const u64HostEfer = pVM->hm.s.vmx.u64HostMsrEfer;
uint64_t const u64GuestEfer = pCtx->msrEFER;
@@ -5820,7 +5800,7 @@ static VBOXSTRICTRC hmR0VmxExportGuestCR3AndCR4(PVMCPU pVCpu, PVMXTRANSIENT pVmx
case PGMMODE_AMD64: /* 64-bit AMD paging (long mode). */
case PGMMODE_AMD64_NX: /* 64-bit AMD paging (long mode) with NX enabled. */
-#ifdef VBOX_ENABLE_64_BITS_GUESTS
+#ifdef VBOX_WITH_64_BITS_GUESTS
break;
#endif
default:
@@ -6703,12 +6683,13 @@ static int hmR0VmxSelectVMRunHandler(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
if (CPUMIsGuestInLongModeEx(pCtx))
{
-#ifndef VBOX_ENABLE_64_BITS_GUESTS
+#ifndef VBOX_WITH_64_BITS_GUESTS
return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE;
-#endif
+#else
Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fAllow64BitGuests); /* Guaranteed by hmR3InitFinalizeR0(). */
/* Guest is in long mode, use the 64-bit handler (host is 64-bit). */
pVmcsInfo->pfnStartVM = VMXR0StartVM64;
+#endif
}
else
{
diff --git a/src/VBox/VMM/VMMR3/HM.cpp b/src/VBox/VMM/VMMR3/HM.cpp
index 8931afc3a2f..4681f8c79ed 100644
--- a/src/VBox/VMM/VMMR3/HM.cpp
+++ b/src/VBox/VMM/VMMR3/HM.cpp
@@ -218,7 +218,7 @@ VMMR3_INT_DECL(int) HMR3Init(PVM pVM)
* Validate the HM settings.
*/
rc = CFGMR3ValidateConfig(pCfgHm, "/HM/",
- "HMForced"
+ "HMForced" /* implied 'true' these days */
"|UseNEMInstead"
"|FallbackToNEM"
"|EnableNestedPaging"
@@ -252,23 +252,8 @@ VMMR3_INT_DECL(int) HMR3Init(PVM pVM)
* Forces hardware virtualization, no falling back on raw-mode. HM must be
* enabled, i.e. /HMEnabled must be true. */
bool fHMForced;
-#ifdef VBOX_WITH_RAW_MODE
- rc = CFGMR3QueryBoolDef(pCfgHm, "HMForced", &fHMForced, false);
- AssertRCReturn(rc, rc);
- AssertLogRelMsgReturn(!fHMForced || pVM->fHMEnabled, ("Configuration error: HM forced but not enabled!\n"),
- VERR_INVALID_PARAMETER);
-# if defined(RT_OS_DARWIN)
- if (pVM->fHMEnabled)
- fHMForced = true;
-# endif
- AssertLogRelMsgReturn(pVM->cCpus == 1 || pVM->fHMEnabled, ("Configuration error: SMP requires HM to be enabled!\n"),
- VERR_INVALID_PARAMETER);
- if (pVM->cCpus > 1)
- fHMForced = true;
-#else /* !VBOX_WITH_RAW_MODE */
AssertRelease(pVM->fHMEnabled);
fHMForced = true;
-#endif /* !VBOX_WITH_RAW_MODE */
/** @cfgm{/HM/UseNEMInstead, bool, true}
* Don't use HM, use NEM instead. */
@@ -317,7 +302,7 @@ VMMR3_INT_DECL(int) HMR3Init(PVM pVM)
* Enables AMD64 cpu features.
* On 32-bit hosts this isn't default and require host CPU support. 64-bit hosts
* already have the support. */
-#ifdef VBOX_ENABLE_64_BITS_GUESTS
+#ifdef VBOX_WITH_64_BITS_GUESTS
rc = CFGMR3QueryBoolDef(pCfgHm, "64bitEnabled", &pVM->hm.s.fAllow64BitGuests, HC_ARCH_BITS == 64);
AssertLogRelRCReturn(rc, rc);
#else
@@ -515,14 +500,7 @@ VMMR3_INT_DECL(int) HMR3Init(PVM pVM)
rc = VINF_SUCCESS;
}
if (RT_FAILURE(rc))
- {
- if (fHMForced)
- return VMSetError(pVM, rc, RT_SRC_POS, "The host kernel does not support VT-x: %s\n", pszWhy);
-
- /* Fall back to raw-mode. */
- LogRel(("HM: HMR3Init: Falling back to raw-mode: The host kernel does not support VT-x - %s\n", pszWhy));
- VM_SET_MAIN_EXECUTION_ENGINE(pVM, VM_EXEC_ENGINE_RAW_MODE);
- }
+ return VMSetError(pVM, rc, RT_SRC_POS, "The host kernel does not support VT-x: %s\n", pszWhy);
}
}
else
@@ -530,13 +508,6 @@ VMMR3_INT_DECL(int) HMR3Init(PVM pVM)
VERR_INTERNAL_ERROR_5);
/*
- * Do we require a little bit or raw-mode for 64-bit guest execution?
- */
- pVM->fHMNeedRawModeCtx = HC_ARCH_BITS == 32
- && pVM->fHMEnabled
- && pVM->hm.s.fAllow64BitGuests;
-
- /*
* Disable nested paging and unrestricted guest execution now if they're
* configured so that CPUM can make decisions based on our configuration.
*/
@@ -592,13 +563,7 @@ VMMR3_INT_DECL(int) HMR3Init(PVM pVM)
rc = VINF_SUCCESS;
}
if (RT_FAILURE(rc))
- {
- if (fHMForced)
- return VM_SET_ERROR(pVM, rc, pszMsg);
-
- LogRel(("HM: HMR3Init: Falling back to raw-mode: %s\n", pszMsg));
- VM_SET_MAIN_EXECUTION_ENGINE(pVM, VM_EXEC_ENGINE_RAW_MODE);
- }
+ return VM_SET_ERROR(pVM, rc, pszMsg);
}
}
else
@@ -606,17 +571,21 @@ VMMR3_INT_DECL(int) HMR3Init(PVM pVM)
/*
* Disabled HM mean raw-mode, unless NEM is supposed to be used.
*/
- if (!fUseNEMInstead)
- VM_SET_MAIN_EXECUTION_ENGINE(pVM, VM_EXEC_ENGINE_RAW_MODE);
- else
+ if (fUseNEMInstead)
{
rc = NEMR3Init(pVM, false /*fFallback*/, true);
ASMCompilerBarrier(); /* NEMR3Init may have changed bMainExecutionEngine. */
if (RT_FAILURE(rc))
return rc;
}
+ if ( pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NOT_SET
+ || pVM->bMainExecutionEngine == VM_EXEC_ENGINE_RAW_MODE
+ || pVM->bMainExecutionEngine == VM_EXEC_ENGINE_HW_VIRT /* paranoia */)
+ return VM_SET_ERROR(pVM, rc, "Misconfigured VM: No guest execution engine available!");
}
+ Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_NOT_SET);
+ Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_RAW_MODE);
return VINF_SUCCESS;
}
@@ -716,13 +685,6 @@ static int hmR3InitFinalizeR3(PVM pVM)
"/PROF/CPU%d/HM/InGC", i);
AssertRC(rc);
-# if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
- rc = STAMR3RegisterF(pVM, &pVCpu->hm.s.StatWorldSwitch3264, STAMTYPE_PROFILE, STAMVISIBILITY_USED,
- STAMUNIT_TICKS_PER_CALL, "Profiling of the 32/64 switcher.",
- "/PROF/CPU%d/HM/Switcher3264", i);
- AssertRC(rc);
-# endif
-
# ifdef HM_PROFILE_EXIT_DISPATCH
rc = STAMR3RegisterF(pVM, &pVCpu->hm.s.StatExitDispatch, STAMTYPE_PROFILE_ADV, STAMVISIBILITY_USED,
STAMUNIT_TICKS_PER_CALL, "Profiling the dispatching of exit handlers.",
@@ -856,11 +818,6 @@ static int hmR3InitFinalizeR3(PVM pVM)
HM_REG_COUNTER(&pVCpu->hm.s.StatVmxCheckBadRpl, "/HM/CPU%d/VMXCheck/RPL", "Could not use VMX due to unsuitable RPL.");
HM_REG_COUNTER(&pVCpu->hm.s.StatVmxCheckPmOk, "/HM/CPU%d/VMXCheck/VMX_PM", "VMX execution in protected mode OK.");
-#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
- HM_REG_COUNTER(&pVCpu->hm.s.StatFpu64SwitchBack, "/HM/CPU%d/Switch64/Fpu", "Saving guest FPU/XMM state.");
- HM_REG_COUNTER(&pVCpu->hm.s.StatDebug64SwitchBack, "/HM/CPU%d/Switch64/Debug", "Saving guest debug state.");
-#endif
-
#undef HM_REG_COUNTER
bool const fCpuSupportsVmx = ASMIsIntelCpu() || ASMIsViaCentaurCpu() || ASMIsShanghaiCpu();
@@ -1749,14 +1706,12 @@ static int hmR3InitFinalizeR0Intel(PVM pVM)
if (pVM->hm.s.vmx.fUnrestrictedGuest)
LogRel(("HM: Enabled unrestricted guest execution\n"));
-#if HC_ARCH_BITS == 64
if (pVM->hm.s.fLargePages)
{
/* Use large (2 MB) pages for our EPT PDEs where possible. */
PGMSetLargePageUsage(pVM, true);
LogRel(("HM: Enabled large page support\n"));
}
-#endif
}
else
Assert(!pVM->hm.s.vmx.fUnrestrictedGuest);
@@ -1891,13 +1846,11 @@ static int hmR3InitFinalizeR0Amd(PVM pVM)
/*
* Enable large pages (2 MB) if applicable.
*/
-#if HC_ARCH_BITS == 64
if (pVM->hm.s.fLargePages)
{
PGMSetLargePageUsage(pVM, true);
LogRel(("HM: Enabled large page support\n"));
}
-#endif
}
if (pVM->hm.s.fVirtApicRegs)
@@ -1953,27 +1906,6 @@ VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM)
pVCpu->hm.s.enmShadowMode = PGMGetShadowMode(pVCpu);
}
}
-#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
- if (HMIsEnabled(pVM))
- {
- switch (PGMGetHostMode(pVM))
- {
- case PGMMODE_32_BIT:
- pVM->hm.s.pfnHost32ToGuest64R0 = VMMR3GetHostToGuestSwitcher(pVM, VMMSWITCHER_32_TO_AMD64);
- break;
-
- case PGMMODE_PAE:
- case PGMMODE_PAE_NX:
- pVM->hm.s.pfnHost32ToGuest64R0 = VMMR3GetHostToGuestSwitcher(pVM, VMMSWITCHER_PAE_TO_AMD64);
- break;
-
- default:
- AssertFailed();
- break;
- }
- }
-#endif
- return;
}
diff --git a/src/VBox/VMM/VMMR3/VM.cpp b/src/VBox/VMM/VMMR3/VM.cpp
index 90977f7e8ab..b94d97351b7 100644
--- a/src/VBox/VMM/VMMR3/VM.cpp
+++ b/src/VBox/VMM/VMMR3/VM.cpp
@@ -736,18 +736,6 @@ static int vmR3ReadBaseConfig(PVM pVM, PUVM pUVM, uint32_t cCpus)
PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
/*
- * If executing in fake suplib mode disable RR3 and RR0 in the config.
- */
- const char *psz = RTEnvGet("VBOX_SUPLIB_FAKE");
- if (psz && !strcmp(psz, "fake"))
- {
- CFGMR3RemoveValue(pRoot, "RawR3Enabled");
- CFGMR3InsertInteger(pRoot, "RawR3Enabled", 0);
- CFGMR3RemoveValue(pRoot, "RawR0Enabled");
- CFGMR3InsertInteger(pRoot, "RawR0Enabled", 0);
- }
-
- /*
* Base EM and HM config properties.
*/
pVM->fHMEnabled = true;
diff --git a/src/VBox/VMM/include/HMInternal.h b/src/VBox/VMM/include/HMInternal.h
index 44d583682fe..a78ae699722 100644
--- a/src/VBox/VMM/include/HMInternal.h
+++ b/src/VBox/VMM/include/HMInternal.h
@@ -37,13 +37,8 @@
#include <iprt/avl.h>
#include <iprt/string.h>
-#if HC_ARCH_BITS == 32 && defined(RT_OS_DARWIN)
-# error "32-bit darwin is no longer supported. Go back to 4.3 or earlier!"
-#endif
-
-#if HC_ARCH_BITS == 64 || defined(VBOX_WITH_64_BITS_GUESTS)
-/* Enable 64 bits guest support. */
-# define VBOX_ENABLE_64_BITS_GUESTS
+#if HC_ARCH_BITS == 32
+# error "32-bit hosts are no longer supported. Go back to 6.0 or earlier!"
#endif
/** @def HM_PROFILE_EXIT_DISPATCH
@@ -506,12 +501,6 @@ typedef struct HM
/** Current free pointer inside the patch block. */
RTGCPTR pFreeGuestPatchMem;
-#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
- /** 32 to 64 bits switcher entrypoint. */
- R0PTRTYPE(PFNHMSWITCHERHC) pfnHost32ToGuest64R0;
- RTR0PTR pvR0Alignment0;
-#endif
-
struct
{
/** Set by the ring-0 side of HM to indicate VMX is supported by the
@@ -1114,9 +1103,6 @@ typedef struct HMCPU
STAMPROFILEADV StatExportGuestState;
STAMPROFILEADV StatLoadGuestFpuState;
STAMPROFILEADV StatInGC;
-#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
- STAMPROFILEADV StatWorldSwitch3264;
-#endif
STAMPROFILEADV StatPoke;
STAMPROFILEADV StatSpinPoke;
STAMPROFILEADV StatSpinPokeFailed;
@@ -1238,10 +1224,6 @@ typedef struct HMCPU
STAMCOUNTER StatVmxCheckBadRpl;
STAMCOUNTER StatVmxCheckPmOk;
-#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS)
- STAMCOUNTER StatFpu64SwitchBack;
- STAMCOUNTER StatDebug64SwitchBack;
-#endif
#ifdef VBOX_WITH_STATISTICS
R3PTRTYPE(PSTAMCOUNTER) paStatExitReason;
R0PTRTYPE(PSTAMCOUNTER) paStatExitReasonR0;
diff --git a/src/VBox/VMM/testcase/tstVMStruct.h b/src/VBox/VMM/testcase/tstVMStruct.h
index c3e6000ee3f..c12e22d9017 100644
--- a/src/VBox/VMM/testcase/tstVMStruct.h
+++ b/src/VBox/VMM/testcase/tstVMStruct.h
@@ -1428,7 +1428,6 @@
GEN_CHECK_OFF(VM, cbSelf);
GEN_CHECK_OFF(VM, bMainExecutionEngine);
GEN_CHECK_OFF(VM, fHMEnabled);
- GEN_CHECK_OFF(VM, fFaultTolerantMaster);
GEN_CHECK_OFF(VM, fUseLargePages);
GEN_CHECK_OFF(VM, hTraceBufR3);
GEN_CHECK_OFF(VM, hTraceBufR0);
@@ -1449,7 +1448,6 @@
GEN_CHECK_OFF(VM, tm);
GEN_CHECK_OFF(VM, dbgf);
GEN_CHECK_OFF(VM, ssm);
- GEN_CHECK_OFF(VM, ftm);
#ifdef VBOX_WITH_REM
GEN_CHECK_OFF(VM, rem);
#endif
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