diff options
| author | Joe Orton <jorton@apache.org> | 2003-12-16 10:57:17 +0000 |
|---|---|---|
| committer | Joe Orton <jorton@apache.org> | 2003-12-16 10:57:17 +0000 |
| commit | c100bad9141e225be592e0e8480e61de4aa85d19 (patch) | |
| tree | 8b911d3962ce229f551c97250715ed180e1fb4b9 /atomic | |
| parent | b354df9edd110b7b556b443bed25dd07ffc9789e (diff) | |
| download | apr-c100bad9141e225be592e0e8480e61de4aa85d19.tar.gz | |
Review of x86 asm, fixing intel_atomic_add32 with gcc 2.7.2.1 which
doesn't allow the '+' constraint on an output operand.
* apr_atomic.c (apr_atomic_cas32, apr_atomic_sub32):
Condition code register is clobbered.
(intel_atomic_add32): Use separate input operands rather than
read/write output operands; clobber cc.
(apr_atomic_dec32): Simplify by two instructions to output an 8-bit
value; clobber cc.
Submitted by: David Howells <dhowells@redhat.com>
git-svn-id: https://svn.apache.org/repos/asf/apr/apr/trunk@64839 13f79535-47bb-0310-9956-ffa450edef68
Diffstat (limited to 'atomic')
| -rw-r--r-- | atomic/unix/apr_atomic.c | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/atomic/unix/apr_atomic.c b/atomic/unix/apr_atomic.c index 67a6bb0aa..122a2c4d0 100644 --- a/atomic/unix/apr_atomic.c +++ b/atomic/unix/apr_atomic.c @@ -99,7 +99,7 @@ APR_DECLARE(apr_uint32_t) apr_atomic_cas32(volatile apr_uint32_t *mem, asm volatile ("lock; cmpxchgl %1, %2" : "=a" (prev) : "r" (with), "m" (*(mem)), "0"(cmp) - : "memory"); + : "memory", "cc"); return prev; } #define APR_OVERRIDE_ATOMIC_CAS32 @@ -108,10 +108,9 @@ static apr_uint32_t inline intel_atomic_add32(volatile apr_uint32_t *mem, apr_uint32_t val) { asm volatile ("lock; xaddl %0,%1" - : "+r"(val), "+m"(*mem) /* outputs and inputs */ - : - : "memory"); /*XXX is this needed? it knows that - *mem is an output */ + : "=r"(val), "=m"(*mem) /* outputs */ + : "0"(val), "m"(*mem) /* inputs */ + : "memory", "cc"); return val; } @@ -127,21 +126,19 @@ APR_DECLARE(void) apr_atomic_sub32(volatile apr_uint32_t *mem, apr_uint32_t val) asm volatile ("lock; subl %1, %0" : : "m" (*(mem)), "r" (val) - : "memory"); + : "memory", "cc"); } #define APR_OVERRIDE_ATOMIC_SUB32 APR_DECLARE(int) apr_atomic_dec32(volatile apr_uint32_t *mem) { - int prev; + unsigned char prev; - asm volatile ("mov $0, %%eax;\n\t" - "lock; decl %1;\n\t" - "setnz %%al;\n\t" - "mov %%eax, %0" - : "=r" (prev) + asm volatile ("lock; decl %1;\n\t" + "setnz %%al" + : "=a" (prev) : "m" (*(mem)) - : "memory", "%eax"); + : "memory", "cc"); return prev; } #define APR_OVERRIDE_ATOMIC_DEC32 |