diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-02-18 12:59:21 +0100 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-02-18 12:59:21 +0100 |
commit | 37fddd1ae02aac9f10eacd16bbd6142198ed7342 (patch) | |
tree | e621ad4d7dadc0fa18e267c2414c1032f3ac9963 | |
parent | 9481ada6ad354cfe38418354afee48ceca438c05 (diff) | |
parent | 2efa9e490569f909c6ba796d192b623ec9766b82 (diff) | |
download | barebox-37fddd1ae02aac9f10eacd16bbd6142198ed7342.tar.gz |
Merge branch 'for-next/misc'
47 files changed, 2159 insertions, 135 deletions
diff --git a/.gitignore b/.gitignore index d551a610d4..0382202bf7 100644 --- a/.gitignore +++ b/.gitignore @@ -90,3 +90,4 @@ GTAGS /allrandom.config /allyes.config /compile_commands.json +/stickypage.bin diff --git a/Documentation/boards/rockchip.rst b/Documentation/boards/rockchip.rst index 68c3e11265..041bb9fa64 100644 --- a/Documentation/boards/rockchip.rst +++ b/Documentation/boards/rockchip.rst @@ -57,6 +57,7 @@ Supported Boards ---------------- - Rockchip RK3568 EVB +- Rockchip RK3568 Bananapi R2 Pro - Pine64 Quartz64 Model A The steps described in the following target the RK3568 and the RK3568 EVB but diff --git a/Documentation/user/reboot-mode.rst b/Documentation/user/reboot-mode.rst index 681438d944..83d4136b85 100644 --- a/Documentation/user/reboot-mode.rst +++ b/Documentation/user/reboot-mode.rst @@ -29,9 +29,10 @@ User API Devices registered with the reboot mode API gain two parameters: - ``$dev_of_reboot_mode.prev`` (read-only): The reboot mode that was - set previous to barebox startup + set previously to barebox startup. - ``$dev_of_reboot_mode.next``: The next reboot mode, for when the - system is reset + system is reset. Its initial value after startup is 0 which corresponds + to ``normal`` by default. The reboot mode driver core use the alias name if available to name the device. By convention, this should end with ``.reboot_mode``, e.g.:: @@ -247,7 +247,7 @@ version_h := include/generated/version.h clean-targets := %clean mrproper cleandocs no-dot-config-targets := $(clean-targets) \ cscope gtags TAGS tags help% %docs \ - $(version_h) kernelversion outputmakefile + $(version_h) bareboxversion outputmakefile no-sync-config-targets := $(no-dot-config-targets) install %install \ kernelrelease @@ -1278,6 +1278,9 @@ docs: FORCE @$(SPHINXBUILD) -b html -d $(objtree)/doctrees $(srctree)/Documentation \ $(objtree)/Documentation/html +bareboxversion: + @echo $(KERNELVERSION) + # Single targets # --------------------------------------------------------------------------- # Single targets are compatible with: diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 6fe1b59914..a15963c775 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -150,6 +150,7 @@ obj-$(CONFIG_MACH_KINDLE_MX50) += kindle-mx50/ obj-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += toradex-colibri-t20/ obj-$(CONFIG_MACH_TOSHIBA_AC100) += toshiba-ac100/ obj-$(CONFIG_MACH_TQMA53) += tqma53/ +obj-$(CONFIG_MACH_TQMA6UL) += tqma6ulx/ obj-$(CONFIG_MACH_TQMA6X) += tqma6x/ obj-$(CONFIG_MACH_TURRIS_OMNIA) += turris-omnia/ obj-$(CONFIG_MACH_TX25) += karo-tx25/ @@ -186,4 +187,5 @@ obj-$(CONFIG_MACH_TQMLS1046A) += tqmls1046a/ obj-$(CONFIG_MACH_MNT_REFORM) += mnt-reform/ obj-$(CONFIG_MACH_SKOV_ARM9CPU) += skov-arm9cpu/ obj-$(CONFIG_MACH_RK3568_EVB) += rockchip-rk3568-evb/ +obj-$(CONFIG_MACH_RK3568_BPI_R2PRO) += rockchip-rk3568-bpi-r2pro/ obj-$(CONFIG_MACH_PINE64_QUARTZ64) += pine64-quartz64/ diff --git a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/.gitignore b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/.gitignore new file mode 100644 index 0000000000..f458f794b5 --- /dev/null +++ b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/.gitignore @@ -0,0 +1 @@ +sdram-init.bin diff --git a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/Makefile b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/Makefile new file mode 100644 index 0000000000..01c7a259e9 --- /dev/null +++ b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/board.c b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/board.c new file mode 100644 index 0000000000..e472f13c8b --- /dev/null +++ b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/board.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#define pr_fmt(fmt) "rk3568-r2pro: " fmt + +#include <common.h> +#include <init.h> +#include <mach/bbu.h> +#include <aiodev.h> +#include <bootsource.h> +#include <environment.h> +#include <globalvar.h> +#include <magicvar.h> +#include <deep-probe.h> + +static bool machine_is_bpi_r2pro = false; + +static int rk3568_bpi_r2pro_probe(struct device_d *dev) +{ + enum bootsource bootsource = bootsource_get(); + int instance = bootsource_get_instance(); + + barebox_set_model("BPI R2PRO"); + barebox_set_hostname("bpi-r2pro"); + machine_is_bpi_r2pro = true; + + if (bootsource == BOOTSOURCE_MMC && instance == 1) + of_device_enable_path("/chosen/environment-sd"); + else + of_device_enable_path("/chosen/environment-emmc"); + + rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/emmc"); + rk3568_bbu_mmc_register("sd", 0, "/dev/sd"); + + return 0; +} + +static const struct of_device_id rk3568_bpi_r2pro_of_match[] = { + { .compatible = "rockchip,rk3568-bpi-r2pro" }, + { /* Sentinel */}, +}; + +static struct driver_d rk3568_bpi_r2pro_board_driver = { + .name = "board-rk3568-bpi-r2pro", + .probe = rk3568_bpi_r2pro_probe, + .of_compatible = rk3568_bpi_r2pro_of_match, +}; +coredevice_platform_driver(rk3568_bpi_r2pro_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(rk3568_bpi_r2pro_of_match); + +static int rk3568_bpi_r2pro_detect_hwid(void) +{ + int ret; + int hwid_voltage; + struct aiochannel *hwid_chan; + char *hwid; + + if (!IS_ENABLED(CONFIG_AIODEV)) + return 0; + + if (!machine_is_bpi_r2pro) + return 0; + + hwid_chan = aiochannel_by_name("aiodev0.in_value1_mV"); + if (IS_ERR(hwid_chan)) { + ret = PTR_ERR(hwid_chan); + goto err_hwid; + } + + ret = aiochannel_get_value(hwid_chan, &hwid_voltage); + if (ret) + goto err_hwid; + + pr_info("hwid_voltage: %d\n", hwid_voltage); + + if (hwid_voltage == 1800) + hwid = "V00"; + else + hwid = "unknown"; + + pr_info("Detected RK3568 BananaPi R2 Pro %s\n", hwid); + + globalvar_add_simple("board.hwid", hwid); + + return 0; + +err_hwid: + pr_err("couldn't retrieve hardware ID\n"); + return ret; +} +late_initcall(rk3568_bpi_r2pro_detect_hwid); + +BAREBOX_MAGICVAR(global.board.hwid, "The board hardware ID"); diff --git a/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c new file mode 100644 index 0000000000..9f039c6048 --- /dev/null +++ b/arch/arm/boards/rockchip-rk3568-bpi-r2pro/lowlevel.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <common.h> +#include <linux/sizes.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <mach/hardware.h> +#include <mach/atf.h> +#include <debug_ll.h> +#include <mach/rockchip.h> + +extern char __dtb_rk3568_bpi_r2_pro_start[]; + +static noinline void rk3568_start(void) +{ + void *fdt; + + /* + * Enable vccio4 1.8V and vccio6 1.8V + * Needed for GMAC to work. + */ + writel(RK_SETBITS(0x50), 0xfdc20140); + + fdt = __dtb_rk3568_bpi_r2_pro_start; + + if (current_el() == 3) { + rk3568_lowlevel_init(); + rk3568_atf_load_bl31(fdt); + /* not reached */ + } + + barebox_arm_entry(RK3568_DRAM_BOTTOM, 0x80000000 - RK3568_DRAM_BOTTOM, fdt); +} + +ENTRY_FUNCTION(start_rk3568_bpi_r2pro, r0, r1, r2) +{ + /* + * Image execution starts at 0x0, but this is used for ATF and + * OP-TEE later, so move away from here. + */ + if (current_el() == 3) + relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS); + else + relocate_to_current_adr(); + + setup_c(); + + rk3568_start(); +} diff --git a/arch/arm/boards/tqma6ulx/Makefile b/arch/arm/boards/tqma6ulx/Makefile new file mode 100644 index 0000000000..01c7a259e9 --- /dev/null +++ b/arch/arm/boards/tqma6ulx/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/tqma6ulx/board.c b/arch/arm/boards/tqma6ulx/board.c new file mode 100644 index 0000000000..06b5e1322c --- /dev/null +++ b/arch/arm/boards/tqma6ulx/board.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2021 Rouven Czerwinski, Pengutronix + */ + +#include <common.h> +#include <bootsource.h> +#include <init.h> +#include <mach/generic.h> +#include <mach/bbu.h> +#include <of.h> +#include <string.h> + +static int mba6ulx_probe(struct device_d *dev) +{ + int flags; + + /* the bootloader is stored in one of the two boot partitions */ + flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0; + imx6_bbu_internal_mmc_register_handler("SD", "/dev/mmc0.barebox", flags); + + flags = bootsource_get_instance() == 1 ? BBU_HANDLER_FLAG_DEFAULT : 0; + imx6_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc1", flags); + + if (bootsource_get_instance() == 0) + of_device_enable_path("/chosen/environment-sd"); + else + of_device_enable_path("/chosen/environment-emmc"); + + return 0; +} + +static const struct of_device_id mba6ulx_of_match[] = { + { .compatible = "tq,mba6ulx" }, + { /* sentinel */ }, +}; + +static struct driver_d mba6ulx_board_driver = { + .name = "board-mba6ulx", + .probe = mba6ulx_probe, + .of_compatible = mba6ulx_of_match, +}; +device_platform_driver(mba6ulx_board_driver); diff --git a/arch/arm/boards/tqma6ulx/flash-header-imx6ul-tqma6ulx.imxcfg b/arch/arm/boards/tqma6ulx/flash-header-imx6ul-tqma6ulx.imxcfg new file mode 100644 index 0000000000..4f71136149 --- /dev/null +++ b/arch/arm/boards/tqma6ulx/flash-header-imx6ul-tqma6ulx.imxcfg @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +loadaddr 0x80000000 +soc imx6 +ivtofs 0x400 + +/* Enable all clocks */ +wm 32 0x020c4068 0xffffffff +wm 32 0x020c406c 0xffffffff +wm 32 0x020c4070 0xffffffff +wm 32 0x020c4074 0xffffffff +wm 32 0x020c4078 0xffffffff +wm 32 0x020c407c 0xffffffff +wm 32 0x020c4080 0xffffffff + +/* This flash header contains support for the LGA Variant */ +/* + * ===================================================================== + * IOMUX + * ===================================================================== + */ +/* DDR IO TYPE: */ +wm 32 0x020E04B4 0x000C0000 /* IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE */ +wm 32 0x020E04AC 0x00000000 /* IOMUXC_SW_PAD_CTL_GRP_DDRPKE */ +/* CLOCK: */ +wm 32 0x020E027C 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK0_P */ +/* Control: */ +wm 32 0x020E0250 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_CAS */ +wm 32 0x020E024C 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_RAS */ +wm 32 0x020E0490 0x00000030 /* IOMUXC_SW_PAD_CTL_GRP_ADDDS */ +wm 32 0x020E0288 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET */ +wm 32 0x020E0270 0x00000000 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDBA2 - DSE can be configured using Group Control Register: IOMUXC_SW_PAD_CTL_GRP_CTLDS */ +wm 32 0x020E0260 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_ODT0 */ +wm 32 0x020E0264 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_ODT1 */ +wm 32 0x020E04A0 0x00000030 /* IOMUXC_SW_PAD_CTL_GRP_CTLDS */ +/* Data Strobes: */ +wm 32 0x020E0494 0x00020000 /* IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL */ +wm 32 0x020E0280 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0_P */ +wm 32 0x020E0284 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1_P */ +/* Data: */ +wm 32 0x020E04B0 0x00020000 /* IOMUXC_SW_PAD_CTL_GRP_DDRMODE */ +wm 32 0x020E0498 0x00000030 /* IOMUXC_SW_PAD_CTL_GRP_B0DS */ +wm 32 0x020E04A4 0x00000030 /* IOMUXC_SW_PAD_CTL_GRP_B1DS */ +wm 32 0x020E0244 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM0 */ +wm 32 0x020E0248 0x00000030 /* IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM1 */ +/* + * ===================================================================== + * DDR Controller Registers + * ===================================================================== + */ +wm 32 0x021B001C 0x00008000 /* MMDC_MDSCR - MMDC Core Special Command Register */ +/* + * ====================================================== + * Calibrations: + * ====================================================== + */ +wm 32 0x021B0800 0xA1390003 /* DDR_PHY_P0_MPZQHWCTRL , enable both one-time & periodic HW ZQ calibration. */ + +wm 32 0x021B080C 0x00130003 /* MMDC_MPWLDECTRL0 */ +wm 32 0x021B083C 0x41540154 /* MMDC_MPDGCTRL0 */ +wm 32 0x021B0848 0x40405050 /* MMDC_MPRDDLCTL */ +wm 32 0x021B0850 0x40404E4C /* MMDC_MPWRDLCTL */ +wm 32 0x021B081C 0x33333333 /* MMDC_MPRDDQBY0DL */ +wm 32 0x021B0820 0x33333333 /* MMDC_MPRDDQBY1DL */ +wm 32 0x021B082C 0xf3333333 /* MMDC_MPWRDQBY0DL */ +wm 32 0x021B0830 0xf3333333 /* MMDC_MPWRDQBY1DL */ +wm 32 0x021B08C0 0x00921012 /* MMDC_MPDCCR */ + +/* Complete calibration by forced measurement: */ +wm 32 0x021B08b8 0x00000800 /* DDR_PHY_P0_MPMUR0, frc_msr */ + +/* + * ===================================================================== + * MMDC init: + * ===================================================================== + */ +wm 32 0x021B0004 0x0002002D /* MMDC0_MDPDC */ +wm 32 0x021B0008 0x00333030 /* MMDC0_MDOTC */ +wm 32 0x021B000C 0x676B52F3 /* MMDC0_MDCFG0 */ +wm 32 0x021B0010 0xB66D8B63 /* MMDC0_MDCFG1 */ +wm 32 0x021B0014 0x01FF00DB /* MMDC0_MDCFG2 */ +wm 32 0x021B0018 0x00201740 /* MMDC0_MDMISC */ +/* TODO: set configuration request again, also done by NXP */ +wm 32 0x021B001C 0x00008000 /* MMDC_MDSCR */ +wm 32 0x021B002C 0x000026D2 /* MMDC0_MDRWD; recommend to maintain the default values */ +wm 32 0x021B0030 0x006B1023 /* MMDC0_MDOR */ +wm 32 0x021B0040 0x00000047 /* CS0_END */ +wm 32 0x021B0000 0x83180000 /* MMDC0_MDCTL */ +/* Mode register writes for CS0 */ +wm 32 0x021B001C 0x02008032 /* MMDC0_MDSCR, MR2 write, CS0 */ +wm 32 0x021B001C 0x00008033 /* MMDC0_MDSCR, MR3 write, CS0 */ +wm 32 0x021B001C 0x00048031 /* MMDC0_MDSCR, MR1 write, CS0 */ +wm 32 0x021B001C 0x15208030 /* MMDC0_MDSCR, MR0 write, CS0 */ +wm 32 0x021B001C 0x04008040 /* MMDC0_MDSCR, ZQ calibration command sent to device on CS0 */ +/* Mode register writes for CS1, not used / needed */ +/* final DDR setup, before operation start: */ +wm 32 0x021B0020 0x00000800 /* MMDC0_MDREF */ +wm 32 0x021B0818 0x00000227 /* DDR_PHY_P0_MPODTCTRL */ +wm 32 0x021B0004 0x0002552D /* MMDC0_MDPDC now SDCTL power down enabled */ +wm 32 0x021B0404 0x00011006 /* MMDC0_MAPSR ADOPT power down enabled */ +wm 32 0x021B001C 0x00000000 /* MMDC0_MDSCR, clear this register (especially the configuration bit as initialization is complete) */ + +#include <mach/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/tqma6ulx/lowlevel.c b/arch/arm/boards/tqma6ulx/lowlevel.c new file mode 100644 index 0000000000..db77d1f532 --- /dev/null +++ b/arch/arm/boards/tqma6ulx/lowlevel.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Rouven Czerwinski, Pengutronix + */ + +#include <common.h> +#include <debug_ll.h> +#include <firmware.h> +#include <mach/generic.h> +#include <asm/barebox-arm.h> +#include <mach/esdctl.h> +#include <mach/iomux-mx6ul.h> +#include <asm/cache.h> + +extern char __dtb_z_imx6ul_mba6ulx_start[]; + +static void setup_uart(void) +{ + imx6_ungate_all_peripherals(); + + /* + * Default pad configuration on this board, no explicit config needed + */ + imx6_uart_setup((void *)MX6_UART1_BASE_ADDR); + pbl_set_putc(imx_uart_putc, (void *)MX6_UART1_BASE_ADDR); + + pr_debug("\n"); + +} + +static void noinline start_mba6ulx(void) +{ + setup_uart(); + + imx6ul_barebox_entry(__dtb_z_imx6ul_mba6ulx_start); +} + +ENTRY_FUNCTION(start_imx6ul_mba6ulx, r0, r1, r2) +{ + + imx6ul_cpu_lowlevel_init(); + + arm_setup_stack(0x00910000); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) { + imx6_uart_setup_ll(); + putc_ll('>'); + } + + relocate_to_current_adr(); + setup_c(); + barrier(); + + start_mba6ulx(); +} diff --git a/arch/arm/configs/rockchip_v8_defconfig b/arch/arm/configs/rockchip_v8_defconfig index 4ceb036db6..79d51234cc 100644 --- a/arch/arm/configs/rockchip_v8_defconfig +++ b/arch/arm/configs/rockchip_v8_defconfig @@ -1,5 +1,6 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_MACH_RK3568_EVB=y +CONFIG_MACH_RK3568_BPI_R2PRO=y CONFIG_MACH_PINE64_QUARTZ64=y CONFIG_BOARD_ARM_GENERIC_DT=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y @@ -8,7 +9,6 @@ CONFIG_MMU=y CONFIG_MALLOC_SIZE=0x0 CONFIG_MALLOC_TLSF=y CONFIG_KALLSYMS=y -CONFIG_RELOCATABLE=y CONFIG_PROMPT="barebox> " CONFIG_BAUDRATE=1500000 CONFIG_HUSH_FANCY_PROMPT=y @@ -21,7 +21,6 @@ CONFIG_BOOTM_OFTREE=y CONFIG_BOOTM_OFTREE_UIMAGE=y CONFIG_BOOTM_AIMAGE=y CONFIG_BLSPEC=y -CONFIG_SYSTEM_PARTITIONS=y CONFIG_CONSOLE_ACTIVATE_NONE=y CONFIG_CONSOLE_ALLOW_COLOR=y CONFIG_PBL_CONSOLE=y @@ -37,6 +36,7 @@ CONFIG_LONGHELP=y CONFIG_CMD_IOMEM=y CONFIG_CMD_IMD=y CONFIG_CMD_MEMINFO=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_GO=y CONFIG_CMD_RESET=y CONFIG_CMD_UIMAGE=y @@ -90,8 +90,22 @@ CONFIG_DRIVER_SERIAL_NS16550=y CONFIG_DRIVER_NET_DESIGNWARE_EQOS=y CONFIG_DRIVER_NET_DESIGNWARE_ROCKCHIP=y CONFIG_SMSC_PHY=y +CONFIG_NET_USB=y +CONFIG_NET_USB_ASIX=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_NET_USB_SMSC95XX=y +CONFIG_NET_USB_RTL8152=y CONFIG_I2C=y CONFIG_I2C_GPIO=y +CONFIG_USB_HOST=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_DUAL_ROLE=y +CONFIG_USB_EHCI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_SERIAL=y +CONFIG_USB_GADGET_FASTBOOT=y +CONFIG_USB_GADGET_MASS_STORAGE=y CONFIG_MCI=y CONFIG_MCI_STARTUP=y CONFIG_MCI_MMC_BOOT_PARTITIONS=y @@ -106,7 +120,12 @@ CONFIG_LED_GPIO_OF=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_POLLER=y CONFIG_WATCHDOG_DW=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED=y CONFIG_GENERIC_PHY=y +CONFIG_USB_NOP_XCEIV=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y # CONFIG_VIRTIO_MENU is not set CONFIG_FS_CRAMFS=y CONFIG_FS_EXT4=y diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 8ae8244bfe..d419e8394d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -105,6 +105,7 @@ lwl-$(CONFIG_MACH_RADXA_ROCK) += rk3188-radxarock.dtb.o lwl-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += rk3288-phycore-som.dtb.o lwl-$(CONFIG_MACH_REALQ7) += imx6q-dmo-edmqmx6.dtb.o lwl-$(CONFIG_MACH_RK3568_EVB) += rk3568-evb1-v10.dtb.o +lwl-$(CONFIG_MACH_RK3568_BPI_R2PRO) += rk3568-bpi-r2-pro.dtb.o lwl-$(CONFIG_MACH_RPI) += bcm2835-rpi.dtb.o lwl-$(CONFIG_MACH_RPI2) += bcm2836-rpi-2.dtb.o lwl-$(CONFIG_MACH_RPI3) += bcm2837-rpi-3.dtb.o @@ -139,6 +140,7 @@ lwl-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += imx8mq-evk.dtb.o lwl-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += tegra20-colibri-iris.dtb.o lwl-$(CONFIG_MACH_TOSHIBA_AC100) += tegra20-paz00.dtb.o lwl-$(CONFIG_MACH_TQMA53) += imx53-mba53.dtb.o +lwl-$(CONFIG_MACH_TQMA6UL) += imx6ul-mba6ulx.dtb.o lwl-$(CONFIG_MACH_TQMA6X) += imx6dl-mba6x.dtb.o imx6q-mba6x.dtb.o lwl-$(CONFIG_MACH_TX25) += imx25-karo-tx25.dtb.o lwl-$(CONFIG_MACH_TX6X) += imx6dl-tx6u.dtb.o diff --git a/arch/arm/dts/imx6ul-mba6ulx.dts b/arch/arm/dts/imx6ul-mba6ulx.dts new file mode 100644 index 0000000000..e2ed694ff9 --- /dev/null +++ b/arch/arm/dts/imx6ul-mba6ulx.dts @@ -0,0 +1,70 @@ + +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright 2021 Pengutronix e.K. + * Author: Rouven Czerwinski + */ + +/dts-v1/; + +#include "imx6ul-mba6ulx.dtsi" + +/ { + chosen { + environment-sd { + compatible = "barebox,environment"; + device-path = &environment_sd; + status = "disabled"; + }; + environment-emmc { + compatible = "barebox,environment"; + device-path = &environment_emmc; + status = "disabled"; + }; + }; +}; + +&usdhc2 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + + environment_emmc: partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; + }; +}; + +&usdhc1 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + + environment_sd: partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; + }; +}; + +&ocotp { + barebox,provide-mac-address = <&fec1 0x620 &fec2 0x632>; +}; + +/* include the FIT public key for verifying on demand */ +#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY +#include CONFIG_BOOTM_FITIMAGE_PUBKEY +#endif diff --git a/arch/arm/dts/imx6ul-mba6ulx.dtsi b/arch/arm/dts/imx6ul-mba6ulx.dtsi new file mode 100644 index 0000000000..da73248084 --- /dev/null +++ b/arch/arm/dts/imx6ul-mba6ulx.dtsi @@ -0,0 +1,333 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright 2016 TQ Systems GmbH + * Author: Marco Felsch + */ + +/dts-v1/; + +#include <dt-bindings/input/input.h> +#include "imx6ul-tqma6ulx.dtsi" + +/ { + model = "TQ TQMa6ULx SoM on MBa6ULx"; + compatible = "tq,mba6ulx", "tq,imx6ul-tqma6ul2l", "fsl,imx6ul"; + + chosen { + stdout-path = &uart1; + }; + + reg_mba6ul_3v3: regulator-mba6ul-3v3 { + compatible = "regulator-fixed"; + regulator-name = "supply-mba6ul-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_mba6ul_5v0: regulator-mba6ul-5v0 { + compatible = "regulator-fixed"; + regulator-name = "supply-mba6ul-5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_otg2vbus_5v0: regulator-otg2-vbus-5v0 { + compatible = "regulator-fixed"; + gpio = <&gpio3 21 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "otg2-vbus-supply-5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_mba6ul_5v0>; + }; + + reg_otg1vbus_5v0: regulator-otg1-vbus-5v0 { + compatible = "regulator-fixed"; + gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "otg1-vbus-supply-5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_mba6ul_5v0>; + }; + + reg_fec_3v3: regulator-fec-3v3 { + compatible = "regulator-fixed"; + regulator-name = "fec-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <®_mba6ul_3v3>; + }; + + reg_mpcie: regulator-mpcie-1v5 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + regulator-name = "mpcie-1v5"; + /* gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>; */ + enable-active-high; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + vin-supply = <®_mba6ul_3v3>; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + phy-supply = <®_fec_3v3>; + phy-reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; + phy-reset-duration = <26>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + phy-supply = <®_fec_3v3>; + phy-reset-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>; + phy-reset-duration = <26>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + max-speed = <100>; + reg = <0>; + /* ToDo: check if following 2 lines are required */ + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + }; + + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + max-speed = <100>; + reg = <1>; + /* ToDo: check if following 2 lines are required */ + clocks = <&clks IMX6UL_CLK_ENET2_REF>; + clock-names = "rmii-ref"; + }; + }; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + expander_io: gpio-expander@20 { + compatible = "nxp,pca9554"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; + + expander_in: gpio-expander@21 { + compatible = "nxp,pca9554"; + reg = <0x21>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_expander_irq>; + interrupt-parent = <&gpio5>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; + + expander_out: gpio-expander@22 { + compatible = "nxp,pca9554"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; + + + /* NXP SE97BTP with temperature sensor + eeprom */ + jc42_1b: eeprom-temperature-sensor@1b { + compatible = "nxp,se97", "jedec,jc-42.4-temp"; + reg = <0x1b>; + status = "okay"; + }; + + se97_53: eeprom-temperature-sensor@53 { + compatible = "nxp,spd"; + reg = <0x53>; + pagesize = <16>; + status = "okay"; + }; + +}; + + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__I2C3_SDA 0x4001b8b0 + MX6UL_PAD_LCD_DATA01__I2C3_SCL 0x4001b8b0 + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b0a8 + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0a0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0a0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b0a8 + /* mdio */ + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + >; + }; + + pinctrl_expander_irq: expanderirqgrp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_usb_otg1: usbotg1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x00017059 + MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC 0x0001b0b0 + /* PWR */ + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x0001b099 + >; + }; + + pinctrl_usb_otg2: usbotg2grp { + fsl,pins = < + /* reset */ + MX6UL_PAD_LCD_DATA16__GPIO3_IO21 0x0001b099 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x00017059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x00017059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x00017059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x00017059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x00017059 + /* CD */ + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x000170b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x000170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x000170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x000170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x000170b9 + /* CD */ + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x000170f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x000170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x000170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x000170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x000170f9 + /* CD */ + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099 + >; + }; + + pinctrl_wdog1: wdog1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__WDOG1_WDOG_B 0x0001b099 + >; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +/* otg-port */ +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_otg1>; + vbus-supply = <®_otg1vbus_5v0>; + dr_mode = "otg"; + status = "okay"; +}; + +/* 7-port usb hub */ +/* id, pwr, oc pins not connected */ +&usbotg2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_otg2>; + disable-over-current; + vbus-supply = <®_otg2vbus_5v0>; + dr_mode = "host"; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + disable-wp; + bus-width = <4>; + vmmc-supply = <®_mba6ul_3v3>; + vqmmc-supply = <®_vccsd>; + no-1-8-v; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog1>; + fsl,ext-reset-output; + status = "okay"; +}; diff --git a/arch/arm/dts/imx6ul-tqma6ulx.dtsi b/arch/arm/dts/imx6ul-tqma6ulx.dtsi new file mode 100644 index 0000000000..77112e1974 --- /dev/null +++ b/arch/arm/dts/imx6ul-tqma6ulx.dtsi @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright 2018 TQ Systems GmbH + * Author: Markus Niebel <Markus.Niebel@tq-group.com> + */ + +#include <arm/imx6ul.dtsi> +#include "tqma6ul-common.dtsi" +#include "tqma6ulx-common.dtsi" + +/ { + model = "TQMa6ULx SOM"; +}; + +&cpu0 { + cooling-min-level = <0>; + cooling-max-level = <3>; + #cooling-cells = <2>; +}; + +&iomuxc { + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x00017051 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x00017051 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x00017051 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x00017051 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x00017051 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x00017051 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x00017051 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x00017051 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x00017051 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x00017051 + /* rst */ + MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp_100mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170e1 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170f1 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170f1 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170f1 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170f1 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170f1 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170f1 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170f1 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170f1 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170f1 + /* rst */ + MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp_200mhz { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x000170f1 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x000170e1 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x000170e1 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x000170e1 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x000170e1 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x000170e1 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x000170e1 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x000170e1 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x000170e1 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x000170e1 + /* rst */ + MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x0001b051 + >; + }; +}; + +&usdhc2 { + fsl,tuning-step= <6>; + max-frequency = <99000000>; + assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>; + assigned-clock-rates = <0>, <198000000>; +}; diff --git a/arch/arm/dts/rk3568-bpi-r2-pro.dts b/arch/arm/dts/rk3568-bpi-r2-pro.dts new file mode 100644 index 0000000000..ad957d23b8 --- /dev/null +++ b/arch/arm/dts/rk3568-bpi-r2-pro.dts @@ -0,0 +1,582 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Author: Frank Wunderlich <frank-w@public-files.de> + * + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3568.dtsi" + +/ { + model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; + compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; + + aliases { + emmc = &sdhci; + sd = &sdmmc0; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + + environment-sd { + compatible = "barebox,environment"; + device-path = &environment_sd; + status = "disabled"; + }; + + environment-emmc { + compatible = "barebox,environment"; + device-path = &environment_emmc; + status = "disabled"; + }; + }; + + memory@a00000 { + device_type = "memory"; + reg = <0x0 0x00a00000 0x0 0x7f600000>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&blue_led_pin &green_led_pin>; + + blue_led: led-0 { + color = <LED_COLOR_ID_BLUE>; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + }; + + green_led: led-1 { + color = <LED_COLOR_ID_GREEN>; + default-state = "on"; + function = LED_FUNCTION_POWER; + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + }; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc3v3_lcd0_n: vcc3v3-lcd0-n { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_lcd0_n"; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_lcd1_n: vcc3v3-lcd1-n { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_lcd1_n"; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-always-on; + }; +}; + +&gmac0 { + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + assigned-clock-rates = <0>, <125000000>; + clock_in_out = "input"; + phy-handle = <&rgmii_phy0>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + tx_delay = <0x3c>; + rx_delay = <0x2f>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + /* 1: rst regs (default in codes), 0: rst the pmic */ + pmic-reset-func = <0>; + + rockchip,system-power-controller; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c5 { + /* pin 3 (SDA) + 4 (SCL) of header con2 */ + status = "disabled"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&pinctrl { + leds { + blue_led_pin: blue-led-pin { + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + green_led_pin: green-led-pin { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm8 { + /* fan 5v - gnd - pwm */ + status = "okay"; +}; + +&pwm10 { + /* pin 7 of header con2 */ + status = "disabled"; +}; + +&pwm11 { + /* pin 15 of header con2 */ + status = "disabled"; +}; + +&pwm12 { + /* pin 21 of header con2 */ + /* shared with uart9 + spi3 */ + pinctrl-0 = <&pwm12m1_pins>; + status = "disabled"; +}; + +&pwm13 { + /* pin 24 of header con2 */ + /* shared with uart9 */ + pinctrl-0 = <&pwm13m1_pins>; + status = "disabled"; +}; + +&pwm14 { + /* pin 23 of header con2 */ + /* shared with spi3 */ + pinctrl-0 = <&pwm14m1_pins>; + status = "disabled"; +}; + +&pwm15 { + /* pin 19 of header con2 */ + /* shared with spi3 */ + pinctrl-0 = <&pwm15m1_pins>; + status = "disabled"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + no-sd; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + + environment_emmc: partition@408000 { + label = "barebox-environment"; + reg = <0x0 0x408000 0x0 0x8000>; + }; + }; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + + environment_sd: partition@408000 { + label = "barebox-environment"; + reg = <0x0 0x408000 0x0 0x8000>; + }; + }; +}; + +&uart0 { + /* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */ + status = "disabled"; +}; + +&uart2 { + /* debug-uart */ + status = "okay"; +}; + +&uart7 { + /* pin 11 (TX) + 13 (RX) of header con2 */ + pinctrl-0 = <&uart7m1_xfer>; + status = "disabled"; +}; + +&uart9 { + /* pin 21 (TX) + 24 (RX) of header con2 */ + /* shared with pwm13 and pwm12/spi3 */ + pinctrl-0 = <&uart9m1_xfer>; + status = "disabled"; +}; + +&u2phy0_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy0_otg { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy1_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy1_otg { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd_dwc3 { + dr_mode = "host"; + extcon = <&usb2phy0>; +}; + +&usbdrd30 { + status = "okay"; +}; + +&usbhost30 { + status = "okay"; +}; + +&combphy0_us { + status = "okay"; +}; + +&combphy1_usq { + status = "okay"; +}; diff --git a/arch/arm/dts/rk3568-evb1-v10.dts b/arch/arm/dts/rk3568-evb1-v10.dts index 6f1eebc619..4ded9b1735 100644 --- a/arch/arm/dts/rk3568-evb1-v10.dts +++ b/arch/arm/dts/rk3568-evb1-v10.dts @@ -484,7 +484,6 @@ &sdmmc0 { max-frequency = <150000000>; - supports-sd; bus-width = <4>; cap-mmc-highspeed; cap-sd-highspeed; diff --git a/arch/arm/dts/tqma6ul-common.dtsi b/arch/arm/dts/tqma6ul-common.dtsi new file mode 100644 index 0000000000..92b295891c --- /dev/null +++ b/arch/arm/dts/tqma6ul-common.dtsi @@ -0,0 +1,191 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright 2018 TQ Systems GmbH + * Author: Markus Niebel <Markus.Niebel@tq-group.com> + */ + +&cpu0 { + arm-supply = <®_arm>; + soc-supply = <®_soc>; +}; + +&i2c4 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; + + pfuze3000: pmic@8 { + compatible = "fsl,pfuze3000"; + reg = <0x08>; + + regulators { + reg_sw1a: sw1a { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-ramp-delay = <6250>; + /* not used */ + }; + + reg_sw1b_core: sw1b { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1475000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + reg_sw2: sw2 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + + reg_sw3_ddr: sw3 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1650000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_swbst: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + /* not used */ + }; + + reg_snvs_3v0: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_vrefddr: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + reg_vccsd: vccsd { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3300000>; + }; + + reg_v33_3v3: v33 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vldo1_3v3: vldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + /* not used */ + }; + + reg_vldo2: vldo2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-boot-on; + /* not used */ + }; + + reg_vldo3: vldo3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + /* not used */ + }; + + reg_vldo4: vldo4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-fixed; + regulator-always-on; + }; + }; + }; + + jc42_1a: eeprom-temperature-sensor@1a { + compatible = "nxp,se97", "jedec,jc-42.4-temp"; + reg = <0x1a>; + status = "okay"; + }; + + m24c64_50: eeprom@50 { + compatible = "atmel,24c64"; + reg = <0x50>; + pagesize = <32>; + status = "okay"; + }; + + m24c02_52: eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + pagesize = <16>; + status = "okay"; + }; + + rtc1: rtc@68 { + compatible = "dallas,ds1339"; + reg = <0x68>; + status = "okay"; + }; +}; + +&iomuxc { + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__I2C4_SCL 0x4001b8b0 + MX6UL_PAD_UART2_RX_DATA__I2C4_SDA 0x4001b8b0 + >; + }; + + /* + * currently not used, potentially dangerous if used on + * baseboard + */ + pinctrl_pmic: pmic { + fsl,pins = < + /* PMIC irq */ + MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x1b099 + >; + }; +}; + +&qspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi>; + status = "okay"; + + flash0: spinor@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <33000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + reg = <0>; + }; +}; + +&snvs_rtc { + status = "disabled"; +}; + +/* eMMC */ +&usdhc2 { + pinctrl-names = "default", "state_100mhz" , "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; + + bus-width = <8>; + disable-wp; + non-removable; + no-sdio; + no-sd; + status = "okay"; +}; diff --git a/arch/arm/dts/tqma6ulx-common.dtsi b/arch/arm/dts/tqma6ulx-common.dtsi new file mode 100644 index 0000000000..3e398d25ad --- /dev/null +++ b/arch/arm/dts/tqma6ulx-common.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright 2018 TQ Systems GmbH + * Author: Markus Niebel <Markus.Niebel@tq-group.com> + */ + +&iomuxc { + pinctrl_qspi: qspigrp { + fsl,pins = < + MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70b9 + MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70b9 + MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70b9 + MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70b9 + MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70b9 + MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1 + >; + }; +}; + +®_sw2 { + regulator-always-on; +}; + +/* eMMC */ +&usdhc2 { + vmmc-supply = <®_sw2>; + vqmmc-supply = <®_vldo4>; +}; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 454f7328d8..6b962dcf7e 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -391,6 +391,11 @@ config MACH_TQMA6X bool "TQ tqma6x on mba6x" select ARCH_IMX6 +config MACH_TQMA6UL + bool "TQ tqma6ul on mba6ulx" + select ARCH_IMX6UL + select ARM_USE_COMPRESSED_DTB + config MACH_TX6X bool "Karo TX6x" select ARCH_IMX6 diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 3c6b3dd9b5..ffd3aa8a4e 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -68,6 +68,12 @@ config MACH_RK3568_EVB help Say Y here if you are using a RK3568 EVB +config MACH_RK3568_BPI_R2PRO + select ARCH_RK3568 + bool "RK3568 BPI R2PRO" + help + Say Y here if you are using a RK3568 Bananpi R2 Pro + config MACH_PINE64_QUARTZ64 select ARCH_RK3568 bool "Pine64 Quartz64" diff --git a/arch/kvx/Kconfig b/arch/kvx/Kconfig index 1c3e29a9ff..5e7ddeea1c 100644 --- a/arch/kvx/Kconfig +++ b/arch/kvx/Kconfig @@ -38,13 +38,6 @@ config ARCH_TEXT_BASE hex default 0x110000000 -menu "Kalray specific" - -config ARCHINFO - string - default "coolidge" -endmenu - menu "Board configuration" config BUILTIN_DTB diff --git a/arch/sandbox/Makefile b/arch/sandbox/Makefile index 2cf51fa349..aee6bccc9c 100644 --- a/arch/sandbox/Makefile +++ b/arch/sandbox/Makefile @@ -74,6 +74,12 @@ cmd_barebox__ = $(CC) -o $@ $(BAREBOX_LDFLAGS) common-y += $(BOARD) arch/sandbox/os/ arch/sandbox/lib/ +stickypage.bin: + @$(kecho) " LN stickypage.bin" + @ln -fs arch/sandbox/board/stickypage.bin stickypage.bin + +KBUILD_IMAGE := barebox stickypage.bin + common-$(CONFIG_OFTREE) += arch/sandbox/dts/ CLEAN_FILES += $(BOARD)/barebox.lds diff --git a/commands/wd.c b/commands/wd.c index c186244b2b..11f888133a 100644 --- a/commands/wd.c +++ b/commands/wd.c @@ -18,11 +18,13 @@ static int do_wd(int argc, char *argv[]) int opt; int rc; - while ((opt = getopt(argc, argv, "d:")) > 0) { + while ((opt = getopt(argc, argv, "d:x")) > 0) { switch (opt) { case 'd': wd = watchdog_get_by_name(optarg); break; + case 'x': + return watchdog_inhibit_all(); default: return COMMAND_ERROR_USAGE; } @@ -66,12 +68,13 @@ BAREBOX_CMD_HELP_TEXT("When TIME is 0, the watchdog gets disabled,") BAREBOX_CMD_HELP_TEXT("Without a parameter the watchdog will be re-triggered.") BAREBOX_CMD_HELP_TEXT("Options:") BAREBOX_CMD_HELP_OPT("-d DEVICE\t", "watchdog name (default is highest priority watchdog)") +BAREBOX_CMD_HELP_OPT("-x\t", "inhibit all watchdogs (i.e. disable or autopoll if possible)") BAREBOX_CMD_HELP_END BAREBOX_CMD_START(wd) .cmd = do_wd, BAREBOX_CMD_DESC("enable/disable/trigger the watchdog") - BAREBOX_CMD_OPTS("[-d DEVICE] [TIME]") + BAREBOX_CMD_OPTS("[-d DEVICE] [-x] [TIME]") BAREBOX_CMD_GROUP(CMD_GRP_HWMANIP) BAREBOX_CMD_HELP(cmd_wd_help) BAREBOX_CMD_COMPLETE(device_complete) diff --git a/common/Kconfig b/common/Kconfig index 667b0a1e79..f7a6a96e87 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -730,6 +730,12 @@ config IMD select CRC32 bool "barebox metadata support" +config IMD_ENDIANNESS + bool "add endianness record to metadata" + depends on IMD + depends on SYS_SUPPORTS_LITTLE_ENDIAN && SYS_SUPPORTS_BIG_ENDIAN + default y + choice prompt "console support" default CONSOLE_FULL @@ -1044,7 +1050,7 @@ config RESET_SOURCE config MACHINE_ID bool "compute unique machine-id" depends on FLEXIBLE_BOOTARGS - depends on SHA1 + depends on HAVE_DIGEST_SHA1 help Compute a persistent machine-specific id and store it to $global.machine_id. The id is a hash of device-specific information added via diff --git a/common/imd-barebox.c b/common/imd-barebox.c index e11fdca845..7877c8de39 100644 --- a/common/imd-barebox.c +++ b/common/imd-barebox.c @@ -23,6 +23,16 @@ __BAREBOX_IMD_SECTION(.barebox_imd_end) = { .type = cpu_to_le32(IMD_TYPE_END), }; +#ifdef CONFIG_IMD_ENDIANNESS +#ifdef CONFIG_CPU_LITTLE_ENDIAN +#define IMD_ENDIANNESS "little" +#else +#define IMD_ENDIANNESS "big" +#endif +BAREBOX_IMD_TAG_STRING(imd_endianness_tag, IMD_TYPE_PARAMETER, + "endianness=" IMD_ENDIANNESS, 1); +#endif /* CONFIG_IMD_ENDIANNESS */ + BAREBOX_IMD_TAG_STRING(imd_build_tag, IMD_TYPE_BUILD, UTS_VERSION, 1); BAREBOX_IMD_TAG_STRING(imd_release_tag, IMD_TYPE_RELEASE, UTS_RELEASE, 1); BAREBOX_IMD_TAG_STRING(imd_buildsystem_version_tag, IMD_TYPE_BUILDSYSTEM, BUILDSYSTEM_VERSION, 1); diff --git a/crypto/Kconfig b/crypto/Kconfig index 3b68836b34..a2e03ae109 100644 --- a/crypto/Kconfig +++ b/crypto/Kconfig @@ -16,25 +16,25 @@ menuconfig DIGEST if DIGEST -config MD5 +config HAVE_DIGEST_MD5 bool -config SHA1 +config HAVE_DIGEST_SHA1 bool -config SHA224 +config HAVE_DIGEST_SHA224 bool -config SHA256 +config HAVE_DIGEST_SHA256 bool -config SHA384 +config HAVE_DIGEST_SHA384 bool -config SHA512 +config HAVE_DIGEST_SHA512 bool -config DIGEST_HMAC +config HAVE_DIGEST_HMAC bool config DIGEST_CRC32_GENERIC @@ -43,36 +43,36 @@ config DIGEST_CRC32_GENERIC config DIGEST_MD5_GENERIC bool "MD5" - select MD5 + select HAVE_DIGEST_MD5 config DIGEST_SHA1_GENERIC bool "SHA1" - select SHA1 + select HAVE_DIGEST_SHA1 config DIGEST_SHA224_GENERIC bool "SHA224" - select SHA224 + select HAVE_DIGEST_SHA224 config DIGEST_SHA256_GENERIC bool "SHA256" - select SHA256 + select HAVE_DIGEST_SHA256 config DIGEST_SHA384_GENERIC bool "SHA384" - select SHA384 + select HAVE_DIGEST_SHA384 config DIGEST_SHA512_GENERIC bool "SHA512" - select SHA512 + select HAVE_DIGEST_SHA512 config DIGEST_HMAC_GENERIC bool "HMAC" - select DIGEST_HMAC + select HAVE_DIGEST_HMAC config DIGEST_SHA1_ARM tristate "SHA1 digest algorithm (ARM-asm)" depends on ARM - select SHA1 + select HAVE_DIGEST_SHA1 help SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented using optimized ARM assembler. @@ -80,8 +80,8 @@ config DIGEST_SHA1_ARM config DIGEST_SHA256_ARM tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)" depends on ARM - select SHA256 - select SHA224 + select HAVE_DIGEST_SHA256 + select HAVE_DIGEST_SHA224 help SHA-256 secure hash standard (DFIPS 180-2) implemented using optimized ARM assembler and NEON, when available. diff --git a/drivers/block/efi-block-io.c b/drivers/block/efi-block-io.c index ff0e467d2c..086afb378a 100644 --- a/drivers/block/efi-block-io.c +++ b/drivers/block/efi-block-io.c @@ -52,6 +52,7 @@ struct efi_bio_priv { struct device_d *dev; struct block_device blk; u32 media_id; + void (*efi_info)(struct device_d *); }; static int efi_bio_read(struct block_device *blk, void *buffer, sector_t block, @@ -101,35 +102,40 @@ static struct block_device_ops efi_bio_ops = { .flush = efi_bio_flush, }; -static void efi_bio_print_info(struct efi_bio_priv *priv) +static void efi_bio_print_info(struct device_d *dev) { + struct efi_bio_priv *priv = dev->priv; struct efi_block_io_media *media = priv->protocol->media; u64 revision = priv->protocol->revision; - dev_dbg(priv->dev, "revision: 0x%016llx\n", revision); - dev_dbg(priv->dev, "media_id: 0x%08x\n", media->media_id); - dev_dbg(priv->dev, "removable_media: %d\n", media->removable_media); - dev_dbg(priv->dev, "media_present: %d\n", media->media_present); - dev_dbg(priv->dev, "logical_partition: %d\n", media->logical_partition); - dev_dbg(priv->dev, "read_only: %d\n", media->read_only); - dev_dbg(priv->dev, "write_caching: %d\n", media->write_caching); - dev_dbg(priv->dev, "block_size: 0x%08x\n", media->block_size); - dev_dbg(priv->dev, "io_align: 0x%08x\n", media->io_align); - dev_dbg(priv->dev, "last_block: 0x%016llx\n", media->last_block); + printf("Block I/O Media:\n"); + printf(" revision: 0x%016llx\n", revision); + printf(" media_id: 0x%08x\n", media->media_id); + printf(" removable_media: %d\n", media->removable_media); + printf(" media_present: %d\n", media->media_present); + printf(" logical_partition: %d\n", media->logical_partition); + printf(" read_only: %d\n", media->read_only); + printf(" write_caching: %d\n", media->write_caching); + printf(" block_size: 0x%08x\n", media->block_size); + printf(" io_align: 0x%08x\n", media->io_align); + printf(" last_block: 0x%016llx\n", media->last_block); if (revision < EFI_BLOCK_IO_PROTOCOL_REVISION2) return; - dev_dbg(priv->dev, "u64 lowest_aligned_lba: 0x%08llx\n", + printf(" lowest_aligned_lba: 0x%08llx\n", media->lowest_aligned_lba); - dev_dbg(priv->dev, "logical_blocks_per_physical_block: 0x%08x\n", + printf(" logical_blocks_per_physical_block: 0x%08x\n", media->logical_blocks_per_physical_block); if (revision < EFI_BLOCK_IO_PROTOCOL_REVISION3) return; - dev_dbg(priv->dev, "optimal_transfer_length_granularity: 0x%08x\n", + printf(" optimal_transfer_length_granularity: 0x%08x\n", media->optimal_transfer_length_granularity); + + if (priv->efi_info) + priv->efi_info(dev); } static bool is_bio_usbdev(struct efi_device *efidev) @@ -143,6 +149,7 @@ static int efi_bio_probe(struct efi_device *efidev) int instance; struct efi_bio_priv *priv; struct efi_block_io_media *media; + struct device_d *dev = &efidev->dev; priv = xzalloc(sizeof(*priv)); @@ -151,8 +158,13 @@ static int efi_bio_probe(struct efi_device *efidev) if (!priv->protocol) return -ENODEV; + dev->priv = priv; + priv->efi_info = dev->info; + dev->info = efi_bio_print_info; + media = priv->protocol->media; - efi_bio_print_info(priv); + if (__is_defined(DEBUG)) + efi_bio_print_info(dev); priv->dev = &efidev->dev; if (is_bio_usbdev(efidev)) { diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 8468a2d1d1..160248072a 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -68,6 +68,12 @@ config MFD_STPMIC1 help Select this to support communication with the STPMIC1. +config MFD_RN568PMIC + depends on I2C + bool "Ricoh RN5T568 MFD driver" + help + Select this to support communication with the Ricoh RN5T568 PMIC. + config MFD_SUPERIO bool diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 2bcf90078a..50f54cfcf2 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_MFD_TWL4030) += twl4030.o obj-$(CONFIG_MFD_TWL6030) += twl6030.o obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o obj-$(CONFIG_MFD_STPMIC1) += stpmic1.o +obj-$(CONFIG_MFD_RN568PMIC) += rn5t568.o obj-$(CONFIG_MFD_SUPERIO) += superio.o obj-$(CONFIG_FINTEK_SUPERIO) += fintek-superio.o obj-$(CONFIG_SMSC_SUPERIO) += smsc-superio.o diff --git a/drivers/mfd/rn5t568.c b/drivers/mfd/rn5t568.c new file mode 100644 index 0000000000..c1c792cbec --- /dev/null +++ b/drivers/mfd/rn5t568.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * MFD core driver for Ricoh RN5T618 PMIC + * Note: Manufacturer is now Nisshinbo Micro Devices Inc. + * + * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> + * Copyright (C) 2016 Toradex AG + */ + +#include <common.h> +#include <driver.h> +#include <errno.h> +#include <i2c/i2c.h> +#include <init.h> +#include <of.h> +#include <regmap.h> +#include <reset_source.h> +#include <restart.h> + +#define RN5T568_LSIVER 0x00 +#define RN5T568_OTPVER 0x01 +#define RN5T568_PONHIS 0x09 +# define RN5T568_PONHIS_ON_EXTINPON BIT(3) +# define RN5T568_PONHIS_ON_REPWRPON BIT(1) +# define RN5T568_PONHIS_ON_PWRONPON BIT(0) +#define RN5T568_POFFHIS 0x0a +# define RN5T568_POFFHIS_N_OEPOFF BIT(7) +# define RN5T568_POFFHIS_DCLIMPOFF BIT(6) +# define RN5T568_POFFHIS_WDGPOFF BIT(5) +# define RN5T568_POFFHIS_CPUPOFF BIT(4) +# define RN5T568_POFFHIS_IODETPOFF BIT(3) +# define RN5T568_POFFHIS_VINDETPOFF BIT(2) +# define RN5T568_POFFHIS_TSHUTPOFF BIT(1) +# define RN5T568_POFFHIS_PWRONPOFF BIT(0) +#define RN5T568_SLPCNT 0x0e +# define RN5T568_SLPCNT_SWPPWROFF BIT(0) +#define RN5T568_REPCNT 0x0f +# define RN5T568_REPCNT_OFF_RESETO_16MS 0x30 +# define RN5T568_REPCNT_OFF_REPWRTIM_1000MS 0x06 +# define RN5T568_REPCNT_OFF_REPWRON BIT(0) +#define RN5T568_MAX_REG 0xbc + +struct rn5t568 { + struct restart_handler restart; + struct regmap *regmap; +}; + +static void rn5t568_restart(struct restart_handler *rst) +{ + struct rn5t568 *rn5t568 = container_of(rst, struct rn5t568, restart); + + regmap_write(rn5t568->regmap, RN5T568_SLPCNT, RN5T568_SLPCNT_SWPPWROFF); +} + +static int rn5t568_reset_reason_detect(struct device_d *dev, struct regmap *regmap) +{ + unsigned int reg; + int ret; + + ret = regmap_read(regmap, RN5T568_PONHIS, ®); + if (ret) + return ret; + + dev_dbg(dev, "Power-on history: %x\n", reg); + + if (reg == 0) { + dev_info(dev, "No power-on reason available\n"); + return 0; + } + + if (reg & RN5T568_PONHIS_ON_EXTINPON) { + reset_source_set_device(dev, RESET_POR); + return 0; + } else if (reg & RN5T568_PONHIS_ON_PWRONPON) { + reset_source_set_device(dev, RESET_POR); + return 0; + } else if (!(reg & RN5T568_PONHIS_ON_REPWRPON)) + return -EINVAL; + + ret = regmap_read(regmap, RN5T568_POFFHIS, ®); + if (ret) + return ret; + + dev_dbg(dev, "Power-off history: %x\n", reg); + + if (reg & RN5T568_POFFHIS_PWRONPOFF) + reset_source_set_device(dev, RESET_POR); + else if (reg & RN5T568_POFFHIS_TSHUTPOFF) + reset_source_set_device(dev, RESET_THERM); + else if (reg & RN5T568_POFFHIS_VINDETPOFF) + reset_source_set_device(dev, RESET_BROWNOUT); + else if (reg & RN5T568_POFFHIS_IODETPOFF) + reset_source_set_device(dev, RESET_UKWN); + else if (reg & RN5T568_POFFHIS_CPUPOFF) + reset_source_set_device(dev, RESET_RST); + else if (reg & RN5T568_POFFHIS_WDGPOFF) + reset_source_set_device(dev, RESET_WDG); + else if (reg & RN5T568_POFFHIS_DCLIMPOFF) + reset_source_set_device(dev, RESET_BROWNOUT); + else if (reg & RN5T568_POFFHIS_N_OEPOFF) + reset_source_set_device(dev, RESET_EXT); + else + return -EINVAL; + + return 0; +} + +static const struct regmap_config rn5t568_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = RN5T568_MAX_REG, +}; + +static int __init rn5t568_i2c_probe(struct device_d *dev) +{ + struct rn5t568 *pmic_instance; + unsigned char reg[2]; + int ret; + + pmic_instance = xzalloc(sizeof(struct rn5t568)); + pmic_instance->regmap = regmap_init_i2c(to_i2c_client(dev), &rn5t568_regmap_config); + if (IS_ERR(pmic_instance->regmap)) + return PTR_ERR(pmic_instance->regmap); + + ret = regmap_register_cdev(pmic_instance->regmap, NULL); + if (ret) + return ret; + + ret = regmap_bulk_read(pmic_instance->regmap, RN5T568_LSIVER, ®, 2); + if (ret) { + dev_err(dev, "Failed to read PMIC version via I2C\n"); + return ret; + } + + dev_info(dev, "Found NMD RN5T568 LSI %x, OTP: %x\n", reg[0], reg[1]); + + /* Settings used to trigger software reset and by a watchdog trigger */ + regmap_write(pmic_instance->regmap, RN5T568_REPCNT, RN5T568_REPCNT_OFF_RESETO_16MS | + RN5T568_REPCNT_OFF_REPWRTIM_1000MS | RN5T568_REPCNT_OFF_REPWRON); + + pmic_instance->restart.priority = of_get_restart_priority(dev->device_node); + pmic_instance->restart.name = "RN5T568"; + pmic_instance->restart.restart = &rn5t568_restart; + restart_handler_register(&pmic_instance->restart); + dev_dbg(dev, "RN5t: Restart handler with priority %d registered\n", pmic_instance->restart.priority); + + ret = rn5t568_reset_reason_detect(dev, pmic_instance->regmap); + if (ret) + dev_warn(dev, "Failed to query reset reason\n"); + + return of_platform_populate(dev->device_node, NULL, dev); +} + +static __maybe_unused const struct of_device_id rn5t568_of_match[] = { + { .compatible = "ricoh,rn5t568", .data = NULL, }, + { } +}; + +static struct driver_d rn5t568_i2c_driver = { + .name = "rn5t568-i2c", + .probe = rn5t568_i2c_probe, + .of_compatible = DRV_OF_COMPAT(rn5t568_of_match), +}; + +coredevice_i2c_driver(rn5t568_i2c_driver); diff --git a/drivers/mtd/devices/mtdram.c b/drivers/mtd/devices/mtdram.c index ee1cbf792d..abef07d9c0 100644 --- a/drivers/mtd/devices/mtdram.c +++ b/drivers/mtd/devices/mtdram.c @@ -16,11 +16,6 @@ #include <malloc.h> #include <of.h> -struct mtdram_priv_data { - struct mtd_info mtd; - void *base; -}; - static int ram_erase(struct mtd_info *mtd, struct erase_info *instr) { memset((char *)mtd->priv + instr->addr, 0xff, instr->len); @@ -43,11 +38,10 @@ static int ram_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retle static int mtdram_probe(struct device_d *dev) { + long type; struct resource *iores; - void __iomem *base; int device_id; struct mtd_info *mtd; - struct resource *res; loff_t size; int ret = 0; @@ -60,9 +54,11 @@ static int mtdram_probe(struct device_d *dev) mtd->name = xstrdup(alias); } + type = (long)device_get_match_data(dev); + if (!mtd->name) { device_id = DEVICE_ID_DYNAMIC; - mtd->name = "mtdram"; + mtd->name = type == MTD_RAM ? "mtdram" : "mtdrom"; } iores = dev_request_mem_resource(dev, 0); @@ -70,22 +66,23 @@ static int mtdram_probe(struct device_d *dev) ret = PTR_ERR(iores); goto nobase; } - base = IOMEM(iores->start); - res = dev_get_resource(dev, IORESOURCE_MEM, 0); - size = (unsigned long) resource_size(res); - mtd->priv = base; + mtd->priv = IOMEM(iores->start); + size = (unsigned long) resource_size(iores); - mtd->type = MTD_RAM; + mtd->type = type; mtd->writesize = 1; mtd->writebufsize = 64; - mtd->flags = MTD_CAP_RAM; mtd->size = size; mtd->_read = ram_read; - mtd->_write = ram_write; - mtd->_erase = ram_erase; - mtd->erasesize = 1; + + if (type == MTD_RAM) { + mtd->flags = MTD_CAP_RAM; + mtd->_write = ram_write; + mtd->_erase = ram_erase; + mtd->erasesize = 1; + } mtd->dev.parent = dev; @@ -101,6 +98,10 @@ nobase: static __maybe_unused struct of_device_id mtdram_dt_ids[] = { { .compatible = "mtd-ram", + .data = (void *)MTD_RAM + }, { + .compatible = "mtd-rom", + .data = (void *)MTD_ROM }, { /* sentinel */ } diff --git a/drivers/of/of_path.c b/drivers/of/of_path.c index 40154bf5e9..05c28bf052 100644 --- a/drivers/of/of_path.c +++ b/drivers/of/of_path.c @@ -31,7 +31,7 @@ struct device_d *of_find_device_by_node_path(const char *path) * * @node: The node to find the cdev for, can be the device or a * partition in the device - * @part: Optionally, a description of a parition of @node. See of_find_path + * @part: Optionally, a description of a partition of @node. See of_find_path * @outpath: if this function returns 0 outpath will contain the path belonging * to the input path description. Must be freed with free(). * @flags: use OF_FIND_PATH_FLAGS_BB to return the .bb device if available diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig index 968d4b8ba4..564b77ecba 100644 --- a/drivers/power/reset/Kconfig +++ b/drivers/power/reset/Kconfig @@ -12,7 +12,8 @@ config SYSCON_REBOOT_MODE help Say y here will enable reboot mode driver. This will get reboot mode arguments and store it in SYSCON mapped - register, then the bootloader can read it to take different + register, then the bootloader can read it and take different + action according to the mode. config NVMEM_REBOOT_MODE bool "Generic NVMEM reboot mode driver" diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 70c8be7ca9..b8772e016f 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -109,6 +109,12 @@ config STPMIC1_WATCHDOG help Enable to support configuration of the stpmic1's built-in watchdog. +config RN568_WATCHDOG + bool "Ricoh RN5t568 PMIC based Watchdog" + depends on MFD_RN568PMIC + help + Enable to support system control via the PMIC based watchdog. + config F71808E_WDT bool "Fintek F718xx, F818xx Super I/O Watchdog" depends on X86 diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 0d2f273f78..265ae179f1 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_ARCH_BCM283X) += bcm2835_wdt.o obj-$(CONFIG_RAVE_SP_WATCHDOG) += rave-sp-wdt.o obj-$(CONFIG_STM32_IWDG_WATCHDOG) += stm32_iwdg.o obj-$(CONFIG_STPMIC1_WATCHDOG) += stpmic1_wdt.o +obj-$(CONFIG_RN568_WATCHDOG) += rn5t568_wdt.o obj-$(CONFIG_F71808E_WDT) += f71808e_wdt.o obj-$(CONFIG_GPIO_WATCHDOG) += gpio_wdt.o obj-$(CONFIG_ITCO_WDT) += itco_wdt.o diff --git a/drivers/watchdog/rn5t568_wdt.c b/drivers/watchdog/rn5t568_wdt.c new file mode 100644 index 0000000000..a6443609e2 --- /dev/null +++ b/drivers/watchdog/rn5t568_wdt.c @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Watchdog driver for Ricoh RN5T618 PMIC + * + * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> + */ + +#include <common.h> +#include <init.h> +#include <watchdog.h> +#include <regmap.h> +#include <of.h> + +#define RN5T568_WATCHDOG 0x0b +# define RN5T568_WATCHDOG_WDPWROFFEN BIT(2) +# define RN5T568_WATCHDOG_WDOGTIM_M (BIT(0) | BIT(1)) +#define RN5T568_PWRIREN 0x12 +# define RN5T568_PWRIREN_EN_WDOG BIT(6) +#define RN5T568_PWRIRQ 0x13 +# define RN5T568_PWRIRQ_IR_WDOG BIT(6) + +struct rn5t568_wdt { + struct watchdog wdd; + struct regmap *regmap; + unsigned int timeout; +}; + +struct rn5t568_wdt_tim { + u8 reg_val; + u8 time; +}; + +static const struct rn5t568_wdt_tim rn5t568_wdt_timeout[] = { + { .reg_val = 0, .time = 1, }, + { .reg_val = 1, .time = 8, }, + { .reg_val = 2, .time = 32, }, + { .reg_val = 3, .time = 128, }, +}; + +#define PMIC_WDT_MAX_TIMEOUT 128 + +static int rn5t568_wdt_start(struct regmap *regmap, int idx) +{ + int ret; + + ret = regmap_update_bits(regmap, RN5T568_WATCHDOG, RN5T568_WATCHDOG_WDOGTIM_M, + rn5t568_wdt_timeout[idx].reg_val); + if (ret) + return ret; + + regmap_clear_bits(regmap, RN5T568_PWRIRQ, RN5T568_PWRIRQ_IR_WDOG); + regmap_set_bits(regmap, RN5T568_PWRIREN, RN5T568_PWRIREN_EN_WDOG); + + pr_debug("RN5t: Starting the watchdog with %u seconds\n", rn5t568_wdt_timeout[idx].time); + + return regmap_set_bits(regmap, RN5T568_WATCHDOG, RN5T568_WATCHDOG_WDPWROFFEN); +} + +static int rn5t568_wdt_stop(struct regmap *regmap) +{ + int ret; + + ret = regmap_clear_bits(regmap, RN5T568_PWRIREN, RN5T568_PWRIREN_EN_WDOG); + if (ret) + return ret; + + return regmap_clear_bits(regmap, RN5T568_WATCHDOG, RN5T568_WATCHDOG_WDPWROFFEN); +} + +static int rn5t568_wdt_ping(struct regmap *regmap) +{ + unsigned int val; + int ret; + + ret = regmap_read(regmap, RN5T568_WATCHDOG, &val); + if (ret) + return ret; + + return regmap_write(regmap, RN5T568_WATCHDOG, val); +} + +static int rn5t568_wdt_set_timeout(struct watchdog *wdd, unsigned int timeout) +{ + struct rn5t568_wdt *wdt = container_of(wdd, struct rn5t568_wdt, wdd); + int ret, i; + + if (!timeout) + return rn5t568_wdt_stop(wdt->regmap); + + for (i = 0; i < ARRAY_SIZE(rn5t568_wdt_timeout); i++) { + if (timeout < rn5t568_wdt_timeout[i].time) + break; + } + + if (i == ARRAY_SIZE(rn5t568_wdt_timeout)) + return -EINVAL; + + if (wdt->timeout == timeout) + return rn5t568_wdt_ping(wdt->regmap); + + ret = rn5t568_wdt_start(wdt->regmap, i); + if (ret) + return ret; + + wdt->timeout = rn5t568_wdt_timeout[i].time; + + return ret; +} + +static int rn5t568_wdt_probe(struct device_d *dev) +{ + struct rn5t568_wdt *wdt; + struct watchdog *wdd; + unsigned int val; + int ret; + + wdt = xzalloc(sizeof(*wdt)); + + wdt->regmap = dev_get_regmap(dev->parent, NULL); + if (IS_ERR(wdt->regmap)) + return PTR_ERR(wdt->regmap); + + wdd = &wdt->wdd; + wdd->hwdev = dev; + wdd->set_timeout = rn5t568_wdt_set_timeout; + wdd->timeout_max = PMIC_WDT_MAX_TIMEOUT; + + ret = regmap_read(wdt->regmap, RN5T568_WATCHDOG, &val); + if (ret == 0) + wdd->running = val & RN5T568_WATCHDOG_WDPWROFFEN ? + WDOG_HW_RUNNING : WDOG_HW_NOT_RUNNING; + + return watchdog_register(wdd); +} + +static __maybe_unused const struct of_device_id rn5t568_wdt_of_match[] = { + { .compatible = "ricoh,rn5t568-wdt" }, + { /* sentinel */ } +}; + +static struct driver_d rn5t568_wdt_driver = { + .name = "rn5t568-wdt", + .probe = rn5t568_wdt_probe, + .of_compatible = DRV_OF_COMPAT(rn5t568_wdt_of_match), +}; +device_platform_driver(rn5t568_wdt_driver); diff --git a/images/Makefile.imx b/images/Makefile.imx index 1dffab989e..18cabbf041 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -180,6 +180,8 @@ $(call build_imx_habv4img, CONFIG_MACH_TQMA6X, start_imx6dl_mba6x, tqma6x/flash- $(call build_imx_habv4img, CONFIG_MACH_TQMA6X, start_imx6q_mba6x, tqma6x/flash-header-tqma6q, tq-tqma6q-mba6x) +$(call build_imx_habv4img, CONFIG_MACH_TQMA6UL, start_imx6ul_mba6ulx, tqma6ulx/flash-header-imx6ul-tqma6ulx, tq-tqma6ul-mba6ulx) + $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbab01_4gib, phytec-som-imx6/flash-header-phytec-pfla02-4gib, phytec-pbab01-4gib) $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbab01_2gib, phytec-som-imx6/flash-header-phytec-pfla02-2gib, phytec-pbab01-2gib) diff --git a/images/Makefile.rockchip b/images/Makefile.rockchip index 0a485cad24..cdc7772c2e 100644 --- a/images/Makefile.rockchip +++ b/images/Makefile.rockchip @@ -14,6 +14,9 @@ image-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += barebox-rk3288-phycore-som.img pblb-$(CONFIG_MACH_RK3568_EVB) += start_rk3568_evb image-$(CONFIG_MACH_RK3568_EVB) += barebox-rk3568-evb.img +pblb-$(CONFIG_MACH_RK3568_BPI_R2PRO) += start_rk3568_bpi_r2pro +image-$(CONFIG_MACH_RK3568_BPI_R2PRO) += barebox-rk3568-bpi-r2pro.img + pblb-$(CONFIG_MACH_PINE64_QUARTZ64) += start_quartz64a image-$(CONFIG_MACH_PINE64_QUARTZ64) += barebox-quartz64a.img @@ -24,6 +27,10 @@ $(obj)/barebox-rk3568-evb.img: $(obj)/start_rk3568_evb.pblb \ $(board)/rockchip-rk3568-evb/sdram-init.bin $(call if_changed,rkimg_image) +$(obj)/barebox-rk3568-bpi-r2pro.img: $(obj)/start_rk3568_bpi_r2pro.pblb \ + $(board)/rockchip-rk3568-bpi-r2pro/sdram-init.bin + $(call if_changed,rkimg_image) + $(obj)/barebox-quartz64a.img: $(obj)/start_quartz64a.pblb \ $(board)/pine64-quartz64/sdram-init.bin $(call if_changed,rkimg_image) diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h index f20e1b4d65..5d0a458eae 100644 --- a/include/asm-generic/bug.h +++ b/include/asm-generic/bug.h @@ -50,4 +50,16 @@ } \ unlikely(__ret_warn_once); \ }) + +#define WARN_ON_ONCE(condition) ({ \ + static int __warned; \ + int __ret_warn_once = !!(condition); \ + \ + if (unlikely(__ret_warn_once && !__warned)) { \ + __warned = 1; \ + __WARN(); \ + } \ + unlikely(__ret_warn_once); \ +}) + #endif diff --git a/include/linux/compiler_types.h b/include/linux/compiler_types.h index 9a5a6f0e8b..aa9cbcac77 100644 --- a/include/linux/compiler_types.h +++ b/include/linux/compiler_types.h @@ -201,8 +201,8 @@ struct ftrace_likely_data { #define __pure __attribute__((pure)) #define __aligned(x) __attribute__((aligned(x))) #define __aligned_largest __attribute__((aligned)) -#define __printf(a, b) __attribute__((format(printf, a, b))) -#define __scanf(a, b) __attribute__((format(scanf, a, b))) +#define __printf(a, b) __attribute__((format(__printf__, a, b))) +#define __scanf(a, b) __attribute__((format(__scanf__, a, b))) #define __maybe_unused __attribute__((unused)) #define __always_unused __attribute__((unused)) #define __mode(x) __attribute__((mode(x))) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index b5ff621b07..e3c1297352 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -339,8 +339,7 @@ $(obj)/%.dtb.S: $(obj)/%.dtb $(srctree)/scripts/gen-dtb-s FORCE dts-frags = $(subst $(quote),,$(CONFIG_EXTERNAL_DTS_FRAGMENTS)) quiet_cmd_dtc = DTC $@ # For compatibility between make 4.2 and 4.3 -H := \# -cmd_dtc = /bin/echo -e '$(H)define $(subst -,_,$(*F))_dts 1\n'$(foreach f,$< $(dts-frags),'$(H)include "$(f)"\n') | \ +cmd_dtc = /bin/echo -e '$(pound)define $(subst -,_,$(*F))_dts 1\n'$(foreach f,$< $(dts-frags),'$(pound)include "$(f)"\n') | \ $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \ $(objtree)/scripts/dtc/dtc -O dtb -o $@ -b 0 \ -i $(srctree)/arch/$(SRCARCH)/dts $(DTC_FLAGS) \ diff --git a/scripts/gen-dtb-s b/scripts/gen-dtb-s index 4f8c62a0b8..1027db2804 100755 --- a/scripts/gen-dtb-s +++ b/scripts/gen-dtb-s @@ -58,6 +58,7 @@ fi compressed=$(${CONFIG_SHELL} "${srctree}/scripts/file-size.sh" $dtb.lzo) uncompressed=$(${CONFIG_SHELL} "${srctree}/scripts/file-size.sh" $dtb) +echo "#ifdef CONFIG_USE_COMPRESSED_DTB" echo ".section .dtbz.rodata.${name},\"a\"" echo ".balign STRUCT_ALIGNMENT" echo ".global __dtb_z_${name}_start" @@ -69,3 +70,4 @@ echo ".incbin \"$dtb.lzo\"" echo "__dtb_z_${name}_end:" echo ".global __dtb_z_${name}_end" echo ".balign STRUCT_ALIGNMENT" +echo "#endif" diff --git a/scripts/setlocalversion b/scripts/setlocalversion index cce4706cc1..6b54e46a0f 100755 --- a/scripts/setlocalversion +++ b/scripts/setlocalversion @@ -1,8 +1,14 @@ #!/bin/sh +# SPDX-License-Identifier: GPL-2.0 # # This scripts adds local version information from the version # control systems git, mercurial (hg) and subversion (svn). # +# If something goes wrong, send a mail the kernel build mailinglist +# (see MAINTAINERS) and CC Nico Schottelius +# <nico-linuxsetlocalversion -at- schottelius.org>. +# +# usage() { echo "Usage: $0 [--save-scmversion] [srctree]" >&2 @@ -38,11 +44,12 @@ scm_version() fi # Check for git and a git repo. - if test -d .git && head=`git rev-parse --verify --short HEAD 2>/dev/null`; then + if test -z "$(git rev-parse --show-cdup 2>/dev/null)" && + head=$(git rev-parse --verify HEAD 2>/dev/null); then # If we are at a tagged commit (like "v2.6.30-rc6"), we ignore # it, because this version is defined in the top level Makefile. - if [ -z "`git describe --exact-match 2>/dev/null`" ]; then + if [ -z "$(git describe --exact-match 2>/dev/null)" ]; then # If only the short version is requested, don't bother # running further git commands @@ -52,69 +59,36 @@ scm_version() fi # If we are past a tagged commit (like # "v2.6.30-rc5-302-g72357d5"), we pretty print it. - if atag="`git describe 2>/dev/null`"; then - echo "$atag" | awk -F- '{printf("-%05d-%s", $(NF-1),$(NF))}' - - # If we don't have a tag at all we print -g{commitish}. - else - printf '%s%s' -g $head + if atag="$(git describe 2>/dev/null)"; then + echo "$atag" | awk -F- '{printf("-%05d", $(NF-1))}' fi - fi - # Is this git on svn? - if git config --get svn-remote.svn.url >/dev/null; then - printf -- '-svn%s' "`git svn find-rev $head`" + # Add -g and exactly 12 hex chars. + printf '%s%s' -g "$(echo $head | cut -c1-12)" fi - # Update index only on r/w media - [ -w . ] && git update-index --refresh --unmerged > /dev/null - - # Check for uncommitted changes - if git diff-index --name-only HEAD | grep -qv "^scripts/package"; then + # Check for uncommitted changes. + # This script must avoid any write attempt to the source tree, + # which might be read-only. + # You cannot use 'git describe --dirty' because it tries to + # create .git/index.lock . + # First, with git-status, but --no-optional-locks is only + # supported in git >= 2.14, so fall back to git-diff-index if + # it fails. Note that git-diff-index does not refresh the + # index, so it may give misleading results. See + # git-update-index(1), git-diff-index(1), and git-status(1). + if { + git --no-optional-locks status -uno --porcelain 2>/dev/null || + git diff-index --name-only HEAD + } | read dummy; then printf '%s' -dirty fi - - # All done with git - return - fi - - # Check for mercurial and a mercurial repo. - if test -d .hg && hgid=`hg id 2>/dev/null`; then - # Do we have an tagged version? If so, latesttagdistance == 1 - if [ "`hg log -r . --template '{latesttagdistance}'`" == "1" ]; then - id=`hg log -r . --template '{latesttag}'` - printf '%s%s' -hg "$id" - else - tag=`printf '%s' "$hgid" | cut -d' ' -f2` - if [ -z "$tag" -o "$tag" = tip ]; then - id=`printf '%s' "$hgid" | sed 's/[+ ].*//'` - printf '%s%s' -hg "$id" - fi - fi - - # Are there uncommitted changes? - # These are represented by + after the changeset id. - case "$hgid" in - *+|*+\ *) printf '%s' -dirty ;; - esac - - # All done with mercurial - return - fi - - # Check for svn and a svn repo. - if rev=`svn info 2>/dev/null | grep '^Last Changed Rev'`; then - rev=`echo $rev | awk '{print $NF}'` - printf -- '-svn%s' "$rev" - - # All done with svn - return fi } collect_files() { - local file res + local file res= for file; do case "$file" in @@ -140,7 +114,7 @@ fi if test -e include/config/auto.conf; then . include/config/auto.conf else - echo "Error: kernelrelease not valid - run 'make prepare' to update it" + echo "Error: kernelrelease not valid - run 'make prepare' to update it" >&2 exit 1 fi @@ -157,15 +131,16 @@ res="${res}${CONFIG_LOCALVERSION}${LOCALVERSION}" if test "$CONFIG_LOCALVERSION_AUTO" = "y"; then # full scm version string res="$res$(scm_version)" -else - # append a plus sign if the repository is not in a clean - # annotated or signed tagged state (as git describe only - # looks at signed or annotated tags - git tag -a/-s) and - # LOCALVERSION= is not specified - if test "${LOCALVERSION+set}" != "set"; then - scm=$(scm_version --short) - res="$res${scm:++}" - fi +elif [ "${LOCALVERSION+set}" != "set" ]; then + # If the variable LOCALVERSION is not set, append a plus + # sign if the repository is not in a clean annotated or + # signed tagged state (as git describe only looks at signed + # or annotated tags - git tag -a/-s). + # + # If the variable LOCALVERSION is set (including being set + # to an empty string), we don't want to append a plus sign. + scm=$(scm_version --short) + res="$res${scm:++}" fi echo "$res" |