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author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-01-16 13:12:44 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-01-16 13:12:44 +0100 |
commit | 72c5d7c3c675e88d5c465d684794459fa50d4596 (patch) | |
tree | 189e7aea8597142e8df8ef95df84f9c4f83a7614 | |
parent | 4d78c200227cdeaefcc7a88a73488f65a5d854e2 (diff) | |
download | barebox-72c5d7c3c675e88d5c465d684794459fa50d4596.tar.gz |
dts: update to v6.2-rc4
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | dts/Bindings/cpufreq/cpufreq-qcom-hw.yaml | 11 | ||||
-rw-r--r-- | dts/Bindings/crypto/atmel,at91sam9g46-aes.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/crypto/atmel,at91sam9g46-sha.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/crypto/atmel,at91sam9g46-tdes.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/display/msm/dsi-controller-main.yaml | 4 | ||||
-rw-r--r-- | dts/Bindings/display/msm/dsi-phy-10nm.yaml | 1 | ||||
-rw-r--r-- | dts/Bindings/display/msm/dsi-phy-14nm.yaml | 1 | ||||
-rw-r--r-- | dts/Bindings/display/msm/dsi-phy-28nm.yaml | 4 | ||||
-rw-r--r-- | dts/Bindings/display/msm/qcom,qcm2290-mdss.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/display/msm/qcom,sm6115-mdss.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml | 1 | ||||
-rw-r--r-- | dts/Bindings/sound/qcom,lpass-tx-macro.yaml | 4 | ||||
-rw-r--r-- | dts/Bindings/sound/qcom,lpass-wsa-macro.yaml | 58 | ||||
-rw-r--r-- | dts/Bindings/spi/atmel,at91rm9200-spi.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/spi/atmel,quadspi.yaml | 2 | ||||
-rw-r--r-- | dts/Bindings/spi/spi-peripheral-props.yaml | 4 |
16 files changed, 76 insertions, 26 deletions
diff --git a/dts/Bindings/cpufreq/cpufreq-qcom-hw.yaml b/dts/Bindings/cpufreq/cpufreq-qcom-hw.yaml index 903b31129f..99e159bc5f 100644 --- a/dts/Bindings/cpufreq/cpufreq-qcom-hw.yaml +++ b/dts/Bindings/cpufreq/cpufreq-qcom-hw.yaml @@ -54,6 +54,17 @@ properties: - const: xo - const: alternate + interrupts: + minItems: 1 + maxItems: 3 + + interrupt-names: + minItems: 1 + items: + - const: dcvsh-irq-0 + - const: dcvsh-irq-1 + - const: dcvsh-irq-2 + '#freq-domain-cells': const: 1 diff --git a/dts/Bindings/crypto/atmel,at91sam9g46-aes.yaml b/dts/Bindings/crypto/atmel,at91sam9g46-aes.yaml index 0ccaab16dc..0b7383b310 100644 --- a/dts/Bindings/crypto/atmel,at91sam9g46-aes.yaml +++ b/dts/Bindings/crypto/atmel,at91sam9g46-aes.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator maintainers: - - Tudor Ambarus <tudor.ambarus@microchip.com> + - Tudor Ambarus <tudor.ambarus@linaro.org> properties: compatible: diff --git a/dts/Bindings/crypto/atmel,at91sam9g46-sha.yaml b/dts/Bindings/crypto/atmel,at91sam9g46-sha.yaml index 5163c51b45..ee2ffb0343 100644 --- a/dts/Bindings/crypto/atmel,at91sam9g46-sha.yaml +++ b/dts/Bindings/crypto/atmel,at91sam9g46-sha.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator maintainers: - - Tudor Ambarus <tudor.ambarus@microchip.com> + - Tudor Ambarus <tudor.ambarus@linaro.org> properties: compatible: diff --git a/dts/Bindings/crypto/atmel,at91sam9g46-tdes.yaml b/dts/Bindings/crypto/atmel,at91sam9g46-tdes.yaml index fcc5adf03c..3d6ed24b1b 100644 --- a/dts/Bindings/crypto/atmel,at91sam9g46-tdes.yaml +++ b/dts/Bindings/crypto/atmel,at91sam9g46-tdes.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel Triple Data Encryption Standard (TDES) HW cryptographic accelerator maintainers: - - Tudor Ambarus <tudor.ambarus@microchip.com> + - Tudor Ambarus <tudor.ambarus@linaro.org> properties: compatible: diff --git a/dts/Bindings/display/msm/dsi-controller-main.yaml b/dts/Bindings/display/msm/dsi-controller-main.yaml index f2c143730a..6e2fd6e9fa 100644 --- a/dts/Bindings/display/msm/dsi-controller-main.yaml +++ b/dts/Bindings/display/msm/dsi-controller-main.yaml @@ -32,7 +32,7 @@ properties: - description: Display byte clock - description: Display byte interface clock - description: Display pixel clock - - description: Display escape clock + - description: Display core clock - description: Display AHB clock - description: Display AXI clock @@ -137,8 +137,6 @@ required: - phys - assigned-clocks - assigned-clock-parents - - power-domains - - operating-points-v2 - ports additionalProperties: false diff --git a/dts/Bindings/display/msm/dsi-phy-10nm.yaml b/dts/Bindings/display/msm/dsi-phy-10nm.yaml index d9ad8b659f..3ec466c3ab 100644 --- a/dts/Bindings/display/msm/dsi-phy-10nm.yaml +++ b/dts/Bindings/display/msm/dsi-phy-10nm.yaml @@ -69,7 +69,6 @@ required: - compatible - reg - reg-names - - vdds-supply unevaluatedProperties: false diff --git a/dts/Bindings/display/msm/dsi-phy-14nm.yaml b/dts/Bindings/display/msm/dsi-phy-14nm.yaml index 819de5ce0b..a43e11d3b0 100644 --- a/dts/Bindings/display/msm/dsi-phy-14nm.yaml +++ b/dts/Bindings/display/msm/dsi-phy-14nm.yaml @@ -39,7 +39,6 @@ required: - compatible - reg - reg-names - - vcca-supply unevaluatedProperties: false diff --git a/dts/Bindings/display/msm/dsi-phy-28nm.yaml b/dts/Bindings/display/msm/dsi-phy-28nm.yaml index 3d8540a06f..2f1fd140c8 100644 --- a/dts/Bindings/display/msm/dsi-phy-28nm.yaml +++ b/dts/Bindings/display/msm/dsi-phy-28nm.yaml @@ -34,6 +34,10 @@ properties: vddio-supply: description: Phandle to vdd-io regulator device node. + qcom,dsi-phy-regulator-ldo-mode: + type: boolean + description: Indicates if the LDO mode PHY regulator is wanted. + required: - compatible - reg diff --git a/dts/Bindings/display/msm/qcom,qcm2290-mdss.yaml b/dts/Bindings/display/msm/qcom,qcm2290-mdss.yaml index d6f043a4b0..4795e13c7b 100644 --- a/dts/Bindings/display/msm/qcom,qcm2290-mdss.yaml +++ b/dts/Bindings/display/msm/qcom,qcm2290-mdss.yaml @@ -72,7 +72,7 @@ examples: #include <dt-bindings/interconnect/qcom,qcm2290.h> #include <dt-bindings/power/qcom-rpmpd.h> - mdss@5e00000 { + display-subsystem@5e00000 { #address-cells = <1>; #size-cells = <1>; compatible = "qcom,qcm2290-mdss"; diff --git a/dts/Bindings/display/msm/qcom,sm6115-mdss.yaml b/dts/Bindings/display/msm/qcom,sm6115-mdss.yaml index a86d7f53fa..886858ef67 100644 --- a/dts/Bindings/display/msm/qcom,sm6115-mdss.yaml +++ b/dts/Bindings/display/msm/qcom,sm6115-mdss.yaml @@ -62,7 +62,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/qcom-rpmpd.h> - mdss@5e00000 { + display-subsystem@5e00000 { #address-cells = <1>; #size-cells = <1>; compatible = "qcom,sm6115-mdss"; diff --git a/dts/Bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml b/dts/Bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml index 9d31399902..aa23b0024c 100644 --- a/dts/Bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml +++ b/dts/Bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml @@ -16,6 +16,7 @@ properties: compatible: enum: - mediatek,mt8186-mt6366-rt1019-rt5682s-sound + - mediatek,mt8186-mt6366-rt5682s-max98360-sound mediatek,platform: $ref: "/schemas/types.yaml#/definitions/phandle" diff --git a/dts/Bindings/sound/qcom,lpass-tx-macro.yaml b/dts/Bindings/sound/qcom,lpass-tx-macro.yaml index 66431aade3..da5f70910d 100644 --- a/dts/Bindings/sound/qcom,lpass-tx-macro.yaml +++ b/dts/Bindings/sound/qcom,lpass-tx-macro.yaml @@ -30,7 +30,9 @@ properties: const: 0 clocks: - maxItems: 5 + oneOf: + - maxItems: 3 + - maxItems: 5 clock-names: oneOf: diff --git a/dts/Bindings/sound/qcom,lpass-wsa-macro.yaml b/dts/Bindings/sound/qcom,lpass-wsa-macro.yaml index 2bf8d082f8..66cbb1f5e3 100644 --- a/dts/Bindings/sound/qcom,lpass-wsa-macro.yaml +++ b/dts/Bindings/sound/qcom,lpass-wsa-macro.yaml @@ -9,9 +9,6 @@ title: LPASS(Low Power Audio Subsystem) VA Macro audio codec maintainers: - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> -allOf: - - $ref: dai-common.yaml# - properties: compatible: enum: @@ -30,15 +27,12 @@ properties: const: 0 clocks: - maxItems: 5 + minItems: 5 + maxItems: 6 clock-names: - items: - - const: mclk - - const: npl - - const: macro - - const: dcodec - - const: fsgen + minItems: 5 + maxItems: 6 clock-output-names: maxItems: 1 @@ -55,10 +49,51 @@ required: - reg - "#sound-dai-cells" +allOf: + - $ref: dai-common.yaml# + + - if: + properties: + compatible: + enum: + - qcom,sc7280-lpass-wsa-macro + - qcom,sm8450-lpass-wsa-macro + - qcom,sc8280xp-lpass-wsa-macro + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: mclk + - const: npl + - const: macro + - const: dcodec + - const: fsgen + + - if: + properties: + compatible: + enum: + - qcom,sm8250-lpass-wsa-macro + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: mclk + - const: npl + - const: macro + - const: dcodec + - const: va + - const: fsgen + unevaluatedProperties: false examples: - | + #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h> #include <dt-bindings/sound/qcom,q6afe.h> codec@3240000 { compatible = "qcom,sm8250-lpass-wsa-macro"; @@ -69,7 +104,8 @@ examples: <&audiocc 0>, <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&aoncc LPASS_CDC_VA_MCLK>, <&vamacro>; - clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; + clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen"; clock-output-names = "mclk"; }; diff --git a/dts/Bindings/spi/atmel,at91rm9200-spi.yaml b/dts/Bindings/spi/atmel,at91rm9200-spi.yaml index 4dd973e341..6c57dd6c3a 100644 --- a/dts/Bindings/spi/atmel,at91rm9200-spi.yaml +++ b/dts/Bindings/spi/atmel,at91rm9200-spi.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel SPI device maintainers: - - Tudor Ambarus <tudor.ambarus@microchip.com> + - Tudor Ambarus <tudor.ambarus@linaro.org> allOf: - $ref: spi-controller.yaml# diff --git a/dts/Bindings/spi/atmel,quadspi.yaml b/dts/Bindings/spi/atmel,quadspi.yaml index 1d493add40..b0d99bc105 100644 --- a/dts/Bindings/spi/atmel,quadspi.yaml +++ b/dts/Bindings/spi/atmel,quadspi.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel Quad Serial Peripheral Interface (QSPI) maintainers: - - Tudor Ambarus <tudor.ambarus@microchip.com> + - Tudor Ambarus <tudor.ambarus@linaro.org> allOf: - $ref: spi-controller.yaml# diff --git a/dts/Bindings/spi/spi-peripheral-props.yaml b/dts/Bindings/spi/spi-peripheral-props.yaml index ead2cccf65..9a60c0664b 100644 --- a/dts/Bindings/spi/spi-peripheral-props.yaml +++ b/dts/Bindings/spi/spi-peripheral-props.yaml @@ -44,9 +44,9 @@ properties: description: Maximum SPI clocking speed of the device in Hz. - spi-cs-setup-ns: + spi-cs-setup-delay-ns: description: - Delay in nanosecods to be introduced by the controller after CS is + Delay in nanoseconds to be introduced by the controller after CS is asserted. spi-rx-bus-width: |