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authorLucas Stach <dev@lynxeye.de>2014-04-13 15:27:42 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2014-04-23 11:39:57 +0200
commitb809c5b410f72ce7ed4a487307ba630807143400 (patch)
treef92952d27af27f511f69f505c03398080e4282ab
parent73d2b515518a8e79fb93fc261487e5eff8a7ad99 (diff)
downloadbarebox-b809c5b410f72ce7ed4a487307ba630807143400.tar.gz
clk: tegra: consider new T30 clock registers
Tegra3 has some new clocks and resets. The new registers don't form a linear range with the old ones. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--drivers/clk/tegra/clk-periph.c20
1 files changed, 15 insertions, 5 deletions
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index c970f63afa..25616c83a2 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
+ * Copyright (C) 2013-2014 Lucas Stach <l.stach@pengutronix.de>
*
* Based on the Linux Tegra clock code
*
@@ -130,7 +130,7 @@ struct clk *_tegra_clk_register_periph(const char *name,
bool has_div)
{
struct tegra_clk_periph *periph;
- int ret;
+ int ret, gate_offs, rst_offs;
periph = kzalloc(sizeof(*periph), GFP_KERNEL);
if (!periph) {
@@ -144,8 +144,13 @@ struct clk *_tegra_clk_register_periph(const char *name,
if (!periph->mux)
goto out_mux;
- periph->gate = clk_gate_alloc(NULL, NULL, clk_base + 0x10 +
- ((id >> 3) & 0xc), id & 0x1f, 0);
+ if (id >= 96)
+ gate_offs = 0x360 + (((id - 96) >> 3) & 0xc);
+ else
+ gate_offs = 0x10 + ((id >> 3) & 0xc);
+
+ periph->gate = clk_gate_alloc(NULL, NULL, clk_base + gate_offs,
+ id & 0x1f, 0);
if (!periph->gate)
goto out_gate;
@@ -162,7 +167,12 @@ struct clk *_tegra_clk_register_periph(const char *name,
periph->hw.parent_names = parent_names;
periph->hw.num_parents = num_parents;
periph->flags = flags;
- periph->rst_reg = clk_base + 0x4 + ((id >> 3) & 0xc);
+
+ if (id >= 96)
+ rst_offs = 0x358 + (((id - 96) >> 3) & 0xc);
+ else
+ rst_offs = 0x4 + ((id >> 3) & 0xc);
+ periph->rst_reg = clk_base + rst_offs;
periph->rst_shift = id & 0x1f;
ret = clk_register(&periph->hw);