diff options
author | Marco Felsch <m.felsch@pengutronix.de> | 2022-10-05 13:12:14 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-10-07 10:29:53 +0200 |
commit | d2c655d34cb204c5ba56891b4e597d53330de4d8 (patch) | |
tree | 8076e8aed0b2a97dc1e4651613b938d5239ad600 /arch/riscv | |
parent | 42089e3f532b8bfc517949d9414395d1d36beb49 (diff) | |
download | barebox-d2c655d34cb204c5ba56891b4e597d53330de4d8.tar.gz |
RISC-V: add Allwinner Sun20i D1 Nezha support
Add Allwinner sun20i SoC and D1-Nezha board support.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.barebox.org/20221005111214.148844-7-m.felsch@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/riscv')
-rw-r--r-- | arch/riscv/Kconfig.socs | 16 | ||||
-rw-r--r-- | arch/riscv/boards/Makefile | 1 | ||||
-rw-r--r-- | arch/riscv/boards/allwinner-d1/Makefile | 3 | ||||
-rw-r--r-- | arch/riscv/boards/allwinner-d1/lowlevel.c | 12 | ||||
-rw-r--r-- | arch/riscv/configs/rv64i_defconfig | 3 | ||||
-rw-r--r-- | arch/riscv/include/asm/debug_ll.h | 5 |
6 files changed, 40 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 828b65a0c1..0f03637a66 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -110,6 +110,22 @@ config BOARD_BEAGLEV_BETA endif +config SOC_ALLWINNER_SUN20I + bool "Allwinner Sun20i SoCs" + depends on ARCH_RV64I + select HAS_ASM_DEBUG_LL + select HAS_CACHE + +if SOC_ALLWINNER_SUN20I + +config BOARD_ALLWINNER_D1 + bool "Allwinner D1 Nezha" + select RISCV_S_MODE + select RISCV_M_MODE + def_bool y + +endif + comment "CPU features" config SIFIVE_L2 diff --git a/arch/riscv/boards/Makefile b/arch/riscv/boards/Makefile index 3b763ff308..df16d38496 100644 --- a/arch/riscv/boards/Makefile +++ b/arch/riscv/boards/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_BOARD_ALLWINNER_D1) += allwinner-d1/ obj-$(CONFIG_BOARD_ERIZO_GENERIC) += erizo/ obj-$(CONFIG_BOARD_HIFIVE) += hifive/ obj-$(CONFIG_BOARD_BEAGLEV) += beaglev/ diff --git a/arch/riscv/boards/allwinner-d1/Makefile b/arch/riscv/boards/allwinner-d1/Makefile new file mode 100644 index 0000000000..3d217ffe0b --- /dev/null +++ b/arch/riscv/boards/allwinner-d1/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +pbl-y += lowlevel.o diff --git a/arch/riscv/boards/allwinner-d1/lowlevel.c b/arch/riscv/boards/allwinner-d1/lowlevel.c new file mode 100644 index 0000000000..2b07a81edb --- /dev/null +++ b/arch/riscv/boards/allwinner-d1/lowlevel.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <common.h> +#include <debug_ll.h> +#include <asm/barebox-riscv.h> + +#define DRAM_BASE 0x40000000 + +ENTRY_FUNCTION(start_allwinner_d1, a0, a1, a2) +{ + barebox_riscv_supervisor_entry(DRAM_BASE, SZ_1G, a0, (void *)a1); +} diff --git a/arch/riscv/configs/rv64i_defconfig b/arch/riscv/configs/rv64i_defconfig index 6c8409567d..2c5bfd2df1 100644 --- a/arch/riscv/configs/rv64i_defconfig +++ b/arch/riscv/configs/rv64i_defconfig @@ -1,7 +1,9 @@ CONFIG_ARCH_RV64I=y +CONFIG_SOC_ALLWINNER_SUN20I=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_STARFIVE=y CONFIG_SOC_VIRT=y +CONFIG_BOARD_ALLWINNER_D1=y CONFIG_BOARD_BEAGLEV=y CONFIG_BOARD_BEAGLEV_BETA=y CONFIG_BOARD_HIFIVE=y @@ -95,6 +97,7 @@ CONFIG_NET_FASTBOOT=y CONFIG_OF_BAREBOX_DRIVERS=y CONFIG_OF_BAREBOX_ENV_IN_FS=y CONFIG_DRIVER_SERIAL_NS16550=y +CONFIG_SERIAL_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_SERIAL_SIFIVE=y CONFIG_DRIVER_NET_MACB=y diff --git a/arch/riscv/include/asm/debug_ll.h b/arch/riscv/include/asm/debug_ll.h index de9bc5f5fd..34294b09dd 100644 --- a/arch/riscv/include/asm/debug_ll.h +++ b/arch/riscv/include/asm/debug_ll.h @@ -29,6 +29,11 @@ #define DEBUG_LL_UART_CLK (58982400 / 16) #define DEBUG_LL_UART_SHIFT 0 #define DEBUG_LL_UART_IOSIZE8 +#elif defined CONFIG_DEBUG_SUN20I +#define DEBUG_LL_UART_ADDR 0x2500000 +#define DEBUG_LL_UART_CLK (24000000 / 16) +#define DEBUG_LL_UART_SHIFT 2 +#define DEBUG_LL_UART_IOSIZE32 #endif #define DEBUG_LL_UART_BPS CONFIG_BAUDRATE |