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authorMarco Felsch <m.felsch@pengutronix.de>2023-03-13 14:41:49 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2023-04-04 09:02:27 +0200
commit7b55ababb40fa1e2c4280940bb8edacfde2703c3 (patch)
tree071dd457fd7c0a5bf43ce5df239aa5355ffd388a /arch
parent6a232f8a59b2dfc1d156595dbc73cccfa8b251b4 (diff)
downloadbarebox-7b55ababb40fa1e2c4280940bb8edacfde2703c3.tar.gz
ARM: i.MX8MM bootsource: fix QSPI boot source detection
The ROM will not update the sw-info field, so we need to parse the SBMR1. There is just one QSPI controller so set instance to 0 to avoid bootsource_instance=unknown. This ports u-boot commit: | commit d4e84f24a6815957b3a218166f214ca9a1c4a7de | Author: Peng Fan <peng.fan@nxp.com> | Date: Thu May 17 15:15:59 2018 +0800 | | imx8m: add QSPI boot dev | | When boot type could not be detected from rom sw info, | read sbmr1 to detect, here we only use it to detect FLEXSPI | boot, because ROM not update it in rom sw info. | | Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20230228-v2023-02-0-topic-flexspi-v2-10-3d33126d2434@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/boot.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c
index 6f6f7008be..c6134f35b6 100644
--- a/arch/arm/mach-imx/boot.c
+++ b/arch/arm/mach-imx/boot.c
@@ -243,6 +243,11 @@ static unsigned int imx8mp_get_bmod(uint32_t r)
return FIELD_GET(IMX8MP_SRC_SBMR_BMOD, r);
}
+static unsigned int imx8mm_get_bcfg(uint32_t r)
+{
+ return FIELD_GET(BOOT_CFG2(6, 4), r);
+}
+
static int imx53_bootsource_internal(uint32_t r)
{
return FIELD_GET(BOOT_CFG1(7, 4), r);
@@ -323,6 +328,7 @@ void imx53_boot_save_loc(void)
#define IMX6_SRC_GPR10 0x44
#define IMX6_BMOD_SERIAL 0b01
#define IMX6_BMOD_RESERVED 0b11
+#define IMX8MM_BCFG_FSPI 0b100
#define IMX8MP_BMOD_FUSES 0b0000
#define IMX8MP_BMOD_SERIAL 0b0001
#define IMX6_BMOD_FUSES 0b00
@@ -358,6 +364,11 @@ static bool imx8mp_bootsource_serial(uint32_t sbmr2)
!(sbmr2 & BT_FUSE_SEL));
}
+static bool imx8mm_bootsource_qspi(uint32_t sbmr1)
+{
+ return imx8mm_get_bcfg(sbmr1) == IMX8MM_BCFG_FSPI;
+}
+
static bool imx6_bootsource_serial_forced(uint32_t bootmode)
{
if (cpu_mx6_is_mx6ul() || cpu_mx6_is_mx6ull())
@@ -692,6 +703,7 @@ void imx8mm_get_boot_source(enum bootsource *src, int *instance)
{
unsigned long addr;
void __iomem *src_base = IOMEM(MX8MM_SRC_BASE_ADDR);
+ uint32_t sbmr1 = readl(src_base + 0x58);
uint32_t sbmr2 = readl(src_base + 0x70);
if (imx6_bootsource_serial(sbmr2)) {
@@ -699,6 +711,12 @@ void imx8mm_get_boot_source(enum bootsource *src, int *instance)
return;
}
+ if (imx8mm_bootsource_qspi(sbmr1)) {
+ *src = BOOTSOURCE_SPI; /* Really: qspi */
+ *instance = 0;
+ return;
+ }
+
addr = IMX8M_BOOT_SW_INFO_POINTER_ADDR_A0;
__imx7_get_boot_source(src, instance, addr, sbmr2);