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| author | Philipp Zabel <p.zabel@pengutronix.de> | 2016-02-02 12:17:33 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-02-04 08:10:39 +0100 |
| commit | da89ee8f2e04e116410632a185024f58b8262d87 (patch) | |
| tree | edefbafec22e4b8d3b2328f2eff61b65bef3ef71 /drivers/net/phy/micrel.c | |
| parent | 9fc7b70a28d14d1d28d918bf9de44127d7c775de (diff) | |
| download | barebox-da89ee8f2e04e116410632a185024f58b8262d87.tar.gz | |
net: phy: micrel: Center FLP timing at 16ms
Based on kernel commit 6270e1ae804a ("net/phy: micrel: Center FLP
timing at 16ms") by Jaeden Amero <jaeden.amero@ni.com>:
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'drivers/net/phy/micrel.c')
| -rw-r--r-- | drivers/net/phy/micrel.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index 6f49e73530..570272ff65 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -149,6 +149,11 @@ static int ksz9021_config_init(struct phy_device *phydev) #define KSZ9031_PS_TO_REG 60 /* Extended registers */ +/* MMD Address 0x0 */ +#define MII_KSZ9031RN_FLP_BURST_TX_LO 3 +#define MII_KSZ9031RN_FLP_BURST_TX_HI 4 + +/* MMD Address 0x2 */ #define MII_KSZ9031RN_CONTROL_PAD_SKEW 4 #define MII_KSZ9031RN_RX_DATA_PAD_SKEW 5 #define MII_KSZ9031RN_TX_DATA_PAD_SKEW 6 @@ -192,6 +197,15 @@ static int ksz9031_of_load_skew_values(struct phy_device *phydev, return 0; } +static int ksz9031_center_flp_timing(struct phy_device *phydev) +{ + /* Center KSZ9031RNX FLP timing at 16ms. */ + phy_write_mmd_indirect(phydev, MII_KSZ9031RN_FLP_BURST_TX_HI, 0, 0x0006); + phy_write_mmd_indirect(phydev, MII_KSZ9031RN_FLP_BURST_TX_LO, 0, 0x1a80); + + return genphy_restart_aneg(phydev); +} + static int ksz9031_config_init(struct phy_device *phydev) { const struct device_d *dev = &phydev->dev; @@ -227,7 +241,8 @@ static int ksz9031_config_init(struct phy_device *phydev) MII_KSZ9031RN_TX_DATA_PAD_SKEW, 4, tx_data_skews, 4); } - return 0; + + return ksz9031_center_flp_timing(phydev); } #define KSZ8873MLL_GLOBAL_CONTROL_4 0x06 |