ARM: i.MX8MN: adapt early clock support

PBL runs fine when doing the same early clock setup as for the i.MX8MM:
i2c communication works, copying to DRAM works, but boot hangs in
barebox proper. Vendor patches for U-Boot configure SYS_PLL3 as 600MHz
for i.MX8MP and i.MX8MN. barebox i.MX8MP port evidently can do without,
but for i.MX8MN, reducing PLL frequency to 600MHz was required to boot.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20211001100949.6891-4-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

0 files changed, 0 insertions, 0 deletions