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| author | Antony Pavlov <antonynpavlov@gmail.com> | 2021-08-17 13:11:03 +0300 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-10-07 14:41:27 +0200 |
| commit | b5d6537574dd79ccc4419e2ef8ade9e6b7c0c18f (patch) | |
| tree | 660957ac72775a7c16eef47dc24c1ae585961ad8 /images | |
| parent | 334f3a529dc52cde19bc5e6f30e6114b2e0f991b (diff) | |
| download | barebox-b5d6537574dd79ccc4419e2ef8ade9e6b7c0c18f.tar.gz | |
RISC-V: add LiteX SoC and linux-on-litex-vexriscv support
LiteX is a Migen-based System on Chip, supporting softcore
VexRiscv CPU, a 32-bits Linux Capable RISC-V CPU.
See https://github.com/enjoy-digital/litex and
https://github.com/litex-hub/linux-on-litex-vexriscv
for details.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Acked-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20210817101104.114945-8-antonynpavlov@gmail.com
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'images')
| -rw-r--r-- | images/Makefile.riscv | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/images/Makefile.riscv b/images/Makefile.riscv index 4410765cf6..0645238c43 100644 --- a/images/Makefile.riscv +++ b/images/Makefile.riscv @@ -19,3 +19,7 @@ image-$(CONFIG_BOARD_HIFIVE) += barebox-hifive-unmatched.img barebox-hifive-unle pblb-$(CONFIG_BOARD_BEAGLEV) += start_beaglev_starlight FILE_barebox-beaglev-starlight.img = start_beaglev_starlight.pblb image-$(CONFIG_BOARD_BEAGLEV) += barebox-beaglev-starlight.img + +pblb-$(CONFIG_BOARD_LITEX_LINUX) += start_litex_linux +FILE_barebox-litex-linux.img = start_litex_linux.pblb +image-$(CONFIG_BOARD_LITEX_LINUX) += barebox-litex-linux.img |