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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2010-10-08 00:03:47 +0800 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2010-10-08 00:03:56 +0800 |
commit | 2fbdb02b11ded2619a0ad023910f8160ead5c48a (patch) | |
tree | 3b7d58ff844b1ea9edbf0147035c62fe4887be5f /include/image.h | |
parent | ad4da3a4a1c817a7ed38de25788fda11496e53a7 (diff) | |
download | barebox-2fbdb02b11ded2619a0ad023910f8160ead5c48a.tar.gz |
image: rename IH_CPU to IH_ARCH to be more concistant
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/image.h')
-rw-r--r-- | include/image.h | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/include/image.h b/include/image.h index 436403acd3..c69178c65e 100644 --- a/include/image.h +++ b/include/image.h @@ -61,45 +61,45 @@ /* * CPU Architecture Codes (supported by Linux) */ -#define IH_CPU_INVALID 0 /* Invalid CPU */ -#define IH_CPU_ALPHA 1 /* Alpha */ -#define IH_CPU_ARM 2 /* ARM */ -#define IH_CPU_I386 3 /* Intel x86 */ -#define IH_CPU_IA64 4 /* IA64 */ -#define IH_CPU_MIPS 5 /* MIPS */ -#define IH_CPU_MIPS64 6 /* MIPS 64 Bit */ -#define IH_CPU_PPC 7 /* PowerPC */ -#define IH_CPU_S390 8 /* IBM S390 */ -#define IH_CPU_SH 9 /* SuperH */ -#define IH_CPU_SPARC 10 /* Sparc */ -#define IH_CPU_SPARC64 11 /* Sparc 64 Bit */ -#define IH_CPU_M68K 12 /* M68K */ -#define IH_CPU_NIOS 13 /* Nios-32 */ -#define IH_CPU_MICROBLAZE 14 /* MicroBlaze */ -#define IH_CPU_NIOS2 15 /* Nios-II */ -#define IH_CPU_BLACKFIN 16 /* Blackfin */ -#define IH_CPU_AVR32 17 /* AVR32 */ +#define IH_ARCH_INVALID 0 /* Invalid CPU */ +#define IH_ARCH_ALPHA 1 /* Alpha */ +#define IH_ARCH_ARM 2 /* ARM */ +#define IH_ARCH_I386 3 /* Intel x86 */ +#define IH_ARCH_IA64 4 /* IA64 */ +#define IH_ARCH_MIPS 5 /* MIPS */ +#define IH_ARCH_MIPS64 6 /* MIPS 64 Bit */ +#define IH_ARCH_PPC 7 /* PowerPC */ +#define IH_ARCH_S390 8 /* IBM S390 */ +#define IH_ARCH_SH 9 /* SuperH */ +#define IH_ARCH_SPARC 10 /* Sparc */ +#define IH_ARCH_SPARC64 11 /* Sparc 64 Bit */ +#define IH_ARCH_M68K 12 /* M68K */ +#define IH_ARCH_NIOS 13 /* Nios-32 */ +#define IH_ARCH_MICROBLAZE 14 /* MicroBlaze */ +#define IH_ARCH_NIOS2 15 /* Nios-II */ +#define IH_ARCH_BLACKFIN 16 /* Blackfin */ +#define IH_ARCH_AVR32 17 /* AVR32 */ #if defined(__PPC__) -#define IH_CPU IH_CPU_PPC +#define IH_ARCH IH_ARCH_PPC #elif defined(__ARM__) -#define IH_CPU IH_CPU_ARM +#define IH_ARCH IH_ARCH_ARM #elif defined(__I386__) || defined(__x86_64__) -#define IH_CPU IH_CPU_I386 +#define IH_ARCH IH_ARCH_I386 #elif defined(__mips__) -#define IH_CPU IH_CPU_MIPS +#define IH_ARCH IH_ARCH_MIPS #elif defined(__nios__) -#define IH_CPU IH_CPU_NIOS +#define IH_ARCH IH_ARCH_NIOS #elif defined(__m68k__) -#define IH_CPU IH_CPU_M68K +#define IH_ARCH IH_ARCH_M68K #elif defined(__microblaze__) -#define IH_CPU IH_CPU_MICROBLAZE +#define IH_ARCH IH_ARCH_MICROBLAZE #elif defined(__nios2__) -#define IH_CPU IH_CPU_NIOS2 +#define IH_ARCH IH_ARCH_NIOS2 #elif defined(__blackfin__) -#define IH_CPU IH_CPU_BLACKFIN +#define IH_ARCH IH_ARCH_BLACKFIN #elif defined(__avr32__) -#define IH_CPU IH_CPU_AVR32 +#define IH_ARCH IH_ARCH_AVR32 #endif /* |