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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-11-01 13:36:16 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-11-02 12:28:54 +0100 |
| commit | 11498dd843e257f45014a94efed5bae8d3c27f77 (patch) | |
| tree | 33b176a93dcaf14972a03b175ed6b711b6ca55fb /include/soc | |
| parent | bdf3cec987016c629dec03da7aada600eb4466b3 (diff) | |
| download | barebox-11498dd843e257f45014a94efed5bae8d3c27f77.tar.gz | |
ARM: i.MX: xload nand: Move mxs_nand_mode_fcb_62bit() to header file
mxs_nand_mode_fcb_62bit() can be shared between the regular MTD NAND
driver and the upcoming i.MX7 xload driver. Move to header file.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include/soc')
| -rw-r--r-- | include/soc/imx/gpmi-nand.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/include/soc/imx/gpmi-nand.h b/include/soc/imx/gpmi-nand.h index f7a2caa1d6..a552513e0d 100644 --- a/include/soc/imx/gpmi-nand.h +++ b/include/soc/imx/gpmi-nand.h @@ -111,4 +111,37 @@ #define MXS_NAND_BCH_TIMEOUT 10000 +#define BCH62_WRITESIZE 1024 +#define BCH62_OOBSIZE 838 +#define BCH62_PAGESIZE (BCH62_WRITESIZE + BCH62_OOBSIZE) + +/* + * Some SoCs like the i.MX7 use a special layout in the FCB block. + * We can read/write that by adjusting the BCH engine to that layout. + * Particularly we have pages consisting of 8 chunks with 128 bytes + * of data and 100.75 bytes of ECC data each. + */ +static void mxs_nand_mode_fcb_62bit(void __iomem *bch_regs) +{ + u32 fl0, fl1; + + /* 8 ecc_chunks */ + fl0 = FIELD_PREP(BCH_FLASHLAYOUT0_NBLOCKS, 7); + /* 32 bytes for metadata */ + fl0 |= FIELD_PREP(BCH_FLASHLAYOUT0_META_SIZE, 32); + /* using ECC62 level to be performed */ + fl0 |= FIELD_PREP(IMX6_BCH_FLASHLAYOUT0_ECC0, 0x1f); + /* 0x20 * 4 bytes of the data0 block */ + fl0 |= FIELD_PREP(BCH_FLASHLAYOUT0_DATA0_SIZE, 0x20); + writel(fl0, bch_regs + BCH_FLASH0LAYOUT0); + + /* 1024 for data + 838 for OOB */ + fl1 = FIELD_PREP(BCH_FLASHLAYOUT1_PAGE_SIZE, BCH62_PAGESIZE); + /* using ECC62 level to be performed */ + fl1 |= FIELD_PREP(IMX6_BCH_FLASHLAYOUT1_ECCN, 0x1f); + /* 0x20 * 4 bytes of the data0 block */ + fl1 |= FIELD_PREP(BCH_FLASHLAYOUT1_DATAN_SIZE, 0x20); + writel(fl1, bch_regs + BCH_FLASH0LAYOUT1); +} + #endif /* __SOC_IMX_GPMI_NAND_H */ |