diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-07-12 12:15:48 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-07-12 15:31:06 +0200 |
commit | e770d18108de5502c8213c6404897388b1ceb3eb (patch) | |
tree | ac4b91789e605cccbf10aea6b9a8c311200b6e2a /include/soc | |
parent | c9ef8ac1c794187e78434678bfdfa7e022bf847d (diff) | |
download | barebox-e770d18108de5502c8213c6404897388b1ceb3eb.tar.gz |
ARM: i.MX8M: include only necessary ddrphy firmwares in image
So far we always include ddrphy firmwares for DDR4 and LPDDR4 in the
images. Pass the DDR type to the RAM controller initialization so
that the type is known at compile time. With this the compiler can
discard the unused firmware files.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include/soc')
-rw-r--r-- | include/soc/imx8m/ddr.h | 50 |
1 files changed, 46 insertions, 4 deletions
diff --git a/include/soc/imx8m/ddr.h b/include/soc/imx8m/ddr.h index c81c4d82c5..ad13632d28 100644 --- a/include/soc/imx8m/ddr.h +++ b/include/soc/imx8m/ddr.h @@ -375,10 +375,52 @@ enum ddrc_type { DDRC_TYPE_MP, }; -int imx8mm_ddr_init(struct dram_timing_info *timing_info); -int imx8mn_ddr_init(struct dram_timing_info *timing_info); -int imx8mq_ddr_init(struct dram_timing_info *timing_info); -int imx8mp_ddr_init(struct dram_timing_info *timing_info); +void ddr_get_firmware_lpddr4(void); +void ddr_get_firmware_ddr(void); + +static void ddr_get_firmware(enum dram_type type) +{ + if (type == DRAM_TYPE_LPDDR4) + ddr_get_firmware_lpddr4(); + else + ddr_get_firmware_ddr(); +} + +int imx8m_ddr_init(struct dram_timing_info *dram_timing, + enum ddrc_type type); + +static inline int imx8mm_ddr_init(struct dram_timing_info *dram_timing, + enum dram_type type) +{ + ddr_get_firmware(type); + + return imx8m_ddr_init(dram_timing, DDRC_TYPE_MM); +} + +static inline int imx8mn_ddr_init(struct dram_timing_info *dram_timing, + enum dram_type type) +{ + ddr_get_firmware(type); + + return imx8m_ddr_init(dram_timing, DDRC_TYPE_MN); +} + +static inline int imx8mq_ddr_init(struct dram_timing_info *dram_timing, + enum dram_type type) +{ + ddr_get_firmware(type); + + return imx8m_ddr_init(dram_timing, DDRC_TYPE_MQ); +} + +static inline int imx8mp_ddr_init(struct dram_timing_info *dram_timing, + enum dram_type type) +{ + ddr_get_firmware(type); + + return imx8m_ddr_init(dram_timing, DDRC_TYPE_MP); +} + int ddr_cfg_phy(struct dram_timing_info *timing_info, enum ddrc_type type); void load_lpddr4_phy_pie(void); void ddrphy_trained_csr_save(struct dram_cfg_param *param, unsigned int num); |