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-rw-r--r--include/mci.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/include/mci.h b/include/mci.h
index a3f6d619b3..3e93f378e4 100644
--- a/include/mci.h
+++ b/include/mci.h
@@ -51,6 +51,11 @@
#define MMC_CAP_SD_HIGHSPEED (1 << 3)
#define MMC_CAP_MMC_HIGHSPEED (1 << 4)
#define MMC_CAP_MMC_HIGHSPEED_52MHZ (1 << 5)
+#define MMC_CAP_MMC_3_3V_DDR (1 << 7) /* Host supports eMMC DDR 3.3V */
+#define MMC_CAP_MMC_1_8V_DDR (1 << 8) /* Host supports eMMC DDR 1.8V */
+#define MMC_CAP_MMC_1_2V_DDR (1 << 9) /* Host supports eMMC DDR 1.2V */
+#define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
+ MMC_CAP_1_2V_DDR)
/* Mask of all caps for bus width */
#define MMC_CAP_BIT_DATA_MASK (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)
@@ -308,6 +313,7 @@
#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
+#define EXT_CSD_DDR_FLAG BIT(2) /* Flag for DDR mode */
#define R1_ILLEGAL_COMMAND (1 << 22)
#define R1_STATUS(x) (x & 0xFFF9A000)
@@ -410,6 +416,19 @@ enum mci_timing {
MMC_TIMING_MMC_HS400 = 8,
};
+static inline bool mci_timing_is_ddr(enum mci_timing timing)
+{
+ switch (timing) {
+ case MMC_TIMING_UHS_DDR50:
+ case MMC_TIMING_MMC_HS200:
+ case MMC_TIMING_MMC_DDR52:
+ case MMC_TIMING_MMC_HS400:
+ return true;
+ default:
+ return false;
+ }
+}
+
enum mci_bus_width {
MMC_BUS_WIDTH_1 = 0,
MMC_BUS_WIDTH_4 = 2,