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authorChuanbo Weng <chuanbo.weng@intel.com>2017-06-14 00:54:13 +0800
committerYang Rong <rong.r.yang@intel.com>2017-07-12 18:29:19 +0800
commit9cb7ff4c285d892616595e5a43793f4d1408eca4 (patch)
tree335679b4a0e2fb166ae5bb0517a871cde6071529 /backend/src/backend/gen_encoder.hpp
parent4933bf9212c9721ca2b0e615097ed2b53fec51c3 (diff)
downloadbeignet-9cb7ff4c285d892616595e5a43793f4d1408eca4.tar.gz
Implement extension cl_intel_device_side_avc_motion_estimation.
This patch mainly contains: 1. built-in function __gen_ocl_ime implementation. 2. Lots of built-in functions of cl_intel_device_side_avc_motion_estimation are implemented. 3. This extension is required to run in simd16 mode. v2: move the utests to seprate patches one by one; as all the utests has extension function check, no need to put them in stand alone utest; uncomment the self test; fix extension check logic issue, should be && instead of ||. Signed-off-by: Chuanbo Weng <chuanbo.weng@intel.com> Signed-off-by: Xionghu Luo <xionghu.luo@intel.com> Reviewed-by: Yang Rong <rong.r.yang@intel.com>
Diffstat (limited to 'backend/src/backend/gen_encoder.hpp')
-rw-r--r--backend/src/backend/gen_encoder.hpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/backend/src/backend/gen_encoder.hpp b/backend/src/backend/gen_encoder.hpp
index 040b94a2..fae8da1b 100644
--- a/backend/src/backend/gen_encoder.hpp
+++ b/backend/src/backend/gen_encoder.hpp
@@ -231,6 +231,10 @@ namespace gbe
uint32_t msg_type,
unsigned char vme_search_path_lut,
unsigned char lut_sub);
+ virtual void IME(unsigned char bti,
+ GenRegister dest,
+ GenRegister msg,
+ uint32_t msg_type);
virtual void FLUSH_SAMPLERCACHE(GenRegister dst);
/*! TypedWrite instruction for texture */