summaryrefslogtreecommitdiff
path: root/src/cl_device_id.c
blob: 1960463ee2d24277acc72e679cac6ae6a83ca5ad (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
/* 
 * Copyright © 2012 Intel Corporation
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2.1 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library. If not, see <http://www.gnu.org/licenses/>.
 *
 * Author: Benjamin Segovia <benjamin.segovia@intel.com>
 */

#include "cl_platform_id.h"
#include "cl_device_id.h"
#include "cl_internals.h"
#include "cl_utils.h"
#include "cl_driver.h"
#include "cl_device_data.h"
#include "cl_khr_icd.h"
#include "CL/cl.h"
#include "CL/cl_ext.h"
#include "CL/cl_intel.h"
#include "cl_gbe_loader.h"
#include "cl_alloc.h"

#include <assert.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <sys/sysinfo.h>

#ifndef CL_VERSION_1_2
#define CL_DEVICE_BUILT_IN_KERNELS 0x103F
#endif

static struct _cl_device_id intel_ivb_gt2_device = {
  .max_compute_unit = 16,
  .max_thread_per_unit = 8,
  .sub_slice_count = 2,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen7_device.h"
};

static struct _cl_device_id intel_ivb_gt1_device = {
  .max_compute_unit = 6,
  .max_thread_per_unit = 6,
  .sub_slice_count = 1,
  .max_work_item_sizes = {256, 256, 256},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen7_device.h"
};

static struct _cl_device_id intel_baytrail_t_device = {
  .max_compute_unit = 4,
  .max_thread_per_unit = 8,
  .sub_slice_count = 1,
  .max_work_item_sizes = {256, 256, 256},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen7_device.h"
};

/* XXX we clone IVB for HSW now */
static struct _cl_device_id intel_hsw_gt1_device = {
  .max_compute_unit = 10,
  .max_thread_per_unit = 7,
  .sub_slice_count = 1,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen75_device.h"
};

static struct _cl_device_id intel_hsw_gt2_device = {
  .max_compute_unit = 20,
  .max_thread_per_unit = 7,
  .sub_slice_count = 2,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen75_device.h"
};

static struct _cl_device_id intel_hsw_gt3_device = {
  .max_compute_unit = 40,
  .max_thread_per_unit = 7,
  .sub_slice_count = 4,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen75_device.h"
};

/* XXX we clone IVB for HSW now */
static struct _cl_device_id intel_brw_gt1_device = {
  .max_compute_unit = 12,
  .max_thread_per_unit = 7,
  .sub_slice_count = 2,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen8_device.h"
};

static struct _cl_device_id intel_brw_gt2_device = {
  .max_compute_unit = 24,
  .max_thread_per_unit = 7,
  .sub_slice_count = 3,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen8_device.h"
};

static struct _cl_device_id intel_brw_gt3_device = {
  .max_compute_unit = 48,
  .max_thread_per_unit = 7,
  .sub_slice_count = 6,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen8_device.h"
};

//Cherryview has the same pciid, must get the max_compute_unit and max_thread_per_unit from drm
static struct _cl_device_id intel_chv_device = {
  .max_compute_unit = 8,
  .max_thread_per_unit = 7,
  .sub_slice_count = 2,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen75_device.h"
};

/* XXX we clone brw now */
static struct _cl_device_id intel_skl_gt1_device = {
  .max_compute_unit = 6,
  .max_thread_per_unit = 7,
  .sub_slice_count = 2,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_skl_gt2_device = {
  .max_compute_unit = 24,
  .max_thread_per_unit = 7,
  .sub_slice_count = 3,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_skl_gt3_device = {
  .max_compute_unit = 48,
  .max_thread_per_unit = 7,
  .sub_slice_count = 6,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_skl_gt4_device = {
  .max_compute_unit = 72,
  .max_thread_per_unit = 7,
  .sub_slice_count = 9,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_bxt18eu_device = {
  .max_compute_unit = 18,
  .max_thread_per_unit = 6,
  .sub_slice_count = 3,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_bxt12eu_device = {
  .max_compute_unit = 12,
  .max_thread_per_unit = 6,
  .sub_slice_count = 2,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_kbl_gt1_device = {
  .max_compute_unit = 12,
  .max_thread_per_unit = 7,
  .sub_slice_count = 2,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_kbl_gt15_device = {
  .max_compute_unit = 18,
  .max_thread_per_unit = 7,
  .sub_slice_count = 3,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_kbl_gt2_device = {
  .max_compute_unit = 24,
  .max_thread_per_unit = 7,
  .sub_slice_count = 3,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_kbl_gt3_device = {
  .max_compute_unit = 48,
  .max_thread_per_unit = 7,
  .sub_slice_count = 6,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_kbl_gt4_device = {
  .max_compute_unit = 72,
  .max_thread_per_unit = 7,
  .sub_slice_count = 9,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 256,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_glk18eu_device = {
  .max_compute_unit = 18,
  .max_thread_per_unit = 6,
  .sub_slice_count = 3,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

static struct _cl_device_id intel_glk12eu_device = {
  .max_compute_unit = 12,
  .max_thread_per_unit = 6,
  .sub_slice_count = 2,
  .max_work_item_sizes = {512, 512, 512},
  .max_work_group_size = 512,
  .max_clock_frequency = 1000,
#include "cl_gen9_device.h"
};

LOCAL cl_device_id
cl_get_gt_device(cl_device_type device_type)
{
  cl_device_id ret = NULL;
  const int device_id = cl_driver_get_device_id();
  cl_device_id device = NULL;

  //cl_get_gt_device only return GPU type device.
  if (((CL_DEVICE_TYPE_GPU | CL_DEVICE_TYPE_DEFAULT) & device_type) == 0)
    return NULL;

#define DECL_INFO_STRING(BREAK, STRUCT, FIELD, STRING) \
    STRUCT.FIELD = STRING; \
    STRUCT.JOIN(FIELD,_sz) = sizeof(STRING); \
    device = &STRUCT; \
    goto BREAK;

  switch (device_id) {
    case PCI_CHIP_HASWELL_D1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 Desktop");
    case PCI_CHIP_HASWELL_D2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 Desktop");
    case PCI_CHIP_HASWELL_D3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 Desktop");
    case PCI_CHIP_HASWELL_S1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 Server");
    case PCI_CHIP_HASWELL_S2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 Server");
    case PCI_CHIP_HASWELL_S3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 Server");
    case PCI_CHIP_HASWELL_M1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 Mobile");
    case PCI_CHIP_HASWELL_M2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 Mobile");
    case PCI_CHIP_HASWELL_M3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 Mobile");
    case PCI_CHIP_HASWELL_B1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 reserved");
    case PCI_CHIP_HASWELL_B2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 reserved");
    case PCI_CHIP_HASWELL_B3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 reserved");
    case PCI_CHIP_HASWELL_E1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell GT1 reserved");
    case PCI_CHIP_HASWELL_E2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell GT2 reserved");
    case PCI_CHIP_HASWELL_E3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell GT3 reserved");
    case PCI_CHIP_HASWELL_SDV_D1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT1 Desktop");
    case PCI_CHIP_HASWELL_SDV_D2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT2 Desktop");
    case PCI_CHIP_HASWELL_SDV_D3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT3 Desktop");
    case PCI_CHIP_HASWELL_SDV_S1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT1 Server");
    case PCI_CHIP_HASWELL_SDV_S2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT2 Server");
    case PCI_CHIP_HASWELL_SDV_S3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT3 Server");
    case PCI_CHIP_HASWELL_SDV_M1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT1 Mobile");
    case PCI_CHIP_HASWELL_SDV_M2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT2 Mobile");
    case PCI_CHIP_HASWELL_SDV_M3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT3 Mobile");
    case PCI_CHIP_HASWELL_SDV_B1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT1 reserved");
    case PCI_CHIP_HASWELL_SDV_B2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT2 reserved");
    case PCI_CHIP_HASWELL_SDV_B3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT3 reserved");
    case PCI_CHIP_HASWELL_SDV_E1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT1 reserved");
    case PCI_CHIP_HASWELL_SDV_E2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT2 reserved");
    case PCI_CHIP_HASWELL_SDV_E3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell"
                                                           " Software Development Vehicle device GT3 reserved");
    case PCI_CHIP_HASWELL_ULT_D1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 Desktop");
    case PCI_CHIP_HASWELL_ULT_D2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 Desktop");
    case PCI_CHIP_HASWELL_ULT_D3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 Desktop");
    case PCI_CHIP_HASWELL_ULT_S1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 Server");
    case PCI_CHIP_HASWELL_ULT_S2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 Server");
    case PCI_CHIP_HASWELL_ULT_S3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 Server");
    case PCI_CHIP_HASWELL_ULT_M1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 Mobile");
    case PCI_CHIP_HASWELL_ULT_M2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 Mobile");
    case PCI_CHIP_HASWELL_ULT_M3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 Mobile");
    case PCI_CHIP_HASWELL_ULT_B1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 reserved");
    case PCI_CHIP_HASWELL_ULT_B2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 reserved");
    case PCI_CHIP_HASWELL_ULT_B3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 reserved");
    case PCI_CHIP_HASWELL_ULT_E1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT1 reserved");
    case PCI_CHIP_HASWELL_ULT_E2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT2 reserved");
    case PCI_CHIP_HASWELL_ULT_E3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell Ultrabook GT3 reserved");

	/* CRW */
    case PCI_CHIP_HASWELL_CRW_D1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 Desktop");
    case PCI_CHIP_HASWELL_CRW_D2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 Desktop");
    case PCI_CHIP_HASWELL_CRW_D3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 Desktop");
    case PCI_CHIP_HASWELL_CRW_S1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 Server");
    case PCI_CHIP_HASWELL_CRW_S2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 Server");
    case PCI_CHIP_HASWELL_CRW_S3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 Server");
    case PCI_CHIP_HASWELL_CRW_M1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 Mobile");
    case PCI_CHIP_HASWELL_CRW_M2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 Mobile");
    case PCI_CHIP_HASWELL_CRW_M3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 Mobile");
    case PCI_CHIP_HASWELL_CRW_B1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 reserved");
    case PCI_CHIP_HASWELL_CRW_B2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 reserved");
    case PCI_CHIP_HASWELL_CRW_B3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 reserved");
    case PCI_CHIP_HASWELL_CRW_E1:
      DECL_INFO_STRING(has_break, intel_hsw_gt1_device, name, "Intel(R) HD Graphics Haswell CRW GT1 reserved");
    case PCI_CHIP_HASWELL_CRW_E2:
      DECL_INFO_STRING(has_break, intel_hsw_gt2_device, name, "Intel(R) HD Graphics Haswell CRW GT2 reserved");
    case PCI_CHIP_HASWELL_CRW_E3:
      DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 reserved");
has_break:
      device->device_id = device_id;
      device->platform = cl_get_platform_default();
      ret = device;
      cl_intel_platform_get_default_extension(ret);
      break;

    case PCI_CHIP_IVYBRIDGE_GT1:
      DECL_INFO_STRING(ivb_gt1_break, intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge GT1");
    case PCI_CHIP_IVYBRIDGE_M_GT1:
      DECL_INFO_STRING(ivb_gt1_break, intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge M GT1");
    case PCI_CHIP_IVYBRIDGE_S_GT1:
      DECL_INFO_STRING(ivb_gt1_break, intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge S GT1");
ivb_gt1_break:
      intel_ivb_gt1_device.device_id = device_id;
      intel_ivb_gt1_device.platform = cl_get_platform_default();
      ret = &intel_ivb_gt1_device;
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_intel_motion_estimation_ext_id);
      break;

    case PCI_CHIP_IVYBRIDGE_GT2:
      DECL_INFO_STRING(ivb_gt2_break, intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge GT2");
    case PCI_CHIP_IVYBRIDGE_M_GT2:
      DECL_INFO_STRING(ivb_gt2_break, intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge M GT2");
    case PCI_CHIP_IVYBRIDGE_S_GT2:
      DECL_INFO_STRING(ivb_gt2_break, intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge S GT2");
ivb_gt2_break:
      intel_ivb_gt2_device.device_id = device_id;
      intel_ivb_gt2_device.platform = cl_get_platform_default();
      ret = &intel_ivb_gt2_device;
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_intel_motion_estimation_ext_id);
      break;

    case PCI_CHIP_BAYTRAIL_T:
      DECL_INFO_STRING(baytrail_t_device_break, intel_baytrail_t_device, name, "Intel(R) HD Graphics Bay Trail-T");
baytrail_t_device_break:
      intel_baytrail_t_device.device_id = device_id;
      intel_baytrail_t_device.platform = cl_get_platform_default();
      ret = &intel_baytrail_t_device;
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_intel_motion_estimation_ext_id);
      break;

    case PCI_CHIP_BROADWLL_M_GT1:
      DECL_INFO_STRING(brw_gt1_break, intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell Mobile GT1");
    case PCI_CHIP_BROADWLL_D_GT1:
      DECL_INFO_STRING(brw_gt1_break, intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell U-Processor GT1");
    case PCI_CHIP_BROADWLL_S_GT1:
      DECL_INFO_STRING(brw_gt1_break, intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell Server GT1");
    case PCI_CHIP_BROADWLL_W_GT1:
      DECL_INFO_STRING(brw_gt1_break, intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell Workstation GT1");
    case PCI_CHIP_BROADWLL_U_GT1:
      DECL_INFO_STRING(brw_gt1_break, intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell ULX GT1");
brw_gt1_break:
      /* For Gen8 and later, half float is suppported and we will enable cl_khr_fp16. */
      intel_brw_gt1_device.device_id = device_id;
      intel_brw_gt1_device.platform = cl_get_platform_default();
      ret = &intel_brw_gt1_device;
      cl_intel_platform_get_default_extension(ret);
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_BROADWLL_M_GT2:
      DECL_INFO_STRING(brw_gt2_break, intel_brw_gt2_device, name, "Intel(R) HD Graphics 5600 BroadWell Mobile GT2");
    case PCI_CHIP_BROADWLL_D_GT2:
      DECL_INFO_STRING(brw_gt2_break, intel_brw_gt2_device, name, "Intel(R) HD Graphics 5500 BroadWell U-Processor GT2");
    case PCI_CHIP_BROADWLL_S_GT2:
      DECL_INFO_STRING(brw_gt2_break, intel_brw_gt2_device, name, "Intel(R) HD Graphics BroadWell Server GT2");
    case PCI_CHIP_BROADWLL_W_GT2:
      DECL_INFO_STRING(brw_gt2_break, intel_brw_gt2_device, name, "Intel(R) HD Graphics BroadWell Workstation GT2");
    case PCI_CHIP_BROADWLL_U_GT2:
      DECL_INFO_STRING(brw_gt2_break, intel_brw_gt2_device, name, "Intel(R) HD Graphics 5300 BroadWell ULX GT2");
brw_gt2_break:
      intel_brw_gt2_device.device_id = device_id;
      intel_brw_gt2_device.platform = cl_get_platform_default();
      ret = &intel_brw_gt2_device;
      cl_intel_platform_get_default_extension(ret);
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_BROADWLL_M_GT3:
      DECL_INFO_STRING(brw_gt3_break, intel_brw_gt3_device, name, "Intel(R) Iris Pro Graphics 6200 BroadWell Mobile GT3");
    case PCI_CHIP_BROADWLL_D_GT3:
      DECL_INFO_STRING(brw_gt3_break, intel_brw_gt3_device, name, "Intel(R) HD Graphics 6000 BroadWell U-Processor GT3");
    case PCI_CHIP_BROADWLL_UI_GT3:
      DECL_INFO_STRING(brw_gt3_break, intel_brw_gt3_device, name, "Intel(R) Iris Graphics 6100 BroadWell U-Processor GT3");
    case PCI_CHIP_BROADWLL_S_GT3:
      DECL_INFO_STRING(brw_gt3_break, intel_brw_gt3_device, name, "Intel(R) Iris Pro Graphics P6300 BroadWell Server GT3");
    case PCI_CHIP_BROADWLL_W_GT3:
      DECL_INFO_STRING(brw_gt3_break, intel_brw_gt3_device, name, "Intel(R) HD Graphics BroadWell Workstation GT3");
    case PCI_CHIP_BROADWLL_U_GT3:
      DECL_INFO_STRING(brw_gt3_break, intel_brw_gt3_device, name, "Intel(R) HD Graphics BroadWell ULX GT3");
brw_gt3_break:
      intel_brw_gt3_device.device_id = device_id;
      intel_brw_gt3_device.platform = cl_get_platform_default();
      ret = &intel_brw_gt3_device;
      cl_intel_platform_get_default_extension(ret);
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_CHV_0:
    case PCI_CHIP_CHV_1:
    case PCI_CHIP_CHV_2:
    case PCI_CHIP_CHV_3:
      DECL_INFO_STRING(chv_break, intel_chv_device, name, "Intel(R) HD Graphics Cherryview");
chv_break:
      intel_chv_device.device_id = device_id;
      intel_chv_device.platform = cl_get_platform_default();
      ret = &intel_chv_device;
      cl_intel_platform_get_default_extension(ret);
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;


    case PCI_CHIP_SKYLAKE_ULT_GT1:
      DECL_INFO_STRING(skl_gt1_break, intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake ULT GT1");
    case PCI_CHIP_SKYLAKE_ULX_GT1:
      DECL_INFO_STRING(skl_gt1_break, intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake ULX GT1");
    case PCI_CHIP_SKYLAKE_DT_GT1:
      DECL_INFO_STRING(skl_gt1_break, intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Desktop GT1");
    case PCI_CHIP_SKYLAKE_HALO_GT1:
      DECL_INFO_STRING(skl_gt1_break, intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Halo GT1");
    case PCI_CHIP_SKYLAKE_SRV_GT1:
      DECL_INFO_STRING(skl_gt1_break, intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Server GT1");
skl_gt1_break:
      intel_skl_gt1_device.device_id = device_id;
      intel_skl_gt1_device.platform = cl_get_platform_default();
      ret = &intel_skl_gt1_device;
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_SKYLAKE_ULT_GT2:
      DECL_INFO_STRING(skl_gt2_break, intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake ULT GT2");
    case PCI_CHIP_SKYLAKE_ULT_GT2F:
      DECL_INFO_STRING(skl_gt2_break, intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake ULT GT2F");
    case PCI_CHIP_SKYLAKE_ULX_GT2:
      DECL_INFO_STRING(skl_gt2_break, intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake ULX GT2");
    case PCI_CHIP_SKYLAKE_DT_GT2:
      DECL_INFO_STRING(skl_gt2_break, intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Desktop GT2");
    case PCI_CHIP_SKYLAKE_HALO_GT2:
      DECL_INFO_STRING(skl_gt2_break, intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Halo GT2");
    case PCI_CHIP_SKYLAKE_SRV_GT2:
      DECL_INFO_STRING(skl_gt2_break, intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Server GT2");
    case PCI_CHIP_SKYLAKE_WKS_GT2:
      DECL_INFO_STRING(skl_gt2_break, intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Workstation GT2");
skl_gt2_break:
      intel_skl_gt2_device.device_id = device_id;
      intel_skl_gt2_device.platform = cl_get_platform_default();
      ret = &intel_skl_gt2_device;
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_SKYLAKE_ULT_GT3:
      DECL_INFO_STRING(skl_gt3_break, intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake ULT GT3");
    case PCI_CHIP_SKYLAKE_ULT_GT3E1:
      DECL_INFO_STRING(skl_gt3_break, intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake ULT GT3E");
    case PCI_CHIP_SKYLAKE_ULT_GT3E2:
      DECL_INFO_STRING(skl_gt3_break, intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake ULT GT3E");
    case PCI_CHIP_SKYLAKE_HALO_GT3:
      DECL_INFO_STRING(skl_gt3_break, intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake Halo GT3");
    case PCI_CHIP_SKYLAKE_SRV_GT3:
      DECL_INFO_STRING(skl_gt3_break, intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake Server GT3");
    case PCI_CHIP_SKYLAKE_MEDIA_SRV_GT3:
      DECL_INFO_STRING(skl_gt3_break, intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake Media Server GT3");
skl_gt3_break:
      intel_skl_gt3_device.device_id = device_id;
      intel_skl_gt3_device.platform = cl_get_platform_default();
      ret = &intel_skl_gt3_device;
      cl_intel_platform_get_default_extension(ret);
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_SKYLAKE_DT_GT4:
      DECL_INFO_STRING(skl_gt4_break, intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Desktop GT4");
    case PCI_CHIP_SKYLAKE_HALO_GT4:
      DECL_INFO_STRING(skl_gt4_break, intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Halo GT4");
    case PCI_CHIP_SKYLAKE_SRV_GT4:
      DECL_INFO_STRING(skl_gt4_break, intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Server GT4");
    case PCI_CHIP_SKYLAKE_WKS_GT4:
      DECL_INFO_STRING(skl_gt4_break, intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Workstation GT4");
skl_gt4_break:
      intel_skl_gt4_device.device_id = device_id;
      intel_skl_gt4_device.platform = cl_get_platform_default();
      ret = &intel_skl_gt4_device;
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_BROXTON_0:
      DECL_INFO_STRING(bxt18eu_break, intel_bxt18eu_device, name, "Intel(R) HD Graphics Broxton 0");
    case PCI_CHIP_BROXTON_2:
      DECL_INFO_STRING(bxt18eu_break, intel_bxt18eu_device, name, "Intel(R) HD Graphics Broxton 2");
bxt18eu_break:
      intel_bxt18eu_device.device_id = device_id;
      intel_bxt18eu_device.platform = cl_get_platform_default();
      ret = &intel_bxt18eu_device;
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_BROXTON_1:
      DECL_INFO_STRING(bxt12eu_break, intel_bxt12eu_device, name, "Intel(R) HD Graphics Broxton 1");
    case PCI_CHIP_BROXTON_3:
      DECL_INFO_STRING(bxt12eu_break, intel_bxt12eu_device, name, "Intel(R) HD Graphics Broxton 3");
bxt12eu_break:
      intel_bxt12eu_device.device_id = device_id;
      intel_bxt12eu_device.platform = cl_get_platform_default();
      ret = &intel_bxt12eu_device;
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_KABYLAKE_ULT_GT1:
      DECL_INFO_STRING(kbl_gt1_break, intel_kbl_gt1_device, name, "Intel(R) HD Graphics Kabylake ULT GT1");
    case PCI_CHIP_KABYLAKE_DT_GT1:
      DECL_INFO_STRING(kbl_gt1_break, intel_kbl_gt1_device, name, "Intel(R) HD Graphics Kabylake Desktop GT1");
    case PCI_CHIP_KABYLAKE_HALO_GT1:
      DECL_INFO_STRING(kbl_gt1_break, intel_kbl_gt1_device, name, "Intel(R) HD Graphics Kabylake Halo GT1");
    case PCI_CHIP_KABYLAKE_ULX_GT1:
      DECL_INFO_STRING(kbl_gt1_break, intel_kbl_gt1_device, name, "Intel(R) HD Graphics Kabylake ULX GT1");
    case PCI_CHIP_KABYLAKE_SRV_GT1:
      DECL_INFO_STRING(kbl_gt1_break, intel_kbl_gt1_device, name, "Intel(R) HD Graphics Kabylake Server GT1");
kbl_gt1_break:
      intel_kbl_gt1_device.device_id = device_id;
      intel_kbl_gt1_device.platform = cl_get_platform_default();
      ret = &intel_kbl_gt1_device;
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_KABYLAKE_ULT_GT15:
      DECL_INFO_STRING(kbl_gt15_break, intel_kbl_gt15_device, name, "Intel(R) HD Graphics Kabylake ULT GT1.5");
    case PCI_CHIP_KABYLAKE_DT_GT15:
      DECL_INFO_STRING(kbl_gt15_break, intel_kbl_gt15_device, name, "Intel(R) HD Graphics Kabylake Desktop GT1.5");
    case PCI_CHIP_KABYLAKE_HALO_GT15:
      DECL_INFO_STRING(kbl_gt15_break, intel_kbl_gt15_device, name, "Intel(R) HD Graphics Kabylake Halo GT1.5");
    case PCI_CHIP_KABYLAKE_ULX_GT15:
      DECL_INFO_STRING(kbl_gt15_break, intel_kbl_gt15_device, name, "Intel(R) HD Graphics Kabylake ULX GT1.5");
kbl_gt15_break:
      intel_kbl_gt15_device.device_id = device_id;
      intel_kbl_gt15_device.platform = cl_get_platform_default();
      ret = &intel_kbl_gt15_device;
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_KABYLAKE_ULT_GT2:
    case PCI_CHIP_KABYLAKE_ULT_GT2_1:
      DECL_INFO_STRING(kbl_gt2_break, intel_kbl_gt2_device, name, "Intel(R) HD Graphics Kabylake ULT GT2");
    case PCI_CHIP_KABYLAKE_DT_GT2:
      DECL_INFO_STRING(kbl_gt2_break, intel_kbl_gt2_device, name, "Intel(R) HD Graphics Kabylake Desktop GT2");
    case PCI_CHIP_KABYLAKE_HALO_GT2:
      DECL_INFO_STRING(kbl_gt2_break, intel_kbl_gt2_device, name, "Intel(R) HD Graphics Kabylake Halo GT2");
    case PCI_CHIP_KABYLAKE_ULX_GT2:
      DECL_INFO_STRING(kbl_gt2_break, intel_kbl_gt2_device, name, "Intel(R) HD Graphics Kabylake ULX GT2");
    case PCI_CHIP_KABYLAKE_SRV_GT2:
      DECL_INFO_STRING(kbl_gt2_break, intel_kbl_gt2_device, name, "Intel(R) HD Graphics Kabylake Server GT2");
    case PCI_CHIP_KABYLAKE_WKS_GT2:
      DECL_INFO_STRING(kbl_gt2_break, intel_kbl_gt2_device, name, "Intel(R) HD Graphics Kabylake Workstation GT2");
kbl_gt2_break:
      intel_kbl_gt2_device.device_id = device_id;
      intel_kbl_gt2_device.platform = cl_get_platform_default();
      ret = &intel_kbl_gt2_device;
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_KABYLAKE_ULT_GT3:
    case PCI_CHIP_KABYLAKE_ULT_GT3_1:
    case PCI_CHIP_KABYLAKE_ULT_GT3_2:
      DECL_INFO_STRING(kbl_gt3_break, intel_kbl_gt3_device, name, "Intel(R) HD Graphics Kabylake ULT GT3");
kbl_gt3_break:
      intel_kbl_gt3_device.device_id = device_id;
      intel_kbl_gt3_device.platform = cl_get_platform_default();
      ret = &intel_kbl_gt3_device;
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_KABYLAKE_HALO_GT4:
      DECL_INFO_STRING(kbl_gt4_break, intel_kbl_gt4_device, name, "Intel(R) HD Graphics Kabylake ULT GT4");
kbl_gt4_break:
      intel_kbl_gt4_device.device_id = device_id;
      intel_kbl_gt4_device.platform = cl_get_platform_default();
      ret = &intel_kbl_gt4_device;
#ifdef ENABLE_FP64
      cl_intel_platform_enable_extension(ret, cl_khr_fp64_ext_id);
#endif
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_GLK_3x6:
      DECL_INFO_STRING(glk18eu_break, intel_bxt18eu_device, name, "Intel(R) HD Graphics Geminilake(3x6)");
glk18eu_break:
      intel_glk18eu_device.device_id = device_id;
      intel_glk18eu_device.platform = cl_get_platform_default();
      ret = &intel_glk18eu_device;
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_GLK_2x6:
      DECL_INFO_STRING(glk12eu_break, intel_bxt12eu_device, name, "Intel(R) HD Graphics Geminilake(2x6)");
glk12eu_break:
      intel_glk12eu_device.device_id = device_id;
      intel_glk12eu_device.platform = cl_get_platform_default();
      ret = &intel_glk12eu_device;
      cl_intel_platform_get_default_extension(ret);
      cl_intel_platform_enable_extension(ret, cl_khr_fp16_ext_id);
      break;

    case PCI_CHIP_SANDYBRIDGE_BRIDGE:
    case PCI_CHIP_SANDYBRIDGE_GT1:
    case PCI_CHIP_SANDYBRIDGE_GT2:
    case PCI_CHIP_SANDYBRIDGE_GT2_PLUS:
    case PCI_CHIP_SANDYBRIDGE_BRIDGE_M:
    case PCI_CHIP_SANDYBRIDGE_M_GT1:
    case PCI_CHIP_SANDYBRIDGE_M_GT2:
    case PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS:
    case PCI_CHIP_SANDYBRIDGE_BRIDGE_S:
    case PCI_CHIP_SANDYBRIDGE_S_GT:
      // Intel(R) HD Graphics SandyBridge not supported yet
      ret = NULL;
      break;
    default:
      printf("cl_get_gt_device(): error, unknown device: %x\n", device_id);
  }

  if (ret == NULL)
    return NULL;

  CL_OBJECT_INIT_BASE(ret, CL_OBJECT_DEVICE_MAGIC);
  if (!CompilerSupported()) {
    ret->compiler_available = CL_FALSE;
    //ret->linker_available = CL_FALSE;
    ret->profile = "EMBEDDED_PROFILE";
    ret->profile_sz = strlen(ret->profile) + 1;
  }

  /* Apply any driver-dependent updates to the device info */
  cl_driver_update_device_info(ret);

  #define toMB(size) (size)&(UINT64_MAX<<20)
  /* Get the global_mem_size and max_mem_alloc size from
   * driver, system ram and hardware*/
  struct sysinfo info;
  if (sysinfo(&info) == 0) {
    uint64_t totalgpumem = ret->global_mem_size;
	uint64_t maxallocmem = ret->max_mem_alloc_size;
    uint64_t totalram = info.totalram * info.mem_unit;
	/* In case to keep system stable we just use half
	 * of the raw as global mem */
    ret->global_mem_size = toMB((totalram / 2 > totalgpumem) ?
                            totalgpumem: totalram / 2);
	/* The hardware has some limit about the alloc size
	 * and the excution of kernel need some global mem
	 * so we now make sure single mem does not use much
	 * than 3/4 global mem*/
    ret->max_mem_alloc_size = toMB((ret->global_mem_size * 3 / 4 > maxallocmem) ?
                              maxallocmem: ret->global_mem_size * 3 / 4);
  }

  return ret;
}

/* Runs a small kernel to check that the device works; returns
 * SELF_TEST_PASS: for success.
 * SELF_TEST_SLM_FAIL: for SLM results mismatch;
 * SELF_TEST_ATOMIC_FAIL: for hsw enqueue  kernel failure to not enable atomics in L3.
 * SELF_TEST_OTHER_FAIL: other fail like runtime API fail.*/
LOCAL cl_self_test_res
cl_self_test(cl_device_id device, cl_self_test_res atomic_in_l3_flag)
{
  cl_int status;
  cl_context ctx;
  cl_command_queue queue;
  cl_program program;
  cl_kernel kernel;
  cl_mem buffer;
  cl_event kernel_finished;
  size_t n = 3;
  cl_int test_data[3] = {3, 7, 5};
  const char* kernel_source = "__kernel void self_test(__global int *buf) {"
  "  __local int tmp[3];"
  "  tmp[get_local_id(0)] = buf[get_local_id(0)];"
  "  barrier(CLK_LOCAL_MEM_FENCE);"
  "  buf[get_global_id(0)] = tmp[2 - get_local_id(0)] + buf[get_global_id(0)];"
  "}"; // using __local to catch the "no SLM on Haswell" problem
  static int tested = 0;
  static cl_self_test_res ret = SELF_TEST_OTHER_FAIL;
  if (tested != 0)
    return ret;
  tested = 1;
  ctx = clCreateContext(NULL, 1, &device, NULL, NULL, &status);
  if(!ctx)
    return ret;
  cl_driver_set_atomic_flag(ctx->drv, atomic_in_l3_flag);
  if (status == CL_SUCCESS) {
    queue = clCreateCommandQueueWithProperties(ctx, device, 0, &status);
    if (status == CL_SUCCESS) {
      program = clCreateProgramWithSource(ctx, 1, &kernel_source, NULL, &status);
      if (status == CL_SUCCESS) {
        status = clBuildProgram(program, 1, &device, "", NULL, NULL);
        if (status == CL_SUCCESS) {
          kernel = clCreateKernel(program, "self_test", &status);
          if (status == CL_SUCCESS) {
            buffer = clCreateBuffer(ctx, CL_MEM_COPY_HOST_PTR, n*4, test_data, &status);
            if (status == CL_SUCCESS) {
              status = clSetKernelArg(kernel, 0, sizeof(cl_mem), &buffer);
              if (status == CL_SUCCESS) {
                status = clEnqueueNDRangeKernel(queue, kernel, 1, NULL, &n, &n, 0, NULL, &kernel_finished);
                if (status == CL_SUCCESS) {
                  status = clEnqueueReadBuffer(queue, buffer, CL_TRUE, 0, n*4, test_data, 1, &kernel_finished, NULL);
                  if (status == CL_SUCCESS) {
                    if (test_data[0] == 8 && test_data[1] == 14 && test_data[2] == 8){
                      ret = SELF_TEST_PASS;
                    } else {
                      ret = SELF_TEST_SLM_FAIL;
                      printf("Beignet: self-test failed: (3, 7, 5) + (5, 7, 3) returned (%i, %i, %i)\n"
                             "See README.md or http://www.freedesktop.org/wiki/Software/Beignet/\n",
                             test_data[0], test_data[1], test_data[2]);

                    }
                  }
                } else{
                  ret = SELF_TEST_ATOMIC_FAIL;
                  // Atomic fail need to test SLM again with atomic in L3 feature disabled.
                  tested = 0;
                }
                clReleaseEvent(kernel_finished);
              }
            }
            clReleaseMemObject(buffer);
          }
          clReleaseKernel(kernel);
        }
      }
      clReleaseProgram(program);
    }
    clReleaseCommandQueue(queue);
  }
  clReleaseContext(ctx);
  return ret;
}

LOCAL cl_int
cl_get_device_ids(cl_platform_id    platform,
                  cl_device_type    device_type,
                  cl_uint           num_entries,
                  cl_device_id *    devices,
                  cl_uint *         num_devices)
{
  cl_device_id device;

  /* Do we have a usable device? */
  device = cl_get_gt_device(device_type);
  if (device) {
    cl_self_test_res ret = cl_self_test(device, SELF_TEST_PASS);
    if (ret == SELF_TEST_ATOMIC_FAIL) {
      device->atomic_test_result = ret;
      ret = cl_self_test(device, ret);
      printf("Beignet: warning - disable atomic in L3 feature.\n");
    }

    if(ret == SELF_TEST_SLM_FAIL) {
      int disable_self_test = 0;
      // can't use BVAR (backend/src/sys/cvar.hpp) here as it's C++
      const char *env = getenv("OCL_IGNORE_SELF_TEST");
      if (env != NULL) {
        sscanf(env, "%i", &disable_self_test);
      }
      if (disable_self_test) {
        printf("Beignet: Warning - overriding self-test failure\n");
      } else {
        printf("Beignet: disabling non-working device\n");
        device = 0;
      }
    }
  }
  if (!device) {
    if (num_devices)
      *num_devices = 0;
    if (devices)
      *devices = 0;
    return CL_DEVICE_NOT_FOUND;
  } else {
    if (num_devices)
      *num_devices = 1;
    if (devices) {
      *devices = device;
    }
    return CL_SUCCESS;
  }
}

LOCAL cl_bool is_gen_device(cl_device_id device) {
  return device == &intel_ivb_gt1_device ||
         device == &intel_ivb_gt2_device ||
         device == &intel_baytrail_t_device ||
         device == &intel_hsw_gt1_device ||
         device == &intel_hsw_gt2_device ||
         device == &intel_hsw_gt3_device ||
         device == &intel_brw_gt1_device ||
         device == &intel_brw_gt2_device ||
         device == &intel_brw_gt3_device ||
         device == &intel_chv_device ||
         device == &intel_skl_gt1_device ||
         device == &intel_skl_gt2_device ||
         device == &intel_skl_gt3_device ||
         device == &intel_skl_gt4_device ||
         device == &intel_bxt18eu_device ||
         device == &intel_bxt12eu_device ||
         device == &intel_kbl_gt1_device ||
         device == &intel_kbl_gt15_device ||
         device == &intel_kbl_gt2_device ||
         device == &intel_kbl_gt3_device ||
         device == &intel_kbl_gt4_device ||
         device == &intel_glk18eu_device ||
         device == &intel_glk12eu_device;
}

LOCAL cl_int
cl_get_device_info(cl_device_id     device,
                   cl_device_info   param_name,
                   size_t           param_value_size,
                   void *           param_value,
                   size_t *         param_value_size_ret)
{
  const void *src_ptr = NULL;
  size_t src_size = 0;
  cl_int dev_ref;

  // We now just support gen devices.
  if (UNLIKELY(is_gen_device(device) == CL_FALSE))
    return CL_INVALID_DEVICE;

  /* Find the correct parameter */
  switch (param_name) {
    case CL_DEVICE_TYPE:
      src_ptr = &device->device_type;
      src_size = sizeof(device->device_type);
      break;
    case CL_DEVICE_VENDOR_ID:
      src_ptr = &device->vendor_id;
      src_size = sizeof(device->vendor_id);
      break;
    case CL_DEVICE_MAX_COMPUTE_UNITS:
      src_ptr = &device->max_compute_unit;
      src_size = sizeof(device->max_compute_unit);
      break;
    case CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS:
      src_ptr = &device->max_work_item_dimensions;
      src_size = sizeof(device->max_work_item_dimensions);
      break;
    case CL_DEVICE_MAX_WORK_ITEM_SIZES:
      src_ptr = &device->max_work_item_sizes;
      src_size = sizeof(device->max_work_item_sizes);
      break;
    case CL_DEVICE_MAX_WORK_GROUP_SIZE:
      src_ptr = &device->max_work_group_size;
      src_size = sizeof(device->max_work_group_size);
      break;
    case CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR:
      src_ptr = &device->preferred_vector_width_char;
      src_size = sizeof(device->preferred_vector_width_char);
      break;
    case CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT:
      src_ptr = &device->preferred_vector_width_short;
      src_size = sizeof(device->preferred_vector_width_short);
      break;
    case CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT:
      src_ptr = &device->preferred_vector_width_int;
      src_size = sizeof(device->preferred_vector_width_int);
      break;
    case CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG:
      src_ptr = &device->preferred_vector_width_long;
      src_size = sizeof(device->preferred_vector_width_long);
      break;
    case CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT:
      src_ptr = &device->preferred_vector_width_float;
      src_size = sizeof(device->preferred_vector_width_float);
      break;
    case CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE:
      src_ptr = &device->preferred_vector_width_double;
      src_size = sizeof(device->preferred_vector_width_double);
      break;
    case CL_DEVICE_PREFERRED_VECTOR_WIDTH_HALF:
      src_ptr = &device->preferred_vector_width_half;
      src_size = sizeof(device->preferred_vector_width_half);
      break;
    case CL_DEVICE_NATIVE_VECTOR_WIDTH_CHAR:
      src_ptr = &device->native_vector_width_char;
      src_size = sizeof(device->native_vector_width_char);
      break;
    case CL_DEVICE_NATIVE_VECTOR_WIDTH_SHORT:
      src_ptr = &device->native_vector_width_short;
      src_size = sizeof(device->native_vector_width_short);
      break;
    case CL_DEVICE_NATIVE_VECTOR_WIDTH_INT:
      src_ptr = &device->native_vector_width_int;
      src_size = sizeof(device->native_vector_width_int);
      break;
    case CL_DEVICE_NATIVE_VECTOR_WIDTH_LONG:
      src_ptr = &device->native_vector_width_long;
      src_size = sizeof(device->native_vector_width_long);
      break;
    case CL_DEVICE_NATIVE_VECTOR_WIDTH_FLOAT:
      src_ptr = &device->native_vector_width_float;
      src_size = sizeof(device->native_vector_width_float);
      break;
    case CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE:
      src_ptr = &device->native_vector_width_double;
      src_size = sizeof(device->native_vector_width_double);
      break;
    case CL_DEVICE_NATIVE_VECTOR_WIDTH_HALF:
      src_ptr = &device->native_vector_width_half;
      src_size = sizeof(device->native_vector_width_half);
      break;
    case CL_DEVICE_MAX_CLOCK_FREQUENCY:
      src_ptr = &device->max_clock_frequency;
      src_size = sizeof(device->max_clock_frequency);
      break;
    case CL_DEVICE_ADDRESS_BITS:
      src_ptr = &device->address_bits;
      src_size = sizeof(device->address_bits);
      break;
    case CL_DEVICE_MAX_MEM_ALLOC_SIZE:
      src_ptr = &device->max_mem_alloc_size;
      src_size = sizeof(device->max_mem_alloc_size);
      break;
    case CL_DEVICE_IMAGE_SUPPORT:
      src_ptr = &device->image_support;
      src_size = sizeof(device->image_support);
      break;
    case CL_DEVICE_MAX_READ_IMAGE_ARGS:
      src_ptr = &device->max_read_image_args;
      src_size = sizeof(device->max_read_image_args);
      break;
    case CL_DEVICE_MAX_WRITE_IMAGE_ARGS:
      src_ptr = &device->max_write_image_args;
      src_size = sizeof(device->max_write_image_args);
      break;
    case CL_DEVICE_MAX_READ_WRITE_IMAGE_ARGS:
      src_ptr = &device->max_read_write_image_args;
      src_size = sizeof(device->max_read_write_image_args);
      break;
    case CL_DEVICE_IMAGE_MAX_ARRAY_SIZE:
      src_ptr = &device->image_max_array_size;
      src_size = sizeof(device->image_max_array_size);
      break;
    case CL_DEVICE_IMAGE2D_MAX_WIDTH:
    case CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL:
      src_ptr = &device->image2d_max_width;
      src_size = sizeof(device->image2d_max_width);
      break;
    case CL_DEVICE_IMAGE2D_MAX_HEIGHT:
    case CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL:
      src_ptr = &device->image2d_max_height;
      src_size = sizeof(device->image2d_max_height);
      break;
    case CL_DEVICE_IMAGE3D_MAX_WIDTH:
      src_ptr = &device->image3d_max_width;
      src_size = sizeof(device->image3d_max_width);
      break;
    case CL_DEVICE_IMAGE3D_MAX_HEIGHT:
      src_ptr = &device->image3d_max_height;
      src_size = sizeof(device->image3d_max_height);
      break;
    case CL_DEVICE_IMAGE3D_MAX_DEPTH:
      src_ptr = &device->image3d_max_depth;
      src_size = sizeof(device->image3d_max_depth);
      break;
    case CL_DEVICE_MAX_SAMPLERS:
      src_ptr = &device->max_samplers;
      src_size = sizeof(device->max_samplers);
      break;
    case CL_DEVICE_MAX_PARAMETER_SIZE:
      src_ptr = &device->max_parameter_size;
      src_size = sizeof(device->max_parameter_size);
      break;
    case CL_DEVICE_MEM_BASE_ADDR_ALIGN:
      src_ptr = &device->mem_base_addr_align;
      src_size = sizeof(device->mem_base_addr_align);
      break;
    case CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE:
      src_ptr = &device->min_data_type_align_size;
      src_size = sizeof(device->min_data_type_align_size);
      break;
    case CL_DEVICE_MAX_PIPE_ARGS:
      src_ptr = &device->max_pipe_args;
      src_size = sizeof(device->max_pipe_args);
      break;
    case CL_DEVICE_PIPE_MAX_ACTIVE_RESERVATIONS:
      src_ptr = &device->pipe_max_active_reservations;
      src_size = sizeof(device->pipe_max_active_reservations);
      break;
    case CL_DEVICE_PIPE_MAX_PACKET_SIZE:
      src_ptr = &device->pipe_max_packet_siz;
      src_size = sizeof(device->pipe_max_packet_siz);
      break;
    case CL_DEVICE_SINGLE_FP_CONFIG:
      src_ptr = &device->single_fp_config;
      src_size = sizeof(device->single_fp_config);
      break;
    case CL_DEVICE_HALF_FP_CONFIG:
      src_ptr = &device->half_fp_config;
      src_size = sizeof(device->half_fp_config);
      break;
    case CL_DEVICE_DOUBLE_FP_CONFIG:
      src_ptr = &device->double_fp_config;
      src_size = sizeof(device->double_fp_config);
      break;
    case CL_DEVICE_GLOBAL_MEM_CACHE_TYPE:
      src_ptr = &device->global_mem_cache_type;
      src_size = sizeof(device->global_mem_cache_type);
      break;
    case CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE:
      src_ptr = &device->global_mem_cache_line_size;
      src_size = sizeof(device->global_mem_cache_line_size);
      break;
    case CL_DEVICE_GLOBAL_MEM_CACHE_SIZE:
      src_ptr = &device->global_mem_cache_size;
      src_size = sizeof(device->global_mem_cache_size);
      break;
    case CL_DEVICE_GLOBAL_MEM_SIZE:
      src_ptr = &device->global_mem_size;
      src_size = sizeof(device->global_mem_size);
      break;
    case CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE:
      src_ptr = &device->max_constant_buffer_size;
      src_size = sizeof(device->max_constant_buffer_size);
      break;
    case CL_DEVICE_IMAGE_MAX_BUFFER_SIZE:
      src_ptr = &device->image_mem_size;
      src_size = sizeof(device->image_mem_size);
      break;
    case CL_DEVICE_MAX_CONSTANT_ARGS:
      src_ptr = &device->max_constant_args;
      src_size = sizeof(device->max_constant_args);
      break;
    case CL_DEVICE_MAX_GLOBAL_VARIABLE_SIZE:
      src_ptr = &device->max_global_variable_size;
      src_size = sizeof(device->max_global_variable_size);
      break;
    case CL_DEVICE_GLOBAL_VARIABLE_PREFERRED_TOTAL_SIZE:
      src_ptr = &device->global_variable_preferred_total_size;
      src_size = sizeof(device->global_variable_preferred_total_size);
      break;
    case CL_DEVICE_LOCAL_MEM_TYPE:
      src_ptr = &device->local_mem_type;
      src_size = sizeof(device->local_mem_type);
      break;
    case CL_DEVICE_LOCAL_MEM_SIZE:
      src_ptr = &device->local_mem_size;
      src_size = sizeof(device->local_mem_size);
      break;
    case CL_DEVICE_ERROR_CORRECTION_SUPPORT:
      src_ptr = &device->error_correction_support;
      src_size = sizeof(device->error_correction_support);
      break;
    case CL_DEVICE_HOST_UNIFIED_MEMORY:
      src_ptr = &device->host_unified_memory;
      src_size = sizeof(device->host_unified_memory);
      break;
    case CL_DEVICE_PROFILING_TIMER_RESOLUTION:
      src_ptr = &device->profiling_timer_resolution;
      src_size = sizeof(device->profiling_timer_resolution);
      break;
    case CL_DEVICE_ENDIAN_LITTLE:
      src_ptr = &device->endian_little;
      src_size = sizeof(device->endian_little);
      break;
    case CL_DEVICE_AVAILABLE:
      src_ptr = &device->available;
      src_size = sizeof(device->available);
      break;
    case CL_DEVICE_COMPILER_AVAILABLE:
      src_ptr = &device->compiler_available;
      src_size = sizeof(device->compiler_available);
      break;
    case CL_DEVICE_LINKER_AVAILABLE:
      src_ptr = &device->linker_available;
      src_size = sizeof(device->linker_available);
      break;
    case CL_DEVICE_EXECUTION_CAPABILITIES:
      src_ptr = &device->execution_capabilities;
      src_size = sizeof(device->execution_capabilities);
      break;
    case CL_DEVICE_QUEUE_PROPERTIES:
      src_ptr = &device->queue_properties;
      src_size = sizeof(device->queue_properties);
      break;
    case CL_DEVICE_QUEUE_ON_DEVICE_PROPERTIES:
      src_ptr = &device->queue_on_device_properties;
      src_size = sizeof(device->queue_on_device_properties);
      break;
    case CL_DEVICE_QUEUE_ON_DEVICE_PREFERRED_SIZE:
      src_ptr = &device->queue_on_device_preferred_size;
      src_size = sizeof(device->queue_on_device_preferred_size);
      break;
    case CL_DEVICE_QUEUE_ON_DEVICE_MAX_SIZE:
      src_ptr = &device->queue_on_device_max_size;
      src_size = sizeof(device->queue_on_device_max_size);
      break;
    case CL_DEVICE_MAX_ON_DEVICE_QUEUES:
      src_ptr = &device->max_on_device_queues;
      src_size = sizeof(device->max_on_device_queues);
      break;
    case CL_DEVICE_MAX_ON_DEVICE_EVENTS:
      src_ptr = &device->max_on_device_events;
      src_size = sizeof(device->max_on_device_events);
      break;
    case CL_DEVICE_PLATFORM:
      src_ptr = &device->platform;
      src_size = sizeof(device->platform);
      break;
    case CL_DEVICE_PRINTF_BUFFER_SIZE:
      src_ptr = &device->printf_buffer_size;
      src_size = sizeof(device->printf_buffer_size);
      break;
    case CL_DEVICE_PREFERRED_INTEROP_USER_SYNC:
      src_ptr = &device->interop_user_sync;
      src_size = sizeof(device->interop_user_sync);
      break;
    case CL_DEVICE_NAME:
      src_ptr = device->name;
      src_size = device->name_sz;
      break;
    case CL_DEVICE_VENDOR:
      src_ptr = device->vendor;
      src_size = device->vendor_sz;
      break;
    case CL_DEVICE_VERSION:
      src_ptr = device->version;
      src_size = device->version_sz;
      break;
    case CL_DEVICE_PROFILE:
      src_ptr = device->profile;
      src_size = device->profile_sz;
      break;
    case CL_DEVICE_OPENCL_C_VERSION:
      src_ptr = device->opencl_c_version;
      src_size = device->opencl_c_version_sz;
      break;
    case CL_DEVICE_SPIR_VERSIONS:
      src_ptr = device->spir_versions;
      src_size = device->spir_versions_sz;
      break;
    case CL_DEVICE_EXTENSIONS:
      src_ptr = device->extensions;
      src_size = device->extensions_sz;
      break;
    case CL_DEVICE_BUILT_IN_KERNELS:
      src_ptr = device->built_in_kernels;
      src_size = device->built_in_kernels_sz;
      break;
    case CL_DEVICE_PARENT_DEVICE:
      src_ptr = &device->parent_device;
      src_size = sizeof(device->parent_device);
      break;
    case CL_DEVICE_PARTITION_MAX_SUB_DEVICES:
      src_ptr = &device->partition_max_sub_device;
      src_size = sizeof(device->partition_max_sub_device);
      break;
    case CL_DEVICE_PARTITION_PROPERTIES:
      src_ptr = &device->partition_property;
      src_size = sizeof(device->partition_property);
      break;
    case CL_DEVICE_PARTITION_AFFINITY_DOMAIN:
      src_ptr = &device->affinity_domain;
      src_size = sizeof(device->affinity_domain);
      break;
    case CL_DEVICE_PARTITION_TYPE:
      src_ptr = &device->partition_type;
      src_size = sizeof(device->partition_type);
      break;
    case CL_DEVICE_PREFERRED_PLATFORM_ATOMIC_ALIGNMENT:
      src_ptr = &device->preferred_platform_atomic_alignment;
      src_size = sizeof(device->preferred_platform_atomic_alignment);
      break;
    case CL_DEVICE_PREFERRED_GLOBAL_ATOMIC_ALIGNMENT:
      src_ptr = &device->preferred_global_atomic_alignment;
      src_size = sizeof(device->preferred_global_atomic_alignment);
      break;
    case CL_DEVICE_PREFERRED_LOCAL_ATOMIC_ALIGNMENT:
      src_ptr = &device->preferred_local_atomic_alignment;
      src_size = sizeof(device->preferred_local_atomic_alignment);
      break;
    case CL_DEVICE_IMAGE_PITCH_ALIGNMENT:
      src_ptr = &device->image_pitch_alignment;
      src_size = sizeof(device->image_pitch_alignment);
      break;
    case CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT:
      src_ptr = &device->image_base_address_alignment;
      src_size = sizeof(device->image_base_address_alignment);
      break;
    case CL_DEVICE_SVM_CAPABILITIES:
      src_ptr = &device->svm_capabilities;
      src_size = sizeof(device->svm_capabilities);
      break;
    case CL_DEVICE_REFERENCE_COUNT:
      {
        dev_ref = CL_OBJECT_GET_REF(device);
        src_ptr = &dev_ref;
        src_size = sizeof(cl_int);
        break;
      }
    case CL_DRIVER_VERSION:
      src_ptr = device->driver_version;
      src_size = device->driver_version_sz;
      break;
    case CL_DEVICE_SUB_GROUP_SIZES_INTEL:
      src_ptr = device->sub_group_sizes;
      src_size = device->sub_group_sizes_sz;
      break;

    default:
      return CL_INVALID_VALUE;
  }

  return cl_get_info_helper(src_ptr, src_size,
                            param_value, param_value_size, param_value_size_ret);
}

LOCAL cl_int
cl_device_get_version(cl_device_id device, cl_int *ver)
{
  if (UNLIKELY(is_gen_device(device) == CL_FALSE))
    return CL_INVALID_DEVICE;
  if (ver == NULL)
    return CL_SUCCESS;
  if (device == &intel_ivb_gt1_device || 
      device == &intel_ivb_gt2_device ||
      device == &intel_baytrail_t_device) {
    *ver = 7;
  } else if (device == &intel_hsw_gt1_device || device == &intel_hsw_gt2_device
        || device == &intel_hsw_gt3_device) {
    *ver = 75;
  } else if (device == &intel_brw_gt1_device || device == &intel_brw_gt2_device
        || device == &intel_brw_gt3_device || device == &intel_chv_device) {
    *ver = 8;
  } else if (device == &intel_skl_gt1_device || device == &intel_skl_gt2_device
        || device == &intel_skl_gt3_device || device == &intel_skl_gt4_device
        || device == &intel_bxt18eu_device || device == &intel_bxt12eu_device || device == &intel_kbl_gt1_device
        || device == &intel_kbl_gt2_device || device == &intel_kbl_gt3_device
        || device == &intel_kbl_gt4_device || device == &intel_kbl_gt15_device
        || device == &intel_glk18eu_device || device == &intel_glk12eu_device) {
    *ver = 9;
  } else
    return CL_INVALID_VALUE;

  return CL_SUCCESS;
}
#undef DECL_FIELD

#define _DECL_FIELD(FIELD)                                 \
      if (param_value && param_value_size < sizeof(FIELD)) \
        return CL_INVALID_VALUE;                           \
      if (param_value_size_ret != NULL)                    \
        *param_value_size_ret = sizeof(FIELD);             \
      if (param_value)                                     \
        memcpy(param_value, &FIELD, sizeof(FIELD));        \
        return CL_SUCCESS;

#define DECL_FIELD(CASE,FIELD)                             \
  case JOIN(CL_KERNEL_,CASE):                              \
  _DECL_FIELD(FIELD)

#include "cl_kernel.h"
#include "cl_program.h"
static int
cl_check_builtin_kernel_dimension(cl_kernel kernel, cl_device_id device)
{
  const char * n = cl_kernel_get_name(kernel);
  const char * builtin_kernels_2d = "__cl_copy_image_2d_to_2d;__cl_copy_image_2d_to_buffer;__cl_copy_buffer_to_image_2d;__cl_fill_image_2d;__cl_fill_image_2d_array;";
  const char * builtin_kernels_3d = "__cl_copy_image_3d_to_2d;__cl_copy_image_2d_to_3d;__cl_copy_image_3d_to_3d;__cl_copy_image_3d_to_buffer;__cl_copy_buffer_to_image_3d;__cl_fill_image_3d";
    if (n == NULL || !strstr(device->built_in_kernels, n)){
      return 0;
    }else if(strstr(builtin_kernels_2d, n)){
      return 2;
    }else if(strstr(builtin_kernels_3d, n)){
      return 3;
    }else
      return 1;

}

LOCAL size_t
cl_get_kernel_max_wg_sz(cl_kernel kernel)
{
  size_t work_group_size, thread_cnt;
  int simd_width = interp_kernel_get_simd_width(kernel->opaque);
  int device_id = kernel->program->ctx->devices[0]->device_id;
  if (!interp_kernel_use_slm(kernel->opaque)) {
    if (!IS_BAYTRAIL_T(device_id) || simd_width == 16)
      work_group_size = simd_width * 64;
    else
      work_group_size = kernel->program->ctx->devices[0]->max_compute_unit *
                        kernel->program->ctx->devices[0]->max_thread_per_unit * simd_width;
  } else {
    thread_cnt = kernel->program->ctx->devices[0]->max_compute_unit *
                 kernel->program->ctx->devices[0]->max_thread_per_unit / kernel->program->ctx->devices[0]->sub_slice_count;
    if(thread_cnt > 64)
      thread_cnt = 64;
    work_group_size = thread_cnt * simd_width;
  }
  if(work_group_size > kernel->program->ctx->devices[0]->max_work_group_size)
    work_group_size = kernel->program->ctx->devices[0]->max_work_group_size;
  return work_group_size;
}

LOCAL cl_int
cl_get_kernel_workgroup_info(cl_kernel kernel,
                             cl_device_id device,
                             cl_kernel_work_group_info param_name,
                             size_t param_value_size,
                             void* param_value,
                             size_t* param_value_size_ret)
{
  int err = CL_SUCCESS;
  int dimension = 0;
  CHECK_KERNEL(kernel);
  if (device == NULL)
    device = kernel->program->ctx->devices[0];
  if (UNLIKELY(is_gen_device(device) == CL_FALSE))
    return CL_INVALID_DEVICE;

  switch (param_name) {
    case CL_KERNEL_WORK_GROUP_SIZE:
    {
      if (param_value && param_value_size < sizeof(size_t))
        return CL_INVALID_VALUE;
      if (param_value_size_ret != NULL)
        *param_value_size_ret = sizeof(size_t);
      if (param_value) {
        size_t work_group_size = cl_get_kernel_max_wg_sz(kernel);
        *(size_t*)param_value = work_group_size;
        return CL_SUCCESS;
      }
    }
    case CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE:
    {
      if (param_value && param_value_size < sizeof(size_t))
        return CL_INVALID_VALUE;
      if (param_value_size_ret != NULL)
        *param_value_size_ret = sizeof(size_t);
      if (param_value)
        *(size_t*)param_value = interp_kernel_get_simd_width(kernel->opaque);
      return CL_SUCCESS;
    }
    case CL_KERNEL_LOCAL_MEM_SIZE:
    {
      size_t local_mem_sz =  interp_kernel_get_slm_size(kernel->opaque) + kernel->local_mem_sz;
      _DECL_FIELD(local_mem_sz)
    }
    DECL_FIELD(COMPILE_WORK_GROUP_SIZE, kernel->compile_wg_sz)
    DECL_FIELD(PRIVATE_MEM_SIZE, kernel->stack_size)
    case CL_KERNEL_GLOBAL_WORK_SIZE:
    {
      dimension = cl_check_builtin_kernel_dimension(kernel, device);
      if ( !dimension ) return CL_INVALID_VALUE;
      if (param_value_size_ret != NULL)
        *param_value_size_ret = sizeof(device->max_1d_global_work_sizes);
      if (param_value) {
        if (dimension == 1) {
          memcpy(param_value, device->max_1d_global_work_sizes, sizeof(device->max_1d_global_work_sizes));
        }else if(dimension == 2){
          memcpy(param_value, device->max_2d_global_work_sizes, sizeof(device->max_2d_global_work_sizes));
        }else if(dimension == 3){
          memcpy(param_value, device->max_3d_global_work_sizes, sizeof(device->max_3d_global_work_sizes));
        }else
          return CL_INVALID_VALUE;

        return CL_SUCCESS;
      }
      return CL_SUCCESS;
    }
    case CL_KERNEL_SPILL_MEM_SIZE_INTEL:
    {
      if (param_value && param_value_size < sizeof(cl_ulong))
        return CL_INVALID_VALUE;
      if (param_value_size_ret != NULL)
        *param_value_size_ret = sizeof(cl_ulong);
      if (param_value)
        *(cl_ulong*)param_value = (cl_ulong)interp_kernel_get_scratch_size(kernel->opaque);
      return CL_SUCCESS;
    }

    default:
      return CL_INVALID_VALUE;
  };

error:
  return err;
}

LOCAL cl_int
cl_get_kernel_subgroup_info(cl_kernel kernel,
                            cl_device_id device,
                            cl_kernel_work_group_info param_name,
                            size_t input_value_size,
                            const void* input_value,
                            size_t param_value_size,
                            void* param_value,
                            size_t* param_value_size_ret)
{
  int err = CL_SUCCESS;
  if(device != NULL)
    if (kernel->program->ctx->devices[0] != device)
      return CL_INVALID_DEVICE;

  CHECK_KERNEL(kernel);
  switch (param_name) {
    case CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE_KHR:
    {
      int i, dim = 0;
      size_t local_sz = 1;
      if (param_value && param_value_size < sizeof(size_t))
        return CL_INVALID_VALUE;
      if (param_value_size_ret != NULL)
        *param_value_size_ret = sizeof(size_t);
      switch (input_value_size)
      {
        case sizeof(size_t)*1:
        case sizeof(size_t)*2:
        case sizeof(size_t)*3:
          dim = input_value_size/sizeof(size_t);
          break;
        default: return CL_INVALID_VALUE;
      }
      if (input_value == NULL )
        return CL_INVALID_VALUE;
      for(i = 0; i < dim; i++)
        local_sz *= ((size_t*)input_value)[i];
      if (param_value) {
        size_t simd_sz = cl_kernel_get_simd_width(kernel);
        size_t sub_group_size = local_sz >= simd_sz? simd_sz : local_sz;
        *(size_t*)param_value = sub_group_size;
        return CL_SUCCESS;
      }
      break;
    }
    case CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE_KHR:
    {
      int i, dim = 0;
      size_t local_sz = 1;
      if (param_value && param_value_size < sizeof(size_t))
        return CL_INVALID_VALUE;
      if (param_value_size_ret != NULL)
        *param_value_size_ret = sizeof(size_t);
      switch (input_value_size)
      {
        case sizeof(size_t)*1:
        case sizeof(size_t)*2:
        case sizeof(size_t)*3:
          dim = input_value_size/sizeof(size_t);
          break;
        default: return CL_INVALID_VALUE;
      }
      if (input_value == NULL )
        return CL_INVALID_VALUE;
      for(i = 0; i < dim; i++)
        local_sz *= ((size_t*)input_value)[i];
      if (param_value) {
        size_t simd_sz = cl_kernel_get_simd_width(kernel);
        size_t sub_group_num = (local_sz + simd_sz - 1) / simd_sz;
        *(size_t*)param_value = sub_group_num;
        return CL_SUCCESS;
      }
      break;
    }
    case CL_KERNEL_COMPILE_SUB_GROUP_SIZE_INTEL:
    {
      if (param_value && param_value_size < sizeof(size_t))
        return CL_INVALID_VALUE;
      if (param_value_size_ret != NULL)
        *param_value_size_ret = sizeof(size_t);
      if (param_value)
        *(size_t*)param_value = interp_kernel_get_simd_width(kernel->opaque);
      return CL_SUCCESS;
    }
    default:
      return CL_INVALID_VALUE;
  };

error:
  return err;
}

LOCAL cl_int
cl_devices_list_check(cl_uint num_devices, const cl_device_id *devices)
{
  cl_uint i;

  if (devices == NULL)
    return CL_INVALID_DEVICE;

  assert(num_devices > 0);
  for (i = 0; i < num_devices; i++) {
    if (!CL_OBJECT_IS_DEVICE(devices[i])) {
      return CL_INVALID_DEVICE;
    }

    if (devices[i]->available == CL_FALSE) {
      return CL_DEVICE_NOT_AVAILABLE;
    }

    // We now just support one platform.
    if (devices[i]->platform != cl_get_platform_default()) {
      return CL_INVALID_DEVICE;
    }

    // TODO: We now just support Gen Device.
    if (devices[i] != cl_get_gt_device(devices[i]->device_type)) {
      return CL_INVALID_DEVICE;
    }
  }

  return CL_SUCCESS;
}

LOCAL cl_int
cl_devices_list_include_check(cl_uint num_devices, const cl_device_id *devices,
                              cl_uint num_to_check, const cl_device_id *devices_to_check)
{
  cl_uint i, j;

  for (i = 0; i < num_to_check; i++) {
    for (j = 0; j < num_devices; j++) {
      if (devices_to_check[i] == devices[j])
        break;
    }

    if (j == num_devices)
      return CL_INVALID_DEVICE;
  }

  return CL_SUCCESS;
}