2007-06-05 Paul Brook <paul@codesourcery.com>

	gas/
	* config/tc-arm.c (insns): Correct Thumb-2 ldrd/strd opcodes.

	gas/testsuite/
	* gas/arm/thumb32.d: Add writeback addressing mode tests.
	* gas/arm/thumb32.s: Update expected output.

	opcodes/
	* arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.

5 files changed, 72 insertions, 2 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 15c33fae27a..f1b6890837b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2007-06-05  Paul Brook  <paul@codesourcery.com>
+
+	* config/tc-arm.c (insns): Correct Thumb-2 ldrd/strd opcodes.
+
 2007-06-05  Nick Clifton  <nickc@redhat.com>
 
 	PR gas/4587
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 03f97d75b47..ca9e33767f5 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -15017,8 +15017,8 @@ static const struct asm_opcode insns[] =
 #undef ARM_VARIANT
 #define ARM_VARIANT &arm_ext_v5e /*  ARM Architecture 5TE.  */
  TUF(pld,	450f000, f810f000, 1, (ADDR),		     pld,  t_pld),
- TC3(ldrd,	00000d0, e9500000, 3, (RRnpc, oRRnpc, ADDRGLDRS), ldrd, t_ldstd),
- TC3(strd,	00000f0, e9400000, 3, (RRnpc, oRRnpc, ADDRGLDRS), ldrd, t_ldstd),
+ TC3(ldrd,	00000d0, e8500000, 3, (RRnpc, oRRnpc, ADDRGLDRS), ldrd, t_ldstd),
+ TC3(strd,	00000f0, e8400000, 3, (RRnpc, oRRnpc, ADDRGLDRS), ldrd, t_ldstd),
 
  TCE(mcrr,	c400000, ec400000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
  TCE(mrrc,	c500000, ec500000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 4bd02902651..d1182982ee3 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-06-05  Paul Brook  <paul@codesourcery.com>
+
+	* gas/arm/thumb32.d: Add writeback addressing mode tests.
+	* gas/arm/thumb32.s: Update expected output.
+
 2007-06-05  Nick Clifton  <nickc@redhat.com>
 
 	PR gas/4587
diff --git a/gas/testsuite/gas/arm/thumb32.d b/gas/testsuite/gas/arm/thumb32.d
index ea68ec64a47..5bb76a5392e 100644
--- a/gas/testsuite/gas/arm/thumb32.d
+++ b/gas/testsuite/gas/arm/thumb32.d
@@ -963,3 +963,41 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> f3de 8f00 	subs	pc, lr, #0
 0[0-9a-f]+ <[^>]+> f3de 8f04 	subs	pc, lr, #4
 0[0-9a-f]+ <[^>]+> f3de 8fff 	subs	pc, lr, #255
+0[0-9a-f]+ <[^>]+> e9f9 240c 	ldrd	r2, r4, \[r9, #48\]!
+0[0-9a-f]+ <[^>]+> e979 240c 	ldrd	r2, r4, \[r9, #-48\]!
+0[0-9a-f]+ <[^>]+> e9e9 240c 	strd	r2, r4, \[r9, #48\]!
+0[0-9a-f]+ <[^>]+> e969 240c 	strd	r2, r4, \[r9, #-48\]!
+0[0-9a-f]+ <[^>]+> e8f9 240c 	ldrd	r2, r4, \[r9\], #48
+0[0-9a-f]+ <[^>]+> e879 240c 	ldrd	r2, r4, \[r9\], #-48
+0[0-9a-f]+ <[^>]+> e8e9 240c 	strd	r2, r4, \[r9\], #48
+0[0-9a-f]+ <[^>]+> e869 240c 	strd	r2, r4, \[r9\], #-48
+0[0-9a-f]+ <[^>]+> f8d5 1301 	ldr.w	r1, \[r5, #769]
+0[0-9a-f]+ <[^>]+> f855 1f30 	ldr.w	r1, \[r5, #48]!
+0[0-9a-f]+ <[^>]+> f855 1d30 	ldr.w	r1, \[r5, #-48]!
+0[0-9a-f]+ <[^>]+> f855 1b30 	ldr.w	r1, \[r5\], #48
+0[0-9a-f]+ <[^>]+> f855 1930 	ldr.w	r1, \[r5\], #-48
+0[0-9a-f]+ <[^>]+> f855 1009 	ldr.w	r1, \[r5, r9\]
+0[0-9a-f]+ <[^>]+> f895 1301 	ldrb.w	r1, \[r5, #769]
+0[0-9a-f]+ <[^>]+> f815 1f30 	ldrb.w	r1, \[r5, #48]!
+0[0-9a-f]+ <[^>]+> f815 1d30 	ldrb.w	r1, \[r5, #-48]!
+0[0-9a-f]+ <[^>]+> f815 1b30 	ldrb.w	r1, \[r5\], #48
+0[0-9a-f]+ <[^>]+> f815 1930 	ldrb.w	r1, \[r5\], #-48
+0[0-9a-f]+ <[^>]+> f815 1009 	ldrb.w	r1, \[r5, r9\]
+0[0-9a-f]+ <[^>]+> f995 1301 	ldrsb.w	r1, \[r5, #769]
+0[0-9a-f]+ <[^>]+> f915 1f30 	ldrsb.w	r1, \[r5, #48]!
+0[0-9a-f]+ <[^>]+> f915 1d30 	ldrsb.w	r1, \[r5, #-48]!
+0[0-9a-f]+ <[^>]+> f915 1b30 	ldrsb.w	r1, \[r5\], #48
+0[0-9a-f]+ <[^>]+> f915 1930 	ldrsb.w	r1, \[r5\], #-48
+0[0-9a-f]+ <[^>]+> f915 1009 	ldrsb.w	r1, \[r5, r9\]
+0[0-9a-f]+ <[^>]+> f8b5 1301 	ldrh.w	r1, \[r5, #769]
+0[0-9a-f]+ <[^>]+> f835 1f30 	ldrh.w	r1, \[r5, #48]!
+0[0-9a-f]+ <[^>]+> f835 1d30 	ldrh.w	r1, \[r5, #-48]!
+0[0-9a-f]+ <[^>]+> f835 1b30 	ldrh.w	r1, \[r5\], #48
+0[0-9a-f]+ <[^>]+> f835 1930 	ldrh.w	r1, \[r5\], #-48
+0[0-9a-f]+ <[^>]+> f835 1009 	ldrh.w	r1, \[r5, r9\]
+0[0-9a-f]+ <[^>]+> f9b5 1301 	ldrsh.w	r1, \[r5, #769]
+0[0-9a-f]+ <[^>]+> f935 1f30 	ldrsh.w	r1, \[r5, #48]!
+0[0-9a-f]+ <[^>]+> f935 1d30 	ldrsh.w	r1, \[r5, #-48]!
+0[0-9a-f]+ <[^>]+> f935 1b30 	ldrsh.w	r1, \[r5\], #48
+0[0-9a-f]+ <[^>]+> f935 1930 	ldrsh.w	r1, \[r5\], #-48
+0[0-9a-f]+ <[^>]+> f935 1009 	ldrsh.w	r1, \[r5, r9\]
diff --git a/gas/testsuite/gas/arm/thumb32.s b/gas/testsuite/gas/arm/thumb32.s
index 7079ea68d57..4f602df35d8 100644
--- a/gas/testsuite/gas/arm/thumb32.s
+++ b/gas/testsuite/gas/arm/thumb32.s
@@ -780,3 +780,26 @@ srs:
 	subs pc, lr, #0
 	subs pc, lr, #4
 	subs pc, lr, #255
+
+	ldrd r2, r4, [r9, #48]!
+	ldrd r2, r4, [r9, #-48]!
+	strd r2, r4, [r9, #48]!
+	strd r2, r4, [r9, #-48]!
+	ldrd r2, r4, [r9], #48
+	ldrd r2, r4, [r9], #-48
+	strd r2, r4, [r9], #48
+	strd r2, r4, [r9], #-48
+
+	.macro ldaddr op
+	ldr\op	r1, [r5, #0x301]
+	ldr\op	r1, [r5, #0x30]!
+	ldr\op	r1, [r5, #-0x30]!
+	ldr\op	r1, [r5], #0x30
+	ldr\op	r1, [r5], #-0x30
+	ldr\op	r1, [r5, r9]
+	.endm
+	ldaddr
+	ldaddr b
+	ldaddr sb
+	ldaddr h
+	ldaddr sh