aarch64: Add the SVE FCLAMP instruction

8 files changed, 102 insertions, 1 deletions

diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.l b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
index 85251cd1fee..6f799c1c329 100644
--- a/gas/testsuite/gas/aarch64/sme2-22-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
@@ -1,5 +1,5 @@
 [^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `fclamp 0,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fclamp 0,z0\.h,z0\.h'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp {z0\.h-z1\.h},0,z0\.h'
 [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp {z0\.h-z1\.h},z0\.h,0'
 [^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z1\.b},z0\.b,z0\.b'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.d
new file mode 100644
index 00000000000..3a759aac14f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sve2-sme2-7-invalid.s
+#error_output: sve2-sme2-7-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
new file mode 100644
index 00000000000..69e7ac8ec41
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
@@ -0,0 +1,29 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fclamp 0,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp z0\.h,0,z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp z0\.h,z0\.h,0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.b,z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	fclamp z0\.h, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info:    other valid variant\(s\):
+[^ :]+:[0-9]+: Info:    	fclamp z0\.s, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info:    	fclamp z0\.d, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp z0\.h,{z0\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	fclamp z0\.h, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info:    other valid variant\(s\):
+[^ :]+:[0-9]+: Info:    	fclamp z0\.s, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info:    	fclamp z0\.d, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.h,z0\.s,z0\.h'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	fclamp z0\.h, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info:    other valid variant\(s\):
+[^ :]+:[0-9]+: Info:    	fclamp z0\.s, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info:    	fclamp z0\.d, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.h,z0\.h,z0\.s'
+[^ :]+:[0-9]+: Info:    did you mean this\?
+[^ :]+:[0-9]+: Info:    	fclamp z0\.h, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info:    other valid variant\(s\):
+[^ :]+:[0-9]+: Info:    	fclamp z0\.s, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info:    	fclamp z0\.d, z0\.d, z0\.d
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.s
new file mode 100644
index 00000000000..79f21d35385
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.s
@@ -0,0 +1,9 @@
+	fclamp	0, z0.h, z0.h
+	fclamp	z0.h, 0, z0.h
+	fclamp	z0.h, z0.h, 0
+
+	fclamp	z0.b, z0.b, z0.b
+	fclamp	z0.h, { z0.h, z0.h }
+	fclamp	z0.s, z0.h, z0.h
+	fclamp	z0.h, z0.s, z0.h
+	fclamp	z0.h, z0.h, z0.s
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.d
new file mode 100644
index 00000000000..59ca2dee133
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sve2-sme2-7.s
+#error_output: sve2-sme2-7-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.l
new file mode 100644
index 00000000000..d22ea21d70a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.l
@@ -0,0 +1,16 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.h,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z31\.h,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.h,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.h,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z9\.h,z22\.h,z21\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.s,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z31\.s,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.s,z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.s,z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z25\.s,z5\.s,z1\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.d,z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z31\.d,z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.d,z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.d,z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z3\.d,z30\.d,z28\.d'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7.d b/gas/testsuite/gas/aarch64/sve2-sme2-7.d
new file mode 100644
index 00000000000..2741ad57b04
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7.d
@@ -0,0 +1,24 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+:     file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+:	64602400 	fclamp	z0\.h, z0\.h, z0\.h
+[^:]+:	6460241f 	fclamp	z31\.h, z0\.h, z0\.h
+[^:]+:	646027e0 	fclamp	z0\.h, z31\.h, z0\.h
+[^:]+:	647f2400 	fclamp	z0\.h, z0\.h, z31\.h
+[^:]+:	647526c9 	fclamp	z9\.h, z22\.h, z21\.h
+[^:]+:	64a02400 	fclamp	z0\.s, z0\.s, z0\.s
+[^:]+:	64a0241f 	fclamp	z31\.s, z0\.s, z0\.s
+[^:]+:	64a027e0 	fclamp	z0\.s, z31\.s, z0\.s
+[^:]+:	64bf2400 	fclamp	z0\.s, z0\.s, z31\.s
+[^:]+:	64a124b9 	fclamp	z25\.s, z5\.s, z1\.s
+[^:]+:	64e02400 	fclamp	z0\.d, z0\.d, z0\.d
+[^:]+:	64e0241f 	fclamp	z31\.d, z0\.d, z0\.d
+[^:]+:	64e027e0 	fclamp	z0\.d, z31\.d, z0\.d
+[^:]+:	64ff2400 	fclamp	z0\.d, z0\.d, z31\.d
+[^:]+:	64fc27c3 	fclamp	z3\.d, z30\.d, z28\.d
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7.s b/gas/testsuite/gas/aarch64/sve2-sme2-7.s
new file mode 100644
index 00000000000..0403307e422
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7.s
@@ -0,0 +1,17 @@
+	fclamp	z0.h, z0.h, z0.h
+	fclamp	z31.h, z0.h, z0.h
+	fclamp	z0.h, z31.h, z0.h
+	fclamp	z0.h, z0.h, z31.h
+	fclamp	z9.h, z22.h, z21.h
+
+	fclamp	z0.s, z0.s, z0.s
+	fclamp	z31.s, z0.s, z0.s
+	fclamp	z0.s, z31.s, z0.s
+	fclamp	z0.s, z0.s, z31.s
+	fclamp	z25.s, z5.s, z1.s
+
+	fclamp	z0.d, z0.d, z0.d
+	fclamp	z31.d, z0.d, z0.d
+	fclamp	z0.d, z31.d, z0.d
+	fclamp	z0.d, z0.d, z31.d
+	fclamp	z3.d, z30.d, z28.d