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| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:02 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:02 +0100 |
| commit | a5791d5814226054215b7aab9f87dec6b8e41664 (patch) | |
| tree | 6c3d02b8085caa28f0053d1eeee02fe7b2ade17b /opcodes/aarch64-asm.c | |
| parent | eee2ecccdaa37d6c5d283d6346f70897ba27166b (diff) | |
| download | binutils-gdb-a5791d5814226054215b7aab9f87dec6b8e41664.tar.gz | |
aarch64: Make SME instructions use F_STRICT
This patch makes all SME instructions use F_STRICT, so that qualifiers
have to be provided explicitly rather than being inferred from other
operands. The main change is to move the qualifier setting from the
operand-level decoders to the opcode level.
This is one step towards consolidating the ZA parsing code and
extending it to handle SME2.
Diffstat (limited to 'opcodes/aarch64-asm.c')
| -rw-r--r-- | opcodes/aarch64-asm.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index e050197e8be..bfabcb9e3a2 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -1852,6 +1852,11 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst) int variant = 0; switch (inst->opcode->iclass) { + case sme_mov: + case sme_psel: + /* The variant is encoded as part of the immediate. */ + break; + case sve_cpy: insert_fields (&inst->value, aarch64_get_variant (inst), 0, 2, FLD_SVE_M_14, FLD_size); @@ -1872,8 +1877,9 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst) encoding. */ break; + case sme_misc: case sve_misc: - /* sve_misc instructions have only a single variant. */ + /* These instructions have only a single variant. */ break; case sve_movprfx: |