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| author | Jan Beulich <jbeulich@suse.com> | 2020-07-06 13:41:27 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-07-06 13:41:27 +0200 |
| commit | e74d9fa9cf7cbbcd290b74564d58456611a019bf (patch) | |
| tree | 6a390c76c163f5cfe506794d3dd657950f85d0ab /opcodes/i386-dis-evex-prefix.h | |
| parent | 6431c8015b1d8a75facbd2d0ec6a4f1e98167f72 (diff) | |
| download | binutils-gdb-e74d9fa9cf7cbbcd290b74564d58456611a019bf.tar.gz | |
x86: AVX512 extract/insert insns need to honor EVEX.L'L
Just like their AVX counterparts do for VEX.L.
At this occasion also make EVEX.W have the same effect as VEX.W on the
printing of VPINSR{B,W}'s operands, bringing them also in sync with
VPEXTR{B,W}.
Diffstat (limited to 'opcodes/i386-dis-evex-prefix.h')
| -rw-r--r-- | opcodes/i386-dis-evex-prefix.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h index 01998c58232..f5cce6f370b 100644 --- a/opcodes/i386-dis-evex-prefix.h +++ b/opcodes/i386-dis-evex-prefix.h @@ -330,13 +330,13 @@ { { Bad_Opcode }, { Bad_Opcode }, - { "vpinsrw", { XM, Vex128, Edw, Ib }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0FC4_P_2) }, }, /* PREFIX_EVEX_0FC5 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vpextrw", { Gdq, XS, Ib }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0FC5_P_2) }, }, /* PREFIX_EVEX_0FD2 */ { @@ -1191,25 +1191,25 @@ { { Bad_Opcode }, { Bad_Opcode }, - { "vpextrb", { Edqb, XM, Ib }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A14_P_2) }, }, /* PREFIX_EVEX_0F3A15 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vpextrw", { Edqw, XM, Ib }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A15_P_2) }, }, /* PREFIX_EVEX_0F3A16 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vpextrK", { Edq, XM, Ib }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A16_P_2) }, }, /* PREFIX_EVEX_0F3A17 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vextractps", { Edqd, XMM, Ib }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A17_P_2) }, }, /* PREFIX_EVEX_0F3A18 */ { @@ -1251,7 +1251,7 @@ { { Bad_Opcode }, { Bad_Opcode }, - { "vpinsrb", { XM, Vex128, Edb, Ib }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A20_P_2) }, }, /* PREFIX_EVEX_0F3A21 */ { @@ -1263,7 +1263,7 @@ { { Bad_Opcode }, { Bad_Opcode }, - { "vpinsrK", { XM, Vex128, Edq, Ib }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A22_P_2) }, }, /* PREFIX_EVEX_0F3A23 */ { |