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authorAlan Modra <amodra@gmail.com>2020-01-04 08:11:43 +1030
committerAlan Modra <amodra@gmail.com>2020-01-04 19:20:33 +1030
commitc9ae58fe32e88914b67988d5bfde184f79c7070f (patch)
tree0309d33de137777438078077b3ed9fa1c8cec76d /opcodes/m32r-ibld.c
parent5f57d4ecf51c2f420dae56dfb9fc525d1979ec7c (diff)
downloadbinutils-gdb-c9ae58fe32e88914b67988d5bfde184f79c7070f.tar.gz
ubsan: m32r: left shift of negative value
cpu/ * m32r.cpu (f-disp8): Avoid left shift of negative values. (f-disp16, f-disp24): Likewise. opcodes/ * m32r-ibld.c: Regenerate.
Diffstat (limited to 'opcodes/m32r-ibld.c')
-rw-r--r--opcodes/m32r-ibld.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c
index 9ab98cf142d..8d5ce60db6d 100644
--- a/opcodes/m32r-ibld.c
+++ b/opcodes/m32r-ibld.c
@@ -723,7 +723,7 @@ m32r_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, pc, & value);
- value = ((((value) << (2))) + (pc));
+ value = ((((value) * (4))) + (pc));
fields->f_disp16 = value;
}
break;
@@ -731,7 +731,7 @@ m32r_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 24, 32, total_length, pc, & value);
- value = ((((value) << (2))) + (pc));
+ value = ((((value) * (4))) + (pc));
fields->f_disp24 = value;
}
break;
@@ -739,7 +739,7 @@ m32r_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
- value = ((((value) << (2))) + (((pc) & (-4))));
+ value = ((((value) * (4))) + (((pc) & (-4))));
fields->f_disp8 = value;
}
break;