sim: mips: hoist "m16" igen rules up to common builds

3 files changed, 88 insertions, 82 deletions

diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
index 247208fea5c..15016f94375 100644
--- a/sim/mips/Makefile.in
+++ b/sim/mips/Makefile.in
@@ -3,8 +3,6 @@
 
 ## COMMON_PRE_CONFIG_FRAG
 
-SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
-SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
 SIM_MIPS_GEN = @SIM_MIPS_GEN@
 SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
 SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
@@ -87,87 +85,9 @@ IGEN_INCLUDE=\
 	$(srcdir)/mips3264r6.igen \
 
 SIM_SINGLE_ALL =
-SIM_M16_ALL = tmp-m16
+SIM_M16_ALL =
 SIM_MULTI_ALL = tmp-multi
 
-BUILT_SRC_FROM_M16 = \
-	m16_icache.h \
-	m16_icache.c \
-	m16_idecode.h \
-	m16_idecode.c \
-	m16_semantics.h \
-	m16_semantics.c \
-	m16_model.h \
-	m16_model.c \
-	m16_support.h \
-	m16_support.c \
-	\
-	m32_icache.h \
-	m32_icache.c \
-	m32_idecode.h \
-	m32_idecode.c \
-	m32_semantics.h \
-	m32_semantics.c \
-	m32_model.h \
-	m32_model.c \
-	m32_support.h \
-	m32_support.c \
-
-$(BUILT_SRC_FROM_M16): tmp-m16
-
-tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
-	$(ECHO_IGEN) $(IGEN_RUN) \
-		$(IGEN_TRACE) \
-		-I $(srcdir) \
-		-Werror \
-		-Wnodiscard \
-		$(SIM_MIPS_M16_FLAGS) \
-		-G gen-direct-access \
-		-G gen-zero-r0 \
-		-B 16 \
-		-H 15 \
-		-i $(IGEN_INSN) \
-		-o $(M16_DC) \
-		-P m16_ \
-		-x \
-		-n m16_icache.h    -hc m16_icache.h \
-		-n m16_icache.c    -c  m16_icache.c \
-		-n m16_semantics.h -hs m16_semantics.h \
-		-n m16_semantics.c -s  m16_semantics.c \
-		-n m16_idecode.h   -hd m16_idecode.h \
-		-n m16_idecode.c   -d  m16_idecode.c \
-		-n m16_model.h     -hm m16_model.h \
-		-n m16_model.c     -m  m16_model.c \
-		-n m16_support.h   -hf m16_support.h \
-		-n m16_support.c   -f  m16_support.c \
-		#
-	$(ECHO_IGEN) $(IGEN_RUN) \
-		$(IGEN_TRACE) \
-		-I $(srcdir) \
-		-Werror \
-		-Wnodiscard \
-		$(SIM_MIPS_SINGLE_FLAGS) \
-		-G gen-direct-access \
-		-G gen-zero-r0 \
-		-B 32 \
-		-H 31 \
-		-i $(IGEN_INSN) \
-		-o $(IGEN_DC) \
-		-P m32_ \
-		-x \
-		-n m32_icache.h    -hc m32_icache.h \
-		-n m32_icache.c    -c  m32_icache.c \
-		-n m32_semantics.h -hs m32_semantics.h \
-		-n m32_semantics.c -s  m32_semantics.c \
-		-n m32_idecode.h   -hd m32_idecode.h \
-		-n m32_idecode.c   -d  m32_idecode.c \
-		-n m32_model.h     -hm m32_model.h \
-		-n m32_model.c     -m  m32_model.c \
-		-n m32_support.h   -hf m32_support.h \
-		-n m32_support.c   -f  m32_support.c \
-		#
-	$(SILENCE) touch $@
-
 BUILT_SRC_FROM_MULTI = $(SIM_MIPS_MULTI_SRC)
 
 $(BUILT_SRC_FROM_MULTI): tmp-multi
@@ -257,7 +177,6 @@ tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
 	$(SILENCE) touch $@
 
 clean-extra:
-	rm -f $(BUILT_SRC_FROM_M16)
 	rm -f $(BUILT_SRC_FROM_MULTI)
 	rm -f tmp-*
 	rm -f micromips16*.o micromips32*.o m16*.o m32*.o
diff --git a/sim/mips/acinclude.m4 b/sim/mips/acinclude.m4
index 313e40b150b..efabd27e66b 100644
--- a/sim/mips/acinclude.m4
+++ b/sim/mips/acinclude.m4
@@ -334,3 +334,4 @@ AC_SUBST(SIM_MIPS_MULTI_IGEN_CONFIGS)
 AC_SUBST(SIM_MIPS_MULTI_SRC)
 AC_SUBST(SIM_MIPS_MULTI_OBJ)
 AM_CONDITIONAL([SIM_MIPS_GEN_MODE_SINGLE], [test "$SIM_MIPS_GEN" = "SINGLE"])
+AM_CONDITIONAL([SIM_MIPS_GEN_MODE_M16], [test "$SIM_MIPS_GEN" = "M16"])
diff --git a/sim/mips/local.mk b/sim/mips/local.mk
index 0a6f1da1a46..b6e482e0fda 100644
--- a/sim/mips/local.mk
+++ b/sim/mips/local.mk
@@ -44,6 +44,28 @@ AM_MAKEFLAGS += %C%_SIM_EXTRA_HW_DEVICES="$(%C%_SIM_EXTRA_HW_DEVICES)"
 	%D%/engine.h \
 	%D%/engine.c \
 	%D%/irun.c
+%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
+	%D%/m16_icache.h \
+	%D%/m16_icache.c \
+	%D%/m16_idecode.h \
+	%D%/m16_idecode.c \
+	%D%/m16_semantics.h \
+	%D%/m16_semantics.c \
+	%D%/m16_model.h \
+	%D%/m16_model.c \
+	%D%/m16_support.h \
+	%D%/m16_support.c \
+%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
+	%D%/m32_icache.h \
+	%D%/m32_icache.c \
+	%D%/m32_idecode.h \
+	%D%/m32_idecode.c \
+	%D%/m32_semantics.h \
+	%D%/m32_semantics.c \
+	%D%/m32_model.h \
+	%D%/m32_model.c \
+	%D%/m32_support.h \
+	%D%/m32_support.c
 %C%_BUILD_OUTPUTS = \
 	$(%C%_BUILT_SRC_FROM_IGEN_ITABLE) \
 	%D%/stamp-igen-itable
@@ -52,12 +74,21 @@ if SIM_MIPS_GEN_MODE_SINGLE
 	$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
 	%D%/stamp-gen-mode-single
 endif
+if SIM_MIPS_GEN_MODE_M16
+%C%_BUILD_OUTPUTS += \
+	$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
+	$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
+	%D%/stamp-gen-mode-m16-m16 \
+	%D%/stamp-gen-mode-m16-m32
+endif
 
 ## This makes sure build tools are available before building the arch-subdirs.
 SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
 
 $(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
 $(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
+$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16): %D%/stamp-gen-mode-m16-m16
+$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32): %D%/stamp-gen-mode-m16-m32
 
 %C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
 %C%_IGEN_INSN = $(srcdir)/%D%/mips.igen
@@ -76,6 +107,7 @@ $(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
 	%D%/tx.igen \
 	%D%/vr.igen
 %C%_IGEN_DC = $(srcdir)/%D%/mips.dc
+%C%_M16_DC = $(srcdir)/%D%/m16.dc
 
 ## NB:	Since these can be built by a number of generators, care
 ##	must be taken to ensure that they are only dependant on
@@ -125,6 +157,60 @@ $(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
 		-n irun.c      -r  %D%/irun.c
 	$(AM_V_at)touch $@
 
+%D%/stamp-gen-mode-m16-m16: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_M16_DC) $(IGEN)
+	$(AM_V_GEN)$(IGEN_RUN) \
+		$(%C%_IGEN_TRACE) \
+		-I $(srcdir)/%D% \
+		-Werror \
+		-Wnodiscard \
+		$(SIM_MIPS_M16_FLAGS) \
+		-G gen-direct-access \
+		-G gen-zero-r0 \
+		-B 16 \
+		-H 15 \
+		-i $(%C%_IGEN_INSN) \
+		-o $(%C%_M16_DC) \
+		-P m16_ \
+		-x \
+		-n m16_icache.h    -hc %D%/m16_icache.h \
+		-n m16_icache.c    -c  %D%/m16_icache.c \
+		-n m16_semantics.h -hs %D%/m16_semantics.h \
+		-n m16_semantics.c -s  %D%/m16_semantics.c \
+		-n m16_idecode.h   -hd %D%/m16_idecode.h \
+		-n m16_idecode.c   -d  %D%/m16_idecode.c \
+		-n m16_model.h     -hm %D%/m16_model.h \
+		-n m16_model.c     -m  %D%/m16_model.c \
+		-n m16_support.h   -hf %D%/m16_support.h \
+		-n m16_support.c   -f  %D%/m16_support.c
+	$(AM_V_at)touch $@
+
+%D%/stamp-gen-mode-m16-m32: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_IGEN_DC) $(IGEN)
+	$(AM_V_GEN)$(IGEN_RUN) \
+		$(%C%_IGEN_TRACE) \
+		-I $(srcdir)/%D% \
+		-Werror \
+		-Wnodiscard \
+		$(SIM_MIPS_SINGLE_FLAGS) \
+		-G gen-direct-access \
+		-G gen-zero-r0 \
+		-B 32 \
+		-H 31 \
+		-i $(%C%_IGEN_INSN) \
+		-o $(%C%_IGEN_DC) \
+		-P m32_ \
+		-x \
+		-n m32_icache.h    -hc %D%/m32_icache.h \
+		-n m32_icache.c    -c  %D%/m32_icache.c \
+		-n m32_semantics.h -hs %D%/m32_semantics.h \
+		-n m32_semantics.c -s  %D%/m32_semantics.c \
+		-n m32_idecode.h   -hd %D%/m32_idecode.h \
+		-n m32_idecode.c   -d  %D%/m32_idecode.c \
+		-n m32_model.h     -hm %D%/m32_model.h \
+		-n m32_model.c     -m  %D%/m32_model.c \
+		-n m32_support.h   -hf %D%/m32_support.h \
+		-n m32_support.c   -f  %D%/m32_support.c
+	$(AM_V_at)touch $@
+
 MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
 ## These are created by mips/acinclude.m4 during configure time.
 DISTCLEANFILES += %D%/multi-include.h %D%/multi-run.c