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| author | Dave Brolley <brolley@redhat.com> | 2003-08-29 16:41:31 +0000 |
|---|---|---|
| committer | Dave Brolley <brolley@redhat.com> | 2003-08-29 16:41:31 +0000 |
| commit | 4a306116670c5747b682948e0fd3f9a62051c7c6 (patch) | |
| tree | f115a30a0028ba7265fcf851a098fa4dbf7f20f4 /sim/testsuite/sim/frv/tp.cgs | |
| parent | b34f6357d032f4b39f9c7adb1995956d04339461 (diff) | |
| download | binutils-gdb-4a306116670c5747b682948e0fd3f9a62051c7c6.tar.gz | |
New sim testsuite for Fujitsu FRV. Contributed by Red Hat.
Diffstat (limited to 'sim/testsuite/sim/frv/tp.cgs')
| -rw-r--r-- | sim/testsuite/sim/frv/tp.cgs | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/sim/testsuite/sim/frv/tp.cgs b/sim/testsuite/sim/frv/tp.cgs new file mode 100644 index 00000000000..2709e31cf2b --- /dev/null +++ b/sim/testsuite/sim/frv/tp.cgs @@ -0,0 +1,101 @@ +# frv testcase for tp $ICCi_2,$GRi,$GRj +# mach: all + + .include "testutils.inc" + + start + + .global tp +tp: + and_spr_immed -4081,tbr ; clear tbr.tt + set_gr_spr tbr,gr7 + inc_gr_immed 2112,gr7 ; address of exception handler + set_bctrlr_0_0 gr7 ; bctrlr 0,0 + + set_spr_immed 128,lcr + set_gr_immed 0,gr7 + set_gr_immed 4,gr8 + + set_psr_et 1 + set_spr_addr ok0,lr + set_icc 0x0 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + fail +ok0: + set_psr_et 1 + set_spr_addr ok1,lr + set_icc 0x1 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + fail +ok1: + set_psr_et 1 + set_spr_addr ok2,lr + set_icc 0x2 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + fail +ok2: + set_psr_et 1 + set_spr_addr ok3,lr + set_icc 0x3 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + fail +ok3: + set_psr_et 1 + set_spr_addr ok4,lr + set_icc 0x4 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + fail +ok4: + set_psr_et 1 + set_spr_addr ok5,lr + set_icc 0x5 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + fail +ok5: + set_psr_et 1 + set_spr_addr ok6,lr + set_icc 0x6 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + fail +ok6: + set_psr_et 1 + set_spr_addr ok7,lr + set_icc 0x7 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + fail +ok7: + set_spr_addr bad,lr + set_icc 0x8 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + + set_spr_addr bad,lr + set_icc 0x9 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + + set_spr_addr bad,lr + set_icc 0xa 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + + set_spr_addr bad,lr + set_icc 0xb 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + + set_spr_addr bad,lr + set_icc 0xc 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + + set_spr_addr bad,lr + set_icc 0xd 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + + set_spr_addr bad,lr + set_icc 0xe 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + + set_spr_addr bad,lr + set_icc 0xf 0 + tp icc0,gr7,gr8 ; should branch to tbr + (128 + 4)*16 + + pass +bad: + fail |