diff options
Diffstat (limited to 'gdb/ppc-linux-nat.c')
| -rw-r--r-- | gdb/ppc-linux-nat.c | 222 |
1 files changed, 111 insertions, 111 deletions
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c index 5f823d7eeb3..7131134c10a 100644 --- a/gdb/ppc-linux-nat.c +++ b/gdb/ppc-linux-nat.c @@ -82,13 +82,13 @@ struct ppc_debug_info { - uint32_t version; /* Only version 1 exists to date. */ - uint32_t num_instruction_bps; - uint32_t num_data_bps; - uint32_t num_condition_regs; - uint32_t data_bp_alignment; - uint32_t sizeof_condition; /* size of the DVC register. */ - uint64_t features; + uint32_t version; /* Only version 1 exists to date. */ + uint32_t num_instruction_bps; + uint32_t num_data_bps; + uint32_t num_condition_regs; + uint32_t data_bp_alignment; + uint32_t sizeof_condition; /* size of the DVC register. */ + uint64_t features; }; /* Features will have bits indicating whether there is support for: */ @@ -99,13 +99,13 @@ struct ppc_debug_info struct ppc_hw_breakpoint { - uint32_t version; /* currently, version must be 1 */ - uint32_t trigger_type; /* only some combinations allowed */ - uint32_t addr_mode; /* address match mode */ - uint32_t condition_mode; /* break/watchpoint condition flags */ - uint64_t addr; /* break/watchpoint address */ - uint64_t addr2; /* range end or mask */ - uint64_t condition_value; /* contents of the DVC register */ + uint32_t version; /* currently, version must be 1 */ + uint32_t trigger_type; /* only some combinations allowed */ + uint32_t addr_mode; /* address match mode */ + uint32_t condition_mode; /* break/watchpoint condition flags */ + uint64_t addr; /* break/watchpoint address */ + uint64_t addr2; /* range end or mask */ + uint64_t condition_value; /* contents of the DVC register */ }; /* Trigger type. */ @@ -129,7 +129,7 @@ struct ppc_hw_breakpoint #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16 #define PPC_BREAKPOINT_CONDITION_BE(n) \ - (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT)) + (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT)) #endif /* PPC_PTRACE_GETHWDBGINFO */ /* Feature defined on Linux kernel v3.9: DAWR interface, that enables wider @@ -190,30 +190,30 @@ typedef char gdb_vrregset_t[PPC_LINUX_SIZEOF_VRREGSET]; /* This is the layout of the POWER7 VSX registers and the way they overlap with the existing FPR and VMX registers. - VSR doubleword 0 VSR doubleword 1 - ---------------------------------------------------------------- + VSR doubleword 0 VSR doubleword 1 + ---------------------------------------------------------------- VSR[0] | FPR[0] | | - ---------------------------------------------------------------- + ---------------------------------------------------------------- VSR[1] | FPR[1] | | - ---------------------------------------------------------------- - | ... | | - | ... | | - ---------------------------------------------------------------- + ---------------------------------------------------------------- + | ... | | + | ... | | + ---------------------------------------------------------------- VSR[30] | FPR[30] | | - ---------------------------------------------------------------- + ---------------------------------------------------------------- VSR[31] | FPR[31] | | - ---------------------------------------------------------------- + ---------------------------------------------------------------- VSR[32] | VR[0] | - ---------------------------------------------------------------- + ---------------------------------------------------------------- VSR[33] | VR[1] | - ---------------------------------------------------------------- - | ... | - | ... | - ---------------------------------------------------------------- + ---------------------------------------------------------------- + | ... | + | ... | + ---------------------------------------------------------------- VSR[62] | VR[30] | - ---------------------------------------------------------------- + ---------------------------------------------------------------- VSR[63] | VR[31] | - ---------------------------------------------------------------- + ---------------------------------------------------------------- VSX has 64 128bit registers. The first 32 registers overlap with the FP registers (doubleword 0) and hence extend them with additional @@ -747,10 +747,10 @@ fetch_altivec_registers (struct regcache *regcache, int tid, if (ret < 0) { if (errno == EIO) - { - have_ptrace_getvrregs = 0; - return; - } + { + have_ptrace_getvrregs = 0; + return; + } perror_with_name (_("Unable to fetch AltiVec registers")); } @@ -772,17 +772,17 @@ get_spe_registers (int tid, struct gdb_evrregset_t *evrregset) if (have_ptrace_getsetevrregs) { if (ptrace (PTRACE_GETEVRREGS, tid, 0, evrregset) >= 0) - return; + return; else - { - /* EIO means that the PTRACE_GETEVRREGS request isn't supported; - we just return zeros. */ - if (errno == EIO) - have_ptrace_getsetevrregs = 0; - else - /* Anything else needs to be reported. */ - perror_with_name (_("Unable to fetch SPE registers")); - } + { + /* EIO means that the PTRACE_GETEVRREGS request isn't supported; + we just return zeros. */ + if (errno == EIO) + have_ptrace_getsetevrregs = 0; + else + /* Anything else needs to be reported. */ + perror_with_name (_("Unable to fetch SPE registers")); + } } memset (evrregset, 0, sizeof (*evrregset)); @@ -800,11 +800,11 @@ fetch_spe_register (struct regcache *regcache, int tid, int regno) struct gdb_evrregset_t evrregs; gdb_assert (sizeof (evrregs.evr[0]) - == register_size (gdbarch, tdep->ppc_ev0_upper_regnum)); + == register_size (gdbarch, tdep->ppc_ev0_upper_regnum)); gdb_assert (sizeof (evrregs.acc) - == register_size (gdbarch, tdep->ppc_acc_regnum)); + == register_size (gdbarch, tdep->ppc_acc_regnum)); gdb_assert (sizeof (evrregs.spefscr) - == register_size (gdbarch, tdep->ppc_spefscr_regnum)); + == register_size (gdbarch, tdep->ppc_spefscr_regnum)); get_spe_registers (tid, &evrregs); @@ -813,10 +813,10 @@ fetch_spe_register (struct regcache *regcache, int tid, int regno) int i; for (i = 0; i < ppc_num_gprs; i++) - regcache->raw_supply (tdep->ppc_ev0_upper_regnum + i, &evrregs.evr[i]); + regcache->raw_supply (tdep->ppc_ev0_upper_regnum + i, &evrregs.evr[i]); } else if (tdep->ppc_ev0_upper_regnum <= regno - && regno < tdep->ppc_ev0_upper_regnum + ppc_num_gprs) + && regno < tdep->ppc_ev0_upper_regnum + ppc_num_gprs) regcache->raw_supply (regno, &evrregs.evr[regno - tdep->ppc_ev0_upper_regnum]); @@ -914,17 +914,17 @@ fetch_register (struct regcache *regcache, int tid, int regno) if (altivec_register_p (gdbarch, regno)) { /* If this is the first time through, or if it is not the first - time through, and we have confirmed that there is kernel - support for such a ptrace request, then go and fetch the - register. */ + time through, and we have confirmed that there is kernel + support for such a ptrace request, then go and fetch the + register. */ if (have_ptrace_getvrregs) { - fetch_altivec_registers (regcache, tid, regno); - return; + fetch_altivec_registers (regcache, tid, regno); + return; } /* If we have discovered that there is no ptrace support for - AltiVec registers, fall through and return zeroes, because - regaddr will be -1 in this case. */ + AltiVec registers, fall through and return zeroes, because + regaddr will be -1 in this case. */ } else if (vsx_register_p (gdbarch, regno)) { @@ -1082,7 +1082,7 @@ fetch_register (struct regcache *regcache, int tid, int regno) regaddr += sizeof (long); if (errno != 0) { - char message[128]; + char message[128]; xsnprintf (message, sizeof (message), "reading register %s (#%d)", gdbarch_register_name (gdbarch, regno), regno); perror_with_name (message); @@ -1096,20 +1096,20 @@ fetch_register (struct regcache *regcache, int tid, int regno) if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) { /* Little-endian values are always found at the left end of the - bytes transferred. */ + bytes transferred. */ regcache->raw_supply (regno, buf); } else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) { /* Big-endian values are found at the right end of the bytes - transferred. */ + transferred. */ size_t padding = (bytes_transferred - register_size (gdbarch, regno)); regcache->raw_supply (regno, buf + padding); } else internal_error (__FILE__, __LINE__, - _("fetch_register: unexpected byte order: %d"), - gdbarch_byte_order (gdbarch)); + _("fetch_register: unexpected byte order: %d"), + gdbarch_byte_order (gdbarch)); } /* This function actually issues the request to ptrace, telling @@ -1128,10 +1128,10 @@ fetch_all_gp_regs (struct regcache *regcache, int tid) if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) { if (errno == EIO) - { - have_ptrace_getsetregs = 0; - return 0; - } + { + have_ptrace_getsetregs = 0; + return 0; + } perror_with_name (_("Couldn't get general-purpose registers.")); } @@ -1180,10 +1180,10 @@ fetch_all_fp_regs (struct regcache *regcache, int tid) if (ptrace (PTRACE_GETFPREGS, tid, 0, (void *) &fpregs) < 0) { if (errno == EIO) - { - have_ptrace_getsetfpregs = 0; - return 0; - } + { + have_ptrace_getsetfpregs = 0; + return 0; + } perror_with_name (_("Couldn't get floating-point registers.")); } @@ -1368,10 +1368,10 @@ store_altivec_registers (const struct regcache *regcache, int tid, if (ret < 0) { if (errno == EIO) - { - have_ptrace_getvrregs = 0; - return; - } + { + have_ptrace_getvrregs = 0; + return; + } perror_with_name (_("Unable to fetch AltiVec registers")); } @@ -1397,18 +1397,18 @@ set_spe_registers (int tid, struct gdb_evrregset_t *evrregset) if (have_ptrace_getsetevrregs) { if (ptrace (PTRACE_SETEVRREGS, tid, 0, evrregset) >= 0) - return; + return; else - { - /* EIO means that the PTRACE_SETEVRREGS request isn't - supported; we fail silently, and don't try the call - again. */ - if (errno == EIO) - have_ptrace_getsetevrregs = 0; - else - /* Anything else needs to be reported. */ - perror_with_name (_("Unable to set SPE registers")); - } + { + /* EIO means that the PTRACE_SETEVRREGS request isn't + supported; we fail silently, and don't try the call + again. */ + if (errno == EIO) + have_ptrace_getsetevrregs = 0; + else + /* Anything else needs to be reported. */ + perror_with_name (_("Unable to set SPE registers")); + } } } @@ -1423,11 +1423,11 @@ store_spe_register (const struct regcache *regcache, int tid, int regno) struct gdb_evrregset_t evrregs; gdb_assert (sizeof (evrregs.evr[0]) - == register_size (gdbarch, tdep->ppc_ev0_upper_regnum)); + == register_size (gdbarch, tdep->ppc_ev0_upper_regnum)); gdb_assert (sizeof (evrregs.acc) - == register_size (gdbarch, tdep->ppc_acc_regnum)); + == register_size (gdbarch, tdep->ppc_acc_regnum)); gdb_assert (sizeof (evrregs.spefscr) - == register_size (gdbarch, tdep->ppc_spefscr_regnum)); + == register_size (gdbarch, tdep->ppc_spefscr_regnum)); if (regno == -1) /* Since we're going to write out every register, the code below @@ -1449,7 +1449,7 @@ store_spe_register (const struct regcache *regcache, int tid, int regno) &evrregs.evr[i]); } else if (tdep->ppc_ev0_upper_regnum <= regno - && regno < tdep->ppc_ev0_upper_regnum + ppc_num_gprs) + && regno < tdep->ppc_ev0_upper_regnum + ppc_num_gprs) regcache->raw_collect (regno, &evrregs.evr[regno - tdep->ppc_ev0_upper_regnum]); @@ -1645,7 +1645,7 @@ store_register (const struct regcache *regcache, int tid, int regno) regaddr += sizeof (long); if (errno == EIO - && (regno == tdep->ppc_fpscr_regnum + && (regno == tdep->ppc_fpscr_regnum || regno == PPC_ORIG_R3_REGNUM || regno == PPC_TRAP_REGNUM)) { @@ -1656,7 +1656,7 @@ store_register (const struct regcache *regcache, int tid, int regno) if (errno != 0) { - char message[128]; + char message[128]; xsnprintf (message, sizeof (message), "writing register %s (#%d)", gdbarch_register_name (gdbarch, regno), regno); perror_with_name (message); @@ -1680,10 +1680,10 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno) if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) { if (errno == EIO) - { - have_ptrace_getsetregs = 0; - return 0; - } + { + have_ptrace_getsetregs = 0; + return 0; + } perror_with_name (_("Couldn't get general-purpose registers.")); } @@ -1692,10 +1692,10 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno) if (ptrace (PTRACE_SETREGS, tid, 0, (void *) &gregset) < 0) { if (errno == EIO) - { - have_ptrace_getsetregs = 0; - return 0; - } + { + have_ptrace_getsetregs = 0; + return 0; + } perror_with_name (_("Couldn't set general-purpose registers.")); } @@ -1742,10 +1742,10 @@ store_all_fp_regs (const struct regcache *regcache, int tid, int regno) if (ptrace (PTRACE_GETFPREGS, tid, 0, (void *) &fpregs) < 0) { if (errno == EIO) - { - have_ptrace_getsetfpregs = 0; - return 0; - } + { + have_ptrace_getsetfpregs = 0; + return 0; + } perror_with_name (_("Couldn't get floating-point registers.")); } @@ -1754,10 +1754,10 @@ store_all_fp_regs (const struct regcache *regcache, int tid, int regno) if (ptrace (PTRACE_SETFPREGS, tid, 0, (void *) &fpregs) < 0) { if (errno == EIO) - { - have_ptrace_getsetfpregs = 0; - return 0; - } + { + have_ptrace_getsetfpregs = 0; + return 0; + } perror_with_name (_("Couldn't set floating-point registers.")); } @@ -1949,7 +1949,7 @@ ppc_linux_nat_target::read_description () struct gdb_evrregset_t evrregset; if (ptrace (PTRACE_GETEVRREGS, tid, 0, &evrregset) >= 0) - return tdesc_powerpc_e500l; + return tdesc_powerpc_e500l; /* EIO means that the PTRACE_GETEVRREGS request isn't supported. Anything else needs to be reported. */ @@ -1984,7 +1984,7 @@ ppc_linux_nat_target::read_description () gdb_vrregset_t vrregset; if (ptrace (PTRACE_GETVRREGS, tid, 0, &vrregset) >= 0) - features.altivec = true; + features.altivec = true; /* EIO means that the PTRACE_GETVRREGS request isn't supported. Anything else needs to be reported. */ @@ -2115,7 +2115,7 @@ ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len) /* Embedded DAC-based processors, like the PowerPC 440 have ranged watchpoints and can watch any access within an arbitrary memory region. This is useful to watch arrays and structs, for instance. It - takes two hardware watchpoints though. */ + takes two hardware watchpoints though. */ if (len > 1 && hwdebug_info.features & PPC_DEBUG_FEATURE_DATA_BP_RANGE && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE) @@ -2128,7 +2128,7 @@ ppc_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len) else region_size = hwdebug_info.data_bp_alignment; /* Server processors provide one hardware watchpoint and addr+len should - fall in the watchable region provided by the ptrace interface. */ + fall in the watchable region provided by the ptrace interface. */ if (region_size && (addr + len > (addr & ~(region_size - 1)) + region_size)) return 0; |