1 files changed, 212 insertions, 0 deletions
diff --git a/sim/testsuite/bfin/c_dsp32mult_dr_m_s.s b/sim/testsuite/bfin/c_dsp32mult_dr_m_s.s
new file mode 100644
index 00000000000..670d9d341c9
--- /dev/null
+++ b/sim/testsuite/bfin/c_dsp32mult_dr_m_s.s
@@ -0,0 +1,212 @@
+//Original:/testcases/core/c_dsp32mult_dr_m_s/c_dsp32mult_dr_m_s.dsp
+// Spec Reference: dsp32mult single dr munop s
+# mach: bfin
+
+.include "testutils.inc"
+	start
+
+imm32 r0, 0xfb235625;
+imm32 r1, 0x9fba5127;
+imm32 r2, 0xa3ff6725;
+imm32 r3, 0x0006f027;
+imm32 r4, 0xb0abcd29;
+imm32 r5, 0x1facef2b;
+imm32 r6, 0xc0fc002d;
+imm32 r7, 0xd24f702f;
+R4.L = R0.H * R0.L (S2RND);
+R5.H = R0.L * R1.L (S2RND);
+R6.L = R1.L * R0.H (S2RND);
+R7.L = R1.L * R1.L (S2RND);
+R0.H = R0.L * R0.L (S2RND);
+R1.L = R0.L * R1.L (S2RND);
+R2.L = R1.H * R0.L (S2RND);
+R3.H = R1.L * R1.L (S2RND);
+CHECKREG r0, 0x73F45625;
+CHECKREG r1, 0x9FBA6D3B;
+CHECKREG r2, 0xA3FF8000;
+CHECKREG r3, 0x7FFFF027;
+CHECKREG r4, 0xB0ABF974;
+CHECKREG r5, 0x6D3BEF2B;
+CHECKREG r6, 0xC0FCF9D5;
+CHECKREG r7, 0xD24F66E7;
+
+imm32 r0, 0xeb23a635;
+imm32 r1, 0x6fba5137;
+imm32 r2, 0x1324b7e5;
+imm32 r3, 0x9e060037;
+imm32 r4, 0x80ebcd39;
+imm32 r5, 0xb0aeef3b;
+imm32 r6, 0xa00ce03d;
+imm32 r7, 0x12467e03;
+R4.H = R2.L * R2.L (S2RND);
+R5.L = R2.L * R3.H (S2RND);
+R6.L = R3.H * R2.L (S2RND);
+R7.H = R3.L * R3.L (S2RND);
+R2.H = R2.L * R2.H (S2RND);
+R3.L = R2.H * R3.H (S2RND);
+R0.H = R3.L * R2.L (S2RND);
+R1.L = R3.L * R3.L (S2RND);
+CHECKREG r0, 0xDACEA635;
+CHECKREG r1, 0x6FBA1108;
+CHECKREG r2, 0xEA6FB7E5;
+CHECKREG r3, 0x9E062104;
+CHECKREG r4, 0x513DCD39;
+CHECKREG r5, 0xB0AE6E63;
+CHECKREG r6, 0xA00C6E63;
+CHECKREG r7, 0x00007E03;
+
+imm32 r0, 0xdd235655;
+imm32 r1, 0xc4dd5157;
+imm32 r2, 0x6324d755;
+imm32 r3, 0x00060055;
+imm32 r4, 0x90dbc509;
+imm32 r5, 0x10adef5b;
+imm32 r6, 0xb00cd05d;
+imm32 r7, 0x12467d5f;
+R0.L = R4.L * R4.H (S2RND);
+R1.H = R4.H * R5.L (S2RND);
+R2.L = R5.H * R4.L (S2RND);
+R3.L = R5.L * R5.L (S2RND);
+R4.H = R4.L * R4.H (S2RND);
+R5.L = R4.L * R5.H (S2RND);
+R6.H = R5.H * R4.H (S2RND);
+R7.L = R5.H * R5.H (S2RND);
+CHECKREG r0, 0xDD236666;
+CHECKREG r1, 0x1CE85157;
+CHECKREG r2, 0x6324F0A3;
+CHECKREG r3, 0x00060454;
+CHECKREG r4, 0x6666C509;
+CHECKREG r5, 0x10ADF0A3;
+CHECKREG r6, 0x1AAED05D;
+CHECKREG r7, 0x12460458;
+
+imm32 r0, 0xcb235666;
+imm32 r1, 0xefba5166;
+imm32 r2, 0x1c248766;
+imm32 r3, 0xf0060066;
+imm32 r4, 0x90cb9d69;
+imm32 r5, 0x10acef6b;
+imm32 r6, 0x800cc06d;
+imm32 r7, 0x12467c6f;
+// test the unsigned U=1
+R0.L = R6.L * R6.L (S2RND);
+R1.H = R6.H * R7.L (S2RND);
+R2.L = R7.L * R6.L (S2RND);
+R3.L = R7.L * R7.L (S2RND);
+R6.L = R6.L * R6.L (S2RND);
+R7.L = R6.L * R7.L (S2RND);
+R4.L = R7.L * R6.L (S2RND);
+R5.L = R7.L * R7.L (S2RND);
+CHECKREG r0, 0xCB233F27;
+CHECKREG r1, 0x80005166;
+CHECKREG r2, 0x1C248465;
+CHECKREG r3, 0xF0067FFF;
+CHECKREG r4, 0x90CB7929;
+CHECKREG r5, 0x10AC7FFF;
+CHECKREG r6, 0x800C3F27;
+CHECKREG r7, 0x12467AC9;
+
+// mix order
+imm32 r0, 0xab23a675;
+imm32 r1, 0xcfba5127;
+imm32 r2, 0x13246705;
+imm32 r3, 0xe0060007;
+imm32 r4, 0x9eabcd09;
+imm32 r5, 0x10ecdfdb;
+imm32 r6, 0x000e000d;
+imm32 r7, 0x1246e00f;
+R0.H = R0.L * R7.H (S2RND);
+R1.L = R1.H * R6.H (S2RND);
+R2.L = R2.L * R5.L (S2RND);
+R3.H = R3.H * R4.H (S2RND);
+R4.L = R4.L * R3.H (S2RND);
+R5.L = R5.H * R2.H (S2RND);
+R6.H = R6.H * R1.L (S2RND);
+R7.L = R7.L * R0.H (S2RND);
+CHECKREG r0, 0xE66FA675;
+CHECKREG r1, 0xCFBAFFF5;
+CHECKREG r2, 0x1324CC42;
+CHECKREG r3, 0x30A10007;
+CHECKREG r4, 0x9EABD947;
+CHECKREG r5, 0x10EC0510;
+CHECKREG r6, 0x0000000D;
+CHECKREG r7, 0x12460CC3;
+
+imm32 r0, 0x9b235a75;
+imm32 r1, 0xcfba5127;
+imm32 r2, 0x93246905;
+imm32 r3, 0x09060007;
+imm32 r4, 0x909bcd09;
+imm32 r5, 0x10a9e9db;
+imm32 r6, 0x000c9d0d;
+imm32 r7, 0x1246790f;
+R0.L = R7.L * R0.H (S2RND);
+R1.L = R6.L * R1.L (S2RND);
+R2.H = R5.L * R2.L (S2RND);
+R3.L = R4.H * R3.L (S2RND);
+R4.L = R3.H * R4.H (S2RND);
+R5.H = R2.H * R5.L (S2RND);
+R6.L = R1.H * R6.L (S2RND);
+R7.L = R0.L * R7.L (S2RND);
+CHECKREG r0, 0x9B238000;
+CHECKREG r1, 0xCFBA8288;
+CHECKREG r2, 0xDBAA6905;
+CHECKREG r3, 0x0906FFF4;
+CHECKREG r4, 0x909BF04B;
+CHECKREG r5, 0x0C93E9DB;
+CHECKREG r6, 0x000C4AA2;
+CHECKREG r7, 0x12468000;
+
+imm32 r0, 0xa9235675;
+imm32 r1, 0xc8ba5127;
+imm32 r2, 0x13246705;
+imm32 r3, 0x08060007;
+imm32 r4, 0x908bcd09;
+imm32 r5, 0x10a88fdb;
+imm32 r6, 0x000c080d;
+imm32 r7, 0x1246708f;
+R2.L = R4.L * R6.L (S2RND);
+R3.L = R2.H * R2.L (S2RND);
+R0.H = R2.L * R3.L, R0.L = R2.H * R3.H (S2RND);
+R1.H = R3.L * R1.L (S2RND);
+R4.L = R4.H * R0.L (S2RND);
+R5.L = R5.L * R5.L (S2RND);
+R6.L = R6.L * R5.H (S2RND);
+R7.H = R6.H * R7.L (S2RND);
+CHECKREG r0, 0x00310266;
+CHECKREG r1, 0xFD915127;
+CHECKREG r2, 0x1324F997;
+CHECKREG r3, 0x0806FE15;
+CHECKREG r4, 0x908BFBD3;
+CHECKREG r5, 0x10A87FFF;
+CHECKREG r6, 0x000C0218;
+CHECKREG r7, 0x0015708F;
+
+imm32 r0, 0x7b235675;
+imm32 r1, 0xcfba5127;
+imm32 r2, 0x17246705;
+imm32 r3, 0x00760007;
+imm32 r4, 0x907bcd09;
+imm32 r5, 0x10a7efdb;
+imm32 r6, 0x000c700d;
+imm32 r7, 0x1246770f;
+R4.L = R5.L * R2.L (S2RND);
+R6.L = R6.L * R3.H (S2RND);
+R0.H = R7.L * R4.H (S2RND);
+R1.L = R0.H * R5.L (S2RND);
+R2.L = R1.L * R6.L (S2RND);
+R5.L = R2.L * R7.H (S2RND);
+R3.H = R3.H * R0.L (S2RND);
+R7.L = R4.H * R1.H (S2RND);
+CHECKREG r0, 0x80005675;
+CHECKREG r1, 0xCFBA204A;
+CHECKREG r2, 0x17240068;
+CHECKREG r3, 0x009F0007;
+CHECKREG r4, 0x907BE603;
+CHECKREG r5, 0x10A7001E;
+CHECKREG r6, 0x000C00CF;
+CHECKREG r7, 0x1246541E;
+
+
+
+pass