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* [wip] always compile in cgen logicusers/vapier/sim/cpu-uniMike Frysinger2022-11-114-6/+7
* sim: fully merge sim_cpu_base into sim_cpuMike Frysinger2022-11-111-26/+19
* sim: enable common sim_cpu usage everywhereMike Frysinger2022-11-1129-66/+1
* sim: or1k: invert sim_cpu storageMike Frysinger2022-11-115-30/+43
* sim: m32r: invert sim_cpu storageMike Frysinger2022-11-115-14/+10
* sim: lm32: invert sim_cpu storageMike Frysinger2022-11-113-12/+7
* sim: iq2000: invert sim_cpu storageMike Frysinger2022-11-113-11/+7
* sim: frv: invert sim_cpu storageMike Frysinger2022-11-113-23/+18
* sim: cris: invert sim_cpu storageMike Frysinger2022-11-116-239/+244
* sim: bpf: invert sim_cpu storageMike Frysinger2022-11-113-7/+13
* sim: cgen: prep for inverting sim_cpu storageMike Frysinger2022-11-112-0/+15
* sim: riscv: invert sim_cpu storageMike Frysinger2022-11-113-191/+258
* sim: pru: invert sim_cpu storageMike Frysinger2022-11-113-8/+31
* sim: example-synacor: invert sim_cpu storageMike Frysinger2022-11-113-37/+47
* sim: h8300: invert sim_cpu storageMike Frysinger2022-11-112-34/+36
* sim: m68hc11: invert sim_cpu storageMike Frysinger2022-11-1110-354/+446
* sim: mips: invert sim_cpu storageMike Frysinger2022-11-112-73/+90
* sim: v850: invert sim_cpu storageMike Frysinger2022-11-113-20/+23
* sim: mcore: invert sim_cpu storageMike Frysinger2022-11-112-27/+41
* sim: aarch64: invert sim_cpu storageMike Frysinger2022-11-115-108/+152
* sim: microblaze: invert sim_cpu storageMike Frysinger2022-11-113-8/+8
* sim: avr: invert sim_cpu storageMike Frysinger2022-11-112-99/+108
* sim: moxie: invert sim_cpu storageMike Frysinger2022-11-112-14/+13
* sim: msp430: invert sim_cpu storageMike Frysinger2022-11-113-120/+106
* sim: ft32: invert sim_cpu storageMike Frysinger2022-11-113-95/+99
* sim: bfin: invert sim_cpu storageMike Frysinger2022-11-112-10/+5
* sim: sim_cpu: invert sim_cpu storageMike Frysinger2022-11-117-40/+46
* [hack] sim: frv: make tests passMike Frysinger2022-11-111-1/+1
* sim: v850: rename v850.dc to align with other portsMike Frysinger2022-11-113-2/+2
* sim: igen: fix hang when decoding boolean rule constantsMike Frysinger2022-11-111-0/+2
* sim: igen: mark error func as noreturn since it exitsMike Frysinger2022-11-111-1/+1
* sim: igen: mark output funcs with printf attributeMike Frysinger2022-11-112-7/+4
* sim: igen: constify various func argumentsMike Frysinger2022-11-1131-265/+380
* sim: ppc: rename ppc-instructions to powerpc.igenMike Frysinger2022-11-114-6/+6
* i386: Check invalid (%dx) usageH.J. Lu2022-11-105-0/+44
* gdb: make "start" breakpoint inferior-specificSimon Marchi2022-11-104-1/+133
* gdb: Fix regressions caused by 041de3d73aa121f2ff0c077213598963bfb34b79Bruno Larsen2022-11-101-2/+2
* gdb/debuginfod: Improve progress updatesAaron Merey2022-11-106-162/+296
* gdb: add special handling for frame level 0 in frame_info_ptrSimon Marchi2022-11-102-6/+40
* gdb: add missing prepare_reinflate call in print_frame_infoSimon Marchi2022-11-101-0/+2
* gdb: use frame_id_p instead of comparing to null_frame_id in frame_info_ptr::...Simon Marchi2022-11-101-1/+1
* gdb: remove manual frame_info reinflation code in backtrace_command_1Simon Marchi2022-11-101-14/+1
* gdb: move frame_info_ptr method implementations to frame-info.cSimon Marchi2022-11-105-21/+55
* gdb: add prepare_reinflate/reinflate around print_frame_args in info_frame_co...Simon Marchi2022-11-102-0/+12
* gdb: clear other.m_cached_id in frame_info_ptr's move ctorSimon Marchi2022-11-101-0/+1
* gdb/c++: Improve error messages in overload resolutionBruno Larsen2022-11-103-4/+277
* gdb/testsuite: allowed for function_range to deal with mangled functionsBruno Larsen2022-11-101-1/+1
* ld/testsuite: skip ld-size when -shared is not supportedClément Chigot2022-11-101-0/+6
* mach-o reloc size overflowAlan Modra2022-11-101-1/+4
* Sanity check reloc count in get_reloc_upper_boundAlan Modra2022-11-105-34/+69