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* RISC-V: Optimize relaxation of gp with max_alignment.Lifang Xia2023-04-213-0/+75
* RISC-V: PR28789, Reject R_RISCV_PCREL relocations with ABS symbol in PIC/PIE.Palmer Dabbelt2023-03-308-0/+70
* RISC-V: Clarify link behaviors of R_RISCV_32/64 relocations with ABS symbol.Nelson Chu2023-03-3013-2/+183
* RISC-V: Add --[no-]relax-gp to ldFangrui Song2023-02-234-1/+25
* Update year range in copyright notice of binutils filesAlan Modra2023-01-011-1/+1
* RISC-V: re-arrange opcode table for consistent alias handlingJan Beulich2022-09-306-9/+9
* RISC-V: Always generate R_RISCV_CALL_PLT reloc for call in assembler.Nelson Chu2022-09-211-28/+28
* RISC-V: PR28509, the default visibility symbol cannot be referenced by R_RISC...Nelson Chu2022-09-1212-29/+83
* RISC-V: Add 'Zmmul' extension in assembler.Tsukasa OI2022-08-3012-12/+12
* RISC-V: Stop reporting warnings for mismatched extension versionsPalmer Dabbelt2022-02-0812-46/+12
* RISC-V: Updated the default ISA spec to 20191213.Nelson Chu2022-01-0711-11/+11
* Update year range in copyright notice of binutils filesAlan Modra2022-01-021-1/+1
* RISC-V: Added ld testcases for the medlow and medany code models.Nelson Chu2021-12-1420-0/+280
* RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC.Nelson Chu2021-11-196-0/+347
* RISC-V: Added ld testcase for pcgp relaxation.Lewis Revill2021-10-225-2/+36
* RISC-V: Don't separate pcgp relaxation to another relax pass.Lewis Revill2021-10-226-32/+32
* elf/riscv: Fix relaxation with aliases [PR28021]Michael Matz2021-07-064-0/+108
* RISC-V: Add PT_RISCV_ATTRIBUTES and add it to PHDR.Kito Cheng2021-07-063-0/+29
* RISC-V: Clarify the addends of pc-relative access.Nelson Chu2021-06-228-0/+89
* RISC-V: PR27566, Do not relax when data segment phase is exp_seg_relro_adjust.Nelson Chu2021-05-315-0/+56
* RISC-V: Check the overflow for %pcrel_lo addend more strictly.Nelson Chu2021-05-146-7/+29
* RISC-V: Improve multiple relax passes problem.Nelson Chu2021-03-113-0/+32
* RISC-V: Error and warning messages tidy.Nelson Chu2021-01-156-12/+12
* RISC-V: Fix riscv gas/ld testsuites failures for big endian.Marcus Comstedt2021-01-0613-23/+40
* Update year range in copyright notice of binutils filesAlan Modra2021-01-011-1/+1
* RISC-V: Relax PCREL to GPREL while doing other relaxations is dangerous.Nelson Chu2020-11-213-0/+46
* RISC-V: Fix that IRELATIVE relocs may be inserted to the wrong place.Nelson Chu2020-10-166-0/+83
* RISC-V: Support GNU indirect functions.Nelson Chu2020-10-1653-0/+725
* RISC-V: Minor cleanup and typos when merging elf attributes.Nelson Chu2020-09-036-12/+12
* RISC-V: Report warnings rather than errors for the mis-matched ISA versions.Nelson Chu2020-09-037-1/+39
* RISC-V: Improve the error message for the mis-matched ISA versions.Kito Cheng2020-09-033-3/+3
* RISC-V: Treat R_RISCV_CALL and R_RISCV_CALL_PLT as the same in check_relocs.Nelson Chu2020-08-283-3/+3
* RISC-V: Report warning when linking the objects with different priv specs.Nelson Chu2020-06-226-6/+54
* RISC-V: The object without priv spec attributes can be linked with any object.Nelson Chu2020-06-0512-1/+70
* RISC-V: Don't generate the ELF privilege attributes when no CSR are used.Nelson Chu2020-06-0510-27/+1
* [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...Nelson Chu2020-05-2012-6/+33
* Update year range in copyright notice of binutils filesAlan Modra2020-01-011-1/+1
* RISC-V: Fix ld relax failure with calls and align directives.Jim Wilson2019-11-126-0/+41
* RISC-V: Report unresolved relocation error via linker's callback function.Jim Wilson2019-10-174-0/+30
* RISC-V: Optimize lui and auipc relaxations for undefweak symbol.Jim Wilson2019-09-204-24/+32
* RISC-V: Fix lui relaxation issue with code at address 0.Jim Wilson2019-08-154-0/+38
* Fix spelling mistakes in BFD library.Yuri Chornoivan2019-01-211-1/+1
* RISC-V: Merge ELF attribute for ld.Jim Wilson2019-01-1637-0/+147
* Update year range in copyright notice of binutils filesAlan Modra2019-01-011-1/+1
* RISC-V: Adjust __global_pointer$ value to reduce code size.Jim Wilson2018-10-151-1/+1
* RISC-V: Allow pcrel_lo addends, error on addend overflow.Jim Wilson2018-09-244-2/+24
* RISC-V: Handle out-of-range calls to undefined weak.Jim Wilson2018-06-036-0/+88
* RISC-V: Give error for ignored pcrel_lo addend.Jim Wilson2018-02-153-0/+23
* RISC-V: Fix accidental embedded -shared regressions.Jim Wilson2018-01-083-3/+10
* RISC-V: Print symbol address for jalr w/ zero offset.Jim Wilson2018-01-053-0/+19
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