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* Eliminate warning message.Michael Eager2013-03-122-1/+7
* 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2013-03-122-0/+6
* 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2013-03-122-0/+6
* 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2013-03-122-0/+5
* Add support for AArch32 CRC instruction in ARMv8.Kyrylo Tkachov2013-03-112-1/+27
* PR binutils/15241Nick Clifton2013-03-082-2/+11
* Add RegRex64 to rizH.J. Lu2013-03-023-5/+10
* include/opcode/Yufeng Zhang2013-02-285-390/+513
* * rl78-decode.opc (rl78_decode_opcode): Fix typo.Alan Modra2013-02-273-202/+208
* * rl78-decode.opc: Fix encoding of DIVWU insn.Nick Clifton2013-02-253-6/+16
* Implement Intel SMAP instructionsH.J. Lu2013-02-197-2762/+2818
* * metag-dis.c: Initialize outf->bytes_per_chunk to 4Nick Clifton2013-02-152-0/+7
* opcodes/Yufeng Zhang2013-02-142-15/+24
* Correct ChangeLog dates.Maciej W. Rozycki2013-02-131-1/+1
* opcodes/Maciej W. Rozycki2013-02-132-0/+8
* 2013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw2013-02-112-2/+6
* gas/Richard Sandiford2013-02-092-13/+19
* 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2013-02-068-0/+865
* * po/POTFILES.in: Regenerate.Alan Modra2013-02-044-1013/+1020
* include/opcode/Yufeng Zhang2013-01-308-659/+732
* Add support for V850E3V5 architectureNick Clifton2013-01-243-197/+955
* include/opcode/Yufeng Zhang2013-01-175-10/+28
* Add OPERAND_TYPE_IMM32_64H.J. Lu2013-01-164-2/+16
* * config/tc-v850.c (md_assemble): Allow signed values forNick Clifton2013-01-153-2/+10
* * metag-dis.c (REG_WIDTH): Increase to 64.Nick Clifton2013-01-142-1/+5
* include/opcode/Peter Bergner2013-01-113-1/+76
* * common.h: Fix case of "Meta".Nick Clifton2013-01-107-0/+3409
* oops - typo correction.Nick Clifton2013-01-071-1/+1
* (make_instruction): Rename to cr16_make_instruction.Nick Clifton2013-01-072-4/+9
* * archures.c: Add support for MIPS r5900Nick Clifton2013-01-043-138/+341
* opcodes/Yufeng Zhang2013-01-043-8/+33
* * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP,Nick Clifton2013-01-042-14/+19
* Update copyright year to 2013H.J. Lu2013-01-022-2/+6
* opcodes/ChangeLogNick Clifton2013-01-023-1111/+1140
* Add copyright noticesNick Clifton2012-12-1711-2/+187
* PR binutils/14950Alan Modra2012-12-132-65/+46
* Add copyright noticesNick Clifton2012-12-1013-0/+81
* 2012-11-30 Oleg Raikhman <oleg@adapteva.com>Joern Rennecke2012-11-304-121/+126
* opcodes/Roland McGrath2012-11-292-5/+9
* opcodes/Changelog:Michael Eager2012-11-293-7/+13
* include/opcode/Alan Modra2012-11-232-24/+76
* Add swap byte (swapb) and swap halfword (swaph) opcodes.Michael Eager2012-11-213-2/+9
* Add stack high register and stack low register for MicroBlazeMichael Eager2012-11-213-0/+15
* Fix opcode for 64-bit jecxzH.J. Lu2012-11-203-2/+9
* 2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2012-11-202-2/+6
* opcodes/Michael Eager2012-11-144-4/+45
* Add clz opcode.Michael Eager2012-11-143-2/+8
* Add the endian reversing versions of load/store instructions;Michael Eager2012-11-143-2/+16
* 2012-11-09 Nick Clifton <nickc@redhat.com>Nick Clifton2012-11-094-0/+9
* Remove trailing redundant `;'H.J. Lu2012-11-093-2/+7