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* x86: fix SSE4a dependencies of ".arch .nosse*"Jan Beulich2020-02-133-4/+21
* x86: correct VFPCLASSP{S,D} operand size handlingJan Beulich2020-02-123-4/+44
* x86: fold two JMP templatesJan Beulich2020-02-123-16/+8
* x86-64: Intel64 adjustments for insns dealing with far pointersJan Beulich2020-02-124-25/+136
* x86: drop ShortForm attributeJan Beulich2020-02-115-10944/+10952
* x86: drop stray ShortForm attributesJan Beulich2020-02-113-12/+18
* Ensure *valuep always written by extract_normal returnAlan Modra2020-02-1116-15/+68
* [binutils][arm] Implement Custom Datapath Extensions for MVEMatthew Malcomson2020-02-102-0/+45
* [binutils][arm] arm support for ARMv8.m Custom Datapath ExtensionMatthew Malcomson2020-02-102-1/+221
* x86: Accept Intel64 only instruction by defaultH.J. Lu2020-02-105-3948/+3974
* Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add ...Sergey Belyashov2020-02-072-20/+158
* ubsan: d30v: negation of -2147483648Alan Modra2020-02-042-2/+6
* ubsan: m32c: left shift of negative valueAlan Modra2020-02-032-2/+6
* ubsan: frv: left shift of negative valueAlan Modra2020-02-012-3/+7
* x86: replace EXxmm_mdq by EXVexWdqScalarJan Beulich2020-01-313-27/+29
* x86: drop unused EXVexWdq / vex_w_dq_modeJan Beulich2020-01-312-7/+10
* aarch64: Fix MOVPRFX markup for bf16 conversionsRichard Sandiford2020-01-312-2/+7
* ubsan: m32c: left shift of negative valueAlan Modra2020-01-302-12/+16
* cpu,opcodes,gas: fix neg and neg32 instructions in BPFJose E. Marchesi2020-01-302-4/+8
* x86-64: honor vendor specifics for near RETJan Beulich2020-01-304-6/+55
* x86: drop further pointless/bogus DefaultSizeJan Beulich2020-01-303-17/+25
* ubsan: tic4x: left shift cannot be represented in type 'int'Alan Modra2020-01-302-1/+5
* x86-64: Properly encode and decode movsxdH.J. Lu2020-01-274-6/+108
* AArch64: Fix cfinv disassembly issuesTamar Christina2020-01-275-1278/+1293
* x86: improve handling of insns with ambiguous operand sizesJan Beulich2020-01-213-2/+7
* x86: VCVTNEPS2BF16{X,Y} should permit broadcastingJan Beulich2020-01-213-8/+15
* Updated translations for various binutils sub-directoriesNick Clifton2020-01-204-1053/+1365
* ubsan: hppa: negation of -2147483648Alan Modra2020-01-202-1/+5
* ubsan: arm: out of bounds array accessAlan Modra2020-01-202-1/+5
* Update version to 2.34.50. Regenerate configure and .pot files.Nick Clifton2020-01-183-38/+43
* Add markers for 2.34 branch to the NEWS files and ChangeLogs.Nick Clifton2020-01-181-0/+4
* Fix spelling errorsChristian Biesinger2020-01-172-1/+5
* x86: Add {vex} pseudo prefixH.J. Lu2020-01-173-0/+18
* [binutils][arm] PR25376 Change MVE into a CORE_HIGH featureAndre Vieira2020-01-162-232/+248
* x86: drop stale Vec_Imm4 related commentJan Beulich2020-01-162-2/+4
* x86: add a few more missing VexWIGJan Beulich2020-01-163-8/+14
* x86: VPEXTRQ/VPINSRQ are unavailable outside of 64-bit modeJan Beulich2020-01-163-20/+28
* tic4x disassembly static variablesAlan Modra2020-01-162-31/+54
* Fix various assembler testsuite failures for the Z80 target.Sergey Belyashov2020-01-142-1/+7
* ubsan: z8k: left shift cannot be represented in type 'int'Alan Modra2020-01-142-8/+13
* Add an option to objdump's disassembler to generate ascii art diagrams showin...Thomas Troeger2020-01-133-4/+113
* [ARC][committed] Code cleanup and improvements.Claudiu Zissulescu2020-01-132-1/+5
* [ARC] [COMMITTED] Change ACCL/ACCH reg name to generic.Claudiu Zissulescu2020-01-132-1/+6
* asan: ns32k: wild memory writeAlan Modra2020-01-132-6/+10
* ubsan: wasm32: signed integer overflowAlan Modra2020-01-132-209/+243
* score formattingAlan Modra2020-01-133-812/+808
* ubsan: score: left shift of negative valueAlan Modra2020-01-133-24/+31
* tic4x: sign extension using shiftsAlan Modra2020-01-132-2/+5
* ubsan: fr30: left shift of negative valueAlan Modra2020-01-132-5/+9
* ubsan: xgate: left shift of negative valueAlan Modra2020-01-132-8/+13
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