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path: root/sim/bfin/interp.c
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* sim: replace -I$srcroot/bfd include with -I$srcrootMike Frysinger2023-01-011-1/+1
* Update copyright year range in header of all files managed by GDBJoel Brobecker2023-01-011-1/+1
* sim: cpu: change default init to handle all cpusMike Frysinger2022-12-251-1/+1
* sim: bfin: move arch-specific settings to internal headerMike Frysinger2022-12-231-0/+3
* sim: use bfd_vma when reading start addr from bfd infoMike Frysinger2022-12-221-1/+1
* sim: bfin: invert sim_cpu storageMike Frysinger2022-12-211-3/+2
* sim: common: change sim_read & sim_write to use void* buffersMike Frysinger2022-10-311-14/+14
* sim: remove use of PTRAlan Modra2022-05-131-2/+2
* Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker2022-01-011-1/+1
* sim: syscall: hoist argc/argn/argnlen to common codeMike Frysinger2021-11-161-33/+0
* sim: callback: expose argv & environMike Frysinger2021-11-161-0/+4
* sim: keep track of program environment stringsMike Frysinger2021-11-161-0/+6
* sim: split program path out of argv vectorMike Frysinger2021-11-151-4/+1
* sim: nltvals: localize TARGET_<ERRNO> definesMike Frysinger2021-08-171-12/+10
* sim: move default model to the runtime sim stateMike Frysinger2021-06-301-0/+1
* sim: namespace sim_machsMike Frysinger2021-06-301-0/+1
* sim: callback: extend syscall interface to handle 7 argsMike Frysinger2021-06-241-4/+4
* sim: overhaul & unify endian settings managementMike Frysinger2021-06-171-0/+1
* sim: start unifying portability shimsMike Frysinger2021-06-121-19/+1
* sim: overhaul alignment settings managementMike Frysinger2021-06-121-0/+3
* sim: bfin: invert sim_state storageMike Frysinger2021-05-171-1/+2
* sim: switch config.h usage to defs.hMike Frysinger2021-05-161-1/+2
* sim: create header namespaceMike Frysinger2021-05-141-1/+1
* sim: add ATTRIBUTE_PRINTF / ATTRIBUTE_NULL_PRINTF where necessarySimon Marchi2021-05-031-1/+1
* sim: bfin: move option inits to respective modulesMike Frysinger2021-05-011-11/+0
* sim: syscall: add getpid supportMike Frysinger2021-04-181-4/+0
* sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger2021-04-121-1/+1
* sim: watchpoints: use common sim_pc_getMike Frysinger2021-02-061-6/+0
* sim: watchpoints: change sizeof_pc to sizeof(sim_cia)Mike Frysinger2021-01-301-1/+0
* sim: common: add align_{up,down} to match gdbMike Frysinger2021-01-021-3/+4
* Update copyright year range in all GDB filesJoel Brobecker2021-01-011-1/+1
* Update copyright year range in all GDB files.Joel Brobecker2020-01-011-1/+1
* Update copyright year range in all GDB files.Joel Brobecker2019-01-011-1/+1
* Update copyright year range in all GDB filesJoel Brobecker2018-01-021-1/+1
* update copyright year range in GDB filesJoel Brobecker2017-01-011-1/+1
* sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger2016-01-061-8/+8
* sim: bfin: add support disasm tracingMike Frysinger2016-01-051-0/+2
* sim: unify min/max macrosMike Frysinger2016-01-041-2/+2
* sim: parse_args: display getopt error ourselvesMike Frysinger2016-01-031-3/+1
* sim: use libiberty countargv in more placesMike Frysinger2016-01-031-19/+5
* GDB copyright headers update after running GDB's copyright.py script.Joel Brobecker2016-01-011-1/+1
* sim: standardize sim_create_inferior handling of argv a bit moreMike Frysinger2015-12-261-4/+5
* sim: sim-close: unify sim_close logicMike Frysinger2015-11-151-6/+0
* sim: trace: add a basic cpu register classMike Frysinger2015-06-241-16/+0
* sim: syscall: unify memory helpersMike Frysinger2015-06-171-28/+3
* sim: bfin: expand CB_SYS_xxx commentMike Frysinger2015-06-121-1/+3
* sim: trace: add common macros for logging infoMike Frysinger2015-06-121-2/+2
* Update year range in copyright notice of all files owned by the GDB project.Joel Brobecker2015-01-011-1/+1
* Update Copyright year range in all files maintained by GDB.Joel Brobecker2014-01-011-1/+1
* Update years in copyright notice for the GDB files.Joel Brobecker2013-01-011-1/+1
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