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authorPeter Bergner <bergner@vnet.ibm.com>2009-10-02 14:42:42 +0000
committerPeter Bergner <bergner@vnet.ibm.com>2009-10-02 14:42:42 +0000
commit14f34612912a0e0c7540e1bdcc738a8f186b23a6 (patch)
tree080df80a325e7e7d61287919792ac607fdcc94e9
parent5492eeb9eb002e0b9bbd764463b2ac862d6704a9 (diff)
downloadbinutils-redhat-14f34612912a0e0c7540e1bdcc738a8f186b23a6.tar.gz
gas/
* config/tc-ppc.c (md_show_usage): Document -m476. * doc/c-ppc.texi (PowerPC-Opts): Document -m476. gas/testsuite/ * gas/ppc/476.s: New test. * gas/ppc/476.d: Likewise. * gas/ppc/ppc.exp: Run the 476 test. include/opcode/ * ppc.h (PPC_OPCODE_476): Define. opcodes/ * ppc-dis.c (ppc_opts): Add "476" entry. * ppc-opc.c (PPC476): Define. (powerpc_opcodes): Update mnemonics where required for 476.
Diffstat
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-ppc.c1
-rw-r--r--gas/doc/c-ppc.texi3
-rw-r--r--gas/testsuite/ChangeLog6
-rw-r--r--gas/testsuite/gas/ppc/476.d492
-rw-r--r--gas/testsuite/gas/ppc/476.s485
-rw-r--r--gas/testsuite/gas/ppc/ppc.exp1
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/ppc.h3
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/ppc-dis.c4
-rw-r--r--opcodes/ppc-opc.c177
12 files changed, 1103 insertions, 84 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index b1ad1003e1..86b8224c82 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2009-10-02 Peter Bergner <bergner@vnet.ibm.com>
+
+ * config/tc-ppc.c (md_show_usage): Document -m476.
+ * doc/c-ppc.texi (PowerPC-Opts): Document -m476.
+
2009-10-02 Jakub Jelinek <jakub@redhat.com>
* dw2gencfi.c: Include dwarf2dbg.h.
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 79d01018f8..493bfe5546 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -1188,6 +1188,7 @@ PowerPC options:\n\
-m405 generate code for PowerPC 405\n\
-m440 generate code for PowerPC 440\n\
-m464 generate code for PowerPC 464\n\
+-m476 generate code for PowerPC 476\n\
-m7400, -m7410, -m7450, -m7455\n\
generate code for PowerPC 7400/7410/7450/7455\n\
-m750cl generate code for PowerPC 750cl\n"));
diff --git a/gas/doc/c-ppc.texi b/gas/doc/c-ppc.texi
index 9e7972cc7e..cab461b85e 100644
--- a/gas/doc/c-ppc.texi
+++ b/gas/doc/c-ppc.texi
@@ -52,6 +52,9 @@ Generate code for PowerPC 403/405.
@item -m440
Generate code for PowerPC 440. BookE and some 405 instructions.
+@item -m476
+Generate code for PowerPC 476.
+
@item -m7400, -m7410, -m7450, -m7455
Generate code for PowerPC 7400/7410/7450/7455.
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 81f3f35151..dc46b35ca3 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2009-10-02 Peter Bergner <bergner@vnet.ibm.com>
+
+ * gas/ppc/476.s: New test.
+ * gas/ppc/476.d: Likewise.
+ * gas/ppc/ppc.exp: Run the 476 test.
+
2009-10-01 Peter Bergner <bergner@vnet.ibm.com>
* gas/ppc/a2.d: Rename "ppca2" to "a2".
diff --git a/gas/testsuite/gas/ppc/476.d b/gas/testsuite/gas/ppc/476.d
new file mode 100644
index 0000000000..ff4316cf59
--- /dev/null
+++ b/gas/testsuite/gas/ppc/476.d
@@ -0,0 +1,492 @@
+#objdump: -d -M476
+#as: -a32 -m476
+#name: PowerPC 476 instructions
+
+.*: +file format elf32-powerpc.*
+
+Disassembly of section \.text:
+
+0+00 <ppc476>:
+ 0: 7c 64 2a 14 add r3,r4,r5
+ 4: 7c 64 2a 15 add\. r3,r4,r5
+ 8: 7c 64 28 14 addc r3,r4,r5
+ c: 7c 64 28 15 addc\. r3,r4,r5
+ 10: 7c 64 2c 14 addco r3,r4,r5
+ 14: 7c 64 2c 15 addco\. r3,r4,r5
+ 18: 7c 64 29 14 adde r3,r4,r5
+ 1c: 7c 64 29 15 adde\. r3,r4,r5
+ 20: 7c 64 2d 14 addeo r3,r4,r5
+ 24: 7c 64 2d 15 addeo\. r3,r4,r5
+ 28: 38 64 ff 80 addi r3,r4,-128
+ 2c: 30 64 ff 80 addic r3,r4,-128
+ 30: 34 64 ff 80 addic\. r3,r4,-128
+ 34: 3c 64 ff 80 addis r3,r4,-128
+ 38: 7c 64 01 d4 addme r3,r4
+ 3c: 7c 64 01 d5 addme\. r3,r4
+ 40: 7c 64 05 d4 addmeo r3,r4
+ 44: 7c 64 05 d5 addmeo\. r3,r4
+ 48: 7c 64 2e 14 addo r3,r4,r5
+ 4c: 7c 64 2e 15 addo\. r3,r4,r5
+ 50: 7c 64 01 94 addze r3,r4
+ 54: 7c 64 01 95 addze\. r3,r4
+ 58: 7c 64 05 94 addzeo r3,r4
+ 5c: 7c 64 05 95 addzeo\. r3,r4
+ 60: 7c 83 28 38 and r3,r4,r5
+ 64: 7c 83 28 39 and\. r3,r4,r5
+ 68: 7d cd 78 78 andc r13,r14,r15
+ 6c: 7e 30 90 79 andc\. r16,r17,r18
+ 70: 70 83 de ad andi\. r3,r4,57005
+ 74: 74 83 de ad andis\. r3,r4,57005
+ 78: 48 00 00 02 ba 0 <ppc476>
+ 7c: 40 01 00 00 bdnzf gt,7c <ppc476\+0x7c>
+ 80: 40 85 00 02 blea cr1,0 <ppc476>
+ 84: 4d 80 04 20 bltctr
+ 88: 4c 8a 04 20 bnectr cr2
+ 8c: 4c 86 04 20 bnectr cr1
+ 90: 4c 86 04 20 bnectr cr1
+ 94: 4d 80 04 21 bltctrl
+ 98: 4c 8a 04 21 bnectrl cr2
+ 9c: 4c 86 04 21 bnectrl cr1
+ a0: 4c 86 04 21 bnectrl cr1
+ a4: 40 43 00 01 bdzfl so,a4 <ppc476\+0xa4>
+ a8: 4d 80 00 20 bltlr
+ ac: 4c 8a 00 20 bnelr cr2
+ b0: 4c 86 00 20 bnelr cr1
+ b4: 4c 86 00 20 bnelr cr1
+ b8: 4d 80 00 21 bltlrl
+ bc: 4c 8a 00 21 bnelrl cr2
+ c0: 4c 86 00 21 bnelrl cr1
+ c4: 4c 86 00 21 bnelrl cr1
+ c8: 48 00 00 00 b c8 <ppc476\+0xc8>
+ cc: 48 00 00 01 bl cc <ppc476\+0xcc>
+ d0: 54 83 00 36 rlwinm r3,r4,0,0,27
+ d4: 7c 03 20 00 cmpw r3,r4
+ d8: 7f 83 20 00 cmpw cr7,r3,r4
+ dc: 7c 83 2b f8 cmpb r3,r4,r5
+ e0: 7c 83 2b f8 cmpb r3,r4,r5
+ e4: 2c 03 ff 59 cmpwi r3,-167
+ e8: 2f 83 ff 59 cmpwi cr7,r3,-167
+ ec: 7c 03 20 40 cmplw r3,r4
+ f0: 7f 83 20 40 cmplw cr7,r3,r4
+ f4: 28 03 00 a7 cmplwi r3,167
+ f8: 2b 83 00 a7 cmplwi cr7,r3,167
+ fc: 7c 03 20 40 cmplw r3,r4
+ 100: 28 03 00 a7 cmplwi r3,167
+ 104: 7c 03 20 00 cmpw r3,r4
+ 108: 2c 03 ff 59 cmpwi r3,-167
+ 10c: 7d 6a 00 34 cntlzw r10,r11
+ 110: 7d 6a 00 35 cntlzw\. r10,r11
+ 114: 4c 85 32 02 crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq
+ 118: 4c 64 29 02 crandc so,4\*cr1\+lt,4\*cr1\+gt
+ 11c: 4c e0 0a 42 creqv 4\*cr1\+so,lt,gt
+ 120: 4c 22 19 c2 crnand gt,eq,so
+ 124: 4c 01 10 42 crnor lt,gt,eq
+ 128: 4c a6 3b 82 cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so
+ 12c: 4c 43 23 42 crorc eq,so,4\*cr1\+lt
+ 130: 4c c7 01 82 crxor 4\*cr1\+eq,4\*cr1\+so,lt
+ 134: 7c 09 55 ec dcba r9,r10
+ 138: 7c 06 38 ac dcbf r6,r7
+ 13c: 7c 06 38 ac dcbf r6,r7
+ 140: 7c 06 3b ac dcbi r6,r7
+ 144: 7c 85 33 0c dcblc 4,r5,r6
+ 148: 7c 06 38 6c dcbst r6,r7
+ 14c: 7c c0 2a 2c dcbt r0,r5,6
+ 150: 7c 05 32 2c dcbt r5,r6
+ 154: 7c c8 2a 2c dcbt r8,r5,6
+ 158: 7c e8 49 4c dcbtls 7,r8,r9
+ 15c: 7c e0 31 ec dcbtst r0,r6,7
+ 160: 7c 06 39 ec dcbtst r6,r7
+ 164: 7c e9 31 ec dcbtst r9,r6,7
+ 168: 7d 4b 61 0c dcbtstls 10,r11,r12
+ 16c: 7c 01 17 ec dcbz r1,r2
+ 170: 7c 05 37 ec dcbz r5,r6
+ 174: 7d 4b 63 d6 divw r10,r11,r12
+ 178: 7d 6c 6b d7 divw\. r11,r12,r13
+ 17c: 7d 4b 67 d6 divwo r10,r11,r12
+ 180: 7d 6c 6f d7 divwo\. r11,r12,r13
+ 184: 7d 4b 63 96 divwu r10,r11,r12
+ 188: 7d 6c 6b 97 divwu\. r11,r12,r13
+ 18c: 7d 4b 67 96 divwuo r10,r11,r12
+ 190: 7d 6c 6f 97 divwuo\. r11,r12,r13
+ 194: 7c 83 28 9c dlmzb r3,r4,r5
+ 198: 7c 83 28 9d dlmzb\. r3,r4,r5
+ 19c: 7d 6a 62 38 eqv r10,r11,r12
+ 1a0: 7d 6a 62 39 eqv\. r10,r11,r12
+ 1a4: 54 83 20 26 rlwinm r3,r4,4,0,19
+ 1a8: 7c 83 07 74 extsb r3,r4
+ 1ac: 7c 83 07 75 extsb\. r3,r4
+ 1b0: 7c 83 07 34 extsh r3,r4
+ 1b4: 7c 83 07 35 extsh\. r3,r4
+ 1b8: fe a0 fa 10 fabs f21,f31
+ 1bc: fe a0 fa 11 fabs\. f21,f31
+ 1c0: fd 4b 60 2a fadd f10,f11,f12
+ 1c4: fd 4b 60 2b fadd\. f10,f11,f12
+ 1c8: ed 4b 60 2a fadds f10,f11,f12
+ 1cc: ed 4b 60 2b fadds\. f10,f11,f12
+ 1d0: fd 40 5e 9c fcfid f10,f11
+ 1d4: fd 40 5e 9d fcfid\. f10,f11
+ 1d8: fd 8a 58 40 fcmpo cr3,f10,f11
+ 1dc: fd 84 28 00 fcmpu cr3,f4,f5
+ 1e0: fd 4b 60 10 fcpsgn f10,f11,f12
+ 1e4: fd 4b 60 11 fcpsgn\. f10,f11,f12
+ 1e8: fd 40 5e 5c fctid f10,f11
+ 1ec: fd 40 5e 5d fctid\. f10,f11
+ 1f0: fd 40 5e 5e fctidz f10,f11
+ 1f4: fd 40 5e 5f fctidz\. f10,f11
+ 1f8: fd 40 58 1c fctiw f10,f11
+ 1fc: fd 40 58 1d fctiw\. f10,f11
+ 200: fd 40 58 1e fctiwz f10,f11
+ 204: fd 40 58 1f fctiwz\. f10,f11
+ 208: fd 4b 60 24 fdiv f10,f11,f12
+ 20c: fd 4b 60 25 fdiv\. f10,f11,f12
+ 210: ed 4b 60 24 fdivs f10,f11,f12
+ 214: ed 4b 60 25 fdivs\. f10,f11,f12
+ 218: fd 4b 6b 3a fmadd f10,f11,f12,f13
+ 21c: fd 4b 6b 3b fmadd\. f10,f11,f12,f13
+ 220: ed 4b 6b 3a fmadds f10,f11,f12,f13
+ 224: ed 4b 6b 3b fmadds\. f10,f11,f12,f13
+ 228: fc 60 20 90 fmr f3,f4
+ 22c: fc 60 20 91 fmr\. f3,f4
+ 230: fd 4b 6b 38 fmsub f10,f11,f12,f13
+ 234: fd 4b 6b 39 fmsub\. f10,f11,f12,f13
+ 238: ed 4b 6b 38 fmsubs f10,f11,f12,f13
+ 23c: ed 4b 6b 39 fmsubs\. f10,f11,f12,f13
+ 240: fd 4b 03 32 fmul f10,f11,f12
+ 244: fd 4b 03 33 fmul\. f10,f11,f12
+ 248: ed 4b 03 32 fmuls f10,f11,f12
+ 24c: ed 4b 03 33 fmuls\. f10,f11,f12
+ 250: fe 80 f1 10 fnabs f20,f30
+ 254: fe 80 f1 11 fnabs\. f20,f30
+ 258: fc 60 20 50 fneg f3,f4
+ 25c: fc 60 20 51 fneg\. f3,f4
+ 260: fd 4b 6b 3e fnmadd f10,f11,f12,f13
+ 264: fd 4b 6b 3f fnmadd\. f10,f11,f12,f13
+ 268: ed 4b 6b 3e fnmadds f10,f11,f12,f13
+ 26c: ed 4b 6b 3f fnmadds\. f10,f11,f12,f13
+ 270: fd 4b 6b 3c fnmsub f10,f11,f12,f13
+ 274: fd 4b 6b 3d fnmsub\. f10,f11,f12,f13
+ 278: ed 4b 6b 3c fnmsubs f10,f11,f12,f13
+ 27c: ed 4b 6b 3d fnmsubs\. f10,f11,f12,f13
+ 280: fd c0 78 30 fre f14,f15
+ 284: fd c0 78 31 fre\. f14,f15
+ 288: ed c0 78 30 fres f14,f15
+ 28c: ed c0 78 31 fres\. f14,f15
+ 290: fd 40 5b d0 frim f10,f11
+ 294: fd 40 5b d1 frim\. f10,f11
+ 298: fd 40 5b 10 frin f10,f11
+ 29c: fd 40 5b 11 frin\. f10,f11
+ 2a0: fd 40 5b 90 frip f10,f11
+ 2a4: fd 40 5b 91 frip\. f10,f11
+ 2a8: fd 40 5b 50 friz f10,f11
+ 2ac: fd 40 5b 51 friz\. f10,f11
+ 2b0: fc c0 38 18 frsp f6,f7
+ 2b4: fd 00 48 19 frsp\. f8,f9
+ 2b8: fd c0 78 34 frsqrte f14,f15
+ 2bc: fd c0 78 35 frsqrte\. f14,f15
+ 2c0: ed c0 78 34 frsqrtes f14,f15
+ 2c4: ed c0 78 35 frsqrtes\. f14,f15
+ 2c8: fd 4b 6b 2e fsel f10,f11,f12,f13
+ 2cc: fd 4b 6b 2f fsel\. f10,f11,f12,f13
+ 2d0: fd 40 58 2c fsqrt f10,f11
+ 2d4: fd 40 58 2d fsqrt\. f10,f11
+ 2d8: ed 40 58 2c fsqrts f10,f11
+ 2dc: ed 40 58 2d fsqrts\. f10,f11
+ 2e0: fd 4b 60 28 fsub f10,f11,f12
+ 2e4: fd 4b 60 29 fsub\. f10,f11,f12
+ 2e8: ed 4b 60 28 fsubs f10,f11,f12
+ 2ec: ed 4b 60 29 fsubs\. f10,f11,f12
+ 2f0: 7c 03 27 ac icbi r3,r4
+ 2f4: 7e 11 91 cc icblc 16,r17,r18
+ 2f8: 7c a8 48 2c icbt 5,r8,r9
+ 2fc: 7d ae 7b cc icbtls 13,r14,r15
+ 300: 7c 00 07 8c ici
+ 304: 7c 00 07 8c ici
+ 308: 7c 20 07 8c ici 1
+ 30c: 7c 03 27 cc icread r3,r4
+ 310: 50 83 65 36 rlwimi r3,r4,12,20,27
+ 314: 7c 43 27 1e isel r2,r3,r4,28
+ 318: 4c 00 01 2c isync
+ 31c: 89 21 00 00 lbz r9,0\(r1\)
+ 320: 8d 41 00 01 lbzu r10,1\(r1\)
+ 324: 7e 95 b0 ee lbzux r20,r21,r22
+ 328: 7c 64 28 ae lbzx r3,r4,r5
+ 32c: ca a1 00 08 lfd f21,8\(r1\)
+ 330: ce c1 00 10 lfdu f22,16\(r1\)
+ 334: 7e 95 b4 ee lfdux f20,r21,r22
+ 338: 7d ae 7c ae lfdx f13,r14,r15
+ 33c: 7d 43 26 ae lfiwax f10,r3,r4
+ 340: c2 61 00 00 lfs f19,0\(r1\)
+ 344: c6 81 00 04 lfsu f20,4\(r1\)
+ 348: 7d 4b 64 6e lfsux f10,r11,r12
+ 34c: 7d 4b 64 2e lfsx f10,r11,r12
+ 350: a9 e1 00 06 lha r15,6\(r1\)
+ 354: ae 01 00 08 lhau r16,8\(r1\)
+ 358: 7d 2a 5a ee lhaux r9,r10,r11
+ 35c: 7d 2a 5a ae lhax r9,r10,r11
+ 360: 7c 64 2e 2c lhbrx r3,r4,r5
+ 364: a1 a1 00 00 lhz r13,0\(r1\)
+ 368: a5 c1 00 02 lhzu r14,2\(r1\)
+ 36c: 7e 96 c2 6e lhzux r20,r22,r24
+ 370: 7e f8 ca 2e lhzx r23,r24,r25
+ 374: b8 61 ff f0 lmw r3,-16\(r1\)
+ 378: 7c 64 84 aa lswi r3,r4,16
+ 37c: 7c 64 2c 2a lswx r3,r4,r5
+ 380: 7c 64 28 28 lwarx r3,r4,r5
+ 384: 7c 64 28 28 lwarx r3,r4,r5
+ 388: 7c 64 28 29 lwarx r3,r4,r5,1
+ 38c: 7c 64 2c 2c lwbrx r3,r4,r5
+ 390: 80 c7 00 00 lwz r6,0\(r7\)
+ 394: 84 61 00 10 lwzu r3,16\(r1\)
+ 398: 7c 64 28 6e lwzux r3,r4,r5
+ 39c: 7c 64 28 2e lwzx r3,r4,r5
+ 3a0: 10 64 29 58 macchw r3,r4,r5
+ 3a4: 10 64 29 59 macchw\. r3,r4,r5
+ 3a8: 10 64 2d 58 macchwo r3,r4,r5
+ 3ac: 10 64 2d 59 macchwo\. r3,r4,r5
+ 3b0: 10 64 29 d8 macchws r3,r4,r5
+ 3b4: 10 64 29 d9 macchws\. r3,r4,r5
+ 3b8: 10 64 2d d8 macchwso r3,r4,r5
+ 3bc: 10 64 2d d9 macchwso\. r3,r4,r5
+ 3c0: 10 64 29 98 macchwsu r3,r4,r5
+ 3c4: 10 64 29 99 macchwsu\. r3,r4,r5
+ 3c8: 10 64 2d 98 macchwsuo r3,r4,r5
+ 3cc: 10 64 2d 99 macchwsuo\. r3,r4,r5
+ 3d0: 10 64 29 18 macchwu r3,r4,r5
+ 3d4: 10 64 29 19 macchwu\. r3,r4,r5
+ 3d8: 10 64 2d 18 macchwuo r3,r4,r5
+ 3dc: 10 64 2d 19 macchwuo\. r3,r4,r5
+ 3e0: 10 64 28 58 machhw r3,r4,r5
+ 3e4: 10 64 28 59 machhw\. r3,r4,r5
+ 3e8: 10 64 2c 58 machhwo r3,r4,r5
+ 3ec: 10 64 2c 59 machhwo\. r3,r4,r5
+ 3f0: 10 64 28 d8 machhws r3,r4,r5
+ 3f4: 10 64 28 d9 machhws\. r3,r4,r5
+ 3f8: 10 64 2c d8 machhwso r3,r4,r5
+ 3fc: 10 64 2c d9 machhwso\. r3,r4,r5
+ 400: 10 64 28 98 machhwsu r3,r4,r5
+ 404: 10 64 28 99 machhwsu\. r3,r4,r5
+ 408: 10 64 2c 98 machhwsuo r3,r4,r5
+ 40c: 10 64 2c 99 machhwsuo\. r3,r4,r5
+ 410: 10 64 28 18 machhwu r3,r4,r5
+ 414: 10 64 28 19 machhwu\. r3,r4,r5
+ 418: 10 64 2c 18 machhwuo r3,r4,r5
+ 41c: 10 64 2c 19 machhwuo\. r3,r4,r5
+ 420: 10 64 2b 58 maclhw r3,r4,r5
+ 424: 10 64 2b 59 maclhw\. r3,r4,r5
+ 428: 10 64 2f 58 maclhwo r3,r4,r5
+ 42c: 10 64 2f 59 maclhwo\. r3,r4,r5
+ 430: 10 64 2b d8 maclhws r3,r4,r5
+ 434: 10 64 2b d9 maclhws\. r3,r4,r5
+ 438: 10 64 2f d8 maclhwso r3,r4,r5
+ 43c: 10 64 2f d9 maclhwso\. r3,r4,r5
+ 440: 10 64 2b 98 maclhwsu r3,r4,r5
+ 444: 10 64 2b 99 maclhwsu\. r3,r4,r5
+ 448: 10 64 2f 98 maclhwsuo r3,r4,r5
+ 44c: 10 64 2f 99 maclhwsuo\. r3,r4,r5
+ 450: 10 64 2b 18 maclhwu r3,r4,r5
+ 454: 10 64 2b 19 maclhwu\. r3,r4,r5
+ 458: 10 64 2f 18 maclhwuo r3,r4,r5
+ 45c: 10 64 2f 19 maclhwuo\. r3,r4,r5
+ 460: 7c 00 06 ac mbar
+ 464: 7c 00 06 ac mbar
+ 468: 7c 20 06 ac mbar 1
+ 46c: 4c 04 00 00 mcrf cr0,cr1
+ 470: fd 90 00 80 mcrfs cr3,cr4
+ 474: 7d 80 04 00 mcrxr cr3
+ 478: 7c 60 00 26 mfcr r3
+ 47c: 7c 60 00 26 mfcr r3
+ 480: 7c aa 3a 86 mfdcr r5,234
+ 484: 7c 64 02 46 mfdcrux r3,r4
+ 488: 7c 85 02 06 mfdcrx r4,r5
+ 48c: ff c0 04 8e mffs f30
+ 490: ff e0 04 8f mffs\. f31
+ 494: 7e 60 00 a6 mfmsr r19
+ 498: 7c 78 00 26 mfocrf r3,128
+ 49c: 7c 60 22 a6 mfspr r3,128
+ 4a0: 7c 6c 42 e6 mftbl r3
+ 4a4: 7c 00 04 ac msync
+ 4a8: 7c 78 01 20 mtocrf 128,r3
+ 4ac: 7c 6f f1 20 mtcr r3
+ 4b0: 7d 10 6b 86 mtdcr 432,r8
+ 4b4: 7c 83 03 46 mtdcrux r3,r4
+ 4b8: 7c e6 03 06 mtdcrx r6,r7
+ 4bc: fc 60 00 8c mtfsb0 so
+ 4c0: fc 60 00 8d mtfsb0\. so
+ 4c4: fc 60 00 4c mtfsb1 so
+ 4c8: fc 60 00 4d mtfsb1\. so
+ 4cc: fc 0c 55 8e mtfsf 6,f10
+ 4d0: fc 0c 55 8e mtfsf 6,f10
+ 4d4: fc 0d 55 8e mtfsf 6,f10,0,1
+ 4d8: fe 0c 55 8e mtfsf 6,f10,1,0
+ 4dc: fc 0c 5d 8f mtfsf\. 6,f11
+ 4e0: fc 0c 5d 8f mtfsf\. 6,f11
+ 4e4: fc 0d 5d 8f mtfsf\. 6,f11,0,1
+ 4e8: fe 0c 5d 8f mtfsf\. 6,f11,1,0
+ 4ec: ff 00 01 0c mtfsfi 6,0
+ 4f0: ff 00 01 0c mtfsfi 6,0
+ 4f4: ff 00 01 0c mtfsfi 6,0
+ 4f8: ff 01 01 0c mtfsfi 6,0,1
+ 4fc: ff 00 f1 0d mtfsfi\. 6,15
+ 500: ff 00 f1 0d mtfsfi\. 6,15
+ 504: ff 00 f1 0d mtfsfi\. 6,15
+ 508: ff 01 f1 0d mtfsfi\. 6,15,1
+ 50c: 7d 40 01 24 mtmsr r10
+ 510: 7c 78 01 20 mtocrf 128,r3
+ 514: 7c 60 23 a6 mtspr 128,r3
+ 518: 10 64 29 50 mulchw r3,r4,r5
+ 51c: 10 64 29 51 mulchw\. r3,r4,r5
+ 520: 10 64 29 10 mulchwu r3,r4,r5
+ 524: 10 64 29 11 mulchwu\. r3,r4,r5
+ 528: 10 64 28 50 mulhhw r3,r4,r5
+ 52c: 10 64 28 51 mulhhw\. r3,r4,r5
+ 530: 10 64 28 10 mulhhwu r3,r4,r5
+ 534: 10 64 28 11 mulhhwu\. r3,r4,r5
+ 538: 7c 64 28 96 mulhw r3,r4,r5
+ 53c: 7c 64 28 97 mulhw\. r3,r4,r5
+ 540: 7c 64 28 16 mulhwu r3,r4,r5
+ 544: 7c 64 28 17 mulhwu\. r3,r4,r5
+ 548: 10 64 2b 50 mullhw r3,r4,r5
+ 54c: 10 64 2b 51 mullhw\. r3,r4,r5
+ 550: 10 64 2b 10 mullhwu r3,r4,r5
+ 554: 10 64 2b 11 mullhwu\. r3,r4,r5
+ 558: 1c 64 00 05 mulli r3,r4,5
+ 55c: 7c 64 29 d6 mullw r3,r4,r5
+ 560: 7c 64 29 d7 mullw\. r3,r4,r5
+ 564: 7c 64 2d d6 mullwo r3,r4,r5
+ 568: 7c 64 2d d7 mullwo\. r3,r4,r5
+ 56c: 7f bc f3 b8 nand r28,r29,r30
+ 570: 7f bc f3 b9 nand\. r28,r29,r30
+ 574: 7c 64 00 d0 neg r3,r4
+ 578: 7c 64 00 d1 neg\. r3,r4
+ 57c: 7e 11 04 d0 nego r16,r17
+ 580: 7e 53 04 d1 nego\. r18,r19
+ 584: 10 64 29 5c nmacchw r3,r4,r5
+ 588: 10 64 29 5d nmacchw\. r3,r4,r5
+ 58c: 10 64 2d 5c nmacchwo r3,r4,r5
+ 590: 10 64 2d 5d nmacchwo\. r3,r4,r5
+ 594: 10 64 29 dc nmacchws r3,r4,r5
+ 598: 10 64 29 dd nmacchws\. r3,r4,r5
+ 59c: 10 64 2d dc nmacchwso r3,r4,r5
+ 5a0: 10 64 2d dd nmacchwso\. r3,r4,r5
+ 5a4: 10 64 28 5c nmachhw r3,r4,r5
+ 5a8: 10 64 28 5d nmachhw\. r3,r4,r5
+ 5ac: 10 64 2c 5c nmachhwo r3,r4,r5
+ 5b0: 10 64 2c 5d nmachhwo\. r3,r4,r5
+ 5b4: 10 64 28 dc nmachhws r3,r4,r5
+ 5b8: 10 64 28 dd nmachhws\. r3,r4,r5
+ 5bc: 10 64 2c dc nmachhwso r3,r4,r5
+ 5c0: 10 64 2c dd nmachhwso\. r3,r4,r5
+ 5c4: 10 64 2b 5c nmaclhw r3,r4,r5
+ 5c8: 10 64 2b 5d nmaclhw\. r3,r4,r5
+ 5cc: 10 64 2f 5c nmaclhwo r3,r4,r5
+ 5d0: 10 64 2f 5d nmaclhwo\. r3,r4,r5
+ 5d4: 10 64 2b dc nmaclhws r3,r4,r5
+ 5d8: 10 64 2b dd nmaclhws\. r3,r4,r5
+ 5dc: 10 64 2f dc nmaclhwso r3,r4,r5
+ 5e0: 10 64 2f dd nmaclhwso\. r3,r4,r5
+ 5e4: 7e b4 b0 f8 nor r20,r21,r22
+ 5e8: 7e b4 b0 f9 nor\. r20,r21,r22
+ 5ec: 7c 40 23 78 or r0,r2,r4
+ 5f0: 7d cc 83 79 or\. r12,r14,r16
+ 5f4: 7e 0f 8b 38 orc r15,r16,r17
+ 5f8: 7e 72 a3 39 orc\. r18,r19,r20
+ 5fc: 60 21 00 00 ori r1,r1,0
+ 600: 64 83 de ad oris r3,r4,57005
+ 604: 7c 83 00 f4 popcntb r3,r4
+ 608: 7c 83 01 34 prtyw r3,r4
+ 60c: 4c 00 00 66 rfci
+ 610: 4c 00 00 64 rfi
+ 614: 4c 00 00 4c rfmci
+ 618: 50 83 65 36 rlwimi r3,r4,12,20,27
+ 61c: 50 83 65 37 rlwimi\. r3,r4,12,20,27
+ 620: 54 83 00 36 rlwinm r3,r4,0,0,27
+ 624: 54 83 d1 be rlwinm r3,r4,26,6,31
+ 628: 54 83 20 26 rlwinm r3,r4,4,0,19
+ 62c: 54 83 00 37 rlwinm\. r3,r4,0,0,27
+ 630: 5c 83 28 3e rotlw r3,r4,r5
+ 634: 5c 83 28 3f rotlw\. r3,r4,r5
+ 638: 5c 83 28 3e rotlw r3,r4,r5
+ 63c: 5c 83 28 3f rotlw\. r3,r4,r5
+ 640: 44 00 00 02 sc
+ 644: 7c 83 28 30 slw r3,r4,r5
+ 648: 7c 83 28 31 slw\. r3,r4,r5
+ 64c: 7c 83 2e 30 sraw r3,r4,r5
+ 650: 7c 83 2e 31 sraw\. r3,r4,r5
+ 654: 7c 83 86 70 srawi r3,r4,16
+ 658: 7c 83 86 71 srawi\. r3,r4,16
+ 65c: 7c 83 2c 30 srw r3,r4,r5
+ 660: 7c 83 2c 31 srw\. r3,r4,r5
+ 664: 54 83 d1 be rlwinm r3,r4,26,6,31
+ 668: 99 61 00 02 stb r11,2\(r1\)
+ 66c: 9d 81 00 03 stbu r12,3\(r1\)
+ 670: 7d ae 79 ee stbux r13,r14,r15
+ 674: 7c 64 29 ae stbx r3,r4,r5
+ 678: db 21 00 20 stfd f25,32\(r1\)
+ 67c: df 41 00 28 stfdu f26,40\(r1\)
+ 680: 7c 01 15 ee stfdux f0,r1,r2
+ 684: 7f be fd ae stfdx f29,r30,r31
+ 688: 7d 43 27 ae stfiwx f10,r3,r4
+ 68c: d2 e1 00 14 stfs f23,20\(r1\)
+ 690: d7 01 00 18 stfsu f24,24\(r1\)
+ 694: 7f 5b e5 6e stfsux f26,r27,r28
+ 698: 7e f8 cd 2e stfsx f23,r24,r25
+ 69c: b2 21 00 0a sth r17,10\(r1\)
+ 6a0: 7c c7 47 2c sthbrx r6,r7,r8
+ 6a4: b6 41 00 0c sthu r18,12\(r1\)
+ 6a8: 7e b6 bb 6e sthux r21,r22,r23
+ 6ac: 7d 8d 73 2e sthx r12,r13,r14
+ 6b0: bc c1 ff f0 stmw r6,-16\(r1\)
+ 6b4: 7c 64 85 aa stswi r3,r4,16
+ 6b8: 7c 64 2d 2a stswx r3,r4,r5
+ 6bc: 90 c7 ff f0 stw r6,-16\(r7\)
+ 6c0: 7c 64 2d 2c stwbrx r3,r4,r5
+ 6c4: 7c 64 29 2d stwcx\. r3,r4,r5
+ 6c8: 94 61 00 10 stwu r3,16\(r1\)
+ 6cc: 7c 64 29 6e stwux r3,r4,r5
+ 6d0: 7c 64 29 2e stwx r3,r4,r5
+ 6d4: 7c 64 28 50 subf r3,r4,r5
+ 6d8: 7c 64 28 51 subf\. r3,r4,r5
+ 6dc: 7c 64 28 10 subfc r3,r4,r5
+ 6e0: 7c 64 28 11 subfc\. r3,r4,r5
+ 6e4: 7c 64 2c 10 subfco r3,r4,r5
+ 6e8: 7c 64 2c 11 subfco\. r3,r4,r5
+ 6ec: 7c 64 29 10 subfe r3,r4,r5
+ 6f0: 7c 64 29 11 subfe\. r3,r4,r5
+ 6f4: 7c 64 2d 10 subfeo r3,r4,r5
+ 6f8: 7c 64 2d 11 subfeo\. r3,r4,r5
+ 6fc: 20 64 00 05 subfic r3,r4,5
+ 700: 7c 64 01 d0 subfme r3,r4
+ 704: 7c 64 01 d1 subfme\. r3,r4
+ 708: 7c 64 05 d0 subfmeo r3,r4
+ 70c: 7c 64 05 d1 subfmeo\. r3,r4
+ 710: 7c 64 2c 50 subfo r3,r4,r5
+ 714: 7c 64 2c 51 subfo\. r3,r4,r5
+ 718: 7c 64 01 90 subfze r3,r4
+ 71c: 7c 64 01 91 subfze\. r3,r4
+ 720: 7c 64 05 90 subfzeo r3,r4
+ 724: 7c 64 05 91 subfzeo\. r3,r4
+ 728: 7c 07 46 24 tlbivax r7,r8
+ 72c: 7c 22 3f 64 tlbre r1,r2,7
+ 730: 7c 0b 67 24 tlbsx r11,r12
+ 734: 7d 8d 77 24 tlbsx r12,r13,r14
+ 738: 7d 8d 77 25 tlbsx\. r12,r13,r14
+ 73c: 7c 00 04 6c tlbsync
+ 740: 7c 00 07 a4 tlbwe
+ 744: 7c 00 07 a4 tlbwe
+ 748: 7c 21 0f a4 tlbwe r1,r1,1
+ 74c: 7f e0 00 08 trap
+ 750: 7f e0 00 08 trap
+ 754: 7c 83 20 08 tweq r3,r4
+ 758: 7c a3 20 08 twlge r3,r4
+ 75c: 7c 83 20 08 tweq r3,r4
+ 760: 0d 03 00 0f twgti r3,15
+ 764: 0c c3 00 0f twllei r3,15
+ 768: 0d 03 00 0f twgti r3,15
+ 76c: 7c a3 20 08 twlge r3,r4
+ 770: 0c c3 00 0f twllei r3,15
+ 774: 7c 60 01 06 wrtee r3
+ 778: 7c 00 81 46 wrteei 1
+ 77c: 7f dd fa 78 xor r29,r30,r31
+ 780: 7f dd fa 79 xor\. r29,r30,r31
+ 784: 68 83 de ad xori r3,r4,57005
+ 788: 6c 83 de ad xoris r3,r4,57005
diff --git a/gas/testsuite/gas/ppc/476.s b/gas/testsuite/gas/ppc/476.s
new file mode 100644
index 0000000000..b1b427b174
--- /dev/null
+++ b/gas/testsuite/gas/ppc/476.s
@@ -0,0 +1,485 @@
+ .section ".text"
+ppc476:
+ add 3,4,5
+ add. 3,4,5
+ addc 3,4,5
+ addc. 3,4,5
+ addco 3,4,5
+ addco. 3,4,5
+ adde 3,4,5
+ adde. 3,4,5
+ addeo 3,4,5
+ addeo. 3,4,5
+ addi 3,4,-128
+ addic 3,4,-128
+ addic. 3,4,-128
+ addis 3,4,-128
+ addme 3,4
+ addme. 3,4
+ addmeo 3,4
+ addmeo. 3,4
+ addo 3,4,5
+ addo. 3,4,5
+ addze 3,4
+ addze. 3,4
+ addzeo 3,4
+ addzeo. 3,4
+ and 3,4,5
+ and. 3,4,5
+ andc 13,14,15
+ andc. 16,17,18
+ andi. 3,4,0xdead
+ andis. 3,4,0xdead
+ ba label_abs
+ bc 0,1,foo
+ bca 4,5,foo_abs
+ bcctr 12,0,0
+ bcctr 4,10,0
+ bcctr 4,6
+ bcctr 4,6,0
+ bcctrl 12,0,0
+ bcctrl 4,10,0
+ bcctrl 4,6
+ bcctrl 4,6,0
+ bcl 2,3,foo
+ bclr 12,0,0
+ bclr 4,10,0
+ bclr 4,6
+ bclr 4,6,0
+ bclrl 12,0,0
+ bclrl 4,10,0
+ bclrl 4,6
+ bclrl 4,6,0
+ b label
+ bl label
+ clrrwi 3,4,4
+ cmp 0,0,3,4
+ cmp 7,0,3,4
+ cmpb 3,4,5
+ cmpb 3,4,5
+ cmpi 0,0,3,-167
+ cmpi 7,0,3,-167
+ cmpl 0,0,3,4
+ cmpl 7,0,3,4
+ cmpli 0,0,3,167
+ cmpli 7,0,3,167
+ cmplw 3,4
+ cmplwi 3,167
+ cmpw 3,4
+ cmpwi 3,-167
+ cntlzw 10,11
+ cntlzw. 10,11
+ crand 4,5,6
+ crandc 3,4,5
+ creqv 7,0,1
+ crnand 1,2,3
+ crnor 0,1,2
+ cror 5,6,7
+ crorc 2,3,4
+ crxor 6,7,0
+ dcba 9, 10
+ dcbf 6,7
+ dcbf 6,7,0
+ dcbi 6,7
+ dcblc 4, 5, 6
+ dcbst 6,7
+ dcbt 0,5,6
+ dcbt 5,6
+ dcbt 8,5,6
+ dcbtls 7, 8, 9
+ dcbtst 0,6,7
+ dcbtst 6,7
+ dcbtst 9,6,7
+ dcbtstls 10, 11, 12
+ dcbz 1,2
+ dcbz 5,6
+ divw 10,11,12
+ divw. 11,12,13
+ divwo 10,11,12
+ divwo. 11,12,13
+ divwu 10,11,12
+ divwu. 11,12,13
+ divwuo 10,11,12
+ divwuo. 11,12,13
+ dlmzb 3,4,5
+ dlmzb. 3,4,5
+ eqv 10,11,12
+ eqv. 10,11,12
+ extlwi 3,4,20,4
+ extsb 3,4
+ extsb. 3,4
+ extsh 3,4
+ extsh. 3,4
+ fabs 21,31
+ fabs. 21,31
+ fadd 10,11,12
+ fadd. 10,11,12
+ fadds 10,11,12
+ fadds. 10,11,12
+ fcfid 10,11
+ fcfid. 10,11
+ fcmpo 3,10,11
+ fcmpu 3,4,5
+ fcpsgn 10,11,12
+ fcpsgn. 10,11,12
+ fctid 10,11
+ fctid. 10,11
+ fctidz 10,11
+ fctidz. 10,11
+ fctiw 10,11
+ fctiw. 10,11
+ fctiwz 10,11
+ fctiwz. 10,11
+ fdiv 10,11,12
+ fdiv. 10,11,12
+ fdivs 10,11,12
+ fdivs. 10,11,12
+ fmadd 10,11,12,13
+ fmadd. 10,11,12,13
+ fmadds 10,11,12,13
+ fmadds. 10,11,12,13
+ fmr 3,4
+ fmr. 3,4
+ fmsub 10,11,12,13
+ fmsub. 10,11,12,13
+ fmsubs 10,11,12,13
+ fmsubs. 10,11,12,13
+ fmul 10,11,12
+ fmul. 10,11,12
+ fmuls 10,11,12
+ fmuls. 10,11,12
+ fnabs 20,30
+ fnabs. 20,30
+ fneg 3,4
+ fneg. 3,4
+ fnmadd 10,11,12,13
+ fnmadd. 10,11,12,13
+ fnmadds 10,11,12,13
+ fnmadds. 10,11,12,13
+ fnmsub 10,11,12,13
+ fnmsub. 10,11,12,13
+ fnmsubs 10,11,12,13
+ fnmsubs. 10,11,12,13
+ fre 14,15
+ fre. 14,15
+ fres 14,15
+ fres. 14,15
+ frim 10,11
+ frim. 10,11
+ frin 10,11
+ frin. 10,11
+ frip 10,11
+ frip. 10,11
+ friz 10,11
+ friz. 10,11
+ frsp 6,7
+ frsp. 8,9
+ frsqrte 14,15
+ frsqrte. 14,15
+ frsqrtes 14,15
+ frsqrtes. 14,15
+ fsel 10,11,12,13
+ fsel. 10,11,12,13
+ fsqrt 10,11
+ fsqrt. 10,11
+ fsqrts 10,11
+ fsqrts. 10,11
+ fsub 10,11,12
+ fsub. 10,11,12
+ fsubs 10,11,12
+ fsubs. 10,11,12
+ icbi 3,4
+ icblc 16, 17, 18
+ icbt 5, 8, 9
+ icbtls 13, 14, 15
+ ici
+ ici 0
+ ici 1
+ icread 3,4
+ inslwi 3,4,8,20
+ isel 2,3,4,28
+ isync
+ lbz 9,0(1)
+ lbzu 10,1(1)
+ lbzux 20,21,22
+ lbzx 3,4,5
+ lfd 21,8(1)
+ lfdu 22,16(1)
+ lfdux 20,21,22
+ lfdx 13,14,15
+ lfiwax 10,3,4
+ lfs 19,0(1)
+ lfsu 20,4(1)
+ lfsux 10,11,12
+ lfsx 10,11,12
+ lha 15,6(1)
+ lhau 16,8(1)
+ lhaux 9,10,11
+ lhax 9,10,11
+ lhbrx 3,4,5
+ lhz 13,0(1)
+ lhzu 14,2(1)
+ lhzux 20,22,24
+ lhzx 23,24,25
+ lmw 3,-16(1)
+ lswi 3,4,16
+ lswx 3,4,5
+ lwarx 3,4,5
+ lwarx 3,4,5,0
+ lwarx 3,4,5,1
+ lwbrx 3,4,5
+ lwz 6,0(7)
+ lwzu 3,16(1)
+ lwzux 3,4,5
+ lwzx 3,4,5
+ macchw 3,4,5
+ macchw. 3,4,5
+ macchwo 3,4,5
+ macchwo. 3,4,5
+ macchws 3,4,5
+ macchws. 3,4,5
+ macchwso 3,4,5
+ macchwso. 3,4,5
+ macchwsu 3,4,5
+ macchwsu. 3,4,5
+ macchwsuo 3,4,5
+ macchwsuo. 3,4,5
+ macchwu 3,4,5
+ macchwu. 3,4,5
+ macchwuo 3,4,5
+ macchwuo. 3,4,5
+ machhw 3,4,5
+ machhw. 3,4,5
+ machhwo 3,4,5
+ machhwo. 3,4,5
+ machhws 3,4,5
+ machhws. 3,4,5
+ machhwso 3,4,5
+ machhwso. 3,4,5
+ machhwsu 3,4,5
+ machhwsu. 3,4,5
+ machhwsuo 3,4,5
+ machhwsuo. 3,4,5
+ machhwu 3,4,5
+ machhwu. 3,4,5
+ machhwuo 3,4,5
+ machhwuo. 3,4,5
+ maclhw 3,4,5
+ maclhw. 3,4,5
+ maclhwo 3,4,5
+ maclhwo. 3,4,5
+ maclhws 3,4,5
+ maclhws. 3,4,5
+ maclhwso 3,4,5
+ maclhwso. 3,4,5
+ maclhwsu 3,4,5
+ maclhwsu. 3,4,5
+ maclhwsuo 3,4,5
+ maclhwsuo. 3,4,5
+ maclhwu 3,4,5
+ maclhwu. 3,4,5
+ maclhwuo 3,4,5
+ maclhwuo. 3,4,5
+ mbar
+ mbar 0
+ mbar 1
+ mcrf 0,1
+ mcrfs 3,4
+ mcrxr 3
+ mfcr 3
+ mfcr 3
+ mfdcr 5, 234
+ mfdcrux 3,4
+ mfdcrx 4, 5
+ mffs 30
+ mffs. 31
+ mfmsr 19
+ mfocrf 3,0x80
+ mfspr 3,0x80
+ mftb 3
+ msync
+ mtcrf 0x80,3
+ mtcrf 0xff,3
+ mtdcr 432, 8
+ mtdcrux 3,4
+ mtdcrx 6, 7
+ mtfsb0 3
+ mtfsb0. 3
+ mtfsb1 3
+ mtfsb1. 3
+ mtfsf 6,10
+ mtfsf 6,10,0,0
+ mtfsf 6,10,0,1
+ mtfsf 6,10,1,0
+ mtfsf. 6,11
+ mtfsf. 6,11,0,0
+ mtfsf. 6,11,0,1
+ mtfsf. 6,11,1,0
+ mtfsfi 6,0
+ mtfsfi 6,0
+ mtfsfi 6,0,0
+ mtfsfi 6,0,1
+ mtfsfi. 6,15
+ mtfsfi. 6,15
+ mtfsfi. 6,15,0
+ mtfsfi. 6,15,1
+ mtmsr 10
+ mtocrf 0x80,3
+ mtspr 0x80,3
+ mulchw 3,4,5
+ mulchw. 3,4,5
+ mulchwu 3,4,5
+ mulchwu. 3,4,5
+ mulhhw 3,4,5
+ mulhhw. 3,4,5
+ mulhhwu 3,4,5
+ mulhhwu. 3,4,5
+ mulhw 3,4,5
+ mulhw. 3,4,5
+ mulhwu 3,4,5
+ mulhwu. 3,4,5
+ mullhw 3,4,5
+ mullhw. 3,4,5
+ mullhwu 3,4,5
+ mullhwu. 3,4,5
+ mulli 3,4,5
+ mullw 3,4,5
+ mullw. 3,4,5
+ mullwo 3,4,5
+ mullwo. 3,4,5
+ nand 28,29,30
+ nand. 28,29,30
+ neg 3,4
+ neg. 3,4
+ nego 16,17
+ nego. 18,19
+ nmacchw 3,4,5
+ nmacchw. 3,4,5
+ nmacchwo 3,4,5
+ nmacchwo. 3,4,5
+ nmacchws 3,4,5
+ nmacchws. 3,4,5
+ nmacchwso 3,4,5
+ nmacchwso. 3,4,5
+ nmachhw 3,4,5
+ nmachhw. 3,4,5
+ nmachhwo 3,4,5
+ nmachhwo. 3,4,5
+ nmachhws 3,4,5
+ nmachhws. 3,4,5
+ nmachhwso 3,4,5
+ nmachhwso. 3,4,5
+ nmaclhw 3,4,5
+ nmaclhw. 3,4,5
+ nmaclhwo 3,4,5
+ nmaclhwo. 3,4,5
+ nmaclhws 3,4,5
+ nmaclhws. 3,4,5
+ nmaclhwso 3,4,5
+ nmaclhwso. 3,4,5
+ nor 20,21,22
+ nor. 20,21,22
+ or 0,2,4
+ or. 12,14,16
+ orc 15,16,17
+ orc. 18,19,20
+ ori 1,1,0
+ oris 3,4,0xdead
+ popcntb 3,4
+ prtyw 3,4
+ rfci
+ rfi
+ rfmci
+ rlwimi 3,4,12,20,27
+ rlwimi. 3,4,12,20,27
+ rlwinm 3,4,0,0,27
+ rlwinm 3,4,26,6,31
+ rlwinm 3,4,4,0,19
+ rlwinm. 3,4,0,0,27
+ rlwnm 3,4,5,0,31
+ rlwnm. 3,4,5,0,31
+ rotlw 3,4,5
+ rotlw. 3,4,5
+ sc
+ slw 3,4,5
+ slw. 3,4,5
+ sraw 3,4,5
+ sraw. 3,4,5
+ srawi 3,4,16
+ srawi. 3,4,16
+ srw 3,4,5
+ srw. 3,4,5
+ srwi 3,4,6
+ stb 11,2(1)
+ stbu 12,3(1)
+ stbux 13,14,15
+ stbx 3,4,5
+ stfd 25,32(1)
+ stfdu 26,40(1)
+ stfdux 0,1,2
+ stfdx 29,30,31
+ stfiwx 10,3,4
+ stfs 23,20(1)
+ stfsu 24,24(1)
+ stfsux 26,27,28
+ stfsx 23,24,25
+ sth 17,10(1)
+ sthbrx 6,7,8
+ sthu 18,12(1)
+ sthux 21,22,23
+ sthx 12,13,14
+ stmw 6,-16(1)
+ stswi 3,4,16
+ stswx 3,4,5
+ stw 6,-16(7)
+ stwbrx 3,4,5
+ stwcx. 3,4,5
+ stwu 3,16(1)
+ stwux 3,4,5
+ stwx 3,4,5
+ subf 3,4,5
+ subf. 3,4,5
+ subfc 3,4,5
+ subfc. 3,4,5
+ subfco 3,4,5
+ subfco. 3,4,5
+ subfe 3,4,5
+ subfe. 3,4,5
+ subfeo 3,4,5
+ subfeo. 3,4,5
+ subfic 3,4,5
+ subfme 3,4
+ subfme. 3,4
+ subfmeo 3,4
+ subfmeo. 3,4
+ subfo 3,4,5
+ subfo. 3,4,5
+ subfze 3,4
+ subfze. 3,4
+ subfzeo 3,4
+ subfzeo. 3,4
+ tlbivax 7, 8
+ tlbre 1, 2, 7
+ tlbsx 11, 12
+ tlbsx 12, 13, 14
+ tlbsx. 12, 13, 14
+ tlbsync
+ tlbwe
+ tlbwe 0,0,0
+ tlbwe 1,1,1
+ trap
+ tw 31,0,0
+ tw 4,3,4
+ tw 5,3,4
+ tweq 3,4
+ twgti 3,15
+ twi 6,3,15
+ twi 8,3,15
+ twlge 3,4
+ twllei 3,15
+ wrtee 3
+ wrteei 1
+ xor 29,30,31
+ xor. 29,30,31
+ xori 3,4,0xdead
+ xoris 3,4,0xdead
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index 5c4af17619..0c8d8527d6 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -49,5 +49,6 @@ if { [istarget powerpc*-*-*] } then {
run_dump_test "power6"
run_dump_test "power7"
run_dump_test "vsx"
+ run_dump_test "476"
}
}
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 8a86f4bdc8..44d1432a2b 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2009-10-02 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc.h (PPC_OPCODE_476): Define.
+
2009-10-01 Peter Bergner <bergner@vnet.ibm.com>
* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index 4e147eb89d..1dc2f1d941 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -170,6 +170,9 @@ extern const int powerpc_num_opcodes;
/* Opcode is supported by A2. */
#define PPC_OPCODE_A2 0x100000000ULL
+/* Opcode is supported by PowerPC 476 processor. */
+#define PPC_OPCODE_476 0x200000000ULL
+
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index fd7f3467f8..347f98d20d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2009-10-02 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc-dis.c (ppc_opts): Add "476" entry.
+ * ppc-opc.c (PPC476): Define.
+ (powerpc_opcodes): Update mnemonics where required for 476.
+
2009-10-01 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index 3af02bc9fb..ac88f7698e 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -62,6 +62,10 @@ struct ppc_mopt ppc_opts[] = {
{ "464", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
| PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI),
0 },
+ { "476", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
+ | PPC_OPCODE_440 | PPC_OPCODE_476 | PPC_OPCODE_POWER4
+ | PPC_OPCODE_POWER5),
+ 0 },
{ "601", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_601
| PPC_OPCODE_32),
0 },
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 4b1b9908ac..123436c472 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -1906,6 +1906,7 @@ extract_dm (unsigned long insn,
#define PPC405 PPC_OPCODE_405
#define PPC440 PPC_OPCODE_440
#define PPC464 PPC440
+#define PPC476 PPC_OPCODE_476
#define PPC750 PPC
#define PPC7450 PPC
#define PPC860 PPC
@@ -1957,7 +1958,7 @@ extract_dm (unsigned long insn,
constrained otherwise by disassembler operation. */
const struct powerpc_opcode powerpc_opcodes[] = {
-{"attn", X(0,256), X_MASK, POWER4|PPCA2, PPCNONE, {0}},
+{"attn", X(0,256), X_MASK, POWER4|PPCA2, PPC476, {0}},
{"tdlgti", OPTO(2,TOLGT), OPTO_MASK, PPC64, PPCNONE, {RA, SI}},
{"tdllti", OPTO(2,TOLLT), OPTO_MASK, PPC64, PPCNONE, {RA, SI}},
{"tdeqi", OPTO(2,TOEQ), OPTO_MASK, PPC64, PPCNONE, {RA, SI}},
@@ -2383,8 +2384,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"evmhessf", VX (4,1027), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"vand", VX (4,1028), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vcmpequb.", VXR(4, 6,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi0fcm.", APU(4, 515,0), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
-{"udi0fcm", APU(4, 515,1), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
+{"udi0fcm.", APU(4, 515,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
+{"udi0fcm", APU(4, 515,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"evmhossf", VX (4,1031), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmheumi", VX (4,1032), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmhesmi", VX (4,1033), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
@@ -2410,8 +2411,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vavguh", VX (4,1090), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vandc", VX (4,1092), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vcmpequh.", VXR(4, 70,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi1fcm.", APU(4, 547,0), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
-{"udi1fcm", APU(4, 547,1), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
+{"udi1fcm.", APU(4, 547,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
+{"udi1fcm", APU(4, 547,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"evmwhssf", VX (4,1095), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmwlumi", VX (4,1096), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"vminfp", VX (4,1098), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
@@ -2442,8 +2443,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vavguw", VX (4,1154), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vor", VX (4,1156), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vcmpequw.", VXR(4, 134,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
-{"udi2fcm", APU(4, 579,1), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
+{"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
+{"udi2fcm", APU(4, 579,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"machhwsuo", XO (4, 76,1,0),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"machhwsuo.", XO (4, 76,1,1),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"ps_merge10", XOPS(4,592,0), XOPS_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
@@ -2456,8 +2457,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vxor", VX (4,1220), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"evdivws", VX (4,1222), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"vcmpeqfp.", VXR(4, 198,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi3fcm.", APU(4, 611,0), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
-{"udi3fcm", APU(4, 611,1), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
+{"udi3fcm.", APU(4, 611,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
+{"udi3fcm", APU(4, 611,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"evdivwu", VX (4,1223), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evaddumiaaw", VX (4,1224), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
{"evaddsmiaaw", VX (4,1225), VX_MASK, PPCSPE, PPCNONE, {RS, RA}},
@@ -2476,8 +2477,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"evmhousiaaw", VX (4,1284), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"vnor", VX (4,1284), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"evmhossiaaw", VX (4,1285), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"udi4fcm.", APU(4, 643,0), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
-{"udi4fcm", APU(4, 643,1), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
+{"udi4fcm.", APU(4, 643,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
+{"udi4fcm", APU(4, 643,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"evmhossfaaw", VX (4,1287), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmheumiaaw", VX (4,1288), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmhesmiaaw", VX (4,1289), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
@@ -2496,8 +2497,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"evmwlusiaaw", VX (4,1344), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmwlssiaaw", VX (4,1345), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"vavgsh", VX (4,1346), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi5fcm.", APU(4, 675,0), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
-{"udi5fcm", APU(4, 675,1), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
+{"udi5fcm.", APU(4, 675,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
+{"udi5fcm", APU(4, 675,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"evmwlumiaaw", VX (4,1352), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmwlsmiaaw", VX (4,1353), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmwssfaa", VX (4,1363), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
@@ -2515,8 +2516,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"evmhessfanw", VX (4,1411), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmhousianw", VX (4,1412), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmhossianw", VX (4,1413), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
-{"udi6fcm.", APU(4, 707,0), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
-{"udi6fcm", APU(4, 707,1), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
+{"udi6fcm.", APU(4, 707,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
+{"udi6fcm", APU(4, 707,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"evmhossfanw", VX (4,1415), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmheumianw", VX (4,1416), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmhesmianw", VX (4,1417), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
@@ -2535,8 +2536,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"evmwlusianw", VX (4,1472), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmwlssianw", VX (4,1473), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"vcmpgefp.", VXR(4, 454,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi7fcm.", APU(4, 739,0), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
-{"udi7fcm", APU(4, 739,1), APU_MASK, PPC405|PPC440, PPCNONE, {URT, URA, URB}},
+{"udi7fcm.", APU(4, 739,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
+{"udi7fcm", APU(4, 739,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
{"evmwlumianw", VX (4,1480), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmwlsmianw", VX (4,1481), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
{"evmwssfan", VX (4,1491), VX_MASK, PPCSPE, PPCNONE, {RS, RA, RB}},
@@ -2550,48 +2551,48 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vsububs", VX (4,1536), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"mfvscr", VX (4,1540), VX_MASK, PPCVEC, PPCNONE, {VD}},
{"vcmpgtub.", VXR(4, 518,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi8fcm.", APU(4, 771,0), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
-{"udi8fcm", APU(4, 771,1), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
+{"udi8fcm.", APU(4, 771,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
+{"udi8fcm", APU(4, 771,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"vsum4ubs", VX (4,1544), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vsubuhs", VX (4,1600), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"mtvscr", VX (4,1604), VX_MASK, PPCVEC, PPCNONE, {VB}},
{"vcmpgtuh.", VXR(4, 582,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vsum4shs", VX (4,1608), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi9fcm.", APU(4, 804,0), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
-{"udi9fcm", APU(4, 804,1), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
+{"udi9fcm.", APU(4, 804,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
+{"udi9fcm", APU(4, 804,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"vsubuws", VX (4,1664), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vcmpgtuw.", VXR(4, 646,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi10fcm.", APU(4, 835,0), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
-{"udi10fcm", APU(4, 835,1), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
+{"udi10fcm.", APU(4, 835,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
+{"udi10fcm", APU(4, 835,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"vsum2sws", VX (4,1672), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vcmpgtfp.", VXR(4, 710,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi11fcm.", APU(4, 867,0), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
-{"udi11fcm", APU(4, 867,1), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
+{"udi11fcm.", APU(4, 867,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
+{"udi11fcm", APU(4, 867,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"vsubsbs", VX (4,1792), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vcmpgtsb.", VXR(4, 774,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi12fcm.", APU(4, 899,0), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
-{"udi12fcm", APU(4, 899,1), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
+{"udi12fcm.", APU(4, 899,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
+{"udi12fcm", APU(4, 899,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"vsum4sbs", VX (4,1800), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"maclhwuo", XO (4, 396,1,0),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"maclhwuo.", XO (4, 396,1,1),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"vsubshs", VX (4,1856), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vcmpgtsh.", VXR(4, 838,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi13fcm.", APU(4, 931,0), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
-{"udi13fcm", APU(4, 931,1), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
+{"udi13fcm.", APU(4, 931,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
+{"udi13fcm", APU(4, 931,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"maclhwo", XO (4, 428,1,0),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"maclhwo.", XO (4, 428,1,1),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"nmaclhwo", XO (4, 430,1,0),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"nmaclhwo.", XO (4, 430,1,1),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"vsubsws", VX (4,1920), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"vcmpgtsw.", VXR(4, 902,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi14fcm.", APU(4, 963,0), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
-{"udi14fcm", APU(4, 963,1), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
+{"udi14fcm.", APU(4, 963,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
+{"udi14fcm", APU(4, 963,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"vsumsws", VX (4,1928), VX_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
{"maclhwsuo", XO (4, 460,1,0),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"maclhwsuo.", XO (4, 460,1,1),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"vcmpbfp.", VXR(4, 966,1), VXR_MASK, PPCVEC, PPCNONE, {VD, VA, VB}},
-{"udi15fcm.", APU(4, 995,0), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
-{"udi15fcm", APU(4, 995,1), APU_MASK, PPC440, PPCNONE, {URT, URA, URB}},
+{"udi15fcm.", APU(4, 995,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
+{"udi15fcm", APU(4, 995,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
{"maclhwso", XO (4, 492,1,0),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"maclhwso.", XO (4, 492,1,1),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
{"nmaclhwso", XO (4, 494,1,0),XO_MASK, PPC405|PPC440, PPCNONE, {RT, RA, RB}},
@@ -3150,11 +3151,11 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"crnot", XL(19,33), XL_MASK, PPCCOM, PPCNONE, {BT, BA, BBA}},
{"crnor", XL(19,33), XL_MASK, COM, PPCNONE, {BT, BA, BB}},
-{"rfmci", X(19,38), 0xffffffff, PPCRFMCI|PPCA2, PPCNONE, {0}},
+{"rfmci", X(19,38), 0xffffffff, PPCRFMCI|PPCA2|PPC476, PPCNONE, {0}},
{"rfdi", XL(19,39), 0xffffffff, E500MC, PPCNONE, {0}},
{"rfi", XL(19,50), 0xffffffff, COM, PPCNONE, {0}},
-{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2, PPCNONE, {0}},
+{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCNONE, {0}},
{"rfsvc", XL(19,82), 0xffffffff, POWER, PPCNONE, {0}},
@@ -3174,7 +3175,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"crand", XL(19,257), XL_MASK, COM, PPCNONE, {BT, BA, BB}},
-{"hrfid", XL(19,274), 0xffffffff, POWER5|CELL, PPCNONE, {0}},
+{"hrfid", XL(19,274), 0xffffffff, POWER5|CELL, PPC476, {0}},
{"crset", XL(19,289), XL_MASK, PPCCOM, PPCNONE, {BT, BAT, BBA}},
{"creqv", XL(19,289), XL_MASK, COM, PPCNONE, {BT, BA, BB}},
@@ -3487,7 +3488,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"ldx", X(31,21), X_MASK, PPC64, PPCNONE, {RT, RA0, RB}},
-{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2, PPCNONE, {CT, RA, RB}},
+{"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, PPCNONE, {CT, RA, RB}},
{"lwzx", X(31,23), X_MASK, PPCCOM, PPCNONE, {RT, RA0, RB}},
{"lx", X(31,23), X_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
@@ -3593,7 +3594,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"ldarx", X(31,84), XEH_MASK, PPC64, PPCNONE, {RT, RA0, RB, EH}},
-{"dcbfl", XOPL(31,86,1), XRT_MASK, POWER5, PPCNONE, {RA, RB}},
+{"dcbfl", XOPL(31,86,1), XRT_MASK, POWER5, PPC476, {RA, RB}},
{"dcbf", X(31,86), XLRT_MASK, PPC, PPCNONE, {RA, RB, L}},
{"lbzx", X(31,87), X_MASK, COM, PPCNONE, {RT, RA0, RB}},
@@ -3626,9 +3627,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dcbfep", XRT(31,127,0), XRT_MASK, E500MC|PPCA2, PPCNONE, {RA, RB}},
-{"wrtee", X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2, PPCNONE, {RS}},
+{"wrtee", X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {RS}},
-{"dcbtstls", X(31,134), X_MASK, PPCCHLK, PPCNONE, {CT, RA, RB}},
+{"dcbtstls", X(31,134), X_MASK, PPCCHLK|PPC476, PPCNONE, {CT, RA, RB}},
{"stvebx", X(31,135), X_MASK, PPCVEC, PPCNONE, {VS, RA, RB}},
{"stbfcmx", APU(31,135,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
@@ -3667,15 +3668,15 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"sle", XRC(31,153,0), X_MASK, M601, PPCNONE, {RA, RS, RB}},
{"sle.", XRC(31,153,1), X_MASK, M601, PPCNONE, {RA, RS, RB}},
-{"prtyw", X(31,154), XRB_MASK, POWER6|PPCA2, PPCNONE, {RA, RS}},
+{"prtyw", X(31,154), XRB_MASK, POWER6|PPCA2|PPC476, PPCNONE, {RA, RS}},
{"stdepx", X(31,157), X_MASK, E500MC|PPCA2, PPCNONE, {RS, RA, RB}},
{"stwepx", X(31,159), X_MASK, E500MC|PPCA2, PPCNONE, {RS, RA, RB}},
-{"wrteei", X(31,163), XE_MASK, PPC403|BOOKE|PPCA2, PPCNONE, {E}},
+{"wrteei", X(31,163), XE_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {E}},
-{"dcbtls", X(31,166), X_MASK, PPCCHLK, PPCNONE, {CT, RA, RB}},
+{"dcbtls", X(31,166), X_MASK, PPCCHLK|PPC476, PPCNONE, {CT, RA, RB}},
{"stvehx", X(31,167), X_MASK, PPCVEC, PPCNONE, {VS, RA, RB}},
{"sthfcmx", APU(31,167,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
@@ -3731,7 +3732,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"stbepx", X(31,223), X_MASK, E500MC|PPCA2, PPCNONE, {RS, RA, RB}},
-{"icblc", X(31,230), X_MASK, PPCCHLK, PPCNONE, {CT, RA, RB}},
+{"icblc", X(31,230), X_MASK, PPCCHLK|PPC476, PPCNONE, {CT, RA, RB}},
{"stvx", X(31,231), X_MASK, PPCVEC, PPCNONE, {VS, RA, RB}},
{"stqfcmx", APU(31,231,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
@@ -3772,7 +3773,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dcbtstep", XRT(31,255,0), X_MASK, E500MC|PPCA2, PPCNONE, {RT, RA, RB}},
-{"mfdcrx", X(31,259), X_MASK, BOOKE|PPCA2, PPCNONE, {RS, RA}},
+{"mfdcrx", X(31,259), X_MASK, BOOKE|PPCA2|PPC476, PPCNONE, {RS, RA}},
{"mfdcrx.", XRC(31,259,1), X_MASK, PPCA2, PPCNONE, {RS, RA}},
{"icbt", X(31,262), XRT_MASK, PPC403, PPCNONE, {RA, RB}},
@@ -3788,7 +3789,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"ehpriv", X(31,270), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}},
-{"tlbiel", X(31,274), XRTLRA_MASK, POWER4, PPCNONE, {RB, L}},
+{"tlbiel", X(31,274), XRTLRA_MASK, POWER4, PPC476, {RB, L}},
{"mfapidi", X(31,275), X_MASK, BOOKE, PPCNONE, {RT, RA}},
@@ -3858,9 +3859,11 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfdmasa3", XSPR(31,323,219), XSPR_MASK, PPC403, PPCNONE, {RT}},
{"mfdmacc3", XSPR(31,323,220), XSPR_MASK, PPC403, PPCNONE, {RT}},
{"mfdmasr", XSPR(31,323,224), XSPR_MASK, PPC403, PPCNONE, {RT}},
-{"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2, PPCNONE, {RT, SPR}},
+{"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {RT, SPR}},
{"mfdcr.", XRC(31,323,1), X_MASK, PPCA2, PPCNONE, {RT, SPR}},
+{"dcread", X(31,326), X_MASK, PPC476, PPCNONE, {RT, RA, RB}},
+
{"div", XO(31,331,0,0), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
{"div.", XO(31,331,0,1), XO_MASK, M601, PPCNONE, {RT, RA, RB}},
@@ -4082,10 +4085,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"popcntw", X(31,378), XRB_MASK, POWER7|PPCA2, PPCNONE, {RA, RS}},
-{"mtdcrx", X(31,387), X_MASK, BOOKE|PPCA2, PPCNONE, {RA, RS}},
+{"mtdcrx", X(31,387), X_MASK, BOOKE|PPCA2|PPC476, PPCNONE, {RA, RS}},
{"mtdcrx.", XRC(31,387,1), X_MASK, PPCA2, PPCNONE, {RA, RS}},
-{"dcblc", X(31,390), X_MASK, PPCCHLK, PPCNONE, {CT, RA, RB}},
+{"dcblc", X(31,390), X_MASK, PPCCHLK|PPC476, PPCNONE, {CT, RA, RB}},
{"stdfcmx", APU(31,391,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
{"divdeu", XO(31,393,0,0), XO_MASK, POWER7, PPCNONE, {RT, RA, RB}},
@@ -4161,11 +4164,11 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtdmasa3", XSPR(31,451,219), XSPR_MASK, PPC403, PPCNONE, {RS}},
{"mtdmacc3", XSPR(31,451,220), XSPR_MASK, PPC403, PPCNONE, {RS}},
{"mtdmasr", XSPR(31,451,224), XSPR_MASK, PPC403, PPCNONE, {RS}},
-{"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2, PPCNONE, {SPR, RS}},
+{"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {SPR, RS}},
{"mtdcr.", XRC(31,451,1), X_MASK, PPCA2, PPCNONE, {SPR, RS}},
-{"dccci", X(31,454), XRT_MASK, PPC403|PPC440, PPCA2, {RA, RB}},
-{"dci", X(31,454), XRARB_MASK, PPCA2, PPCNONE, {CT}},
+{"dccci", X(31,454), XRT_MASK, PPC403|PPC440, PPCA2|PPC476, {RA, RB}},
+{"dci", X(31,454), XRARB_MASK, PPCA2|PPC476, PPCNONE, {CT}},
{"divdu", XO(31,457,0,0), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
{"divdu.", XO(31,457,0,1), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
@@ -4336,9 +4339,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dsn", X(31,483), XRT_MASK, E500MC, PPCNONE, {RA, RB}},
-{"dcread", X(31,486), X_MASK, PPC403|PPC440, PPCA2, {RT, RA, RB}},
+{"dcread", X(31,486), X_MASK, PPC403|PPC440, PPCA2|PPC476, {RT, RA, RB}},
-{"icbtls", X(31,486), X_MASK, PPCCHLK, PPCNONE, {CT, RA, RB}},
+{"icbtls", X(31,486), X_MASK, PPCCHLK|PPC476, PPCNONE, {CT, RA, RB}},
{"stvxl", X(31,487), X_MASK, PPCVEC, PPCNONE, {VS, RA, RB}},
@@ -4359,7 +4362,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"popcntd", X(31,506), XRB_MASK, POWER7|PPCA2, PPCNONE, {RA, RS}},
-{"cmpb", X(31,508), X_MASK, POWER6|PPCA2, PPCNONE, {RA, RS, RB}},
+{"cmpb", X(31,508), X_MASK, POWER6|PPCA2|PPC476, PPCNONE, {RA, RS, RB}},
{"mcrxr", X(31,512), XRARB_MASK|(3<<21), COM, POWER7, {BF}},
@@ -4437,8 +4440,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lwsync", XSYNC(31,598,1), 0xffffffff, PPC, PPCNONE, {0}},
{"ptesync", XSYNC(31,598,2), 0xffffffff, PPC64, PPCNONE, {0}},
-{"sync", X(31,598), XSYNC_MASK, PPCCOM, BOOKE, {LS}},
-{"msync", X(31,598), 0xffffffff, BOOKE|PPCA2, PPCNONE, {0}},
+{"sync", X(31,598), XSYNC_MASK, PPCCOM, BOOKE|PPC476, {LS}},
+{"msync", X(31,598), 0xffffffff, BOOKE|PPCA2|PPC476, PPCNONE, {0}},
{"dcs", X(31,598), 0xffffffff, PWRCOM, PPCNONE, {0}},
{"lfdx", X(31,599), X_MASK, COM, PPCNONE, {FRT, RA0, RB}},
@@ -4565,7 +4568,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mullwo.", XO(31,235,1,1), XO_MASK, PPCCOM, PPCNONE, {RT, RA, RB}},
{"mulso.", XO(31,235,1,1), XO_MASK, PWRCOM, PPCNONE, {RT, RA, RB}},
-{"dcba", X(31,758), XRT_MASK, PPC405|PPC7450|BOOKE|PPCA2, PPCNONE, {RA, RB}},
+{"dcba", X(31,758), XRT_MASK, PPC405|PPC7450|BOOKE|PPCA2|PPC476, PPCNONE, {RA, RB}},
{"dcbal", XOPL(31,758,1), XRT_MASK, E500MC, PPCNONE, {RA, RB}},
{"stfdux", X(31,759), X_MASK, COM, PPCNONE, {FRS, RAS, RB}},
@@ -4586,7 +4589,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lxvw4x", X(31,780), XX1_MASK, PPCVSX, PPCNONE, {XT6, RA, RB}},
-{"tlbivax", X(31,786), XRT_MASK, BOOKE|PPCA2, PPCNONE, {RA, RB}},
+{"tlbivax", X(31,786), XRT_MASK, BOOKE|PPCA2|PPC476, PPCNONE, {RA, RB}},
{"lwzcix", X(31,789), X_MASK, POWER6, PPCNONE, {RT, RA0, RB}},
@@ -4636,11 +4639,11 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lbzcix", X(31,853), X_MASK, POWER6, PPCNONE, {RT, RA0, RB}},
-{"eieio", X(31,854), 0xffffffff, PPC, BOOKE|PPCA2, {0}},
-{"mbar", X(31,854), X_MASK, BOOKE|PPCA2, PPCNONE, {MO}},
-{"eieio", X(31,854), 0xffffffff, PPCA2, PPCNONE, {0}},
+{"eieio", X(31,854), 0xffffffff, PPC, BOOKE|PPCA2|PPC476, {0}},
+{"mbar", X(31,854), X_MASK, BOOKE|PPCA2|PPC476, PPCNONE, {MO}},
+{"eieio", X(31,854), 0xffffffff, PPCA2|PPC476, PPCNONE, {0}},
-{"lfiwax", X(31,855), X_MASK, POWER6|PPCA2, PPCNONE, {FRT, RA0, RB}},
+{"lfiwax", X(31,855), X_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FRT, RA0, RB}},
{"abso", XO(31,360,1,0), XORB_MASK, M601, PPCNONE, {RT, RA}},
{"abso.", XO(31,360,1,1), XORB_MASK, M601, PPCNONE, {RT, RA}},
@@ -4662,8 +4665,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"stxvw4x", X(31,908), XX1_MASK, PPCVSX, PPCNONE, {XS6, RA, RB}},
-{"tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE|PPCA2, PPCNONE, {RTO, RA, RB}},
-{"tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE|PPCA2, PPCNONE, {RTO, RA, RB}},
+{"tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {RTO, RA, RB}},
+{"tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {RTO, RA, RB}},
{"slbmfee", X(31,915), XRA_MASK, PPC64, PPCNONE, {RT, RB}},
@@ -4696,7 +4699,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, PPCA2, {RT, RA}},
{"tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, PPCA2, {RT, RA}},
-{"tlbre", X(31,946), X_MASK, PPC403|BOOKE|PPCA2, PPCNONE, {RSO, RAOPT, SHO}},
+{"tlbre", X(31,946), X_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {RSO, RAOPT, SHO}},
{"sthcix", X(31,949), X_MASK, POWER6, PPCNONE, {RS, RA0, RB}},
@@ -4708,8 +4711,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"extsb", XRC(31,954,0), XRB_MASK, PPC, PPCNONE, {RA, RS}},
{"extsb.", XRC(31,954,1), XRB_MASK, PPC, PPCNONE, {RA, RS}},
-{"iccci", X(31,966), XRT_MASK, PPC403|PPC440, PPCNONE, {RA, RB}},
-{"ici", X(31,966), XRARB_MASK, PPCA2, PPCNONE, {CT}},
+{"iccci", X(31,966), XRT_MASK, PPC403|PPC440, PPC476, {RA, RB}},
+{"ici", X(31,966), XRARB_MASK, PPCA2|PPC476, PPCNONE, {CT}},
{"divduo", XO(31,457,1,0), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
{"divduo.", XO(31,457,1,1), XO_MASK, PPC64, PPCNONE, {RT, RA, RB}},
@@ -4719,10 +4722,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"stxvd2x", X(31,972), XX1_MASK, PPCVSX, PPCNONE, {XS6, RA, RB}},
-{"tlbld", X(31,978), XRTRA_MASK, PPC, PPC403|BOOKE|PPCA2, {RB}},
+{"tlbld", X(31,978), XRTRA_MASK, PPC, PPC403|BOOKE|PPCA2|PPC476, {RB}},
{"tlbwehi", XTLB(31,978,0), XTLB_MASK, PPC403, PPCNONE, {RT, RA}},
{"tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, PPCNONE, {RT, RA}},
-{"tlbwe", X(31,978), X_MASK, PPC403|BOOKE|PPCA2, PPCNONE, {RSO, RAOPT, SHO}},
+{"tlbwe", X(31,978), X_MASK, PPC403|BOOKE|PPCA2|PPC476, PPCNONE, {RSO, RAOPT, SHO}},
{"stbcix", X(31,981), X_MASK, POWER6, PPCNONE, {RS, RA0, RB}},
@@ -4735,7 +4738,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"icbiep", XRT(31,991,0), XRT_MASK, E500MC|PPCA2, PPCNONE, {RA, RB}},
-{"icread", X(31,998), XRT_MASK, PPC403|PPC440, PPCNONE, {RA, RB}},
+{"icread", X(31,998), XRT_MASK, PPC403|PPC440|PPC476, PPCNONE, {RA, RB}},
{"nabso", XO(31,488,1,0), XORB_MASK, M601, PPCNONE, {RT, RA}},
{"nabso.", XO(31,488,1,1), XORB_MASK, M601, PPCNONE, {RT, RA}},
@@ -4755,7 +4758,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dcbzep", XRT(31,1023,0), XRT_MASK, E500MC|PPCA2, PPCNONE, {RA, RB}},
-{"dcbzl", XOPL(31,1014,1), XRT_MASK, POWER4|E500MC, PPCNONE, {RA, RB}},
+{"dcbzl", XOPL(31,1014,1), XRT_MASK, POWER4|E500MC, PPC476, {RA, RB}},
{"cctpl", 0x7c210b78, 0xffffffff, CELL, PPCNONE, {0}},
{"cctpm", 0x7c421378, 0xffffffff, CELL, PPCNONE, {0}},
@@ -4824,7 +4827,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"stfdu", OP(55), OP_MASK, COM, PPCNONE, {FRS, D, RAS}},
-{"lq", OP(56), OP_MASK, POWER4, PPCNONE, {RTQ, DQ, RAQ}},
+{"lq", OP(56), OP_MASK, POWER4, PPC476, {RTQ, DQ, RAQ}},
{"psq_l", OP(56), OP_MASK, PPCPS, PPCNONE, {FRT,PSD,RA,PSW,PSQ}},
{"lfq", OP(56), OP_MASK, POWER2, PPCNONE, {FRT, D, RA0}},
@@ -5097,7 +5100,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"std", DSO(62,0), DS_MASK, PPC64, PPCNONE, {RS, DS, RA0}},
{"stdu", DSO(62,1), DS_MASK, PPC64, PPCNONE, {RS, DS, RAS}},
-{"stq", DSO(62,2), DS_MASK, POWER4, PPCNONE, {RSQ, DS, RA0}},
+{"stq", DSO(62,2), DS_MASK, POWER4, PPC476, {RSQ, DS, RA0}},
{"fcmpu", X(63,0), X_MASK|(3<<21), COM, PPCNONE, {BF, FRA, FRB}},
@@ -5107,8 +5110,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dquaq", ZRC(63,3,0), Z2_MASK, POWER6, PPCNONE, {FRT, FRA, FRB, RMC}},
{"dquaq.", ZRC(63,3,1), Z2_MASK, POWER6, PPCNONE, {FRT, FRA, FRB, RMC}},
-{"fcpsgn", XRC(63,8,0), X_MASK, POWER6|PPCA2, PPCNONE, {FRT, FRA, FRB}},
-{"fcpsgn.", XRC(63,8,1), X_MASK, POWER6|PPCA2, PPCNONE, {FRT, FRA, FRB}},
+{"fcpsgn", XRC(63,8,0), X_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FRT, FRA, FRB}},
+{"fcpsgn.", XRC(63,8,1), X_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FRT, FRA, FRB}},
{"frsp", XRC(63,12,0), XRA_MASK, COM, PPCNONE, {FRT, FRB}},
{"frsp.", XRC(63,12,1), XRA_MASK, COM, PPCNONE, {FRT, FRB}},
@@ -5217,10 +5220,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dcmpoq", X(63,130), X_MASK, POWER6, PPCNONE, {BF, FRA, FRB}},
-{"mtfsfi", XRC(63,134,0), XWRA_MASK|(3<<21)|(1<<11), POWER6|PPCA2, PPCNONE, {BFF, U, W}},
-{"mtfsfi", XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), COM, POWER6|PPCA2, {BFF, U}},
-{"mtfsfi.", XRC(63,134,1), XWRA_MASK|(3<<21)|(1<<11), POWER6|PPCA2, PPCNONE, {BFF, U, W}},
-{"mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), COM, POWER6|PPCA2, {BFF, U}},
+{"mtfsfi", XRC(63,134,0), XWRA_MASK|(3<<21)|(1<<11), POWER6|PPCA2|PPC476, PPCNONE, {BFF, U, W}},
+{"mtfsfi", XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), COM, POWER6|PPCA2|PPC476, {BFF, U}},
+{"mtfsfi.", XRC(63,134,1), XWRA_MASK|(3<<21)|(1<<11), POWER6|PPCA2|PPC476, PPCNONE, {BFF, U, W}},
+{"mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), COM, POWER6|PPCA2|PPC476, {BFF, U}},
{"fnabs", XRC(63,136,0), XRA_MASK, COM, PPCNONE, {FRT, FRB}},
{"fnabs.", XRC(63,136,1), XRA_MASK, COM, PPCNONE, {FRT, FRB}},
@@ -5276,10 +5279,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dtstsfq", X(63,674), X_MASK, POWER6, PPCNONE, {BF, FRA, FRB}},
-{"mtfsf", XFL(63,711,0), XFL_MASK, POWER6|PPCA2, PPCNONE, {FLM, FRB, XFL_L, W}},
-{"mtfsf", XFL(63,711,0), XFL_MASK, COM, POWER6|PPCA2, {FLM, FRB}},
-{"mtfsf.", XFL(63,711,1), XFL_MASK, POWER6|PPCA2, PPCNONE, {FLM, FRB, XFL_L, W}},
-{"mtfsf.", XFL(63,711,1), XFL_MASK, COM, POWER6|PPCA2, {FLM, FRB}},
+{"mtfsf", XFL(63,711,0), XFL_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FLM, FRB, XFL_L, W}},
+{"mtfsf", XFL(63,711,0), XFL_MASK, COM, POWER6|PPCA2|PPC476, {FLM, FRB}},
+{"mtfsf.", XFL(63,711,1), XFL_MASK, POWER6|PPCA2|PPC476, PPCNONE, {FLM, FRB, XFL_L, W}},
+{"mtfsf.", XFL(63,711,1), XFL_MASK, COM, POWER6|PPCA2|PPC476, {FLM, FRB}},
{"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCNONE, {FRT, FRB}},
{"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCNONE, {FRT, FRB}},
@@ -5288,16 +5291,22 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCNONE, {FRT, FRB}},
{"fctid", XRC(63,814,0), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}},
+{"fctid", XRC(63,814,0), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}},
{"fctid.", XRC(63,814,1), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}},
+{"fctid.", XRC(63,814,1), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}},
{"fctidz", XRC(63,815,0), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}},
+{"fctidz", XRC(63,815,0), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}},
{"fctidz.", XRC(63,815,1), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}},
+{"fctidz.", XRC(63,815,1), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}},
{"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCNONE, {S, FRT, FRB}},
{"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCNONE, {S, FRT, FRB}},
{"fcfid", XRC(63,846,0), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}},
+{"fcfid", XRC(63,846,0), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}},
{"fcfid.", XRC(63,846,1), XRA_MASK, PPC64, PPCNONE, {FRT, FRB}},
+{"fcfid.", XRC(63,846,1), XRA_MASK, PPC476, PPCNONE, {FRT, FRB}},
{"diexq", XRC(63,866,0), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}},
{"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCNONE, {FRT, FRA, FRB}},
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